Commit Graph

116 Commits

Author SHA1 Message Date
Gabor Juhos 2c4f1ac562 MIPS: ath79: Switch to the clkdev framework
The ath79 code uses static clock devices and
provides its own clk_{get,put} implementations.

Change the code to use dynamically allocated
clock devices and register the clocks within
the clkdev framework.

Additionally, remove the local clk_{get,put}
implementation. The clkdev framework has a
common implementation of those.

Also move the call of ath79_clock_init() from
plat_mem_init() to plat_time_init(). Otherwise
it would not be possible to use memory allocation
functions from ath79clock_init() becasuse the
memory subsystem is not yet initialized when
plat_mem_init() runs.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5780/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:18 +02:00
Gabor Juhos 6612a6885b MIPS: ath79: Use local variables for clock rates
Use local variables for ref, cpu, ddr and ahb
rates in SoC specific clock init functions.

The patch has no functional changes, it is
an interim change in preparation of the next
patch.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5781/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:18 +02:00
Gabor Juhos 59a8c10b25 MIPS: ath79: Use ath79_get_sys_clk_rate to get basic clock rates
Instead of accessing the rate field of the static
clock devices directly, use the recently introduced
helper function to get the rate of the basic clocks.

The static ath79_{ahb,cpu,ddr,ref}_clk variables
will be removed by a subsequent patch. The actual
change is in preparation of that.

Also move the clock frequency printing code into
the plat_time_init function. We are getting the
cpu clock rate there already so we can save an
extra call of the helper.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5782/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:17 +02:00
Gabor Juhos 2310780244 MIPS: ath79: Use a helper function to get system clock rates
The ath79 platform uses similar code to get the
rate of various clocks during init. Separate the
similar code into a new helper function and use
that to avoid code duplication.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5778/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:17 +02:00
Gabor Juhos 837f036c8a MIPS: ath79: Use local ref clock rate in ar934x_get_pll_freq
The reference clock rate is passed in the first
argument of the function. Use that instead of the
rate of the global ath79_ref_clk variable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5779/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:17 +02:00
Felix Fietkau a1191927ac MIPS: ath79: Fix ar933x watchdog clock
The watchdog device on the AR933x is connected to
the AHB clock, however the current code uses the
reference clock. Due to the wrong rate, the watchdog
driver can't calculate correct register values for
a given timeout value and the watchdog unexpectedly
restarts the system.

The code uses the wrong value since the initial
commit 04225e1d22
(MIPS: ath79: add AR933X specific clock init)

The patch fixes the code to use the correct clock
rate to avoid the problem.

Cc: stable@vger.kernel.org
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5777/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:16 +02:00
Paul Gortmaker 078a55fc82 MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.

The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications.  For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out.  Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit  -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings.  In any case, they are temporary and harmless.

Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files.  MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.

[1] https://lkml.org/lkml/2013/5/20/589

[ralf@linux-mips.org: Folded in Paul's followup fix.]

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-14 19:36:51 -04:00
Markos Chandras 970cb7b963 MIPS: ath79: Fix argument for the ap136_pc_init function
ap136_pci_init expects a u8 pointer as an argument.

Fixes the following build problem on a randconfig:
arch/mips/ath79/mach-ap136.c:151:2: error:
too many arguments to function 'ap136_pci_init'

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5476/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-21 18:07:02 +02:00
Ralf Baechle bdc92d74e0 MIPS: Idle: Consolidate all declarations in <asm/idle.h>.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-22 01:34:27 +02:00
John Crispin 9b75733b7b MIPS: ath79: make use of the new memory detection code
There is now a generic function for detecting memory size. Use this instead of
the one found in the ath79 support.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5149/
2013-05-08 01:19:12 +02:00
Linus Torvalds 68b86a2522 Merge git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck:
 "This contains:
   - fixes and improvements
   - devicetree bindings
   - conversion to watchdog generic framework of the following drivers:
        - booke_wdt
        - bcm47xx_wdt.c
        - at91sam9_wdt
   - Removal of old STMP3xxx driver
   - Addition of following new drivers:
        - new driver for STMP3xxx and i.MX23/28
        - Retu watchdog driver"

* git://www.linux-watchdog.org/linux-watchdog: (30 commits)
  watchdog: sp805_wdt depends on ARM
  watchdog: davinci_wdt: update to devm_* API
  watchdog: davinci_wdt: use devm managed clk get
  watchdog: at91rm9200: add DT support
  watchdog: add timeout-sec property binding
  watchdog: at91sam9_wdt: Convert to use the watchdog framework
  watchdog: omap_wdt: Add option nowayout
  watchdog: core: dt: add support for the timeout-sec dt property
  watchdog: bcm47xx_wdt.c: add hard timer
  watchdog: bcm47xx_wdt.c: rename wdt_time to timeout
  watchdog: bcm47xx_wdt.c: rename ops methods
  watchdog: bcm47xx_wdt.c: use platform device
  watchdog: bcm47xx_wdt.c: convert to watchdog core api
  watchdog: Convert BookE watchdog driver to watchdog infrastructure
  watchdog: s3c2410_wdt: Use devm_* functions
  watchdog: remove old STMP3xxx driver
  watchdog: add new driver for STMP3xxx and i.MX23/28
  rtc: stmp3xxx: add wdt-accessor function
  watchdog: introduce retu_wdt driver
  watchdog: intel_scu_watchdog: fix Kconfig dependency
  ...
2013-03-03 10:23:29 -08:00
Gabor Juhos 09f5100a59 watchdog: ath79_wdt: get register base from platform device's resources
The ath79_wdt driver uses a fixed memory address
currently. Although this is working with each
currently supported SoCs, but this may change
in the future. Additionally, the driver includes
platform specific header files in order to be
able to get the memory base of the watchdog
device.

The patch adds a memory resource to the platform
device, and converts the driver to get the base
address of the watchdog device from that.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2013-03-01 12:22:38 +01:00
Gabor Juhos 0f2ad9ed7c MIPS: ath79: use dynamically allocated watchdog device
Remove the static watchdog device variable and use
the 'platform_device_register_simple' helper to
allocate and register the device in one step.

This allows us to save a few bytes in the kernel image.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2013-03-01 12:22:29 +01:00
Ralf Baechle 8bfc245f9a Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next 2013-02-21 12:51:33 +01:00
Gabor Juhos 27ea052acb MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board
Also enable the board in the default configuration.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4953/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:34 +01:00
Gabor Juhos 82c46840ae MIPS: ath79: add USB controller registration code for the QCA955X SoCs
Register platfom devices for the built-in USB
controllers of the SoCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4952/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:33 +01:00
Gabor Juhos 0a5f3b1c9f MIPS: ath79: add PCI controller registration code for the QCA955X SoCs
Add SoC specific PCI IRQ map, and register platform
devices for the two built-in PCIe RCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4951/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:32 +01:00
Gabor Juhos e9c0d0aaa3 MIPS: ath79: add WMAC registration code for the QCA955X SoCs
The SoC has a built-in wireless MAC. Register a platform
device for that to make it usable with the ath9k driver.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4956/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:30 +01:00
Gabor Juhos 13992303fa MIPS: ath79: register UART for the QCA955X SoCs
Similarly to the preceding SoCs, the QCA955X SoCs
also have a built-in NS16650 compatible UART.
Register the platform device for that to make
it usable.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4949/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:29 +01:00
Gabor Juhos 7d4c2af9bd MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}
The ath79_device_reset_* are causing BUG when
those are used on the QCA955x SoCs. The patch
adds the required code to avoid that.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4948/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:27 +01:00
Gabor Juhos f818ca3e68 MIPS: ath79: add GPIO setup code for the QCA955X SoCs
The existing code can handle the GPIO controller of
the QCA955x SoCs. Add a minimal glue code to make it
working.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4947/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:26 +01:00
Gabor Juhos 53330332f1 MIPS: ath79: add IRQ handling code for the QCA955X SoCs
The IRQ routing in the QCA955x SoCs is slightly
different from the routing implemented in the
already supported SoCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4955/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:25 +01:00
Gabor Juhos 41583c05c1 MIPS: ath79: add clock setup code for the QCA955X SoCs
The patch adds code to get various clock frequencies
from the PLLs used in the QCA955x SoCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4945/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:25 +01:00
Gabor Juhos 2e6c91e392 MIPS: ath79: add SoC detection code for the QCA955X SoCs
Also add 'soc_is_qca955[68x]' helper functions
and a Kconfig symbol for the SoC family.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4943/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:24 +01:00
Gabor Juhos 9089877970 MIPS: ath79: add early printk support for the QCA955X SoCs
The patch allows to see kernel messages on the
QCA955X SoCs in early boot stage.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4944/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:24 +01:00
Gabor Juhos e3b25cead4 MIPS: ath79: fix WMAC IRQ resource assignment
The '.start' field of the IRQ resource assigned twice
in ar934x_wmac_setup(). The second assignment must
set the '.end' field. Fix it.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4954/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:23 +01:00
Gabor Juhos 90a938d1ad MIPS: ath79: use dynamically allocated USB platform devices
The current code uses static resources and static platform
device instances for the possible USB controllers in the
system. These static variables contains initial values which
leads to data segment pollution.

Remove the static variables and use dynamically allocated
structures instead.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4933/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:42 +01:00
Gabor Juhos fd633cf1cf ath79: remove ATH79_MISC_IRQ_* defines
Use the ATH79_MISC_IRQ() macro instead.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4930/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:42 +01:00
Gabor Juhos 7e69c10a8e ath79: add ATH79_CPU_IRQ() macro
Remove the individual ATH79_CPU_IRQ_* constants and
use the new macro instead of those.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4929/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:41 +01:00
Gabor Juhos 42cb60d1fa MIPS: pci-ar71xx: remove static PCI IO/MEM resources
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4927/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:40 +01:00
Gabor Juhos 12401fc28d MIPS: pci-ar724x: setup command register of the PCI controller
The command register of the PCI controller is
not initialized correctly by the bootloader on
some boards and this leads to non working PCI
bus.

Add code to initialize the command register
from the Linux code to avoid this.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4916/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:39 +01:00
Gabor Juhos 34b134aebd MIPS: pci-ar724x: remove static PCI IO/MEM resources
Static resources become impractical when multiple
PCI controllers are present. Move the resources
into the platform device registration code and
change the probe routine to get those from there
platform device's resources.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4914/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:39 +01:00
Gabor Juhos 617fed41e9 MIPS: ath79: allow to specify bus number in PCI IRQ maps
This is needed for multiple PCI bus support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4913/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:38 +01:00
Gabor Juhos 6e783865b4 MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functions
The functions are unused now, so remove them.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4909/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:36 +01:00
Gabor Juhos 9fc1ca5b73 MIPS: ath79: register platform devices for the PCI controllers
The pci-ar71xx and pci-ar724x drivers were converted
into platform drivers. Register the corresponding
platform devices for the PCI controllers instead
of using the ar7{1x,24}x_pcibios_init functions.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4908/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:36 +01:00
Gabor Juhos 9c099c4e79 MIPS: ath79: simplify MISC IRQ handling
The current code uses multiple if statements for
demultiplexing the different interrupt sources.
Additionally, the MISC interrupt controller has
32 interrupt sources and the current code does not
handles all of them.

Get rid of the if statements and process all interrupt
sources in a loop to fix these issues.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4874/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Gabor Juhos f160a289e0 MIPS: ath79: simplify ath79_gpio_function_* routines
Make ath79_gpio_function_{en,dis}able to be wrappers
around ath79_gpio_function_setup.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4871/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Gabor Juhos 8838becdf5 MIPS: ath79: fix GPIO function selection for AR934x SoCs
GPIO function selection is not working on the AR934x
SoCs because the offset of the function selection
register is different on those.

Add a helper routine which returns the correct
register address based on the SoC type, and use
that in the 'ath79_gpio_function_*' routines.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4870/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Ralf Baechle 7034228792 MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
Alan Stern c73cee717e USB: EHCI: remove ehci_port_power() routine
This patch (as1623) removes the ehci_port_power() routine and all the
places that call it.  There's no reason for ehci-hcd to change the
port power settings; the hub driver takes care of all that stuff.

There is one exception: When the controller is resumed from
hibernation or following a loss of power, the ports that are supposed
to be handed over to a companion controller must be powered on first.
Otherwise the handover won't work.  This process is not visible to the
hub driver, so it has to be handled in ehci-hcd.

Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-10-31 12:48:07 -07:00
Gabor Juhos 97541ccfb9 MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs
Besides the CPU and DDR PLLs, the CPU and DDR frequencies
can be derived from other PLLs in the SRIF block on the
AR934x SoCs. The current code does not checks if the SRIF
PLLs are used and this can lead to incorrectly calculated
CPU/DDR frequencies.

Fix it by calculating the frequencies from SRIF PLLs if
those are used on a given board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: <stable@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4324/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-01 11:37:15 +02:00
Gabor Juhos 65fc7f9957 MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x
The current dividers in the code are wrong and this
leads to broken CPU frequency calculation on boards
where the fractional part is used.

For example, if the SoC is running from a 40MHz
reference clock, refdiv=1, nint=14, outdiv=0 and
nfrac=31 the real frequency is 579.375MHz but the
current code calculates 569.687MHz instead.

Because the system time is indirectly related to
the CPU frequency the broken computation causes
drift in the system time.

The correct divider is 2^6 for the CPU PLL and 2^10
for the DDR PLL. Use the correct values to fix the
issue.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4305/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-01 11:36:34 +02:00
Gabor Juhos a0aa4577ec MIPS: ath79: register USB host controller on the DB120 board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4173/
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-28 12:29:57 +02:00
Gabor Juhos 00ffed582f MIPS: ath79: add USB platform setup code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4172/
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-28 12:29:57 +02:00
Gabor Juhos 8d3e03e186 MIPS: ath79: use a helper function for USB resource initialization
This improves code readability, and ensures that
all resource fields will be initialized correctly.
Additionally, it helps to reduce the size of the
kernel image by using uninitialized resource
variables.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4171/
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-28 12:29:57 +02:00
Gabor Juhos 5fb234560e MIPS: ath79: Use correct IRQ number for the OHCI controller on AR7240
The currently assigned IRQ number to the OHCI controller is incorrect for
the AR7240 SoC, and that leads to the following error message from the
OHCI driver:

ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
ath79-ohci ath79-ohci: Atheros built-in OHCI controller
ath79-ohci ath79-ohci: new USB bus registered, assigned bus number 1
ath79-ohci ath79-ohci: irq 14, io mem 0x1b000000
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
usb 1-1: new full-speed USB device number 2 using ath79-ohci
ath79-ohci ath79-ohci: Unlink after no-IRQ?  Controller is probably using the wrong IRQ.

Fix this by using the correct IRQ number.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4168/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17 10:57:27 +02:00
Gabor Juhos b4da14abf2 MIPS: ath79: Fix number of GPIO lines for AR724[12]
The AR724[12] SoCs have more GPIO lines than the AR7240.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Cc: linux-mips@linux-mips.org
Patchwork: https://http://patchwork.linux-mips.org/patch/4167/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17 10:57:26 +02:00
Gabor Juhos 9598111f49 MIPS: ath79: add initial support for the Atheros DB120 board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3517/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:11 +02:00
Gabor Juhos ec9502599c MIPS: ath79: add PCI registration code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3516/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:11 +02:00
Gabor Juhos 67644c547f MIPS: ath79: add PCI_AR724X Kconfig symbol
The AR724X specific PCI code can be used for the
AR934X SoCs, however it can be selected only if
SOC_AR724X is set.

Introduce a new Kconfig symbol in order to be able
to use the code for AR934X as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3514/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:11 +02:00