Commit Graph

7 Commits

Author SHA1 Message Date
Sujith Manoharan 2c8672c13a ath9k: Fix initvals for freq 2484
This is missing for AR9300, AR9580 and AR9340.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02 14:25:04 -05:00
Sujith Manoharan 2d9507c899 ath9k: Update initvals for AR9580 v1.0
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02 14:25:03 -05:00
Sujith Manoharan dbb3e2fb4a ath9k: Remove duplicate initvals for AR9462 v2.1
The initvals for AR9462 v2.1 are very similar to v2.0.
Identify duplicate arrays and reuse the values from v2.0
to reduce module size.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02 14:25:02 -05:00
Felix Fietkau f09a878511 ath9k_hw: change AR9580 initvals to fix a stability issue
The hardware parsing of Control Wrapper Frames needs to be disabled, as
it has been causing spurious decryption error reports. The initvals for
other chips have been updated to disable it, but AR9580 was left out for
some reason.

Cc: stable@vger.kernel.org
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-04-12 13:22:09 -04:00
Felix Fietkau eab6d7921d ath9k_hw: add tx gain tables for newer devices
Improves stability on affected devices and also fixes the Tx IQ calibration
related regression on some AR9340 devices such as the TP-Link TL-WDR4300.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-01-11 14:50:00 -05:00
Felix Fietkau 469979173e ath9k: de-duplicate initvals
The initvals tool from https://github.com/mcgrof/qca-swiss-army-knife has
been modified to detect identical initval tables and replace them with
macros. This patch contains the generated changes.

On MIPS this reduces the binary size by 24 KB with no runtime changes.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-06-28 14:37:47 -04:00
Luis R. Rodriguez 5a63ef0faf ath9k_hw: add AR9580 support
Here are the AR9580 1.0 initvals checksums using the
Atheros initvals-tools [1]. This is useful for when
we udate the initvals again with other values. It ensures
that we match the same initvals used internally. The
tool is documented on the wiki [2].

$ ./initvals -f ar9580-1p0
0x00000000e912711f        ar9580_1p0_modes_fast_clock
0x000000004a488fc7        ar9580_1p0_radio_postamble
0x00000000f3888b02        ar9580_1p0_baseband_core
0x0000000003f783bb        ar9580_1p0_mac_postamble
0x0000000094be244a        ar9580_1p0_low_ob_db_tx_gain_table
0x0000000094be244a        ar9580_1p0_high_power_tx_gain_table
0x0000000090be244a        ar9580_1p0_lowest_ob_db_tx_gain_table
0x00000000ed9eaac6        ar9580_1p0_baseband_core_txfir_coeff_japan_2484
0x00000000c4d66d1b        ar9580_1p0_mac_core
0x00000000e8e9043a        ar9580_1p0_mixed_ob_db_tx_gain_table
0x000000003521a300        ar9580_1p0_wo_xlna_rx_gain_table
0x00000000301fc841        ar9580_1p0_soc_postamble
0x00000000a9a06b3a        ar9580_1p0_high_ob_db_tx_gain_table
0x00000000a15ccf1b        ar9580_1p0_soc_preamble
0x0000000029495000        ar9580_1p0_rx_gain_table
0x0000000037ac0ee8        ar9580_1p0_radio_core
0x00000000603a1b80        ar9580_1p0_baseband_postamble
0x000000003d8b4396        ar9580_1p0_pcie_phy_clkreq_enable_L1
0x00000000398b4396        ar9580_1p0_pcie_phy_clkreq_disable_L1
0x00000000397b4396        ar9580_1p0_pcie_phy_pll_on_clkreq

[1] git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/initvals-tool.git
[2] http://wireless.kernel.org/en/users/Drivers/ath9k_hw/initvals-tool

Cc: David Quan <dquan@qca.qualcomm.com>
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-08-26 10:47:58 -04:00