* Enable SATA
* Add salvator-x part number to DT bindings documentation
* Enable all four A57 cores instead of just one
* Enhanced audio support:
- Use CS2000 as AUDIO_CLK_B
- Set ak4613 In/Out pin as single-end
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWc12aAAoJENfPZGlqN0++N7YP/iUOSo2pptyYMC6SYjT+v7ST
R2eYynCqUktGycOeMbxZzcm15jhltCE4roxz01uhuSETAHpBDCyMhr34075UCYr/
he/NoswZ2zFE9b2cKx6i0teb8Plegx3BJhBAovTK3kegEAg5ouqRX2Kyfa3/VWDd
ZoXXp2WiEQ09JVrJQGViCNb7EkKt2X3lFwctFWWMuR5dq2g12W4Ka2vbHNcBrWU8
otSAn7CFoEaKc190RF8kVcHPvVh87ZnuIW15Hs+fr5RFvnGy5PVOLF/l0/ihY9pF
ErP+M7G8s0wmh3OaeMWHXLeU2pY2TNWAY+mVo49TOe9HpTyC4ij0rDTHE9qiZELm
lwFP4Pl6liYnJzuAEYh9lbwbtkQ0jvjMihz7bhdlfXOaTFSjbev48NWh+HXeAlSv
LPCrukqKn1KQVNA2bU1Fg0mEpfpVy+42WAMm7dZzIEacOGs8/0khWZMl3rAvEiRT
EC4N/bVgIbspSTtvj4F6YHPhTnvI1kx9J5tbjDelTHwuxDBXwEGEiP6b3rTw3znL
xMv5hc+7kt77UHhmUCYZYpcKfiR8/6Rc8WiQaIdO2oglWdzKuaaf16Ib67aKj31D
y7SWpEyhUF9g/tqEUwmrL6Kl1F9EXKtYQh8rP2SaTWdU1Ndapa3mtRC95rxcpYai
ASSssEwMGwbS2S4Oui9G
=qm/m
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64
Third Round of Renesas ARM64 Based SoC DT Updates for v4.5
* Enable SATA
* Add salvator-x part number to DT bindings documentation
* Enable all four A57 cores instead of just one
* Enhanced audio support:
- Use CS2000 as AUDIO_CLK_B
- Set ak4613 In/Out pin as single-end
* tag 'renesas-arm64-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: renesas: r8a7795: fix SATA clock assignment
arm64: dts: salvator-x: Enable SATA controller
arm64: dts: r8a7795: Add SATA controller node
arm64: renesas: r8a7795: add internal delay for i2c IPs
arm64: renesas: salvator-x: Add board part number to DT bindings
arm64: dts: r8a7795: Add pmu device nodes
arm64: dts: r8a7795: Add Cortex-A57 CPU cores
arm64: dts: r8a7795: Add PSCI node
arm64: renesas: salvator-x: use CS2000 as AUDIO_CLK_B
arm64: renesas: salvator-x: set ak4613 In/Out pin as single-end
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add fixed rate oscillators to dts
* Fixup PMIC alias and properties
* Change 8916-MTP compatible to be compliant with new scheme
* Fix 8x16 UART pinctrl configuration
* Add SMEM, RPM/SMD, and PM8916 support on MSM8916
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWckTvAAoJEFKiBbHx2RXVAH0QAIOVo46P/LtOQk8J+A8lUyM3
eui/kuJG5H9iKf+r7maPCnWQbkdRfAevHFBixDfqq3WLK6muNAsWlAeTWasBG2AR
mMqg/0pkVCJHHxJ9xeMqdo7RkAPDgmk/CiR+kD+SA19N+OegU+fExI7RyEd9LQ/B
sQgbebZxB5VBQPIPlJorFP4UPG6T/sbV4FjsQ65GMGxZ321EV4OsApJHbEK9bzO7
8fFAU6OX9wRcqkQ9K5aLTo312ZzE1TvgyPLfSfZmAVAmgrWSC99nqKzd3u1qeCOC
jAzcv9yGMx4bfCMZcTuHp2OIGHbxFE9S0vBHfZrlzYxn8gniKBepGIr8w09TZgEq
TfDl2pzzfOsLF2sh1UAA3Is/i88zgf/EXt4q+1qgSZAGG66BvNUHDZP3uXVItRcY
GvugxN/96v5eszrG/0d+0IYQzYvFqXAbFfuYi5ax4+B4eah5YNPjSufJnWbHKogt
Eg3DVnvlilMBDpqc8zMCR5AnLsFFxGZEtsd8WTofE3Gd8wtkqCMS95Hh5PkNxkyC
bp1WXKEarMPjJ0X3YtAhQo7M5eFMYsZPxblhCr1CPmuVFzbwlyMkpqdaX23H93Ni
it+geo3aRKFdtxIX11bqCO6S6f2en7ZGg1bsychxqk+oN309EAqJkQAyNGYpo2h3
aWGLpsxVEC3/NHNh9aRg
=mu4g
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Qualcomm ARM64 Updates for v4.5
* Add fixed rate oscillators to dts
* Fixup PMIC alias and properties
* Change 8916-MTP compatible to be compliant with new scheme
* Fix 8x16 UART pinctrl configuration
* Add SMEM, RPM/SMD, and PM8916 support on MSM8916
* tag 'qcom-arm64-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: Add PM8916 support on MSM8916
arm64: dts: qcom: Add RPM/SMD support on MSM8916
arm64: dts: qcom: Add MSM8916 SMEM nodes
arm64: dts: set the default i2c pin drive strength to 16mA
arm64: dts: fix the i2c aliasing to match to schematics.
arm64: dts: qcom: msm8916: Add fixed rate on-board oscillators
arm64: dts: qcom: Alias pm8916 on msm8916 devices
arm64: dts: qcom: Make msm8916-mtp compatible string compliant
arm64: dts: qcom: 8x16: UART1 and UART2 use DMA for RX and TX
arm64: dts: qcom: 8x16: UART1 add CTS_N, RTS_N pin configurations
Signed-off-by: Olof Johansson <olof@lixom.net>
Add label properties to provide a way to identify UARTs based on their
board or connector name. This follows naming convention in 96boards CE
spec. Ports without external connections are not labelled.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add label properties to provide a way to identify UART, I2C and SPI
ports based on their connector names. This follows naming convention in
96boards CE spec. Ports without external connections are not labelled.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Andy Gross <agross@codeaurora.org>
Acked-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The LS UART0 is not used by anything else and should be enabled for
expansion boards.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Andy Gross <agross@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds idle-states bindings data collected through a set of
benchmarking experiments (latency and energy consumption) on Juno
boards. Latencies data represents the worst case scenarios as required
by the DT idle-states bindings.
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Added sys-reboot node to the FSL's LS2080A SoC DT to leverage
the ARM-generic reboot mechanism for this SoC. This mechanism
is enabled through CONFIG_POWER_RESET_SYSCON.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks are
similar to LS1021a which also complies to Freescale Chassis 2.1 spec.
Created LS1043a SoC DTSI file to be included by board level DTS files.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This is the first ARMv8 SoC from Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
SATA clock is 815, not 915.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables SATA device in r8a7795-salvator-x.dts.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds SATA device node to r8a7795.dtsi.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
[uli: adjusted for new MSTP clock scheme]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add Cortex-A57 CPU cores to r8a7795 SoC for a total of 4 x Cortex-A57.
Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Sigend-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add PSCI node for r8a7795 SoC, and cpu node enable-method property is
set to "psci".
Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds the PM8916 regulator nodes found on MSM8916 platforms.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Add support for the SMD and RPM devices found on MSM8916 platforms.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
This patch adds the nodes necessary to support the SMEM driver on MSM8916
platforms.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
2mA drive strength is not enough when we connect multiple i2c devices
on the bus with different pull up resistors.
This issue was detected when multiple i2c devices connected on the other side
of level shifters on Linaro sensor board. Maxing up to 16mA made i2c much stable.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch fixes the i2c bus number aliasing so that it matches with the
schematics bus naming.
Without this patch the user might would get bus numbers depending on
the order the devices are probed.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Currently the rates of the xo and sleep clocks are hard-coded in the
GCC driver, but this is a board layout description that actually should
be in the DT. Moving them into DT also allows us to insert the RPM
controlled clocks between the DT and GCC clocks.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Add an alias for pm8916 on msm8916 based SoCs so that the newly
updated dtbTool can find the pmic compatible string and add the
pmic-id element to the QCDT header.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This compatible string isn't compliant with the format for
subtypes. Replace it with a compliant compatible type.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
GPIO can be used as interrupt-controller. Add the missing properties to
the GPIO node.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Merge "Broadcom devicetree-arm64 changes for v4.5" from Florian Fainelli:
This pull request contains Broadcom ARM64-based Device Tree changes:
- Anup Patel adds L2 cache, SMMU, syscon-based reboot, PMU v3, iProc RNG200 (HWRNG) and
NAND flash controller support to the Northstar 2 SoCs
- Ray Jui adds the I2C Device Tree nodes to the Norsthar 2 SoCs
- Jon Mason enables the clock providers on the Norsthar 2 SoCs
* tag 'arm-soc/for-4.5/devicetree-arm64' of http://github.com/Broadcom/stblinux:
ARM64: dts: enable clock support for Broadcom NS2
arm64: dts: Add BRCM IPROC NAND DT node for NS2
arm64: dts: Add I2C nodes for NS2
arm64: dts: Add IPROC RNG200 DT node for NS2
arm64: dts: Add ARM PMUv3 DT node in NS2 DT
arm64: dts: Add syscon based reboot in DT for NS2
arm64: dts: Add SMMU DT node for NS2
arm64: dts: Add L2-cache DT node for NS2
This includes support for the evaluation board of the rk3368
as well as the dts-part for the newly added thermal management
support, rk3368 pwm nodes and an alias.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJWYew9AAoJEPOmecmc0R2BCxoH/0TzuVJAD9RoQ9sBEGsasVqx
HYr8EHBBmtAhkgAKJG7rwaTufpoxeQSQL5u5YYIFcZP/JV9GfIt4vWLHaPoqCZM7
CgEpr2JcHAkLYsUzVBXe3gH8wLRNlGPOTPAegrZxn2Q4kmDZ6rATBWdcdGowPxEV
aNIFLgavrW+3qnqF9ppR0s26Upv9nsZ0KamRoVlRlX+/qPiAr4tF3HL/rk33RYIO
WjGHGoOeHM14BuM6t5EIuc6uiiXLS+Ogl9EH39aHdM4rT8ZAUMBBPpI0T2JiwAPP
74cgtMjAR+d/bwZGjvZ6Nn+Qf8HYt+ZaBkVglvVop0K42+CDowJgeZrZWUFHp8E=
=kU7g
-----END PGP SIGNATURE-----
Merge tag 'v4.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Merge "rockchip dts64 changes for 4.5" from Heiko Stuebner:
First round of 64bit devicetree changes for Rockchip socs.
This includes support for the evaluation board of the rk3368
as well as the dts-part for the newly added thermal management
support, rk3368 pwm nodes and an alias.
* tag 'v4.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add rk3368 evaluation board
arm64: dts: rockchip: add the pwm node info for RK3368 SoCs
arm64: dts: rockchip: Enable the Thermal on R88 board
arm64: dts: rockchip: Add main thermal info to rk3368.dtsi
arm64: dts: rockchip: Add the thermal data found on RK3368
arm64: dts: rockchip: Setup rk3368 ethernet0 alias for u-boot
Add DMA channels definitions for UART1 and UART2 controllers.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Add devicetree bindings for UART1 CTS_N and RTS_N pins.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds an idle-states node to describe the berlin4ct idle
states and also adds references to the idle-states node in all CPU
nodes. After this patch cpuidle is enabled.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This board is similar with the rk3288 evb board but the rk3368 top
board. There exist the act8846 as the pmic.
Moment, add the balight/thermal/emmc/usb.. stuff,
Let the board can happy work.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The pulse-width modulator (PWM) feature is very common in
embedded systems. On the rk3368 there exist 4 built-in PWM channels.
In general, the pwm pins can via the pinctrl to
configure iomux mode except the pwm2 since the pwm2 iomux mode from
the SoC control register.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
CS2000 needs AUDIO_CLKOUT as master clock which is generated
by Renesas sound, and Renesas sound needs CS2000 as ADUIO_CLK_B.
Because of this relationship, it will be dead-lock when driver probe.
cs2000: clk_multiplier@4f {
...
clocks = <&rcar_sound 0>, <&x12_clk>;
...
};
&rcar_sound {
...
assigned-clocks = <&cs2000>;
...
};
This patch is using dummy audio_clkout to avoid this issue.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pull nouveau and radeon fixes from Dave Airlie:
"Just some nouveau and radeon/amdgpu fixes.
The nouveau fixes look large as the firmware context files are
regenerated, but the actual change is quite small"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon: make some dpm errors debug only
drm/nouveau/volt/pwm/gk104: fix an off-by-one resulting in the voltage not being set
drm/nouveau/nvif: allow userspace access to its own client object
drm/nouveau/gr/gf100-: fix oops when calling zbc methods
drm/nouveau/gr/gf117-: assume no PPC if NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK is zero
drm/nouveau/gr/gf117-: read NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK from correct GPC
drm/nouveau/gr/gf100-: split out per-gpc address calculation macro
drm/nouveau/bios: return actual size of the buffer retrieved via _ROM
drm/nouveau/instmem: protect instobj list with a spinlock
drm/nouveau/pci: enable c800 magic for some unknown Samsung laptop
drm/nouveau/pci: enable c800 magic for Clevo P157SM
drm/radeon: make rv770_set_sw_state failures non-fatal
drm/amdgpu: move dependency handling out of atomic section v2
drm/amdgpu: optimize scheduler fence handling
drm/amdgpu: remove vm->mutex
drm/amdgpu: add mutex for ba_va->valids/invalids
drm/amdgpu: adapt vce session create interface changes
drm/amdgpu: vce use multiple cache surface starting from stoney
drm/amdgpu: reset vce trap interrupt flag
Two fixes for the ds1307 alarm and wakeup.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJWW0BzAAoJEKbNnwlvZCyziZ8P/3cvV1g8TAOsORZfHt8D5S6u
IWQrfkTtdfGKvPCAnY4TF/dKTeIZs3hI0/cG9RekciFOmEQ5Vmj9KlyZxzJB5aaI
FGJIFSBIYFVbZGyE8TKsayjrlB2D8/cr9OlrlsIcgqYmsVi8izwzWWfJKj89pVu3
qFptHRHRhTdSimmeyaJ9pmfCJy59jiueTG9sOHLJBPj98vOFWJPwTN0fABRHBbd4
R7KC6N5EjEXJFLXTsyFcu+cNAx/gmTRXJwo9jFpBTFGdSUZDddir9oXXhsrk+86j
4NO/Xa1VawQIz/nStgiZ2FV2L3Y9Hl9wtoz1s8dtG0syqrgbn6yaId7QFrrtHX48
q6aVT6vVBwx/Im2B/4bcw/XF0aSw3NYlVFxHZszIeWTuNfm7KkcQAGeLa47jzTGl
GOJOpdtldPQECii6jlYoURd5pH8FANpzRXQ8AYyVsl6gnNwjf8OBBhDEfv7O4wW9
1yeg0E/5XoaGJ6NdniRcHW3Wixf9b72htytOB/+r1nSJljA4cN0ojczVIpAoQSxt
sNKbE/Eo96v3qrxvDZ1z41J+V2CxKxary1DLlXvMAFnqMFOnF8rK5wI8jow8Xjsf
CACPFDCB0KxoLC5hgbbhBGkZd7eTIq30F1FjP8v0ypc8see/8g4H8+SIKy3R5EqV
wyyt+revuVKibz2NB7Ik
=6IeZ
-----END PGP SIGNATURE-----
Merge tag 'rtc-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
Pull RTC fixes from Alexandre Belloni:
"Two fixes for the ds1307 alarm and wakeup"
* tag 'rtc-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
rtc: ds1307: fix alarm reading at probe time
rtc: ds1307: fix kernel splat due to wakeup irq handling
Pull MIPS fix from Ralf Baechle:
"Just a fix for empty loops that may be removed by non-antique GCC"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: Fix delay loops which may be removed by GCC.
Pull m68k fixes from Geert Uytterhoeven:
"Summary:
- Add missing initialization of max_pfn, which is needed to make
selftests/vm/mlock2-tests succeed,
- Wire up new mlock2 syscall"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
m68k: Wire up mlock2
m68knommu: Add missing initialization of max_pfn and {min,max}_low_pfn
m68k/mm: sun3 - Add missing initialization of max_pfn and {min,max}_low_pfn
m68k/mm: m54xx - Add missing initialization of max_pfn
m68k/mm: motorola - Add missing initialization of max_pfn
Pull ARM fixes from Russell King:
"Just two changes this time around:
- wire up the new mlock2 syscall added during the last merge window
- fix a build problem with certain configurations provoked by making
CONFIG_OF user selectable"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8454/1: OF implies OF_FLATTREE
ARM: wire up mlock2 syscall
Olof Johansson