opp.txt is getting removed with the OPP binding converted to DT schema.
As it is unusual to reference a binding doc from a dts file, let's just
remove the reference.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Add a devicetree entry for the Rockchip SFC for the RV1108 SOC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210812134546.31340-5-jon.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
- New machines
* Facebook's Cloudripper
* Facebook's Elbert
* Facebook's Fuji
All three carry the description of "Facebook's next generation switch
platform with an AST2600 BMC integrated for health monitoring
purpose."
They share a 128 MB SPI NOR flash layout that is also used by some
older platforms.
* Inspur's NF5280M6, an x86 platform server with an AST2500-based BMC
- SGPIO updates including AST2600 support
- GPIO descriptions for the IBM AST2600 machines
- Pinctrl fix
- Updates to Facebook's AST2500 based machines
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAmEbYpcACgkQa3ZZB4FH
cJ5MQA//acXKEAKZgQ9op7wanVrQH37BkvFBkn02vwKWHJXt7tIXMlf19yeOSMsL
BIR4wPzWLCrK0Jy5R5AxSYcPosibjWZFKHPtgk9JfS2LHF11agYe+zTgBLkXgQbe
jVcraSaUOJ19on8iuYz50zhzcj5P0vlCN49dORcn0Ey0zw1Wnf6+D+//VcnlFaSt
6+vHGUyviMiQ8Ws6G0b1ZoWiM9mEDyLxUGVD+Qe/P5E/49ClkzowWswcBUcOgRmS
G/nHmPTWmxDKk8KAXPzijnbbxUmueepvv96Fbfvg8VEFP/alAEKKnn2QpTUF6kbi
y9IL1ryR8fzJS57HhEJ5O+l//+N0pvPlfsaLt4ZchZOBG9+zmbwOL3Q//qZ3/Ca2
vEUMp59f8uB8/coM3dzyuMWEPbn5nEuNAVDH8PVTcJsVxGSNHHHfb09ISmWGWacA
F8e6jAJVFkhf5xeoHV7qmf1l1VDwOCm3Fsgp1jGARZrK89sZmOlV5rgO7IIe7Swh
Y+itv+EOu8T1bJ+fs0eXLMUnGR/dw8OUmRIsgXnKCYAAPrjLfg8zusQfpr6mfMUA
tXpYxQqqVw+XXCtGewAoF3PHwuOcRxQbAJn1v4QrzYNseteJqoryzcMEZrZcocKQ
JwNQTJZyQ2OitRPHOnnTzLqgE5sV/PFHdzGpFgmPjfUkT/4Y+L0=
=GIHt
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEdALkACgkQmmx57+YA
GNkzaBAAsDX3tqMQIo/U8o80Puwb7ZoupCxygmivhDSLaFtcvn/k14YT3Qi8JG/a
1NUSXi+YsM1du0QS3BI0bMrWIyLtj/7q2785UlyMOUS2DXukUuGLWMVTXmPOHh99
7N77IQuC/HB/qPiDm76V6Ax6ax6FVY4LQKXlur3z2MM5ZP2PbaLK2CG1VmZuH/gv
qVNFz1bQVjJ2j3iegGt3+bb1uaZshTX0S7PFrvvI0UmUjlfm9oKfGgYepFb6Rfi5
lQ1MP475qBMPWE/UIQ4hsg49PxOXKP9PsuW6+hK23GbgNoI2esgnJBG5mwzkWz+S
/H+2zeldljKQ1COBu0WztRQqDJTVphOlgbSRkQpYC6UJvXWs7XDrzrIXlLfu7gmn
FTPpQ2d+k+eTP2P2VHh2tgUDbf+OBftZvrad/2RW2WzFVrGd5oDt/kdXAxcOxC7i
fC2VKl9ban2xg1WBFgRUaH1t5OiUv7FaW3k2yFfkCSmbSY6OJSoUAMhhs3XuCW3T
nNCDRj6kew1qhl3zSUweGsZ3DdjctTr6ab1TFZd0BsGUl/7FQ5ycNx/LGafH2GtC
NCUxjK4ZSKddy7ROjyqwBH4zmevLbJz/ae+RbWKUh0aJcDC50LlWuH0dcFO2jlLx
yMcW71TqipL0BcTh6nfK1dJMbqrBOeQhTKC7NGcOZ9D2T+xu79g=
=Y4SA
-----END PGP SIGNATURE-----
Merge tag 'aspeed-5.15-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt
ASPEED device tree updates for 5.15
- New machines
* Facebook's Cloudripper
* Facebook's Elbert
* Facebook's Fuji
All three carry the description of "Facebook's next generation switch
platform with an AST2600 BMC integrated for health monitoring
purpose."
They share a 128 MB SPI NOR flash layout that is also used by some
older platforms.
* Inspur's NF5280M6, an x86 platform server with an AST2500-based BMC
- SGPIO updates including AST2600 support
- GPIO descriptions for the IBM AST2600 machines
- Pinctrl fix
- Updates to Facebook's AST2500 based machines
* tag 'aspeed-5.15-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: (23 commits)
ARM: dts: aspeed: p10bmc: Add power control pins
ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
ARM: dts: aspeed: minipack: Update flash partition table
ARM: dts: aspeed: Add Facebook Fuji (AST2600) BMC
ARM: dts: aspeed: Add Facebook Elbert (AST2600) BMC
ARM: dts: aspeed: Add Facebook Cloudripper (AST2600) BMC
ARM: dts: aspeed: Common dtsi for Facebook AST2600 Network BMCs
ARM: dts: aspeed: wedge400: Use common flash layout
ARM: dts: Add Facebook BMC 128MB flash layout
ARM: dts: aspeed-g5: Remove ngpios from sgpio node.
ARM: dts: aspeed-g6: Add SGPIO node.
dt-bindings: aspeed-sgpio: Add ast2600 sgpio
dt-bindings: aspeed-sgpio: Convert txt bindings to yaml.
ARM: dts: aspeed: ast2500evb: Enable built in RTC
ARM: dts: aspeed: tacoma: Add TPM reset GPIO
ARM: dts: rainier, everest: Add TPM reset GPIO
ARM: dts: aspeed: wedge100: Enable ADC channels
ARM: dts: aspeed: galaxy100: Remove redundant ADC device
ARM: dts: aspeed: wedge40: Remove redundant ADC device
ARM: dts: aspeed: Enable ADC in Facebook AST2400 common dtsi
...
Link: https://lore.kernel.org/r/CACPK8XdWRBb9cuDWGQPfK8R8TsZuydJQHsL4_e2w=HvCKAMogg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces the MSM8226 platform and an initial dts for the Samsung
Galaxy S III Neo phone.
MSM8974 gains another UART and this is used to enable Bluetooth on the
Sony Xperia Z2 Tablet. Samsung Galaxy S5 gains regulator definitions for
audio and modem remoteprocs, effectively enabling these.
DSI clocks on APQ8064 are updates as the old legacy clock names are no
longer supported by the driver. And IPQ806x GMAC nodes gains AHB resets
wired up.
Lastly APQ8060 is converted to a SPDX header and the ethernet node is
updates in accordance with the binding.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmEa1W8bHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F0CcP/1rCgNZKQ++chXeDJX7O
BL1EmmHZ93RiY/u9etmwT2ZzLhGwIiEPhddqL/a1B2J4VFCfjsJVy31XQbYBCWpN
cZtsnsV0mHD9oU/SpHEAUkllTXZlr4kNoghaynzipQCC9oirZw7m4MxiSJENczZ9
sGefAzqpNtvGjR07wKUraWFJXDqKYQg1b+Tfu0Q1p3T9ZivkP3gRL4MGt4dzTgwo
tFHCs6bR9FA+eChmMhVfsBSytdOC+Y6kGOQOJLrvDYmHEkA2H3hLmkKAWpbGtjw2
Y4aj8n3IqPEkl2rSuH1pu2av5DwfDI4Kf+VI4LSz7/WVJ1e+FkrOQpCSTCOb+1m1
8re+do1wHB5PE3mnmvLa6avFO/GnKU9Uex8n+vPwUQ03Dhvh6IZ9jKo007iNrXB9
3VobOwkxPfVIUHv+T23pfbTHyWzcTZzLXivZSNQ9p3hfqBHS8dIwMJ9XMRW8M55D
BSoaEt5kHOKZMlgcpHFczeZiART/x6NkaIOU0b3TDq4xeSRttnKEr/ehy45jNN0w
yE7YG82gCuBBsI2pIre3mxVf8J8y10UBoE1plcKrDpJT80Xcik0llgfAvULw3Jx3
l4GGGlKFZSqzQ70B+4R8kfN5pLCI06CobEWL6VvZW9wfndt2M9NO/iPv/tRNAvVc
gsD+CKQ5QLVywIr/tZZ2d+EY
=JynD
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEbgcEACgkQmmx57+YA
GNlC0Q//USmb8u05Sn7DlYu46UBcNcQrgGOCXIrNWkERm7jxEhUqp4soI24jomiq
1GEKWApzPlmLtBvQKiGl5IoCypYbZ0kOyFBP+FYezmSD8vCU46UtnzKV+b3mzwQH
rDPFogjj92LBv1+i+8jgry3tvrdK3oM2QJ2cSIF7EyXjuMBok36zXdPpG4mP8dBT
vla+IZFa7GXOi+SKVykB8tlaGPaslamIfG6ZtjeJJuGsPRDotjmjc9vvGEtKfOF0
cHKKTtPli60NqwHX61UURNAcaoURBw4W4Jy0KolvMWo98I+TyWf18xRF2aanm8pa
mLsK7SlqipRY1ofTeHZwb6eK3j13qD5knv+tWjjwCTCmAufljnLwqoP494mHeU5D
ppLMcSfw9HheR/J3NoimcJ8mvWe2/NOmtqxKFt0QYUiL3p0uqZUfclTUbIUEqzi3
v30lFh984aB91HgLQkl3dgqmCG/ggS7gy1W2BEQZtsaQHAW4v+psYAjMMMGpkcZV
vHjWffic3y+mVgClZ8PRaqkXQB/IjfuoSF/+VT6/kTNosmOXkvphd3je2ogE9Zn8
4r+ALaAlmaRLpBzvfDTyNAB2gUi4ar22JVa5VpF1y4G9SAlHkv6TdpnaTgfw4SKu
D3fqjSlYJ6DL7CRB+4BetPn2Al83CvuPXSMRF9iuikllRGHZfbs=
=zDwv
-----END PGP SIGNATURE-----
Merge tag 'qcom-dts-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm dts updates for v5.15
This introduces the MSM8226 platform and an initial dts for the Samsung
Galaxy S III Neo phone.
MSM8974 gains another UART and this is used to enable Bluetooth on the
Sony Xperia Z2 Tablet. Samsung Galaxy S5 gains regulator definitions for
audio and modem remoteprocs, effectively enabling these.
DSI clocks on APQ8064 are updates as the old legacy clock names are no
longer supported by the driver. And IPQ806x GMAC nodes gains AHB resets
wired up.
Lastly APQ8060 is converted to a SPDX header and the ethernet node is
updates in accordance with the binding.
* tag 'qcom-dts-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: add ahb reset to ipq806x-gmac
ARM: dts: qcom: Fix up APQ8060 DragonBoard license
ARM: dts: qcom: msm8974: castor: Add Bluetooth-related nodes
ARM: dts: qcom: msm8974: Add blsp2_uart7 for bluetooth on sirius
ARM: dts: qcom: Add initial DTS file for Samsung Galaxy S III Neo phone
dt-bindings: arm: qcom: Document MSM8226 SoC binding
ARM: dts: qcom: Add support for MSM8226 SoC
ARM: dts: qcom: apq8060: Correct Ethernet node name and drop bogus irq property
ARM: dts: qcom: apq8064: correct clock names
ARM: dts: qcom: msm8974-klte: Enable remote processors
Link: https://lore.kernel.org/r/20210816211957.579365-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series from Christoph Niedermaier to clean up i.MX6 DHCOM support.
- New board support: DHCOM based PicoITX, DHSOM based DRC02, SolidRun
SolidSense, SKOV i.MX6 boards.
- Add WiFi support for i.MX7D base reMkarkable2 device.
- Add FTM devices for i.MX7 to have Flex Timers support.
- Configure ENET_REF clock to 125MHz for imx6qp-prtwd3 to support RGMII
PHY mode.
- Drop unneeded #address-cells and #size-cells from vf610-zii SPI EEPROM
device node.
- Add missing USB OTG OC pinmux and Crypto device for i.MX6QDL Gateworks
boards.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmEXodgUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7/DQf6Ah9P+NmuvrV3T/soI3c6CNdvS4dC
mUqzkdpPvKw4b38iLBNS/qB1JvkIosu84Hx/Ll+toJYWC4QaV9M/ZgnMnqSXN56O
j18CMKhDQrw+Y7jghoqm8kvgmHooaSFvNgMBVNULa2pEozJuN/viUglgVJ+FCYaF
JBO2YRHNZvq0BxEy63es3qGG1JXdfs4slKu2wl4lGRCwk999odQKMFVpe1AaAJzN
sa61EYFsIvCgJGTYQlB6E0CTBkS8R4V4jezNPgGznQjYzCx1OF2+y0HaTUVC0Zk4
qqJcMO0uxFvuXs4dim9/djdmD80oqiGdZG6auPXUtx07MbyOP42dg9EuPA==
=5rPD
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEa1dwACgkQmmx57+YA
GNnS3g//fx4YK8NLznTzmfPVsR6ptAZ6jPsMHek5TZX3JAA4OVUIv+FQuWROHUys
QffZDniw2X1Gl8MsgueftVBN3fj9we6Rlmmk8opgWpAwOIFEaSUbHOMCSWy9MFUk
IDEg5VKK0l1JvYubCWBsjqoZz4GfWQr8HFZYeJFMFAi8r3YqS5UFoO39t/JpkHSX
si5Hzdgl5og8rqRiCfkgb+BcpMdDAcG/wSqQIsMi53y6Xnxl2nn7kMcN51nOOykB
Xc4w80fU3XxeWVPHzlzYYlCa35qmkFVZPY0z40sck4VmDvSr479ulhhGjoEPJlBD
Y1JNM3XZrrLWdCLcD+f3TcOhbBKDkei5xfN3cxb/dl1CPMpL9TdLUK/3rUh5+R5f
X0/w2vK6GyUWP6QSG0mGOmfUtsAYR3wz+ecApQzM0d50bSAOsQy4AEWgHASYE8gc
92HDFmi4uOTMJrh9q7c2LcrW/BK0UUtlSMeDPUMboL0RF5oQ4yzUF+b/7/1gr19a
xNRzo8tz2yEypU2V8Ol9VfO9EtIAIUf+HluR2PQ+bwgwd4cTqJJ001AUtSAXROdN
c4IMJhzKknUQpr0XgkbHTmF/Ts9bw32X7KZ3Rb+0cm5vUB2bE8WAeAKo/sIei5nh
VsS/9sLBeNIZAouq29DYsQxx3YLCowYG4l81DzOUFR3SzbVTLsk=
=7FFL
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm32 device tree changes for 5.15:
- A series from Christoph Niedermaier to clean up i.MX6 DHCOM support.
- New board support: DHCOM based PicoITX, DHSOM based DRC02, SolidRun
SolidSense, SKOV i.MX6 boards.
- Add WiFi support for i.MX7D base reMkarkable2 device.
- Add FTM devices for i.MX7 to have Flex Timers support.
- Configure ENET_REF clock to 125MHz for imx6qp-prtwd3 to support RGMII
PHY mode.
- Drop unneeded #address-cells and #size-cells from vf610-zii SPI EEPROM
device node.
- Add missing USB OTG OC pinmux and Crypto device for i.MX6QDL Gateworks
boards.
* tag 'imx-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (23 commits)
ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
ARM: dts: add SKOV imx6q and imx6dl based boards
ARM: dts: imx7: add ftm nodes for Flex Timers
ARM: dts: imx6qdl-dhcom: Add DHSOM based DRC02 board
ARM: dts: imx6qdl-dhcom: Add DHCOM based PicoITX board
ARM: dts: imx6qdl-dhcom: Split SoC-independent parts of DHCOM SOM and PDK2
ARM: dts: imx6q-dhcom: Cleanup of the devicetrees
ARM: dts: imx6q-dhcom: Rearrange of iomux
ARM: dts: imx6q-dhcom: Rework of the DHCOM GPIO pinctrls
ARM: dts: imx6q-dhcom: Use 1G ethernet on the PDK2 board
ARM: dts: imx6q-dhcom: Set minimum memory size of all DHCOM i.MX6 variants
ARM: dts: imx6q-dhcom: Remove ddc-i2c-bus property
ARM: dts: imx6q-dhcom: Add keys and leds to the PDK2 board
ARM: dts: imx6q-dhcom: Align stdout-path with other DHCOM SoMs
ARM: dts: imx6q-dhcom: Adding Wake pin to the PCIe pinctrl
ARM: dts: imx6q-dhcom: Fill GPIO line names on DHCOM SoM
ARM: dts: imx6q-dhcom: Add interrupt and compatible to the ethernet PHY
ARM: dts: imx6q-dhcom: Add the parallel system bus
ARM: dts: imx7d-remarkable2: Add WiFi support
...
Link: https://lore.kernel.org/r/20210814133853.9981-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The majority of this is temperature sensor additions for various devices
and fixes to the trigger type of the thermal interrupts.
Other than that there are various minor fixes across the board.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmEWmI8THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUMWD/9wdd5/zlOG3XHYGlo30TzoHLW6nO6E
VmZm5RlJ7JB7XRxFLrB22d0Kt9L6fm8UW5GOGCK4sG47I/+YyNUFDtn+TpQJeUvM
iQ7ImX9X4bFqVn7ul6xWhdCEN+p3ZTRcqTAtgEjJevs9i86EIZzYNtLaIHRqvxwT
9S7/6jtESZNRSVoH0/wQay0lOHoBoHhSzJTGSS61yGak/NAQDRdU0xNkvTarZbVb
VCojDx8uNuAuEUqvPxY9BRdhHy6PAPebSem60Akm+S76HUQ4CIea9A/SExsOfq0/
Zv07nMVKHjxAkKp+Mr8QWCpbJpdrf6snUU1nuGsOvnOwvgHQtatVlsYs81HlByGu
lI3mdajL8XSkxCIHnl2uXOXMuOnlh7BBuE6ie0/S3QN6yOMEI17kAJUnoB2eYitx
wfswrH3sVlJ5xFhb9oqhfz3VfjG69PPBLudm2YGLVs4pYVfvGS88Pqes//6jKfsT
1TgRmJEAwYaFCrhPJXjwnZniHc4tc6SowQ9XsPyhV9LepwbAQKF6VMzVOOqU9UW/
2fGlemi4aKWRmQRAlLT8kA2IS8fip7NOXSl/ffcGGnpqM5o38kikZsYRWgS+7kxT
M24mNefKwTy7FQjnfPPXfRo2xBTqXKNRmdUEHFdMwCTxNnVF8bf3I96IO8zsb408
vH6+nkJ/Ty7HaA==
=8RvP
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEa0YAACgkQmmx57+YA
GNlbRA/8CvbB9v0CzVxIyEZQHEsTP3FZAu5kDUFxjG32yqNxmWTfGV197wQ7xLdI
R80L3LMf2kfWwwVi66dUiYpOVdUSg7Z+vZmieZhX4Z2rjtDdWzHYZYHF45Sc2UUr
yvJa41pCAx1GzI7vyfPVSRnIRpoc1GHumJzEQT8K4K7w9owImboZfgwufwkd7zB/
Y6XdAaFUiZjYsddAaiEE6NFAGAP/QSWQLRYmJB923P7kCKytS4zQp/bcUH+CrrrE
mr4ATkvrW5mclmaDhWjFsIHVUmpFUPiooCqy4eEg65muLm1MS30+6LO2U3F3+Vtt
hvAYIDtaI5WBrgwYVBnWMJuPtP4UZdybdmWJnHXKH+jVU3a7jjOo/59uI2ZKapYj
yOImKxJFMkJh/qPEDIyECtNXrbc+hqy5Pj3PryztEKx0lW8okl8eqDUN3JtUNkQc
AP5oMP36vdOhP2nZkfy8LlPz/1woQOlC2cPbP9mVU74kw2t2eybbinNLnU0pgAm/
bNh7In09ivbC9LUNoP63c1gS+ZF4yzdzomHNqzqIIy2i+RLrccPiIWg7DgMwX5ze
MtRHbuGNmMqoGgSzQx5u5PMPaw8aSRnNuoUiD7EjfydIqI90/0NLQ0lDrqMD/ctV
ftrlkNTVM6Y3OdGTyWFhmVAUjLeljY0yEaqBaIb+2YHS2icAYmI=
=zHxH
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.15-rc1
The majority of this is temperature sensor additions for various devices
and fixes to the trigger type of the thermal interrupts.
Other than that there are various minor fixes across the board.
* tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: tamonten: Fix UART pad setting
ARM: tegra: nexus7: Improve thermal zones
ARM: tegra: acer-a500: Improve thermal zones
ARM: tegra: acer-a500: Use verbose variant of atmel,wakeup-method value
ARM: tegra: acer-a500: Add power supplies to accelerometer
ARM: tegra: acer-a500: Remove bogus USB VBUS regulators
ARM: tegra: jetson-tk1: Correct interrupt trigger type of temperature sensor
ARM: tegra: dalmore: Correct interrupt trigger type of temperature sensor
ARM: tegra: cardhu: Correct interrupt trigger type of temperature sensor
ARM: tegra: apalis: Correct interrupt trigger type of temperature sensor
ARM: tegra: nyan: Correct interrupt trigger type of temperature sensor
ARM: tegra: acer-a500: Add interrupt to temperature sensor node
ARM: tegra: nexus7: Add interrupt to temperature sensor node
ARM: tegra: paz00: Add interrupt to temperature sensor node
ARM: tegra: ouya: Add interrupt to temperature sensor node
ARM: tegra: Add SoC thermal sensor to Tegra30 device-trees
Link: https://lore.kernel.org/r/20210813162157.2820913-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add some comments to explain the purpose of "mdio1" controller: it's
connected to the MDC/MDIO interface of the on-board management switch.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://lore.kernel.org/r/20210813061900.24539-1-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
By default ENET_REF is configured to 50MHz, which is usable for the RMII
link. In case RGMII is used, we need 125MHz clock.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove #address-cells and #size-cells property from at93c46d device tree
node as it does not have child nodes.
Fixes: 1556063fde ("ARM: dts: vf610-zii-dev: Add ZII development board.")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch fixes the tristate and pullup configuration for UART 1 to 3
on the Tamonten SOM.
Signed-off-by: Andreas Obergschwandtner <andreas.obergschwandtner@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use skin temperature for maintaining temperature that is suitable
specifically for Nexus 7. Add CPU thermal zone that protects silicon.
All these changes don't make a significant difference, but it is a
more correct definition of thermal zones.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use skin temperature for maintaining temperature that is suitable
specifically for A500. Add CPU thermal zone that protects silicon.
All these changes don't make a significant difference, but it is a
more correct definition of thermal zones.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The verbose variant of the atmel,wakeup-method value was lost when patch
that added the property was merged because it conflicted with other patch,
re-add it for consistency.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The configuration of USB VBUS regulators was borrowed from downstream
kernel, which is incorrect because the corresponding GPIOs are connected
to PROX_EN (A501 3G model) and LED_EN pins in accordance to the board
schematics. USB works fine with both GPIOs being disabled, so remove the
bogus USB VBUS regulators. The USB VBUS of USB3 is supplied from the fixed
5v system regulator and device-mode USB1 doesn't have VBUS switches.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor and enable it in pinmux,
for completeness.
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the on-chip SoC thermal sensor to Tegra30 device-trees. Now CPU
temperature reporting and thermal throttling is available on all Tegra30
devices universally.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add initial version of device tree for Facebook Fuji (AST2600) BMC.
Fuji is Facebook's next generation switch platform with an AST2600 BMC
integrated for health monitoring purpose.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-7-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add initial version of device tree for Facebook Elbert (AST2600) BMC.
Elbert is Facebook's next generation switch platform with an AST2600 BMC
integrated for health monitoring purpose.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-6-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add initial version of device tree for Facebook Cloudripper (AST2600) BMC.
Cloudripper is Facebook's next generation switch platform with an AST2600
BMC integrated for health monitoring purpose.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-5-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This common descirption is included by all Facebook AST2600 Network BMC
platforms to minimize duplicated device entries across Facebook Network
BMC device trees.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-4-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Simplify wedge400 flash layout by using the common layout defined in
"facebook-bmc-flash-layout-128.dtsi".
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-3-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is the layout used by Facebook BMC systems. It describes the fixed
flash layout of a 128MB mtd device.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-2-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
A series of changes to update am3 to use cpsw switch driver and
few updates to earlier SanCloud changes. The plan was to send the
cpsw switch driver changes earlier but looks like I never tagged
the mail thread in my inbox to apply for v5.15.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmEUxPQRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXObZQ//Wtoib8IwHgRi+RtGxz5ThZciiXEkORjK
s91xVX6dTYavWFC03XhlncsQaYd4c0E872aAWjeV7AeJdSfCbvadq9g4IWv3ZCuN
2CYQzpuRt8yKEYR94qPyGVNOJbhYA7DGsm/lXSaC3yRvL/H5Yvt9vEUzRh0I668E
mZaCnSuC0RLUixFVC67HV0qQ6igciTxIX1JAuRRHvW7fET2gGILNzzD3CtTWNYyO
Ne7lz5D4CYdmQlwnW2YDJyIvhoQ/TP/8hIEWZQphDGE6u2uwnZBU2G8sZ/yao+IB
gY3kE3qzh4dX7xfrtG12P1f9kZt7IRmQO37lbkxPP36a5Lg++c2PUql2yy4h5oBO
cYAWXG0ZhCy6SXuVUsIIRz7vZlKvLb9i8fjQIw/JMW/b/CET9IQ4e9hT/fUBLmA4
nNRnwfoNDXIZjCYq/CspjAmOAXVdP73xTaEplPL/HCTd7VJTnh+aV/PniYZkxVE8
ujSRDcuP2TyuI3nVSgoKVmZ3kKBu0cmSa2e8SetgXo+QE1O6JvM1as6DEKm6EkE+
DVXkhkudJRpnHuhPML9BSchLP2yfzpFBuEuRYtHDgonXY1vS1/gyTyq+PEw+UthN
dyFQla8Q4dqHvOmi4q2oq3duTh9d4Laiv/pH8rZ7sNnLIZnO1dBlYPh4zuH5C0D2
K8gM2UG3TdM=
=qPV9
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEVivsACgkQmmx57+YA
GNmy3RAAnpqWhBfjpFXfHSKEnmZ4O83KpSADsZc9SW8NOPF0YOWD50GU07bg7AOO
gGZYQXwBOn25qxr1/aotSHS/9PCXTOXd157uviE+TPNuba8nQBRVDPWmrSJkcm/7
8RxhYqJo6LquO5HNECAYP8eMS3kzePy5rLD8o+rkCkB21W5iTuXIx59+p+wNUpTf
hg6spRjPQ64gCcpwpp/4br9+CIE8cgMQLER/twlpBzhHR8hPCtTN3JAFL+QD2ii2
J59OOI6NAL9FTyNRce8Xg/V2gUCKbMnTlWEWCKJjPYW15uvtrIiEPwXP4rgstxeX
sZKd7l4/Yo0Vs681WMEa6O/3TLnRr2A/9sDJktcCiqc3kdRPWauOpKxaAySHFMAO
WVroAEvZnTthnoEbbSq4z/KTuTfq5rdattj8RIC/XoL4eYzvy+y3n8aREMI7FKia
hBLyGT+5/zuyt/I01Y8F0x2Kitgp1pKsSXmcTz2txqEk6gSNguAQYc/tz9282Srg
q5/0nP2T+av56CLOQRES/Nr/AvtX2hQgPUmq/PTe6ouHm7mpRSzuP4T+dcibT2MC
N67DjQYVq+u+hbOmqYh1uN5TLKkA11pVUC9tavmjzTFiI+SAiHLsmVxOA/XxEUWB
VKqbD3aPjpLdYgC6tCC5Yb5k1aTm5fmhuB/+ZmqIA7vQyzpLZWw=
=7Hv9
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.15/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Changes for am3 cpsw and SanCloud for v5.15
A series of changes to update am3 to use cpsw switch driver and
few updates to earlier SanCloud changes. The plan was to send the
cpsw switch driver changes earlier but looks like I never tagged
the mail thread in my inbox to apply for v5.15.
* tag 'omap-for-v5.15/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-sancloud-bbe: Drop usb wifi comment
ARM: dts: am335x-sancloud-bbe: Fix missing pinctrl refs
ARM: dts: am335x-bone: switch to new cpsw switch drv
ARM: dts: am33xx: update ethernet aliases
ARM: dts: am335x-sl50: switch to new cpsw switch drv
ARM: dts: am335x-shc: switch to new cpsw switch drv
ARM: dts: am335x-phycore: switch to new cpsw switch drv
ARM: dts: am335x-pepper: switch to new cpsw switch drv
ARM: dts: am335x-pdu001: switch to new cpsw switch drv
ARM: dts: am335x-osd3358-sm-red: switch to new cpsw switch drv
ARM: dts: am335x-myirtech: switch to new cpsw switch drv
ARM: dts: am335x-moxa-uc: switch to new cpsw switch drv
ARM: dts: am335x-lxm: switch to new cpsw switch drv
ARM: dts: am335x-igep0033: switch to new cpsw switch drv
ARM: dts: am335x-cm-t335: switch to new cpsw switch drv
ARM: dts: am335x-chiliboard: switch to new cpsw switch drv
ARM: dts: am335x-nano: switch to new cpsw switch drv
ARM: dts: am335x-baltos: switch to new cpsw switch drv
Link: https://lore.kernel.org/r/pull-1628751694-126144@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix up some (non-urgent) IRQ flags for the PCI buses.
- Add the second UART to the generic ixp4xx.dtsi
- Make use of the new expansion bus driver in all device
trees with e.g. flash memory on the expansion bus.
- Adds the CF card slot to the Gateworks GW2358.
- Add new device trees for:
- Iomega NAS 100D
- D-Link DSM-G600
- Netgear WG302v2
- Arcom Vulcan
- Gateworks Avila GW2348
- Intel IXPD425 and siblings
- Coyote and IXDPG425
- Linksys WRV54G
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmEQcFAACgkQQRCzN7AZ
XXPNMxAAy16o6ou1gt6KCMGckTD3kyASAFZ3tk+dxgdZbBAU/fR6YR/ck1svUmuC
R4JUJpq5ToR7uWVCca1dHv5pN7e0hd06sM/+nyk5xJG2w1Ow2CuvAGBXpwz0sBf7
hvw2z23CUSTIesK3df9HZtuoagwhL3nsmfES3km0R+u2dQeS7rZDtHX6x++7c41q
9MPMqokhaEM0MV+7e2P7dQ6tTmLBLB9AijxEBdS2x3hsSyD0wom6J8ZlxZyDyQrG
OlhDm/FSPjJKtvwx78c8fSBLkQeql02CuG21L/L1Nicm5jG1sWjZ9fJUu8yrh9zb
RqfjFAhAOGdLDBVk/SEoMa9+6BdMLgy+MbenhX5FWdlLW9OVEAdzABtlEK2XiSRs
LDyWvEAi1Jii5kHT4HldHw+Luk3dD1hQiuPWWDK7xGnxahwTtwoJACHrYIsFjH1t
hz5ZB/Q74qGmDLgcBgGZrpQ9/RXEhh1scxk7OGO7/yzZlfHby+wWp0aGHe28pB7N
KPyXbP85EbucVhZ5V1Vu1FHQbZ9qp+u381Lj7OtQFIyPRAuGGy+55/3sQqfoq7lE
0+JVZIhTZUrZIpjtymfk7g2nkSbZU5Se4vswlx2awVuPf6Uz766M07swaR+YP9YU
Byp5QTAmebrvoIHHo2t7sT8bi5k94/2Lko8d5aKENSdQohs7yaM=
=ig2J
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEViYoACgkQmmx57+YA
GNnvDw/+KU4vgACfZqdeM1F4GTdyjN0kZ/sKNkRyGIQpveQn/+rA7Yv0xLhofPiM
NRC8pekw8HcEGKQ7TpP0u7wveBOWZbpKFb0fbQytHIQlHQsVQI8aqSkhoFzZbSoT
vJJdq0kN+U0/TxIHT3qnQ/FeSNUjtKLcWYbKpIgVXbpqgCrcxeODfCJOwD5f914x
XY+MMpc6byoFygLfn78tNfJg6QfmXIsnQ70sOqdgua8hSRJUnzWLL8ej3eayRMyX
JlfpPiyxbSaHtZvI0JT0X+mZgy4OhpEeELxEK3DLEsYxbkR/2QAf+SSOY4TOlPux
ikyIzSRG1naeV0xfGJ3flIcjq04KxIneyO1V2CYSxOCocw88fPAAOrWOdq1dzgLg
qFwoWWaBNp8LthPLvkFl4Gy7ScjpceDKE/yk2xRv8p2E64s3JLs2wicFZHAmZlWM
R9ECiFfQkMQg9Y1inmIyeFS9GTxF4HA2J/jnK52b6yAAljG/FnKs31X9WfOrYsqm
6eIcEdelTSrOoiqa0jPCte2uOzvsdMdtUTGJNjUoTuOZTb4scVihNe6WjsPg8Ftw
S3Mv0NlebijZzFDa/fk/u53/6kayh83XftyhB0OlirDKjKnRsgD+1op5jr0FTlHo
rX2j4ihbRfvTWk3lfV6B13xxqFAMewfCF1Zo7fmlFf2uLWoUDqY=
=8Yz2
-----END PGP SIGNATURE-----
Merge tag 'ixp4xx-dts-arm-soc-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
IXP4xx DTS file updates for the v5.15 kernel cycle:
- Fix up some (non-urgent) IRQ flags for the PCI buses.
- Add the second UART to the generic ixp4xx.dtsi
- Make use of the new expansion bus driver in all device
trees with e.g. flash memory on the expansion bus.
- Adds the CF card slot to the Gateworks GW2358.
- Add new device trees for:
- Iomega NAS 100D
- D-Link DSM-G600
- Netgear WG302v2
- Arcom Vulcan
- Gateworks Avila GW2348
- Intel IXPD425 and siblings
- Coyote and IXDPG425
- Linksys WRV54G
* tag 'ixp4xx-dts-arm-soc-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ixp4xx: Add a devicetree for Freecom FSG-3
ARM: dts: ixp4xx: Add devicetree for Linksys WRV54G
ARM: dts: ixp4xx: Add device trees for Coyote and IXDPG425
ARM: dts: ixp4xx: Add Intel IXDP425 etc reference designs
ARM: dts: ixp4xx: Add CF to GW2358
ARM: dts: ixp4xx: Add Gateworks Avila GW2348 device tree
ARM: dts: ixp4xx: Add Arcom Vulcan device tree
ARM: dts: ixp4xx: Add devicetree for Netgear WG302v2
ARM: dts: ixp4xx: Use the expansion bus
ARM: dts: ixp4xx: Add second UART
ARM: dts: ixp4xx: Add devicetree for D-Link DSM-G600 rev A
ARM: dts: ixp4xx: Move EPBX100 flash to external bus node
ARM: dts: ixp4xx: Add devicetree for Iomega NAS 100D
ARM: dts: ixp4xx: Fix up bad interrupt flags
Link: https://lore.kernel.org/r/CACRpkdY19AvWT--OcmEKbwFue_EcThVs7uZeHkzORten7xj-RA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Devicetree changes for omaps to configure more devices, and
add support for new SoC variants and devices:
- Add add gpio-line-names for am335x-boneblue
- Add support for dra762 abz package
- Two patches for McASP support on omap4
- Three patches to add support for am335x-sancloud-bbe-lite
- A series of changes to configure PRUSS for am3/4/5
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmELpF8RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNSmg/+OSmuwyu5yQn0nibALyLH07uZPwpXVlIH
VRL423lwLYpamfZMjegNygwHDIx1gk/RAqWI/UEjhPzKsqLvaJpg+BTW2rNBdEOO
ZVGX0S7EmzxLQPQTbUAzpHwP5BK1/WNwi5AN+eMVTuFgSSQ24Rq2chrlhPKD/4w5
bDtZ967IMFYEPs0mAiInYPme2M2oFb16EYLA4BK6qKnWE644D3juqXGmhRZS8FFv
rKg8rH0bmnRSRDO5vl+/BO+27Df8g+bzftRuUp9zF5QYzp3jkLi9NHNLz5XvLBwQ
eT7wRCsXOaeEdVMidvqVRsHkflxZmfz2pP8M9PgOKjym/EdUD8NMv6R5Ina4sKEK
761lZVr1BAq2kKtnBgRVMOyKkvp+1HLVWf5H+Ri/0Rjpit2RByLJYfDIImOtOpuY
46L0hYSVx9nGPG1xKbIlT9238opfgs6OELTcn7diisJkDYrjToQairEKDA9ypQyq
xpW74iMd/PedHlX30mYV0ie3wTqoMdZ3UzAcQrxgd03GXPO5QBjet6diyoXHDkFG
608mIflZHzzF14IY93JGF/rex2NhxnmcyKA3TjKKWq9daK3T0uNY2aS6fA72Ay4Q
EdU49ymbN43m4WxV6hgXZWnzfqmvk0822ANs+uUaJfDlM3g0ajmFf0cqSMkxFLO7
upb8FcNMhEc=
=tnQt
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEViMYACgkQmmx57+YA
GNm6ng/+IWb2/djgTs3GXgnHaNVZ4DI2GIDqSjxjkWrWnQ42qc8zwhz18TmoDU6Y
K6fvftSJ/QjnBibI+riSRaQQHkiGKR0Ipl15/a+cwjSO7rVtSI+mDsOPorQaKQ49
/EILoRzSWeb0G2MV8L+Zo6OHKs7l/6WhRqvNrbEeN6zWb7JTG3R05PuyZLC81eQj
tqHKvAfWL4dgDfqekeEaaj3duH4E36miR+z47s5Gf96qlKryUS8HGSQgIiuWm172
ZJj3nrkI8VUE4mR4toO37T0ytLA0Ac/RxmMaNYe/8tgV6pREZD6gBAjHqPEZMxL0
Z8ayKAPrfMAmn1HyBi8QTGbXsl5Cktt05RbPkvug1q8RAPfyyiXK4i1iY1BuriYi
+zSrlaaVMboowh3RgAsatNJo3H5USIR0JTbeCRCsIrHW7hxlRQ4wF/IDMVOlUHQa
TFFsBNCxi5uBzmWuTV4vFCUoQGZYxyp494gzH3CsLsn2SOe7QxS+eezDmwXRCRoC
cMiz5RGeuW3pfwrh6lyDSmOsX/BpZI3CYBNExRd+XbwGloqURoKJsJdDOwn+202s
lDEWv/reDvEAMzFQJz9DimnHJPFobkZsY+FVCYCQH7PblitRB2332n9Ses7bzoQn
yiU20IzmjccoAF3w4gHiStlIhejk+ovjjnXX0+qsTiZ3WOxe1Hc=
=7+WI
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.15
Devicetree changes for omaps to configure more devices, and
add support for new SoC variants and devices:
- Add add gpio-line-names for am335x-boneblue
- Add support for dra762 abz package
- Two patches for McASP support on omap4
- Three patches to add support for am335x-sancloud-bbe-lite
- A series of changes to configure PRUSS for am3/4/5
* tag 'omap-for-v5.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am57xx: Add PRUSS MDIO controller nodes
ARM: dts: am57xx: Add PRU-ICSS nodes
ARM: dts: am4372: Add PRUSS MDIO controller node
ARM: dts: am4372: Add the PRU-ICSS0 DT node
ARM: dts: am4372: Add the PRU-ICSS1 DT node
ARM: dts: am335x-icev2: Enable PRU-ICSS module
ARM: dts: am335x-evmsk: Enable PRU-ICSS module
ARM: dts: am335x-evm: Enable PRU-ICSS module
ARM: dts: am335x-bone-common: Enable PRU-ICSS node
ARM: dts: am33xx-l4: Add PRUSS MDIO controller node
ARM: dts: am33xx-l4: Add PRUSS node
ARM: dts: am335x-sancloud-bbe-lite: New devicetree
ARM: dts: am335x-sancloud-bbe: Extract common code
ARM: dts: am335x-boneblack: Extract HDMI config
ARM: dts: omap4-l4-abe: Add McASP configuration
ARM: dts: omap4-l4-abe: Correct sidle modes for McASP
ARM: dts: Add support for dra762 abz package
ARM: dts: am335x-boneblue: add gpio-line-names
Link: https://lore.kernel.org/r/pull-1628153040-834155@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It includes all required changes for handling i.MX6/7 eCSPI errata
ERR009165, which causes FIFO transfer to be sent twice in DMA mode.
Both SPI and DMA maintainers agree to merge it through arm-soc tree.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmEQ1REUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7w5ggAhpcDrpO7eimqPmkr/8FxI6WLGh/t
OjsAM+WVlAlHMPRC53r94Ot8q1XbenkA8Cr3hA88cJS+Hx2WunyXL4szUO+Bh/A5
o/ZpMPbitea7wQRVJkVX0AsBrvJ4hj+MQmlk31Kd2Jk7Ptpo3hoPb1J7Lg2Fou3K
g6nAELMSxa8+/1xt2AkNJppnDp6eRcOsc3yqO+7SsTGlr2JzB6SN21yvOzLWd8+Y
4v3J3a84G/w6vUlSa5mloIbGOOkyxEYitLBPrgjc5AvPjJEc0m/QlArmnuaGn1j+
LXfPFNDIlG5EIvF5HzrXMl6z8E4pGx7hWgDG/4SDWvYcbhlggtLnmra4Tg==
=bmM2
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEVheUACgkQmmx57+YA
GNlsqw/+I1blQeIvrsMDMuHmJuL+ecb+qNhH2nKLMj+78jJ7TVr6XOe5jWaCR2Pt
MhtFV/xvLMZ+klJ3x6UBu+3jr7SDdJhkqRJb4znLr1vZCYZcEZEzyMLW+PExS/d8
B2K3kDghTG1Ex5FkfzaZxogEeQbA2csxpRlk4BMuvfHlQACX5cjqUETo7bbCMFBw
n+CCsme1cOG2AJNb/g/YjYfeaicSfcyxW8QMUxS9dsiBLS+qan15G/LlzUJa7ssi
CmrCOsu2lEM6JGbcFEQ91vpCJu8ZUzx0rT5tFPzK+Os4no0yjTYaGZqWgLFSHzXL
eeG8EUiNVJ17sgyf9Yx1f92an41TeJ4W8lCFOB/hBCN1mpDK4YxQFmYXf+Bd0QgP
5GdkbjDAHei3mU31WsUPfdKt6qr/6jms8fqq/qsdMLZyvYX8CrSS+rX0sGHvIIbV
Raicaj2/9mPEJ1BEAzWxeI0vy3k/iJmJyWa/VYZojCXZ0HC/Qe1SnxspewCCDvW5
06oec9ZoADMH2nGLLbE9U1YlTKwzMqM7e2Y+oNPyeZiG1euSuNKlML4+7i2wHHOb
3WinUwKtkRkYKCYaohCW0uFKwdpIc2U2cBZoprlqavCg8iWTDwr4FZT1SbLr2bGY
WOOHbDPgxXzzwuaLMXoqV9KyMrzaj9+0A4ppcwIgYDDGFTH+JP0=
=iV7U
-----END PGP SIGNATURE-----
Merge tag 'imx-ecspi-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX eCSPI errata handling for 5.15:
It includes all required changes for handling i.MX6/7 eCSPI errata
ERR009165, which causes FIFO transfer to be sent twice in DMA mode.
Both SPI and DMA maintainers agree to merge it through arm-soc tree.
* tag 'imx-ecspi-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dmaengine: imx-sdma: add terminated list for freed descriptor in worker
dmaengine: imx-sdma: add uart rom script
dma: imx-sdma: add i.mx6ul compatible name
dmaengine: imx-sdma: remove ERR009165 on i.mx6ul
spi: imx: remove ERR009165 workaround on i.mx6ul
spi: imx: fix ERR009165
dmaengine: imx-sdma: add mcu_2_ecspi script
dmaengine: dma: imx-sdma: add fw_loaded and is_ram_script
dmaengine: imx-sdma: remove duplicated sdma_load_context
Revert "dmaengine: imx-sdma: refine to load context only once"
Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores"
Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core"
Link: https://lore.kernel.org/r/20210809071838.GF30984@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Move mt8135-pinfunc.h into include/dt-bindings/pinctrl so that we can
include it in yaml examples.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210804044033.3047296-1-hsinyi@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The merge_fdt_bootargs() function by definition consumes more than 1024
bytes of stack because it has a 1024 byte command line on the stack,
meaning that we always get a warning when building this file:
arch/arm/boot/compressed/atags_to_fdt.c: In function 'merge_fdt_bootargs':
arch/arm/boot/compressed/atags_to_fdt.c:98:1: warning: the frame size of 1032 bytes is larger than 1024 bytes [-Wframe-larger-than=]
However, as this is the decompressor and we know that it has a very shallow
call chain, and we do not actually risk overflowing the kernel stack
at runtime here.
This just shuts up the warning by disabling the warning flag for this
file.
Tested on Nexus 7 2012 builds.
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Currently, the (z/u)install targets in arch/arm/Makefile descend into
arch/arm/boot/Makefile to invoke the shell script, but there is no
good reason to do so.
arch/arm/Makefile can run the shell script directly.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
The wifi chip on USB port 4 may not be present on all BBE variants.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
pinctrl settings for the USB hub, barometer & accelerometer need to be
referenced from the relevant nodes to work.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The i.MX7 has two possible Flex Timers, disabled by default. Moreover, the
block is the same as LS1021a, then the drivers can be used as-is.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The DH electronics PDK2 can be populated with SoM with i.MX6S/DL/D/Q
variants. Split the SoC-independent parts of the SoM and PDK2 into the
imx6qdl-dhcom-*.dtsi and reduce imx6q-dhcom-pdk2.dts to example of
adding i.MX6S/DL/D/Q variants of the SoM into a PDK2 carrier board.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Following cleanups of the devicetrees done, no change in function:
- Remove parentheses from the license
- Update copyright date
- Alphabetical sorting
- Add comments
- Update pinctrl names
- Hex values in lower case
- Set 3rd values of fixed regulators gpio property to 0
- Replace interrupt type with a define
- Remove superfluous property max-speed from the fec node
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move iomux to the end, no change in function.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The function of each SoM pins is defined in the DHCOM standard [1] and
subset of them is defined as GPIOs (pins A-W). To ensure the interchange-
ability of the DHCOM SoMs, the function of the pins are fixed and cannot
be changed. On board level the DHCOM GPIOs can be used associated with
different blocks e.g. for interrupt or reset, but the function is always
GPIO. If not used, they can be freely used in the user space.
Therefore the whole configuration of SoM pins is made in the SoM DT.
Defining the DHCOM GPIO pins as a separate pinctrl nodes makes moving a
subset of them to an appropriate block pinctrl group easier on board level,
since it is not necessary to have a large pinctrl hog group containing
unrelated pinmux entries on board level. This also makes it easy to update
the SoM DT without having to update all the board DTs too. If necessary it
is also possible to change the electrical properties of the DHCOM GPIOs by
overwriting the pinctrl on board level.
[1] https://wiki.dh-electronics.com/images/2/2e/DOC_DHCOM-Standard-Specification_R01_2016-11-17.pdf
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PDK2 board is capable of running both 100M and 1G ethernet. However,
the i.MX6 has only one ethernet MAC, so it is possible to configure
either 100M or 1G Ethernet. In case of 100M option, the PHY is on the
SoM and the signals are routed to a RJ45 port. For 1G the PHY is on
the PDK2 board with another RJ45 port. 100M and 1G ethernet use
different signal pins from the i.MX6, but share the MDIO bus.
This SoM board combination is used to demonstrate how to enable 1G
ethernet configuration.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We need the fixes in here as well, and resolves some merge issues with
the mhi codebase.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This adds a devicetree for the Freecom FSG-3, a combined router
and NAS.
Cc: Rod Whitby <rod@whitby.id.au>
Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree for the Linksys WRV54G also known as
Gemtek GTWX5715. Some enhancements have been folded in from the
OpenWrt patches.
This supports everything in the upstream kernel with placeholders
for the out-of-tree multiphy which exist in OpenWrt.
Cc: phj@phj.hu
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds device trees for the ADI Engineering Coyote and the
Intel IXDPG425 reference design. The ethernet set-up on the
IXDPG425 is a bit dubious because I think it uses a DSA
switch chip, but this is a good as it gets right now.
The Coyote boardfile claims an IDE port exist at 0xFFFE1000
but the implementation does not use this. If you have the
board and can/want to test, please contact me.
Cc: Deepak Saxena <dsaxena@plexity.net>
Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Cc: Zoltan HERPAI <wigyori@uid0.hu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The IXDP425, IXCDP1100, KIXRP435 and IXDP465 are similar Intel reference
designs for IXP42x, IXP43x and IXP4[56]x.
This adds device trees for these so the board files can be migrated.
Cc: Deepak Saxena <dsaxena@plexity.net>
Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree file for the Gateworks Avila GW2348 platform
supporting all the features of the in-kernel boardfiles.
There are more boards in the Avila family, but this is the one that
is supported out-of-the-box by the current boardfiles. Some extra
features have been folded in from the upstream OpenWrt sources,
such as proper ethernet setup for both ethernet ports.
More variants can be added based on this device tree. Some of those
have DSA switches, multiple LEDs, multiple serial ports and similar
and would need some more elaborate work.
Cc: Michael-Luke Jones <mlj28@cam.ac.uk>
Cc: Deepak Saxena <dsaxena@plexity.net>
Cc: Tom Billman <kernel@giantshoulderinc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a devicetree for the Netgear WG302v2 router.
The DTS is mostly based on the upstream boardfile but I also
added in the ethernet from OpenWrt to get a more complete
system.
Cc: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Replace the "simple-bus" simplification by the proper bus for
IXP4xx memory or device expansion.
Use chip-select addressing with two address cells on all the
flashes mounted on the IXP4xx devices. This includes all flash
chips.
Change the unit-name from @50000000 to @c4000000 as the DTS
validation screams. The registers for controlling the bus are
at c4000000 but the actual memory windows and ranges are at
50000000. Well it is just syntax, we can live with it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The IXP4xx has two UARTs and some platforms make use of the
second one so add this to the include DTSI.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a devicetree for the D-Link DSM-G600 Wireless Network
Storage Enclosure so that we can delete the boardfile. The boardfile
does not even define an ethernet interface as it has an external
ethernet on PCI. This devicetree is for revision A using IXP420
the rev B version uses PowerPC.
Cc: Michael-Luke Jones <mlj28@cam.ac.uk>
Cc: Rod Whitby <rod@whitby.id.au>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Michael Westerhof <mwester@dls.net>
Cc: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the EPBX100 flash under the external bus on CS0
like on the other IXP4xx systems.
Cc: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This creates a more or less fully featured device tree for the
IXP42x-based Iomega NAS 100D.
We can't read out the raw flash contents for ethernet MAC, and
we cannot handle a power-off-button inside the kernel like the
boardfile does. These two things are normally done in userspace.
This conversion is part of moving all of the IXP4xx board files
over to device tree to modernize the IXP4xx kernel.
Cc: Rod Whitby <rod@whitby.id.au>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PCI hosts had bad IRQ semantics, these are all active low.
Use the proper define and fix all in-tree users.
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The board features a 128MiB NAND chip and recently linux gained support
for the NAND controller on the Zynq SoC. Thus add the corresponding
devicetree nodes.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210616155437.27378-4-michael@walle.cc
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Recently, a driver for the ARM Primecell PL35x static memory controller
(including NAND controller) was added in linux. Add the corresponding
device tree node.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The STiH418 embedded the same sensor as the STiH410.
This commit adds the corresponding node, relying on the st_thermal
driver.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The rng11 is not available on the STiH418 hence is disabled in the
stih418.dtsi
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The STiH407 family (and further versions STiH410/STiH418) embedded
a serial flash controller allowing fast access to SPI-NOR.
This commit adds the corresponding node, relying on the st-spi-fsm
drivers.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, Switch BeagleBone boards to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.
For am335x-sancloud-bbe-common.dtsi also removed duplicated davinci_mdio DT
nodes which already defined in am335x-bone-common.dtsi.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Update ethernet aliases to point at CPSW switchdev driver.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Toby Churchill SL50 Series to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Bosch SHC to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Phytec AM335x phyCORE SOM, phyBOARD-WEGA, phyBOARD-REGOR,
PCM-953 to use new cpsw switch driver. Those boards have or 2 Ext. port
wired and configured in dual_mac mode by default, or only 1 Ext. port.
Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch Gumstix Pepper to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, switch EETS,PDU001 to use new cpsw switch driver. Those boards have or
2 Ext. port wired and configured in dual_mac mode by default, or only 1
Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Rob Herring