This patch adds the ADC node for the Berlin BG2Q, using the newly added
Berlin IIO ADC driver.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Now that the rework to have one sub-node per device in the chip and
system controllers is done, their dedicated compatible can be removed.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With the introduction of the Berlin simple-mfd controller driver, all
drivers previously sharing the chip and system controller nodes now
have their own sub-node.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With the introduction of the Berlin simple-mfd controller driver, all
drivers previously sharing the chip and system controller nodes now
have their own sub-node.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With the introduction of the Berlin simple-mfd controller driver, all
drivers previously sharing the chip and system controller nodes now
have their own sub-node.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Now with proper support for simple-mfd probed pinctrl driver, move
to the new soc-pinctrl and system-pinctrl nodes.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Now with a proper platform driver for reset and simple-mfd, move to
the new marvell,berlin-reset node.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The chip and system controller nodes will be handled by simple-mfd based
driver probing. Prepare the conversion by adding "simple-mfd" and "syscon"
compatibles to the corresponding nodes.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Ux500 SOCs have a special backup RAM that needs to be
defined in the device tree.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds support jpeg for exynos3250-rinato board.
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Add MAX98090 audio codec, I2S interface and the sound nodes
to support audio on exynos5422-odroidxu3 board. Now we can
support audio using simple-audio-card DT binding.
Signed-off-by: Inha Song <ideal.song@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds nodes for hardware JPEG codec found in exynos4210
and exynos4x12 SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Extend the S3C RTC node with rtc_src clock so it could be operational.
The rtc_src clock is provided by MAX77686 (Trats2) or S2MPS11 (Arndale
Octa).
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Use a define instead of raw number as a ID for "rtc_src" clock.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Use a define instead of raw number as a ID for "rtc_src" clock.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Mark "samsung,exynos3250-rtc" compatible as deprecated because it
duplicates the "samsung,s3c6410-rtc". Use "samsung,s3c6410-rtc" on
Exynos3250 and Exynos4415 boards.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The Exynos5422 SoC has a s3c6410 RTC where the source clock
is now a mandatory property.
This patch fixes probe failure of s3c-rtc on Odroid-XU3 boards.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
On Arndale Octa the S2MPS11 RTC alarm interrupt was not handled
at all because of wrong configuration of interrupt and gpx3-2.
1. Interrupt is signaled by falling edge.
2. This GPIO line is hard-wired on the board to PVDD_APIO_1V8
through a resistor so pull-up/down must be disabled.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Since commit e4b3d38088 ("phy: exynos-video-mipi: Fix regression by
adding support for PMU regmap") the syscon property is required in
samsung,s5pv210-mipi-video-phy nodes, but this DTS hadn't been updated
yet.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The current GPLv2 only licensing on this dts makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dts under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The current GPLv2 only licensing on this dtsi makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dtsi under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The current GPLv2 only licensing on this dts makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dts under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The current GPLv2 only licensing on this dtsi makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dtsi under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The current GPLv2 only licensing on this dts makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dts under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The current GPLv2 only licensing on this dtsi makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dtsi under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Add basic support for Hitex LPC4350 Evaluation Board. Board
features a LPC4350 Soc, 8 MB SDRAM, 8 MB SPI Flash, USB and
Ethernet.
More information can be found on:
http://www.hitex.com/index.php?id=3212
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@gmail.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Adds basic support for Embedded Artists' LPC4357 Developer's Kit. Board
features a LPC4357 Soc, 32 MB SDRAM, 128 MB NAND Flash, 16 MB SPI
Flash, USB and Ethernet.
More information can be found on:
http://www.embeddedartists.com/products/kits/lpc4357_kit.php
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
NXP LPC18xx/43xx SoCs are very similar devices and should be able to
share a common base (lpc18xx.dtsi). Diffences between the devices are
put in a dtsi which is specific to that device.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series adding support for the Compulab CM-A510
- Add alias for mdio on Armada 38x
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlVV6S0ACgkQCwYYjhRyO9W1tQCghag9/kiZ0qMJSesLBLwG7tcE
yrcAniOoTLzP6cMF+jqtuTrXwoke13JN
=OfeD
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt changes for v4.2 (part #1)" from Gregory CLEMENT:
- A series adding support for the Compulab CM-A510
- Add alias for mdio on Armada 38x
* tag 'mvebu-dt-4.2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add alias for mdio on Armada 38x
ARM: dts: dove: Add Compulab SBC-A510 to Makefile
ARM: dts: dove: Add proper support for Compulab CM-A510/SBC-A510
ARM: dts: dove: Remove Compulab CM-A510 from Makefile
ARM: dts: dove: Add internal i2c multiplexer node
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVVGaiAAoJEFGvii+H/Hdh+EgP/3TFK863t7j9r4UdN76dPogx
GUvaT0U1H6/zs3P9B0/L4FVVdkIhEXZ7NvkiEjGuMySpSoAAouWclaW40FQUysK4
Pr9A0Qssp0QjjIwBpT/cRWyCmTpP00qbYsDRlKWtDmMu4A134UCUTXY5008+S++2
EqVyP28hpkImAvPEt2jj14kFep/HroxVPvsD7/vWM0SP5BY3zXxHl5wSD/6XzmEa
/jJonhhNWVd+/Vkgu331360vEx6zvC66GhIqFLHlSz7dUI4cw008c4NtxcYjFUVl
0Jv9YXyxD3GC52S1cZ0MGrWaMXC9LBOq4/5THU/rU+7n3rrkIl/Wrj4zvyKy6IUo
E/XRzZ0EBRooSR+z/ptZ1QBZouhWRRi5iN8Ql+AqHhUg9QV03wXtauijpkRgKRnO
+eiPeuMvHnWzfWLrfHamQTgHAJdfD8o0+nBx/0mvy76JidamIsbYoRB1NSixKNEz
lZXeQoKQ7H+2Ojky+QQArBFnxH1z1OAga2lKh1MXaHs6mvNzHL1W1btcg66sIjFV
FJHqJjZgPgbelG+fqvYtegfOQKVAGVMDhnGUUeVA22bTPgHvdaLCCTiaCXdpsNC9
cuM0yykWZL0NcZiGXtWSs/2rA7Fw25TJkZ23i1lye15nNeyFLoEZIE1UbtcxylPt
edoYW47mgIS0Xdoi/wim
=KpAt
-----END PGP SIGNATURE-----
Merge tag 'rpi-dt-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi into next/dt
Merge "RaspberryPi Device Tree changes due for v4.2" from Lee Jones:
* tag 'rpi-dt-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi:
ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM.
ARM: bcm2835: dt: Add the mailbox to the device tree
ARM: bcm2835: dt: Fix i2c0 node name
ARM: bcm2835: dt: Use pinctrl header
ARM: bcm2835: dt: Add header file for pinctrl constants
ARM: bcm2835: dt: Add root properties for Raspberry Pi
ARM: bcm2835: dt: Add vendor prefix for Raspberry Pi
The Ux500 like other Cortex-A9 SoC's has a Snoop Control
Unit (SCU) and a Watchdog in the same address range as
the local timers. Add these to the SoC device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Enable DMA for HSUSB on r8a7790 and r8a7791 SoCs
* Configure the HOME key as wake-up source on kzm9g board
* Use generic names for device nodes on SH Mobile SoCs and boards
* Add "nor-jedec" compatible value to SH Mobile boards
* Add IRQC clock to r8a73a4, r8a779* SoCs
* Remove MSIOF address from r8a7790 and r8a7791 SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVU/RhAAoJENfPZGlqN0++yMMP/1gRmFjcDdkM9uZclxU7MAo2
eMAQPn1a/ziWIck5cLrCQhk+xZg5FqFhTrzq0oRVa3p6Dq7HOLki3eugp30OjQ/F
c8J2QeYRHDwpVNvSfu/h4YEiKIVURKYFQTn9bSx6B4AefD70+vkRNyZLfDFP/oO/
w/NwkNcyDCHGSlltUddTAggf+XNwWd2S/+KEqFpdeFXUWR/7X3GTzwqji2iyG8Ft
tAJOe6xveAv0WyXCVXs7sf6/LXyyfpzI5jQpmIN3tv4yuUbmIhiihSW1zEFKggQl
+Wa9YQhixdYBRQEDLkCP2qGxwg4q+/58/RHvN3S0eQUrf3/dsnjIdnoLxuEMBpIi
xKqtnO02FNzjcc7XNitaE5hzdNLikVCg8zs48yo4nvBYaWOnsUFXQ5jgkhl/eiqa
q3FsFrk44/1QnHoHmICasfwxJ1TOv5R/FpDxJrBUAFtTfPkRGl/hgpUi0g9d1CNk
XAw/+gUfyJZTHz9la7okwFYb83lHSGHwH3maaRHJ7WCN/T7hGd6BQNZgj3vGkCVq
A9p1t97Pu1+3Yd2IjaRItSlTUW0nvy+uZY58aXluBhM3WKR6ZkaiQC/GWy1Z8fAH
49K1fKR32cu0+zBrD9exaW/Xsc8YKb71C3F/nCwsLOlkLpqJ3Bm2Ys4pe8jHsOJ5
pmSWiLDmIFkccDY2qA6t
=OdRc
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-for-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v4.2" from Simon Horman:
* Enable DMA for HSUSB on r8a7790 and r8a7791 SoCs
* Configure the HOME key as wake-up source on kzm9g board
* Use generic names for device nodes on SH Mobile SoCs and boards
* Add "nor-jedec" compatible value to SH Mobile boards
* Add IRQC clock to r8a73a4, r8a779* SoCs
* Remove MSIOF address from r8a7790 and r8a7791 SoCs
* tag 'renesas-dt-for-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
ARM: shmobile: r8a7791: Enable DMA for HSUSB
ARM: shmobile: r8a7791: add USB-DMAC device nodes
ARM: shmobile: r8a7790: Enable DMA for HSUSB
ARM: shmobile: r8a7790: add USB-DMAC device nodes
ARM: shmobile: kzm9g dts: Configure the HOME key as wake-up source
ARM: shmobile: koelsch dts: Use generic names for device nodes
ARM: shmobile: lager dts: Use generic names for device nodes
ARM: shmobile: bockw dts: Use generic names for device nodes
ARM: shmobile: koelsch dts: Add "nor-jedec" compatible value
ARM: shmobile: bockw dts: Add "nor-jedec" compatible value
ARM: shmobile: lager dts: Add "nor-jedec" compatible value
ARM: shmobile: bockw-reference dts: Add "nor-jedec" compatible value
ARM: shmobile: henninger dts: Add "nor-jedec" compatible value
ARM: shmobile: armadillo800eva dts: Use generic names for device nodes
ARM: shmobile: marzen dts: Use generic names for device nodes
ARM: shmobile: kzm9d dts: Use generic names for device nodes
ARM: shmobile: ape6evm dts: Use generic names for device nodes
ARM: shmobile: sh73a0 dtsi: Use generic names for device nodes
ARM: shmobile: r8a7791 dtsi: Use generic names for device nodes
ARM: shmobile: r8a7790 dtsi: Use generic names for device nodes
...
- clocks descriptions (pxa27x, pxa3xx)
- timer descriptions (pxa27x, pxa3xx)
- IPs which are embedded on the SoC
- keypad
- udc (USB client)
- power I2C
These are amongst the building blocks for future pxa device-tree board
description.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVUm1JAAoJEAP2et0duMsSxJUQAIXpLJWnPYKPj24AQYwQki4T
PlhDxYUPSOFJy2JVBnk+wwuPH+7qFwwZ+6q/y/7l6O5U4okHzoQCL/CySCBHJiFJ
poLFqPfbZn+6WSR9px47v4nDniaoOsBLwb/Z/B7AOC9FgqNBX9lwpkCQeb5ybRk2
vfqUZjbyq5/bxhPSCKh29wclqrO88xaowK9fClXFhgUNjmL/5YEBi3qYKErtGZyi
udAh2rnljIWzgzTfpIs/ovtjgPV8Qy7s0iw0YJLcak3Pl9lmyUA/iQLgK21RfX7J
nQr3AFHkmKs+r496TYrbA5+PLd00LSBs6FIFRHJBvqSEiecqm/hYzY/T+g8KAziG
p7bG9B7DCpM8wvScqGnzaLI0g0wYZVm7XGeSjMnFxQON1Zyk2tg/e7fXSTt/B7/W
mOgmU9bb981zfS6yocrXZaeq48ApnO7dVoWN9orwIOfjSaQA1N4eNeD9VwVNQIxT
sPlmrH4+DH5Ov/coQtGS467W2+leJTtAEYv4SHqqXIj74Je9tiEc9UVVeJhJauxd
LMfPkl4/P9WaBVFqICAGbBE+F597hOIG9CPec0gKVg8c4wq3Ji2fHEy+wZXBSSuC
t06d5yt082ffrPY0qqZSGal7vUUzDMav+HUmGU/34QpQbUE6rr7sflOPpSLIK1Qe
sURcpwaKhGmNqhnOBxm3
=GbmD
-----END PGP SIGNATURE-----
Merge tag 'pxa-dt-4.2' of https://github.com/rjarzmik/linux into next/dt
Merge "device-tree pxa update" from Robert Jarzmik:
- clocks descriptions (pxa27x, pxa3xx)
- timer descriptions (pxa27x, pxa3xx)
- IPs which are embedded on the SoC
- keypad
- udc (USB client)
- power I2C
These are amongst the building blocks for future pxa device-tree board
description.
* tag 'pxa-dt-4.2' of https://github.com/rjarzmik/linux:
ARM: dts: pxa: add pxa-timer to pxa27x and pxa3xx
ARM: dts: pxa: add pxa27x-keypad to pxa27x
ARM: dts: pxa: add pxa27x-udc to pxa27x
ARM: dts: pxa: add clocks
ARM: dts: pxa: add pwri2c to pxa device-tree
Merge "Device Tree changes" from Florian Fainelli:
New devices:
- Felix adds support for the Buffalo WXR-1900DHP and adds the USB led on Buffalo
WZR-1750DHP
- Rafal adds support for the SmartRG SR400ac, Asus RT-AC68U and RT-AC56U
New peripheral support:
- Brian adds Device Tree nodes for the Broadcom NAND controller found on
BCM7xxx, BCM63138 and Cygnus SoCs
- Brian adds Device Tree nodes for the SATA AHCI and PHY controller found on
BCM7xxx
- I add the Device Tree nodes and bindings documents for bringing-up secondary
CPUs and timer/syscon-reboot on BCM63138
* tag 'arm-soc/for-4.2/dts' of http://github.com/broadcom/stblinux:
ARM: BCM5301X: Add DT for Asus RT-AC56U
ARM: BCM5301X: Add DT for Asus RT-AC68U
ARM: dts: BCM63xx: Add timer and syscon-reboot nodes
dt-bindings: Add documentation for the BCM63138 timer and syscon-reboot
ARM: dts: brcmstb: add nodes for SATA controller and PHY
ARM: dts: cygnus: Enable NAND support for Cygnus
ARM: bcm63138: add NAND DT support
ARM: bcm7445: add NAND to DTS
ARM: BCM5301X: Add DT for SmartRG SR400ac
ARM: BCM5301X: Add DT for Buffalo WXR-1900DHP
ARM: BCM5301X: Add USB LED for Buffalo WZR-1750DHP
ARM: dts: BCM63xx: Add SMP nodes and required properties
Documentation: DT: Document SMP DT nodes and properties for BCM63138
ARM: dts: BCM63xx: Add PMB busses nodes
Documentation: DT: Add Broadcom BCM63138 PMB binding
- fix second S2R on exynos4412 based Trats2, Odroid U3 boards which
happened after enabling L2$ and caused by commit 13cfa6c4f7 ("ARM:
EXYNOS: Fix CPU idle clock down after CPU off")
And replace the soc_is_exynosxxx() macro with of_compatible_xxx
- fix dereference of ERR_PTR of of_genpd_get_from_provider()
- fix suspend problem on old DT machines to skip the initialization
suspend and caused by commit 8b283c0254 ("ARM: exynos4/5: convert
pmu wakeup to stacked domains")
- add keep-power-in-suspend for Peach Boards to support S2R and has
been missed in previous pull-request for fixes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJVVBCOAAoJEA0Cl+kVi2xqeDoP/27tWRCwy7ZUkhjZ90pHwJYg
SIBBGO/Ko4Sts7OqeBHDczHdjhFPlqRLuoKduQrJpHOkcCa2+k9laILC4edTaYJB
mTJgUKiJvUPmkTFNkxPq4nf/OOsavpvTyS7Voyv2zDPxwXyY56ml3FEWNM17tQQv
9MdvdMeIga3OdL6/a77HPYYtxmYMCSlJxXOyxE7ReSmIVQa/udRKlEZ7j1B/bt2t
c8wVbViXMNuNXsUK/yPgz7F8fnmmzX1HyPqUow6Jx1L7jOltq6fCAa14MiRyAGyH
r3GlrmkXvFNtaZnh/Oe/6em3KPkuj7EvCs5paXuFzPcwGEnaS7k5WVUgRuPZXl8A
sUEkc7aWUVWScjXsNNmVOZMOC8ZMVLHXYY7ArdEn/V/dZHJzUrulhvpmDHjkA7tP
oep2eT3mti1BZqhZ+6C8uD2W0s0HD5Gi+oTvBOvxZbKmJpHOSKFa6zxOwWwRAAJ5
opOPAZxZdgc0BcdcheiCindEMKO0ldzHGTJUsOY5/zXCmigDZUYCtEQRNV7UUHFF
sR4b/S92B7y2HVzCLl9Ns6K1HHXU2/VefJmZ945GTL5YedkvTgECi/OeA1taGU9Y
fDR0NaxS4rxFhGp5T8JVkweT4ahTGnXyEwHfl3CzSAFq3tHHeD1KqD+D92JUaW14
26jDOQZOa04zXAJzDsTR
=r1wn
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Merge "Samsung 2nd fixes for v4.1" from Kukjin Kim:
- fix second S2R on exynos4412 based Trats2, Odroid U3 boards which
happened after enabling L2$ and caused by commit 13cfa6c4f7 ("ARM:
EXYNOS: Fix CPU idle clock down after CPU off")
And replace the soc_is_exynosxxx() macro with of_compatible_xxx
- fix dereference of ERR_PTR of of_genpd_get_from_provider()
- fix suspend problem on old DT machines to skip the initialization
suspend and caused by commit 8b283c0254 ("ARM: exynos4/5: convert
pmu wakeup to stacked domains")
- add keep-power-in-suspend for Peach Boards to support S2R and has
been missed in previous pull-request for fixes
* tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Use of_machine_is_compatible instead of soc_is_exynos4
ARM: EXYNOS: Fix failed second suspend on Exynos4
ARM: EXYNOS: Fix dereference of ERR_PTR returned by of_genpd_get_from_provider
ARM: EXYNOS: Don't try to initialize suspend on old DT
ARM: dts: Add keep-power-in-suspend to WiFi SDIO node for Peach Boards
Fix the main PLL frequency on Armada 375, 38x and 39x SoCs
Add clock-names to CuBox Si5351 clk generator
Add dts entries in the MAINTAINERS file
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlVV6IwACgkQCwYYjhRyO9V2iACgi038BpoDW4Nf4Ivt+6eGzGeB
2GAAoKnvitRZBNyFsWiWtvo/Yl7Rgiol
=MCEb
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.1-2' of git://git.infradead.org/linux-mvebu into fixes
Merge "mvebu fixes for 4.1 (part 2)" from Gregory CLEMENT:
Fix the main PLL frequency on Armada 375, 38x and 39x SoCs
Add clock-names to CuBox Si5351 clk generator
Add dts entries in the MAINTAINERS file
* tag 'mvebu-fixes-4.1-2' of git://git.infradead.org/linux-mvebu:
MAINTAINERS: Add dts entries for some of the Marvell SoCs
ARM: dove: Add clock-names to CuBox Si5351 clk generator
ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3288-evb files to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Doug Anderson <dianders@chromium.org>
Acked-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Caesar Wang <caesar.wang@rock-chips.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Chris Zhong<zyw@rock-chips.com>
Acked-by: Roger Chen <roger.chen@rock-chips.com>
Acked-by: Yunzhi Li <lyz@rock-chips.com>
on behalf of Rockchip
Acked-by: Eddie Cai <eddie.cai@rock-chips.com>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3288.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Doug Anderson <dianders@chromium.org>
Acked-by: Sonny Rao <sonnyrao@chromium.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Caesar Wang <caesar.wang@rock-chips.com>
Acked-by: Lin Huang <hl@rock-chips.com>
Acked-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Jianqun Xu<jay.xu@rock-chips.com>
Acked-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Roger Chen <roger.chen@rock-chips.com>
Acked-by: Yunzhi Li <lyz@rock-chips.com>
on behalf of Rockchip
Acked-by: Eddie Cai <eddie.cai@rock-chips.com>
This patch fixes a regression where serial is enabled by the first
(board) DTSI, then disabled by the second (SoC) file. To enable
serial and keep it enabled, we need to include the file which enables
it last.
Reported-by: LAVA [via Peter Griffin <peter.griffin@linaro.org>]
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The SI unit of frequency is Hertz, named after Heinrich Hertz, and is
given the symbol "Hz" to denote this. "hz" is not the unit of frequency,
and is in fact meaningless.
Fix arch/arm to correctly use "Hz", thereby acknowledging Heinrich Hertz'
contribution to the modern world.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There exists a tiny MMU, configurable only by the VC (running the
closed firmware), which maps from the ARM's physical addresses to bus
addresses. These bus addresses determine the caching behavior in the
VC's L1/L2 (note: separate from the ARM's L1/L2) according to the top
2 bits. The bits in the bus address mean:
From the VideoCore processor:
0x0... L1 and L2 cache allocating and coherent
0x4... L1 non-allocating, but coherent. L2 allocating and coherent
0x8... L1 non-allocating, but coherent. L2 non-allocating, but coherent
0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent
From the GPU peripherals (note: all peripherals bypass the L1
cache. The ARM will see this view once through the VC MMU):
0x0... Do not use
0x4... L1 non-allocating, and incoherent. L2 allocating and coherent.
0x8... L1 non-allocating, and incoherent. L2 non-allocating, but coherent
0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent
The 2835 firmware always configures the MMU to turn ARM physical
addresses with 0x0 top bits to 0x4, meaning present in L2 but
incoherent with L1. However, any bus addresses we were generating in
the kernel to be passed to a device had 0x0 bits. That would be a
reserved (possibly totally incoherent) value if sent to a GPU
peripheral like USB, or L1 allocating if sent to the VC (like a
firmware property request). By setting dma-ranges, all of the devices
below it get a dev->dma_pfn_offset, so that dma_alloc_coherent() and
friends return addresses with 0x4 bits and avoid cache incoherency.
This matches the behavior in the downstream 2708 kernel (see
BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h).
Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Noralf Trønnes <noralf@tronnes.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Device tree node names should contain the node's reg property address value.
The i2c0 node was apparently forgotten in commit 25b2f1bd0b (ARM: bcm2835:
node name unit address cleanup).
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch converts all bcm2835 dts and dtsi files to use the pinctrl
header file.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
According to the imx27 documentation, fec has a 4 Kbyte
memory space map. Moreover, the actual 16 Kbyte mapping
overlaps the SCC (Security Controller) memory register
space. So, we reduce the memory register space to 4 Kbyte.
Signed-off-by: Philippe Reynes <tremyfr@gmail.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Fixes: 9f0749e3eb ("ARM i.MX27: Add devicetree support")
Cc: <stable@vger.kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3188-radxarock.dts to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3066a-bqcurie2.dts to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3288-thermal.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Caesar Wang <caesar.wang@rock-chips.com>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3188.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
Acked-by: Max Schwarz <max.schwarz@online.de>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3066a.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3xxx.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
Add a "brcm,bcm6328-timer" and "syscon-reboot" nodes to allow the
generic syscon-reboot driver to reset a BCM63138 SoC.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Enable NAND support for Broadcom Cygnus SoC
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Update bcm63138.dtsi with the following:
- enable-method for both CPU nodes
- brcm,bcm63138-bootlut node
- resets properties to point to the correct PMB controller to release
the secondary CPU from reset
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the two BCM63138 PMB busses nodes found on this System-on-a-Chip as
described in their corresponding binding document.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Contains a couple of fixes and additions to device tree files. The most
notable change is a fix for a misapplied patch that was only exposed by
a recent change in the regulator subsystem that caused USB to break on
Tegra124 recently.
Other than that there are a more or less random assortment of additions
to enable various features on a couple of boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJVU1KlAAoJEN0jrNd/PrOhMKgP/jOIwMgc+RC6uud66kAb8oQ8
itcNWwhHFv/7fiCeIbCq8qsp51DHPxhDuWeBP/FIhfExJcDD+P2pfrKpXlI1bCrz
jgOHfgauKSzSEIQcFU3uYWMr7qR7euVtaBsB0v16HtSpTcRnNKv/hvlvYPFYVl5D
NvWyYB7hjHrbAur97vrJJ9e+RKZGfKo0bOqikyQ5ftbKcASa9HNY6JAeOrV+Delw
LPA3P98eXcwVSBgdHw++iOqVZNbs+kNXnRV8dcjgWXdXsI2LQGgZrbEb5WS7/29j
0Jaz9dwMJ4EC9yZaiT2sOXxdOjnSJ5MC1lE/CuCjE8Kz4fsq8sCudTp90fi6eFxT
QcrneJ7d7LzjprDpKdK8E/YgPHjp5pOVuBvqtJ/RtjHFCVlaZ5OvZMdNX0zqY7SU
T+3kYNXTcFhJHyQOtajGOSixVyqOEVddjjCvSyH+QXB6MmkH37Jcg6A7J/t6VrX3
eK0VQMqkB10hZj8pzP/kN4dpiw3YQXxszF9luQ10AjHZvnADyGKesaDXYEjGD3FL
ux1hjQHTAuRauID4XUzu2vfNQqYbLb0papQ+6RnlgBn4P+jS/45xTZEchUU5Xoj/
SGTgxqNM4TjCDGf6iYzpbKi/A/T46w5Xt05r2g57qkQPcITVJK6MHtbEmPjWR1jP
3CJ0qItO/dSTi61vV0XW
=8R5I
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Devicetree changes for v4.2-rc1" from Thierry Reding:
Contains a couple of fixes and additions to device tree files. The most
notable change is a fix for a misapplied patch that was only exposed by
a recent change in the regulator subsystem that caused USB to break on
Tegra124 recently.
Other than that there are a more or less random assortment of additions
to enable various features on a couple of boards.
* tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Fix hda2codec_2x clock and reset names
ARM: tegra: Add Tegra30 HDA support
ARM: tegra: Cardhu device-tree comment spelling fix
ARM: tegra: venice2: Set min-/max-microvolt for VDD_LED supply
ARM: tegra: venice2: Mark eMMC as non-removable
ARM: tegra: jetson-tk1: Enable HDA support
ARM: tegra: Add missing HDMI +5V regulator
ARM: tegra: cardhu: Add power and volume keys
ARM: tegra: Correct which USB controller has the UTMI pad registers
Just a couple of trivial cleanups such as a typofix and conversion of
hexadecimal numbers to all lower-case in DTS files for consistency.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJVU1ARAAoJEN0jrNd/PrOhwAQP/i+e61tVe8GhV1w0404+u3dM
50ZQNvhsLxh8WmXlfaiFIByDgga8QbmSCCTm3GZwKx24REMTab0OepZHwon1GWSi
DAV0mjb1jA1/rv63/USQWVR0OcPAABJbXX1zXI1WTndBfR9l8TqrtXFC0mC9ZOPg
2n04vFjIEG2dC9urqiIb/WkFwyn2nJhVGSbBSQXwYiceuyo1KsSisWayyO/ms0tU
g3SKtmzfrmx4UYWW3dDa/pg7tzUayzK/L8BM0bnBZH2P2Xb9f1UhCupONJ4Gv8By
4tD2kVSe0tYivoJw6bOICfL39aUpcRnO7vUMLW34/kABjaSIzoH3uB+8MflyOhKt
BHXKwYLXYJfSrwcd0DlLo/Y+xsPM3NCYkhniRq8atZHKecTb49WSr9ItLFw4lriD
5vyEvQryQdzNTxuLKQgVJyZBeV+81lFb0ESNzhkD1XTMxkPV7HKVPIRZT0EsiTrh
DIqZIsWfA5umo/1zUTP5io1U4S25xe++pXiC14nHgNudiIIK2mF7km6zhAoghvXI
igtDqS0VlOQ7l5xlw44UQfFgRgzqyxeu2urQamNjMGQIgV6fX/jULaBm1Xjeyt2U
zvEyORKnkIxlvQFQ7YbL9gPxA6d6d4W3OrbEEHeZsclKEmq3JP30fdVSn+p0/aWx
dibf82nNBM+yjTGsORi3
=OrUc
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.2-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup
Merge "ARM: tegra: Cleanup patches for v4.2-rc1" from Thierry Reding:
Just a couple of trivial cleanups such as a typofix and conversion of
hexadecimal numbers to all lower-case in DTS files for consistency.
* tag 'tegra-for-4.2-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Fix typo (reset -> rest) in comment
ARM: tegra: Use lower-case hexadecimal digits
- Add a DTS node for the A9 SCU
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJVU1L4AAoJEBmUBAuBoyj05zEP/02UJVcqCHT2P/z/1XJnIwed
hZgO0Oej4ZEc+futAIx6IeMEkgNoIDZX1rdijiQe3Uv2QK8niC7R8yOjwcZrM8jZ
ws/jyKWpCBsV0J+lzZevxa3DpxMHPmcx0W9gAqYpikrwgbXt0Dyy62CQkp+XKZ5d
mluxSEbkSlORddzD8eQbM1yuVlFGg9RAzdwaeZk4j6x+vq2Zk+jEwq5EKLBIiO/U
kGwu/mEryiWl+lzqV7Nlagt4uLASsT5ZxEjr4zUx9ddDTJo4mqStqONdDPMTdf9h
0qzHrWa9mMhI7RLoOWBuvTEcvEVPSRNhVfo6cY8ZnQcZ/V5tj4sG3jAPUFXkFSMd
iZW3mud5P45ugbKiumR5R7ve3t6yxhvNqWH9FZqfnlPPNXtCaUqBGB772A0Xr2Hz
mRPu2Vl9cjmGdrWQHqF5sViPdm52E8Het3/HO0ccsx4aoH+jhgGKeqmiK779EKTA
lA0NPBrL5PRzjNacNwnR7RxtLpcISf5CbsV0ojiIDtB8x11TCg1Zct+ogeE03luT
YpTNuOgTEg7Gy4oa6LPPXahUS+6RffHmASjlt15xaWx/x5MaCXTyk3H4JtSumDiL
blFzdQmNUcO2YpggSgyS0UzRFyqYJIRPq7lHKMJz5NMfaHVzu4VzoDKmJVo4zG2T
BftEOP7ROh5wq1HkWJs3
=23ne
-----END PGP SIGNATURE-----
Merge tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
Merge "SoCFPGA update for v4.2 part 2" from Dinh Nguyen:
- Add a DTS node for the A9 SCU
* tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: dts: add the a9-scu node
the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288
boards, as well as some usb properties and marking the radxarock pmic
as system-power-controller.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJVU2Y0AAoJEPOmecmc0R2BXCQIAIV6yQP+f6ACIPJEVRk8yD3W
YyJ/mXgrSD/RaaFYnEO3PPVC8TibVI6a7SIoa4y92g0LW7VYn7UQY1wzlrt3rzR5
rY71uB/Ew0yQBJe1rsw+Sn7couG9U/g3YB/guJmFfO2rS9xn6wICKcLxYNaIp9sb
WOwzNlpWwpejCdYLzxw9BP0qxFRE2ZlxoF96VB+j5s+IcnvKGGo3twYqtyN5YEjK
dB7Bbnq6n9VWgYMkuijxyQ00skUNUb+7ciHSO4pksPtuSa4K+GsqjkTu37nkBPmn
t53c+M93WuI5hplFRM3UwXKH6ELqhEuq0GN4dPzRD5VBWcWYOMXl8AmhfOlR6cU=
=39uK
-----END PGP SIGNATURE-----
Merge tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: dts changes for 4.2" from Heiko Stuebner:
Some misc improvements defining additional supply regulators, enabling
the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288
boards, as well as some usb properties and marking the radxarock pmic
as system-power-controller.
* tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add system-power-controller to act8846 on radxarock
ARM: dts: rockchip: add properties for dwc2 usb otg controller
ARM: dts: rockchip: enable tsadc on rk3288 boards
ARM: dts: rockchip: add act8846 supplies on rk3288-firefly
ARM: dts: rockchip: Specify VMMC and VQMMC on rk3288-evb
ARM: dts: rockchip: Enable Cortex-A12 HW PMU events on rk3288
Define CPU topology, connect that with CoreSight blocks,
add sensor information to DT boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVUyYjAAoJEEEQszewGV1zZGIP/jiHCMNtMgFOjPxfDI3lwvpl
p9b6YUeEVknUk0yObYmHcqt6vg71zhiAUndJV5P/dN7jN2n8Cr7JIs52uVkpGuhh
2CkQgXTMlCpR6LnFWgUT1OMRKg6EBP/JFOJdHbFq+HD6QsBAD9oKULt9VPValtrM
2VkktKaetXHJND7nwdC8MTKe+4oOs/YpOy+yKVYb/iWNMrTCPCFLBI5BRKLUaPdd
A0EtGARSkCGU9QZkGvuyhI4UY1KWi4JjKfD9GNmka3FTq8y5MGjdgn1VEw9whZcW
wtJFiTuZ9CM+Jm+WyJx6bdZwlIjMKMrGaaMDeRnoh9UQml4+DDyJJWgbeAT8rhQS
XP5NG4I9X1RSqen1XUikPPBl2V5u1baIfaP4noLxuu4yVYfUTuC76T+k+FCAPxQu
Ymw/RWWmPwodXrN7OBlpPW7rTUk269LVCrWpIFQkhkDnrmYH4Rs8CAv4boDd3yj1
P4ew49Cu0Y489vR8DBndbUlXjL/ssD2Uh4DZp8fzURTfnu2P6Yzk9Q98At87uqqp
Hz/OfLBcnX5N7myu+fMkKBf7Ju3Nz/Ho1hA/q8rsPXfazvQcYm5gL9vI1wljRn0B
b8++F+scoiM0iEY/OpjWX8box9w+gE7lq/14QqRVpRmCNyC1JtlQT7AoXCSDMkic
EJn4vhHoLu4Bhl9/ypND
=+QE+
-----END PGP SIGNATURE-----
Merge tag 'ux500-v4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "Ux500 Device Tree changes for the v4.2 series" form Linus Walleij:
Define CPU topology, connect that with CoreSight blocks,
add sensor information to DT boards.
* tag 'ux500-v4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: add the sensors to the STUIB board
ARM: ux500: assign the sensor trigger IRQs
ARM: ux500: fix lsm303dlh magnetometer compat string
ARM: ux500: add CoreSight blocks to DTS file
ARM: ux500: define CPU topology
This adds the device tree data for the LIS331DL and the
AK8974 magnetometer to the STUIB board device tree include
file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ST sensors on the Ux500 boards were not utilizing the IRQs
for data ready sample triggers. Enable this by assigning the
right GPIO lines and interrupt lines (when the GPIO lines are
used for IRQs) to the accelerometer, gyro and magnetometer
sensors.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The magnetometer found on the Ux500 TVK and Snowball boards
is a LSM303DLH not a LSM303DLM, small differences but still
different. Put in the right compatible strings and things start
working smoothly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This registers all the CoreSight blocks on the DB8500 SoC:
each core has a PTM (v1.0, r1p0-00rel0) connected, both connected
to a funnel (DK-TM908-r0p1-00rel0) which in turn connects to a
replicator (DM-TM909-r0p1-00rel0). The replicator has two outputs,
port 0 to a TPIU interface and port 1 to an ETB
(DK-TM907-r0p3-00rel0). The CoreSight blocks are all clocked by
the APEATCLK from the PRCMU and their AHB interconnect is clocked
from a separate clock called APETRACECLK.
The SoC also has a CTI/CTM block which can be added later as we
have upstream support in the CoreSight subsystem.
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This is ARM's generic Performance Monitoring Unit.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This is ARM's generic Performance Monitoring Unit.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
All the infrastructure is now in place for ST's PWM controller. This
patch takes the final step and enables the IP on the 2020 Rev-E
development platform.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Supply top level nodes for the STiH416 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Supply the Pinctrl configuration to enable PWM{0,1} lines on STiH416
based development boards.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Supply top level nodes for the STiH407 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Each pxa has an embedded OS Timers IP. The kernel cannot work without a
valid clocksource, and this adds the OS Timers to the pxa device-tree
description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Add clocks to the IPs already described in the pxa device-tree
files. There are more clocks in the clock tree than IPs described in the
current pxa device-tree.
This patch ensures that :
- the current description is correct
- the clocks are actually claimed, so that clock framework doesn't
disable them automatically (unused clocks shutdown)
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
pxa27x variant has 2 I2C busses on the SoC :
- the casual I2C
- the power I2C, normally driving power regulators, and capable of
receiving orders on core frequency modifications
Add the missing pwri2c to pxa27x description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The act8846 is the main pmic and system-power-controller on radxarock boards,
so add the necessary property.
Signed-off-by: Michael Niewoehner <mniewoeh@stud.hs-offenburg.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
HS400 timing values are added for exynos5422-odroidxu3 board.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The Marvell mwifiex driver prevents the system to enter into a suspend
state if the card power is not preserved during a suspend/resume cycle.
So Suspend-to-RAM and Suspend-to-idle is failing on Exynos5800 Peach Pi
and Exynos5420 Peach Pit Chromebooks.
Add the keep-power-in-suspend Power Management property to the SDIO/MMC
node so the mwifiex suspend handler doesn't fail and the system is able
to enter into a suspend state.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
All the device tree related changes for the 4.1 merge window.
It has a rather big diffstat, because of a lot of mechanical and harmless
changes, as described below.
There is mostly:
- The end of the DT relicensing. All our DT should now be under the dual
X11/GPL license.
- Convertion of all the DT to a label based syntax, instead of
duplicating the tree like was done before.
- Rework of the A10s and A13 DTSI to share the common devices
- A few drivers enablings: A80 USB, the A31 PMIC, A31 and A23 arch
timers, etc
- Fix the checkpatch warnings
- A few new boards : cubieboard4, mele i7, utoo p66, auxtex t004,
pcduino3 nano, gemei G9, mk808c, jesurun q5, orange pi, orange pi mini
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVUQKFAAoJEBx+YmzsjxAgescP/3hr9XCfBlJ7Grxcw85cpgsc
6qsUYVIUSZWD1SDwxXtSbcqqbLjLnVkfmn4//TK38Vtlod79rMrMEwCBiM9ugNF0
KdsvaX9Y/lhT8vT37wqwxy36JYP1BYciYtQn1x+gitBlgkwAtHmNHnbJgw1pgAtR
yK3xjACBn3mw17NlXq2/cQ0aPX7eap1OZ7X14UM82tiFBMUDKb6xh1oz52Yh6bYE
h+KYI7GVCzmfLk3keqdv1KjhJQC1Xu2t9aWixSU+r5F9vu3/dVzZhQQ+4c3lQJCC
71V2uW7KblWEjrJwftqP6hjTAQlWbR8gVx/ICM44gpwnKXYANDL7O+FDgemW4wim
er2EFuzKPcll9jYwzrXe1w5jllxLae2lvmQy1in9fW80FUZExTjOuJxtKPWc2t7J
2DBn8PspwoJDKgo2OkAydNstef+WmFM0xDPeP7xTU7k0k3QpjQY5bTEm39PzVuoa
CtLhV63ndpxbGXoJglZ7PQiMH+APkX3rjYH2aRvD6cAuVDqPjAJTKkNJ0VLx2gaz
wd5rw726Ob8p/1T34/z84c6Rh0wOhBnNGzb0zbAMhXveyjfmLLS9sUwvD8Yuv7EU
5p0TfM5uRxoxQP2VOFPxHr0ZGEYHVaX918khfD3ykF0jpAfz5FhCCZsbhoJDMLuY
HLUb0hp5v6D1zRM95tdg
=6TQo
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT additions for 4.1, take 1" from Maxime Ripard:
All the device tree related changes for the 4.1 merge window.
It has a rather big diffstat, because of a lot of mechanical and harmless
changes, as described below.
There is mostly:
- The end of the DT relicensing. All our DT should now be under the dual
X11/GPL license.
- Convertion of all the DT to a label based syntax, instead of
duplicating the tree like was done before.
- Rework of the A10s and A13 DTSI to share the common devices
- A few drivers enablings: A80 USB, the A31 PMIC, A31 and A23 arch
timers, etc
- Fix the checkpatch warnings
- A few new boards : cubieboard4, mele i7, utoo p66, auxtex t004,
pcduino3 nano, gemei G9, mk808c, jesurun q5, orange pi, orange pi mini
* tag 'sunxi-dt-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (84 commits)
ARM: sunxi: dt: Split the SPI pinctrl groups
ARM: sunxi: dt: Fix whitespace errors
ARM: sunxi: DT: Fix lines over 80 characters
ARM: sunxi: dt: Remove the FSF address
ARM: sunxi: dts: split IR pins for A10 and A20
ARM: sun7i: dt: Add new MK808C device
ARM: dts: sun6i: Set PLL6 as parent to AHB1 clock in AHB1 clock node
ARM: dts: sunxi: Update ahb clocks for sun5i and sun7i
ARM: dts: sun7i: Add dts file for the Jesurun Q5 top set box
ARM: dts: sun5i: Enable touchscreen on Utoo P66
ARM: dts: sun7i: Add dts file for the Orangepi mini SBC
ARM: dts: sun7i: Add dts file for the Orangepi SBC
ARM: dts: sun7i: Add A20 SRAM and SRAM controller
ARM: dts: sun5i: Add A13 and A10s SRAM and SRAM controller
ARM: dts: sun4i: Add A10 SRAM and SRAM controller
ARM: dts: sun5i: Add broken-hpi property for Utoo-P66 eMMC
ARM: sun8i: dt: Enable A23 SMP support
ARM: dts: sun6i: Add cpu thermal zones to dtsi
ARM: dts: sun6i: Add cpu clock reference and operating points to dtsi
ARM: sunxi: DT: Add stdout-path property
...
Highlights:
-----------
- Add DT nodes for SSC on STiH407 family
- Add DT nodes for SD/MMC on STiH407 & STiH418
- Add DT node for LPC on STiH407
- Add Sata DT nodes for STiH407
- Fix PIO3 & PIO35 pins retiming on STiH407
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVQjPFAAoJEMo4jShGhw+JdX0P/AmZ8/+UhflYisudIVvCH1Ok
QPUno7423gjgwGNIyOI8E2ueQA80FJohpabeIRSIzMz/rQsWsCFMsc/f5rr7CKdj
rFx11I9t7xabYZxgEzbfzJMXEKP1ZndBbt3p76no/ynSo515Y8t+mxsTxW8maqCZ
8l8Cr8eSp292foZujs74O6xno77NXZvf/O9zvLNcTrUOT8RBzKMyQ9L0gcMz8FKT
GZB2CVDMHgUBnaQdaPKOa3adJ2IOzQcJjDhGIisLwF2Mv5Li3YPjI41t/b5g591Q
Jvf5NZmz0v0cSZltfZsSuulYUeXBizzHLWMM+viRharsZf2UahiFilr8uyXtnBJI
QgkCbWlaDmz+YEzJQaHy359eDw4NjGNE54AcjSE+sNImu0N4s0WUPdaXt5DQADvq
Xi4KlMGfkiwpt9Lm8PoM4vY8NoNeGH0CRKdUQQhBkYn3De4VW/G0N+NOgOsTsEyQ
hLqGvJnnmps3gMn/m+XSBMVNVZEwDmxMFt4hzNCwaDn0NKhzxxYrbQNK0sdbf8tR
H8yWpQLtO+pVoSTrvOPqHWiGcfe+vHmynVmVHQj17/w7ho3JW0cTgXHmgSNZahnW
omluWSFi5CswNYG/So6vsThXemp+omsCOUMCfaPoFz/6pE+kTsYvw245JvgtrD4w
DcWnjE7MQ8NQc8lK9YX7
=fWhS
-----END PGP SIGNATURE-----
Merge tag 'sti-dt-for-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt
Pull "STi DT updates for v4.2, round 1." from Maxime Coquelin:
Highlights:
-----------
- Add DT nodes for SSC on STiH407 family
- Add DT nodes for SD/MMC on STiH407 & STiH418
- Add DT node for LPC on STiH407
- Add Sata DT nodes for STiH407
- Fix PIO3 & PIO35 pins retiming on STiH407
* tag 'sti-dt-for-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: DT: STi: STiH407: Add sata DT nodes.
ARM: STi: DT: STiH407: Fix retime pin mask for PIO5 and PIO35
ARM: STi: DT: STiH407: Add Device Tree node for the LPC
mfd: dt-bindings: Provide human readable defines for LPC mode choosing
ARM: STi: DT: STiH418: Add dt nodes for sdhci and emmc.
ARM: STi: DT: STiH407: Add dt nodes for sdhci and emmc.
ARM: sti: Provide DT nodes for SBC SSC[0..2]
ARM: sti: Provide DT nodes for SSC[0..4]
Commit 9fd85eb502 ("ARM: pmu: add support for interrupt-affinity
property") added an optional "interrupt-affinity" property, to specify
the CPU affinity for each SPI listed in the interrupts property.
Without this property, we get this boot warning:
CPU PMU: Failed to parse <no-node>/interrupt-affinity[0]
This patch adds interrupt-affinity to the PMU node in the
vexpress-ca15_a7(a.k.a TC2) device tree.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit 9fd85eb502 ("ARM: pmu: add support for interrupt-affinity
property") added an optional "interrupt-affinity" property, to specify
the CPU affinity for each SPI listed in the interrupts property.
Without this property, we get this boot warning:
CPU PMU: Failed to parse <no-node>/interrupt-affinity[0]
This patch adds interrupt-affinity to the PMU node in the
vexpress-v2p-ca9 device tree.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit d9d1f3e2d7 ("ARM: l2c: check that DT files specify the required
"cache-unified" property") mandates to specify this required property.
Without this property, we get this boot warning:
"L2C: device tree omits to specify unified cache"
This patch adds "cache-unified" property to L2 cache node in vexpress
CA9 device tree.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a fix for a bug that was introduced a couple of months ago
by a patch that git misapplied because of a lack of context.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJVR10yAAoJEN0jrNd/PrOh7LAP/2eZK/fKeSvMOxBGGsEZnnM8
2abEG/5MmZikk2MntGiIOcsMNlJN0aw8f6wRMbT/s2Z7NeKjZy1gXqbThNFemP6b
LR/twZ+dQReWL/i8vdB1sl+6lC7/ZxrckJO3LpqMx6/8ZODEcS4OjyFBQrgmrfj+
4GnJGl7pEpe/BiAas2L8jMc3GE2MIC+DGx+sNkbO4kkTDff3KKmnuAaXsCrUIT+h
Jmr2xFLj2gHj6T+wq56jwjJi3iO0ROgvNy/HwBpU+7/fBzlnuv0IfHxip4HzuGme
r0sKqIZkDI+xZfQ6sRQKyJGNI+Ek4c63bbp4OROGq/l0dt3ALui4NQwRn/ZnVoZH
cC6xB3onvQsOXCIvA69dJgGMw2XQamwYkIxuynLM/sywPBTsEpOn/2nIIOIFtQF9
bk2RjwO0YUiOD+h3XJRG31Pziw51xoKF10QWT8srXfXjUskN32sJNtGJmz6A/YZA
RVQU5CWo1GH0Q3lsHSHUhlhMzczIvRV7Um61hWjq4J0RbUa6n87MVIJgLsSQrTAv
n7kIlMGsI4MaxQEIpfmtqn5q1cF3EyVWBuktsVG7vTWWWCa0kMMf3nYSqGN5ewNl
8Og7w7Dzm9FAWsUnGLkwuKyB3KQrrX5lS2ouqZmpKrbUD8zqOqDlKoK8F+R7d2cb
b5FS02w8ngJ0t3EYZwk7
=8e1C
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.1-fixes-for-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into fixes
Merge "ARM: tegra: Device tree fixes for v4.1-rc3" from Thierry Reding:
This contains a fix for a bug that was introduced a couple of months ago
by a patch that git misapplied because of a lack of context.
* tag 'tegra-for-4.1-fixes-for-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Correct which USB controller has the UTMI pad registers
This patch adds DMA properties to the HSUSB node.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds DMA properties to the HSUSB node.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add all the clock nodes for the Arria10 platform. At the same time, update
the peripherals with their respective clocks property.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: Add the l4_sys_free_clk node
Add tx-fifo-depth and rx-fifo-depth devicetree properties for socfpga
stmmac. These devicetree properties will be used to configure certain
features of the stmmac on the socfpga.
Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Add multicast-filter-bins and perfect-filter-entries configuration properties
to the socfpga devicetree for the Arria 10 socfpga.
Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
node and makes the sdmmc_clk it's parent.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: renamed ciu_clk to sdmmc_clk_divided
Rename the socfpga_arria10_socdk board file to socfpga_arria10_socdk_sdmmc
as Arria 10 devkit cannot support SDMMC and QSPI at the same time. Thus
we will need to have 2 separate board files, one for SDMMC and one for
QSPI. We also add a new base board dtsi file, socfpga_arria10_socdk.dtsi
so that we use common peripherals for each flavor of the devkits.
Add the sdmmc node to the socfpga_arria10_socdk_sdmmc.dts board file.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Arria10 devkit is using UART1 for the debug uart port. Remove
unused aliases.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: Add removal of unused aliases
Add status = "disabled" in the base DTSI for Arria10. The SDMMC and uart
nodes should be enabled in the appropriate board file.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This patch adds the DTS bindings for the adxl34x digital
accelerometer.
Signed-off-by: Walter Lozano <walter@vanguardiasur.com.ar>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Si5351 clock generator on CuBox uses XTAL as clock reference, name the
clock phandle accordingly.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With reworked device tree files for Compulab CM-A510 SoM and SBC-A510
base board, now add the correspoding board file to Makefile again.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Existing dts file for Compulab CM-A510 was very limited due to missing
hardware. Now that we actually found somebody with that board, properly
rework it to provide a CoM/SoM include and a board file for Compulab's
SBC-A510.
Both the CM-A510 SoM and the SBC-A510 can be configured with different
options, so we only enable a minimum set of options. The actual board
configuration will have to be set by either the bootloader or user.
Although functionally not required, repeat even disabled nodes again
to increse their visibility in the dtsi/dts files.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Gabriel Dobato <dobatog@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Prior reworking Dove based Compulab CM-A510 device tree, remove it
from the compiled device tree files.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This adds a i2c-mux-pinctrl node to dove.dtsi for the internal i2c
mux found on Dove SoCs. Up to now, we had no board using any of the
two additional i2c busses, so make sure the change does not break
any existing boards.
Therefore, we rename the i2c-controller node label to "i2c" and
enable it by default. Also, the dedicated sub-bus (now "i2c0") is
enabled by default. The two optional sub-busses require additional
external pin-muxing, so disable them by default.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The clock-frequency property became obsolete since the rework of the main
clock driver in 3.16 (see commit 27cb1c2083).
It now get and uses the clock-frequency from the main_xtal node.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add DT file for Kizbox 2 board.
This board is based on Atmel's SAMA5D31 Cortex-A5 SoC.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add DT file for Kizbox mini board.
This board is based on Atmel's AT91SAM9G25 SoC.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The Integrators and the RealView use simple MFD devices with register bit
LEDs as subnodes, update these to use the "simple-mfd" compatible property
so that subdevices get spawned from the MFD nexi.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Note that from now on any of the pfc8575 gpio keys will wake up the
system, as the pfc8575 cannot mask individual interrupts.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77c ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Spansion s25fl008k is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77c ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77c ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Spansion s25fl008k is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77c ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77c ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controllers irqc0 and irqc1 to the IRQC module
clock, so they can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[horms: corrected typo in changelog to refer to r8a73a4]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- fixes commit ea08de16eb ("ARM: dts: Add DISP1 power
domain for exynos5420") which causes 'unhandled fault:
imprecise external abort' error when PD turned off.
: make DP a consumer of DISP1 power domain
- fixes 's3c-rtc' probe failure on Odriod-X2/U2/U3 boards.
: add 'rtc_src' clock to rtc node for source clock of rtc
- fixes typo for 'cpu-crit-0' trip point on exynos5420/5440
- fixes S2R failure on exynos5250-snow due to card power of
Marvell WiFi driver (suspend/resume)
: add keep-power-in-susped to WiFi SDIO node
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJVT23xAAoJEA0Cl+kVi2xqZIcP/0CAA25uvidVXdNVYlJbSvr3
4kesNDG/LGrVnv6xt132iJsXtIfWQxG6nJkhE1x5G9zSgsAjtQWcsCr068Itktsg
CG1yl/8z6TB+wS0PhTXaa985V62euTws89YGJau6YCZVSXKKcGDjM5e2RJn80yOL
IMipw8x5xTt0GsIKtC2AyewcNq05SSNtwvYe8CPJ9wGFQPy3gZ1t5WqSwW2mMG+K
C6mibaN7gs9+sS2ncHglZtHKAR2VxJTNCkq/LOCYlDSftT01GhmhG1fl/tUxEqUD
1bFTTajA21CNnEvWCdkFkMHkEy7lzW8WCX3tAwDHGON/NdWERV4FSaLTqR0o1ekO
vLeUSvgtRntBtUY3ojvyfoYq4vrdQF1uoL2r932iO9FILUBpwRYAyG152VFJyZRx
Hx50yCgyljG3X8xUp5VgiuNwDCgatiFBCeb3YT0qrB9YbnLXqqAUAfMSng8a15dc
rbD02YsYvYcJPf7RDnS9QQV+ZSSmZIkY7JmxkJ/UJ0SA7dAJBtKrXQyliLVlExHu
Cz0ye5NHjC+jxwPU/OEFRSZi8bKJXe/q6bAXDRA0vkZWd0G6C+wOq8bnzSWkRM+D
+/uzxajdDbfs7mr2mPFyc3H22MiwWSOFIRVsCXVKqTN0yVvlaLvHtolUayAD3RrR
oo25jYh9CYGZhxd+7TVb
=YBxq
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
Pull samsung fixes from Kukjin Kim:
"Here is Samsung fixes for v4.1. Since I've missed to send this via
arm-soc tree before v4.1-rc3, so I'm sending this to you directly
- fix commit ea08de16eb ("ARM: dts: Add DISP1 power domain for
exynos5420") which causes 'unhandled fault: imprecise external
abort' error when PD turned off. ("make DP a consumer of DISP1
power domain")
- fix 's3c-rtc' probe failure on Odriod-X2/U2/U3 boards ("add
'rtc_src' clock to rtc node for source clock of rtc")
- fix typo for 'cpu-crit-0' trip point on exynos5420/5440
- fix S2R failure on exynos5250-snow due to card power of Marvell
WiFi driver (suspend/resume) ("add keep-power-in-susped to WiFi
SDIO node")"
* tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Add keep-power-in-suspend to WiFi SDIO node for exynos5250-snow
ARM: dts: Fix typo in trip point temperature for exynos5420/5440
ARM: dts: add 'rtc_src' clock to rtc node for exynos4412-odroid boards
ARM: dts: Make DP a consumer of DISP1 power domain on Exynos5420
The pinctrl groups for SPI until now were also adding the chip selects in
the SPI pinctrl group.
This was causing a few issues, since a board was forced to use a random
number of chipselects, even though it might use one of these chip selects
for another pin.
The number of chipselects defined was also not the same from one group to
another because of different needs at the time these groups have been
introduced, resulting in no clear view from the board DTS on what exactly
is being muxed, which even might change in the future.
Solve this by creating different pinctrl groups for the chipselects and the
standard SPI pins (CLK, MOSI and MISO) so that we fix both issues.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A few lines (probably copy pasted) have an indentation mixing tabs and
spaces that triggers a checkpatch warning.
Fix those, and while we're at it, fix the space-indented sections.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A few lines in our DTSIs are over the 80 characters limit, making
checkpatch complain about that.
If possible (and relevant), wrap these lines to 80 characters.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The FSF address triggers a warning on checkpatch, saying that the FSF
license is already present in the Linux source code, and that it has
already changed in the past.
Remove it from our DT, as suggested.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds the RGB-LED on XU3 as 3 gpio-leds.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The Marvell mwifiex driver prevents the system to enter into a suspend
state if the card power is not preserved during a suspend/resume cycle.
So Suspend-to-RAM and Suspend-to-idle are failing on Exynos5250 Snow.
Add the keep-power-in-suspend Power Management property to the SDIO/MMC
node so the mwifiex suspend handler doesn't fail and the system is able
to enter into a suspend state.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Remove the extra zero in the "cpu-crit-0" trip point for exynos5420
and exynos5440.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The Exynos4412 SoC has a s3c6410 RTC where the source clock
is now a mandatory property.
This patch fixes probe failure of s3c-rtc on Odroid-X2/U2/U3 boards.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The patch adds gpio for detecting presence of MMC card.
It fixes issue with kernel hang when MMC card is missing.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Commit ea08de16eb ("ARM: dts: Add DISP1 power domain for exynos5420")
added a device node for the Exynos5420 DISP1 power domain but dit not
make the DP controller a consumer of that power domain.
This causes an "Unhandled fault: imprecise external abort" error if the
exynos-dp driver tries to access the DP controller registers and the PD
was turned off. This lead to a kernel panic and a complete system hang.
Make the DP controller device node a consumer of the DISP1 power domain
to ensure that the PD is turned on when the exynos-dp driver is probed.
Fixes: ea08de16eb ("ARM: dts: Add DISP1 power domain for exynos5420")
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds pinctrl configuration for using configuring gpx3-2 as an
external interrupt from max77686. Though max77686 RTC is enabled and gets
probed by default, it doesnt work as its unable to get interrupt.
This patch makes max77686 RTC work and also configures it as wakeup source.
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
[pankaj.dubey: resubmitted after rebasing to latest kgene tree]
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
BSYM() was invented to allow us to work around a problem with the
assembler, where local symbols resolved by the assembler for the 'adr'
instruction did not take account of their ISA.
Since we don't want BSYM() used elsewhere, replace BSYM() with a new
macro 'badr', which is like the 'adr' pseudo-op, but with the BSYM()
mechanics integrated into it. This ensures that the BSYM()-ification
is only used in conjunction with 'adr'.
Acked-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
add the device tree binding for the HiSilicon hip04 ethernet controller
based on Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Fathi Boudra <fathi.boudra@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This patch adds dts support for NAND flash controller of Hisilicon Soc Hip04.
Changes in v3:
- Change E-mail address in signed-off-by to "wangzhou1@hisilicon.com"
Changes in v2:
- Base on v3.19-rc1
- Use nand-ecc-strength, nand-ecc-step-size to replace hisi,nand-ecc-bits
Changes in v1:
- Move partition and other board related information into board dts file:
hip04-d01.dts
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Hisilicon Soc hip04 has four GPIO controllers, each one has 32
GPIOs and can be configured to be an interrupt controller.The GPIO
controllers are compatible with the snps,dw-apb-gpio driver.
This patch add the corresponding device tree nodes.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
in the Ux500 DT but triggered by proper error handling in v4.1-rc1.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVP3/HAAoJEEEQszewGV1zl14QALjFq5SHR2sZJMxpXtnPA9+o
Gh/Xe+zx59VqxVFuxT13zY3YcD1b61DSQ4L8oLkMeNNx4Q3+YV4rl50aLiy3DUxf
oOHuIObv7rj70sYXVtMXX64mJCjAu9Y4+WAW4kqVrt5mnewptWp29jw7ioum6/+Q
NXg/qNGwRMmhvcDOybKMfTsro7g6VnB+qMDbm4//IOJlgldS13tUFGhRGdkC0mkM
pjM0a0bj2hHvkJ6+cvzzId3hcjVZwhqValOMA+rKdFTxarMFxUM3+QskhuVTl3ew
x+4uvXWmRa+44w4u9DgRXeIBXavpS2CpdqQkvuNPRa9IPD89iFGc5PaU9iCOchg8
xvN6l1Vm5pYbnmboLyT4aQ7MfFaScodFAQKIAJMUpMDl6CxjujQe7YEviLajuEQr
mDpap2Nc6Bdo9zcRzZ/PxJIvNXHe/MqAF0unsdTLEgyASrnkawxizLJ5rMsAJfAJ
ONI2DAafJenCf8wZV0XFzI1L4/UnH76w3r0DETV1YfExr3Wnx2c4ZcPJKXINcp1K
mle2dKsmN6q300hrOMyMPaykz1ndWhhkfy3d+Y3O8LE+hhjfJbZv+VWAOe0UaN+Q
pMDCngI+uoM63Vsh5WDe7x3M5AZ2QK3B/gWgwfDQ8KINnejBjfwH9LMnNSqDtdbz
jNtxHeeGAF86v8dCiXi7
=2YtL
-----END PGP SIGNATURE-----
Merge tag 'stericsson-fixes-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes
Merge "Ux500 fixes" from Linus Walleij:
This fixes an MMC/SD configuration issue present for some time
in the Ux500 DT but triggered by proper error handling in v4.1-rc1.
* tag 'stericsson-fixes-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Enable GPIO regulator for SD-card for snowball
ARM: ux500: Enable GPIO regulator for SD-card for HREF boards
ARM: ux500: Move GPIO regulator for SD-card into board DTSs
creeping up during idle, and two l3-noc device fixes:
- Fix power consumption creeping up with I2C4 staying on
- Fix n900 microphone bias voltages
- Fix dra7 l3-noc for host clock
- Fix omap5 l3-noc id address decoding
The rest are all just minor dts fixes:
- Fix changed EXTCON_USB_GPIO_USB in defconfig
- Fix missing isp and iva #iommu-cells property
- Various beagle x15 dts fixes for pre-production changes
- Fix am437x-sk display dts entries
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVR9VWAAoJEBvUPslcq6VzQSEP/1D526fNwGoivn3MmV5yi2yV
alVYxbcxOAbRrintH+ip2LXOzuQ4OdsMD+PbF9OzdiW2ynPiINq/tuchwC0vVcvU
Tv7kUA9GjeT/s+0pNodQYLRxAksw0SnBmz4ZnUwaY46MjGwO6nRirKtE1Ucb96M2
A61swMKtE+lYxc4Zxrr0QU7MRas7ukC9IGOjAFDasTzr3T/xm0IsWz79PE3rMVlI
kUncW+g42RigeikzpqTELU5lvmRzobO47MWHWsECyyIiLp9fsei+r8HmJc0gosaz
CTuUydUYNbxM9xbCKFXb2n7hBCzGiySQpFR25LXHJ8AAXKhR44rwjoZMwCF6j50C
ad5NXik/FcLuI8HSqFOPc0gIFIk4oM+0AmRGGvaKgBt1Wv2gViCtd+0CNuk07/vE
sFCc0Mnek9oLdWMwvSQ0g4ehJP/ejWiu1ZGsrQN7OliMe84340AkIVblMrHF6v4I
OULFeMr1e+/XVNaj15YXQBMRbNK7JcR+npPzhGZvuXnio73VuwbIOaz42CSnY3EI
ZiRLBfr8yGP5NQXOWNPp5ig+zcRviNRvr5o7hYR8LRtIyHvOGOafpSRn+7T0FEXK
SBD1u1yXoCB2rwoulTSWWVplUD5yn8duv0gDAGXgBuWhTuTdHc5FPbLf8KZ0KSsW
qGh6zuo3GvYJHi88DVjX
=tOGf
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.1/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap fixes against v4.1-rc1" from Tony Lindgren:
Fixes for omaps, mostly a fix for power power consumption
creeping up during idle, and two l3-noc device fixes:
- Fix power consumption creeping up with I2C4 staying on
- Fix n900 microphone bias voltages
- Fix dra7 l3-noc for host clock
- Fix omap5 l3-noc id address decoding
The rest are all just minor dts fixes:
- Fix changed EXTCON_USB_GPIO_USB in defconfig
- Fix missing isp and iva #iommu-cells property
- Various beagle x15 dts fixes for pre-production changes
- Fix am437x-sk display dts entries
* tag 'omap-for-v4.1/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: omap_l3_noc: Fix master id address decoding for OMAP5
bus: omap_l3_noc: Fix offset for DRA7 CLK1_HOST_CLK1_2 instance
ARM: dts: dra7: Fix efuse register size for ABB
ARM: dts: am57xx-beagle-x15: Switch GPIO fan number
ARM: dts: am57xx-beagle-x15: Switch UART mux pins
ARM: dts: am437x-sk: reduce col-scan-delay-us
ARM: dts: am437x-sk: fix for new newhaven display module revision
ARM: dts: am57xx-beagle-x15: Fix RTC aliases
ARM: dts: am57xx-beagle-x15: Fix IRQ type for mcp7941x
ARM: dts: omap3: Add #iommu-cells to isp and iva iommu
ARM: omap2plus_defconfig: Enable EXTCON_USB_GPIO
ARM: dts: OMAP3-N900: Add microphone bias voltages
ARM: OMAP2+: Fix omap off idle power consumption creeping up
Disable the unused internal RTC in the dts of the OpenBlock AX3
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlVDtLIACgkQCwYYjhRyO9WCiwCfTBYFFDMZxK/W9qLdhU8mj/iD
tDQAn3TDsfWEIHm+c6DeZqj35Q74yPGA
=Gggv
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.1' of git://git.infradead.org/linux-mvebu into fixes
Pull "mvebu fix for 4.1" from Gregory CLEMENT:
Disable the unused internal RTC in the dts of the OpenBlock AX3
* tag 'mvebu-fixes-4.1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: armada-xp-openblocks-ax3-4: Disable internal RTC
The USB3 controller is present on the b2199 board, so enable
it in the board specific DT file.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
STiH418 miphy28lp port0/1 need the oscillator clock configured in the same way
as on STiH407/STiH410 platforms.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The USB3 controller is present on both variants of the b2120 board so
enable the controller in the generic stihxxx-b2120.dtsi file.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Now that both usb2 and usb3 phy drivers, and also the ST dwc3 glue code
are all present upstream, we can add the dwc3 DT node and have a working
usb3 controller on stih407-b2120 and stih410-b2020.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Ths picophyreset is incorrectly defined, which stops the usb2 phy being
taken out of reset.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The binding documentation says that these should be named hda2codec_2x
but the DTSI names them hdacodec_2x.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
[treding@nvidia.com: add a brief commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a device node for the HDA controller found on Tegra30.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The word "sticker" was misspelled as "stciker". Fix it.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
[treding@nvidia.com: add a brief commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
eMMC is soldered on to the board, and as such isn't removable. Mark it
as non-removable so that operating systems can treat it appropriately.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The L3 Error handling on OMAP5 for the most part is very similar
to that of OMAP4, and had leveraged common data structures and
register layout definitions so far. Upon closer inspection, there
are a few minor differences causing an incorrect decoding and
reporting of the master NIU upon an error:
1. The L3_TARG_STDERRLOG_MSTADDR.STDERRLOG_MSTADDR occupies
11 bits on OMAP5 as against 8 bits on OMAP4, with the master
NIU connID encoded in the 6 MSBs of the STDERRLOG_MSTADDR
field.
2. The CLK3 FlagMux component has 1 input source on OMAP4 and 3
input sources on OMAP5. The common DEBUGSS source is at a
different input on each SoC.
Fix the above issues by using a OMAP5-specific compatible property
and using SoC-specific data where there are differences.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix a typo in DRA7 dtsi where 12 bytes are needed for register
description of ABB efuse registers, however only 8 bytes are provided
to map. For some weird reason, this does not generate abort at offset
0x8, probably due to default maps already provided in io.c for the bus
register ranges.
Reported-by: Matt Gessner <Matt.Gessner@windriver.com>
Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BeagleBoard-X15 pre-production change includes switching the GPIO fan
gpio over from 1 to 2 to allow for a potential fix at a later point in
time for USB client VBUS detection using PMIC VBUS detect capability.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BeagleBoard-X15 pre-production change includes switching over to UART
pins that now allow for UART download capability. All original boards
should either have been returned for modifications or already modified
for the required change and maintaining compatibility for older boards
are no longer needed.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The new AM437x SK Beta boards have removed the
large capacitors on the gpio-matrix column lines
which means we can reduce col-scan-delay-us to 5us
without loosing functionality.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM437x Starter Kit uses a NewHaven Display module with
a 4.3" display and EDT FT5306 touchscreen
On that module's new revision, NewHave decided to change
the pinout on the 6 pin flat-pcb touchscreen connector so
that instead of having WAKE pin, we now have RESETn.
The new display module is available on AM437x SK Beta and
all new revisions while the older revision is only available
on AM437x SK Alpha which, unfortunately, can't be supported
anymore in mainline without a revert of this patch.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With commit bc078316d8 ("ARM: dts: DRA7: Add node for RTC"), we now
have AM57xx RTC register itself as alias 0 even before DS1307 or TPS
rtc drivers are loaded up. However, since neither TPS, nor AM57xx RTC
are capable of being backedup by battery, we would like to maintain
the "primary" rtc as mcp79410 rtc device.
This also generates the following warnings in the bootlog highlighting
the issue:
[ 5.895445] rtc-ds1307 2-006f: /aliases ID 0 not available
...
[ 6.476285] palmas-rtc 48070000.i2c:tps659038@58:tps659038_rtc: /aliases ID 1 not available
So, add proper aliases to ensure that RTC order is always consistent
to userspace immaterial of probe order.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The interrupt polarity provided in devicetree is used to configure
the interrupt controller(ARM GIC), however, it seems that we have an
inverter at the GIC boundary inside AM57xx which inverts the signal
input from sys_irq external interrupt source.
Further, as per GIC distributor TRM,
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438d/BGBHIACJ.html#BABJFCFB
ARM GIC distributor does not support IRQ trigger type
IRQ_TYPE_LEVEL_LOW, and only rising or level high signals.
However, for some reason, the current configuration(which gets ignored
by GIC driver) functions on some platforms, however, on few platforms
results in infinite interrupts hogging the system down.
Switch over to rising edge for GIC configuration which is also aligned
with trigger point from the RTC chip and the internal inversion.
Fixes: 5a0f93c657 ("ARM: dts: Add am57xx-beagle-x15")
Signed-off-by: Grygorii Strashko <Grygorii.Strashko@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add missing #iommu-cells property to the isp and iva iommu nodes. This
fixes the binding (property is required according to the generic iommu
binding) and removes the following kernel warning triggered once the
iommu nodes are referenced:
[ 0.647521] /ocp/isp@480bc000: could not get #iommu-cells for /ocp/mmu@480bd400
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
N900 audio recording needs that codec provides bias voltage for integrated
digital microphone and headset microphone depending which one is used.
Digital microphone uses 2 V bias and it comes from the codec A part. Codec
B part drives the headset microphone bias and that is set to 2.5 V.
Cc: stable@vger.kernel.org # v3.16+
Signed-off-by: Pavel Machek <pavel@ucw.cz>
[Jarkko: Headset mic bias changed to 2 (2.5 V) as it was before commit
e2e8bfdf61 ("ASoC: tlv320aic3x: Convert mic bias to a supply widget")]
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit fb50a116bb ("drm/tegra: hdmi - Add connector supply support")
introduced a new supply for HDMI connectors that is used to control the
voltage on the +5V pin. Not all boards have had the corresponding supply
added to their device tree files, causing the following warning message
during boot:
[ 0.859698] 54280000.hdmi supply hdmi not found, using dummy regulator
Add such a regulator to the Seaboard DTS to enable the driver to control
this voltage and get rid of the warning.
Reported-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Cardhu has a power key on the top-right as well as volume up and
volume down keys on the right side.
Signed-off-by: Thierry Reding <treding@nvidia.com>
For consistency with other device tree content, use lower-case
hexadecimal digits in register region specifications.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Currently none of the target boards nor the driver supports
IR TX. However this pin is used in a few instances as a GPIO.
Split the pin ctrl descriptions so that only the IR RX is
configured to be used.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the
Armada 375, 38x and 39x, the frequency is 1GHz. When writing support
for these last SoCs, there was no official value for the PLL. Now that
we have it, this patch fixes it in the device tree.
This value is currently only used by the NAND driver for the setting
the NAND timing. Fortunately it is not actually used: all the mainline
board with a NAND flash comes with a NAND device tree node using the
"marvell,nand-keep-config" property. With this property the timings
are not modified in the kernel driver and are kept from the
bootloader.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Marcin Wojtas <mw@semihalf.com>
The adv7511 IRQ is low level triggered, not falling edge triggered. The
wrong sense configuration results in no interrupt being triggered at
all, breaking hotplug detection. Fix it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Fixes: 83a0731b39 ("ARM: shmobile: koelsch: Add DU HDMI output support")
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that the miphy28lp is upstream, we can add the sata dt nodes
for stih407 family silicon. This has been tested on b2120 board
J4 (sata0 channel). These nodes are disabled by default as a
special mini pci-e to sata daughter board is required which
isn't shipped with the board.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This will avoid programming the retime registers when not implemented
- PIO5 : no retime registers assigned to pins 6 and 7
- PIO35 : pin 7 is reserved so no retime register assigned to it
Signed-off-by: Karim BEN BELGACEM <karim.ben-belgacem@st.com>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
On current ST platforms the LPC controls a number of functions. This
patch enables support for the LPC Watchdog and LPC RTC devices on LPC1
and LPC2 respectively.
Signed-off-by: David Paris <david.paris@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Add dt nodes to enable sdhci / eMMC for stih418-b2199 board.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The nodes have been split to allow as much commonality as possible.
The stih407 has a silicon bug with eMMC UHS modes (with top regs)
and as such doesn't have any of the uhs dt properties.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Simplify the bootargs since the platform is booting from an initramfs and
set the kernel stdout path to DBGU.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Re-size NAND partitions since the bootstrap is able to read volumes from an
UBI image.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This:
* moves to pwm-leds using tcb-pwm driver and
* renames leds to pwm:<color>:<function>.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This:
* fixes active level of GPIO (active high) and
* renames buttons:
- reset (PB_RST), and
- mode to user (PB_USER).
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
USART3 is the only serial UART accessible.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Consists in:
* sorting nodes by address as possible or alphabetically,
* adding myself as new maintainer and
* update license.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
In preparation for libfdt/dtc update, add the new fdt specific types.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
The MK808C is an A20 based android stick, with 1G RAM, 8G NAND flash,
a RTL8723au wifi + bt combo chip, a USB host ports using USB-A receptacles,
a mini USB-B receptacle for USB OTG, mini HDMI and a TRS connector for AV.
This patch adds basic support for the device, more information can be found
here (http://linux-sunxi.org/MK808C).
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Synchronous Serial Controller is used to provide SPI.
These are the ports which are located on the Stand-By Controller (SBC).
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The Synchronous Serial Controller is used to provide SPI.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
It should be the first controller, not the second. The indexes of the
usb resets were also wrong and have been fixed.
The issue was caused by the changes in 308efde ("ARM: tegra: Add resets
& has-utmi-pad-registers flag to all USB PHYs") being misapplied by git
due to the patch context being insufficient.
This broke USB after 6261b06 ("regulator: Defer lookup of supply to
regulator_get"), because it changed the order in which the controllers
were probed.
The fix for this issue was suggested by Mikko Perttunen and Tuomas
Tynkkynen.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The pinctrl-assert-gpios is an invalid pinctrl property. It was
probably sneaked from vendor tree. Remove it.
Fixes: 4e18a2243a ("ARM: imx6qdl-sabreauto.dtsi: add max7310 support")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The single SCIFB on SH-Mobile AG5 is called "scifb", not "scifb8".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The single SCIFB on R-Mobile A1 is called "scifb", not "scifb8".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable perf events on msm8660 devices by adding the pmu node.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add configuration nodes for following devices:
* GPIO block, with 22 pins
* MPP block, with 8 pins
* Volatage ADC (VADC), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature.
* RTC device
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add configuration nodes for following devices:
* GPIO block, with 36 pins
* MPP block, with 8 pins
* Current ADC (IADC)
* Volatage ADC (VADC), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature
* Power key device, which is responsible for clean system
reboot or shutdown
* White LED device
* RTC device
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add configuration nodes for multi purpose pins and
thermal sensor devices. Thermal sensor will report
PMIC die temperature.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds i2c3 node which is used for panel control on IFC6410.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
I2C1 pinctrl is not really specific to a board, moving to SOC dtsi would
avoid redefining this in every board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Define an alias for serial port present on ifc6410 which is used as
console.
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
[Srinivas Kandagatla: renamed the serial0 label appropriately]
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds USB OTG support on USB1 for Compulab QS-600 Board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
[Srinivas Kandagatla: fixed up regulators and status properties]
Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds device tree nodes to support two usb hosts on Compulab QS600 board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
[Srinivas Kandagatla: fixed up regulators and status properties]
Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds basic regulator support for USB and HDMI.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds AHCI based SATA controller support to APQ8064.
Tested on IFC6410 board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds USB OTG support on USB1 of APQ8064 SOC.
Tested on IFC6410 with ethernet gadget.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds device tree nodes to support two usb hosts on APQ8064
SOC.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds support to basic regulators wiredup on IFC6410 board.
All these regulators are tested as part of USB, SATA and HDMI.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds rpm node to apq8064 dt as rpm would be used by other
devices for regulator support.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add properties for dwc2 usb device controller according to
Documentation/devicetree/bindings/usb/dwc2.txt
Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Fix a typo in the TX DMA interrupt name for AUART4.
This patch makes AUART4 operational again.
Signed-off-by: Marek Vasut <marex@denx.de>
Fixes: f30fb03d4d ("ARM: dts: add generic DMA device tree binding for mxs-dma")
Cc: stable@vger.kernel.org
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The property '#pwm-cells' is currently missing. It is not possible to
use pwm4 without this property.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Fixes: 5658a68fb5 ("ARM i.MX25: Add devicetree")
Cc: <stable@vger.kernel.org>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The fixed-regulator bindings require a separate property enable-active-high,
the standard gpio phandle property polarity setting is ignored.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Fixes: 4fe69a934b ("ARM: dts: Add Phytec pfla02 with i.MX6 DualLite/Solo")
Cc: stable@vger.kernel.org
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The dr_mode of usb0 on imx233-olinuxino is left to default "otg".
Since the green LED (GPIO2_1) on imx233-olinuxino is connected to the
same pin as USB_OTG_ID it's possible to disable USB host by LED toggling:
echo 0 > /sys/class/leds/green/brightness
[ 1068.890000] ci_hdrc ci_hdrc.0: remove, state 1
[ 1068.890000] usb usb1: USB disconnect, device number 1
[ 1068.920000] usb 1-1: USB disconnect, device number 2
[ 1068.920000] usb 1-1.1: USB disconnect, device number 3
[ 1069.070000] usb 1-1.2: USB disconnect, device number 4
[ 1069.450000] ci_hdrc ci_hdrc.0: USB bus 1 deregistered
[ 1074.460000] ci_hdrc ci_hdrc.0: timeout waiting for 00000800 in 11
This patch fixes the issue by setting dr_mode to "host" in the dts file.
Reported-by: Harald Geyer <harald@ccbib.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Peter Chen <peter.chen@freescale.com>
Fixes: b493129482 ("ARM: dts: imx23-olinuxino: Add USB host support")
Cc: stable@vger.kernel.org
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
On imx23-olinuxino the LED turns on when level logic high is aplied to
GPIO2_1.
Fix the gpios property accordingly.
Fixes: b34aa18502 ("ARM: dts: imx23-olinuxino: Remove unneeded "default-on"")
Reported-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: stable@vger.kernel.org
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The tsadc is used to read cpu and gpu temperatures. Also enable it on the
other rk3288 boards beside the evb using the cru reset settings.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We defined bindings for the supply handling of act8846 regulators now, so
describe those on the firefly too.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Specifying these rails should eventually let us do UHS.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds the dts node for the PMU with the correct PMUIRQ interrupts
for each core.
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
There is no crystal connected to the internal RTC on the Open Block
AX3. So let's disable it in order to prevent the kernel probing the
driver uselessly. Eventually this patches removes the following
warning message from the boot log:
"rtc-mv d0010300.rtc: internal RTC not ticking"
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.8 +
On sun6i we already have PLL6 as AHB1 clock's parent. However this was
previously set in the dma controller node, which takes effect when the
dma controller is probed.
We want this to take effect as soon as possible, so hrtimer rate
calculation is correct, and to be sure the AHB1 clock rate remains as
stable as possible.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The clock driver now supports a muxable ahb clock. Update the dtsi
with the proper compatible and add the new parent clocks.
This also adds the new pll6/4 output for pll6 on sun7i-a20. The
output is not used on sun4/5i.
Also use assigned-clocks to reparent ahb to pll6. We want ahb to
have a stable, non-changing clock rate. cpu/axi clock rate changes
as a result of newly added cpufreq support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The CPU topology is unspecified for Ux500 but will be needed
for things like CoreSight. Let's just add it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The GPIO regulator for the SD-card isn't a ux500 SOC configuration, but
instead it's specific to the board. Move the definition of it, into the
board DTSs.
Fixes: c94a4ab7af ("ARM: ux500: Disable the MMCI gpio-regulator by default")
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Jesurun Q5 has a black plastic casing with the approximate dimensions
of 100mm x 100mm x 24mm with rounded edges. In terms of hardware it
features an Allwinner A10 SoC with 1GB RAM and 8GB of NAND flash. The
external connectors are: 2x USB-A female supporting USB2.0, 3.5mm female
jack for audio, HDMI female, SPDIF, RJ45 LAN and Power. In addition the
device has 1x red LED (hard wired to power) and an programmable green led.
On the board there is also an unpopulated IR receiver and the UART.
The devices is equipped with an AXP209 PMU.
For more details see: http://linux-sunxi.org/Jesurun_Q5
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a node for the chipone-icn8318 touchscreen found on the Utoo P66 tablet.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Orangepi mini is a development board using the Allwinner A20 SoC,
with 1G RAM, 2 microsd slots (use the top side one for booting), HDMI,
1Gbit ethernet, USB wifi, Micro USB (otg), sata, 4 USB A ports,
ir receiver and a headphones jack.
Also see:
http://linux-sunxi.org/Xunlong_Orange_Pi_Minihttp://www.orangepi.org/
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[maxime: Added /chosen/stdout-path]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Orangepi is a development board using the Allwinner A20 SoC, with 1G RAM,
microsd slot, HDMI, 1Gbit ethernet, USB wifi, Micro USB (otg), sata, 4 USB A
ports, ir receiver and a headphones jack.
Also see:
http://linux-sunxi.org/Xunlong_Orange_Pihttp://www.orangepi.org/
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[maxime: Added /chosen/stdout-path]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A20 has a few SRAM that can be mapped either to a device or to the CPU,
with the mapping being controlled by a SRAM controller.
Since most of the time these SRAM won't be accessible by the CPU,
we can't use the mmio-sram driver and compatible.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[hdegoede@redhat.com: Do not change soc node name, change compatible to
sun4i-a10-sram-controller to match the driver change]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A13 / A10s has a few SRAM that can be mapped either to a device or to
the CPU, with the mapping being controlled by a SRAM controller.
Since most of the time these SRAM won't be accessible by the CPU,
we can't use the mmio-sram driver and compatible.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A10 has a few SRAM that can be mapped either to a device or to the CPU,
with the mapping being controlled by a SRAM controller.
Since most of the time these SRAM won't be accessible by the CPU,
we can't use the mmio-sram driver and compatible.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The eMMC on the A13 based Utoo-P66 tablet does not properly support hpi,
and trying to enable it results in the eMMC not working, so add a child-node
describing the eMMC, and set the broken-hpi property on it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The core temperature sensor now supports thermal zones. Add a thermal
zone mapping for the cpus with passive cooling (cpufreq throttling).
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.
The operating points were taken from the a list compiled by Maxime Ripard,
which is based on A31 FEX files from the sunxi-boards repository. Not all
boards have the same settings. The settings in this patch are the ones
shared by A/B/C revisions, plus the default clock setting from u-boot.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add UART aliases and stdout-path property for all the Allwinner boards so that
we won't have to rely on the bootargs' console= value, while working with
legacy bootloaders.
While we're at it, also remove the mentions of earlyprintk in the bootargs,
that will remove our default bootargs entirely, and allow the kernel to boot on
a system even if DEBUG_LL is configured for another system.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Remove the unused usb1_vbus_pin_csq908 node (vbus is always on on the cs908),
and sort the remaining nodes alphabetically.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Since the phy core already supports specifying a regulator to handle
during power up/down, it was decided to drop the regulator support
in the sun9i usb phy driver.
This patch switches the DT to the core bindings. This and the phy driver
would be in the same release and should not be a problem as far as DT
stability goes.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A80 SoC has the architected timer, but the existing firmware from
Allwinner does not set CNTFRQ at all.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A23 SoC has the architected timer, but the existing firmware from
Allwinner does not set CNTFRQ at all.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Hummingbird A31 has an AMPAK AP6210 WiFi+Bluetooth module. The
WiFi part is a BCM43362 IC connected to MMC1 in the A31 SoC via SDIO.
The IC also takes a power enable signal via GPIO. This is supported
with the new power sequencing bindings.
The WiFi module supports out-of-band interrupt signaling via GPIO,
but this is not enabled yet.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc1 is used to connect to the WiFi chip on the Hummingbird A31.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[maxime: Changed the drive and pull values for their defines]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Sometimes we need to specify non-probably information for sdio devices in the
devicetree, this is done through child nodes addressed by the reg property,
whereby the reg property refers to the sdio function number, see;
Documentation/devicetree/bindings/mmc/mmc.txt
This commit adds the necessary address- and size-cells properties to the mmc
controller nodes in the dtsi files, so that dts files needing such a child
node do not need to specify these themselves.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds the AXP221 regulators. Only the ones directly used
on the board are added.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Hummingbird A31 has an AXP221 PMIC hooked up to the
P2WI controller.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Hummingbird A31 has an AXP221 PMIC hooked up to the P2WI controller.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The p2wi controller has only one possible pinmux setting. Use it by
default in the dtsi, instead of having to set it in each board's dts.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
[wens@csie.org: reformat commit title; rename p2wi pins and use as default]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a Cubietech Cubieboard4 device tree and instruct make to build it. This
device tree has been derived from the sun9i-a80-optimus.dts as they are very
similar in design[1]. Notably, I2C3 is not used on Cubieboard4 and the LED/PWM
definitions will need to be updated in the future.
[1] http://dl.cubieboard.org/model/cc-a80/Hardware/CC-A80-HW-V1.1.pdf
Signed-off-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch add support for Wexler TAB7200 tablet.
The Wexler TAB7200 is a A20 based tablet with 7 inch display(800x480),
capacitive touchscreen(5 fingers), 1G RAM, 4G NAND, micro SD card slot,
mini HDMI port, 3.5mm audio plug, 1 USB OTG port and 1 USB 2.0 port.
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The touchscreen controller in the A13 and later has a different temperature
curve than the one in the original A10, change the compatible for the A13 and
later so that the kernel will use the correct curve.
Reported-by: Tong Zhang <lovewilliam@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The UTOO P66 is a 6" A13 tablet / lcd ereader. It features a 6" 480x800 ips
lcd screen, 512MB RAM & 4GB emmc.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The auxtek-t004:
http://www.fasttech.com/products/1110/10004200/1318603-auxtek-t004-allwinner-a10s-single-core-android-ics
Is an Allwinner A10s based hdmi tv stick with with 512M RAM, 4G nand flash,
toc9002 (bcm43362) sdio wifi, 1 USB host ports using an USB-A receptacle and
a 2 micro-usb receptacles, one for power and one for USB OTG.
The sdio wifi appears to not have an oob irq hooked up, so we rely on sdio-irq
support for it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add A13 mmc2 pinmux settings, note these are for a 8bit bus.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A13 and the A10s use the same die (this has been confirmed by Allwinner),
as such there is no need to differentiate between the ehci/ohci parts of both,
the only reasons there were different allwinner,sun5i-a*-foo compatible
between these 2 parts is costemetically and because we could when we still
had 2 completely different dtsi files.
The allwinner,sun5i-a*-foo compatible strings are not used for binding at all,
the actual driver binds to the generic-?hci compatible, so we can safely remove
this cosmetical difference and simplify the dtsi files.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the lradc controlled tablet keys on the Chuwi V7 CW0825 tablet.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Mele I7 is a Allwinner A31 based Android TV box, with 1G RAM,
8GB NAND flash, a RTL8188etv wifi chip, 3 USB Host ports using
USB-A receptacles, a micro USB-B receptacle for USB OTG, HDMI out,
a TRS connector for A/V, SPDIF and IrDA.
This patch adds basic support for the device, more information can
be found here (http://linux-sunxi.org/Mele_I7).
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to lessen the amount of duplication of the DT tree, ease the
new and follow the trend that prefers to use label based references
when overriding DTSI nodes, convert the board to this syntax
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to lessen the amount of duplication of the DT tree, ease the
new and follow the trend that prefers to use label based references
when overriding DTSI nodes, convert the board to this syntax
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to lessen the amount of duplication of the DT tree, ease the
new and follow the trend that prefers to use label based references
when overriding DTSI nodes, convert the board to this syntax
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to lessen the amount of duplication of the DT tree, ease the
new and follow the trend that prefers to use label based references
when overriding DTSI nodes, convert the board to this syntax
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to lessen the amount of duplication of the DT tree, ease the
new and follow the trend that prefers to use label based references
when overriding DTSI nodes, convert the board to this syntax
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to lessen the amount of duplication of the DT tree, ease the
new and follow the trend that prefers to use label based references
when overriding DTSI nodes, convert the board to this syntax
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to lessen the amount of duplication of the DT tree, ease the
new and follow the trend that prefers to use label based references
when overriding DTSI nodes, convert the board to this syntax
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to lessen the amount of duplication of the DT tree, ease the
new and follow the trend that prefers to use label based references
when overriding DTSI nodes, convert the board to this syntax
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to lessen the amount of duplication of the DT tree, ease the
new and follow the trend that prefers to use label based references
when overriding DTSI nodes, convert the board to this syntax
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to lessen the amount of duplication of the DT tree, ease the
new and follow the trend that prefers to use label based references
when overriding DTSI nodes, convert the board to this syntax
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>