ffs() returns the bit position from 1, while the ssm2158 driver code
assumes it being 0-based. Also, the bit mask computation of the two
channel slots are incorrect; it must have worked just casually.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Try to get the device's module clock if the dt has no clocks and
system-clock-frequency properties.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This is a quick fix for the below two issues when building spdif as modules.
1) If modprobing modules in order: (Step 1) snd-soc-fsl-spdif -> (Step 2)
snd-soc-imx-spdif -> (Step 3) snd-soc-spdif-tx/rx, we will fail to create
imx-spdif card and dai link unless we rmmod snd-soc-imx-spdif and modprobe
it again due to the execution platform_driver_unregister() in probe() when
meeting -EPROBE_DEFER at Step 2.
2) After "imx-spdif sound-spdif.17: dit-hifi <-> 2004000.spdif mapping ok",
'rmmod snd-soc-imx-spdif' would cause kernel dump with warning:
WARNING: CPU: 0 PID: 1301 at /home/rmk/git/linux-rmk/fs/sysfs/dir.c:915 sysfs_hash_and_remove+0x84/0x90()
sysfs: can not remove 'dapm_widget', no directory
This should be caused by disordered resourse releasing of the whole link.
And trying to unregister the card and then CODEC dev can't fix this issue.
Thus this patch just provides a simple fix to these two bugs by using the
snd-soc-dummy in the core instead of seperate snd-soc-spdif-tx/rx so that
there's no need to handle the registering and unregistering of CODEC or
CODEC dai any more.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
From "ASoC: make snd_soc_dai_link more symmetrical", can we see that
the name of CPU DAI maybe omitted. If the DAI name is omitted, try to
use the component name instead.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds SRC support to Renesas sound driver.
SRC converts sampling rate between codec <-> cpu.
It needs special codec chip,
or very simple DA/AD converter to use it.
This patch was tested via ak4554 codec,
and supports Gen1 only at this point.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Renesas sound has SRC (= Sampling Rate Converter),
but, the HW implementation depends on its generation.
It was part of SRU on Gen1, and SCU on Gen2.
This SCU needs DMA transfer to use it.
Current rsnd driver is using it as DMA transfer buffer
(= no rate convert), and Gen1 is only supported at this point.
This patch cleanup it with focusing about SRC and Gen2 part.
ssi clock which is calculated from rsnd_ssi_master_clk_start()
should have flexibility since Renesas sound has
SRC (= Sampling Rate Converter).
But current implementation is using runtime->rate directly.
This patch tidyup rsnd_ssi_master_clk_start() parameter
as preparation of future SRC support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Renesas sound has SRC (= Sampling Rate Converter),
but, the HW implementation depends on its generation.
It was part of SRU on Gen1, and SCU on Gen2.
This SCU needs DMA transfer to use it.
Current rsnd driver is using it as DMA transfer buffer
(= no rate convert), and Gen1 is only supported at this point.
This patch cleanup it with focusing about SRC and Gen2 part.
rsnd_scu_set_hpbif() is renamed to rsnd_scu_rate_ctrl(),
since its naming doesn't indicate the function meaning.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
INT_ENABLE is needed only Gen2.
rsnd_mod_write() do nothing on Gen1, but it is confusable.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Renesas sound has SRC (= Sampling Rate Converter),
but, the HW implementation depends on its generation.
It was part of SRU on Gen1, and SCU on Gen2.
This SCU needs DMA transfer to use it.
Current rsnd driver is using it as DMA transfer buffer
(= no rate convert), and Gen1 is only supported at this point.
This patch cleanup it with focusing about SRC and Gen2 part.
SRC_CTRL/BUSIF_MODE are used for transfer start.
This patch adds rsnd_scu_transfer_start() and merge these
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Renesas sound has SRC (= Sampling Rate Converter),
but, the HW implementation depends on its generation.
It was part of SRU on Gen1, and SCU on Gen2.
This SCU needs DMA transfer to use it.
Current rsnd driver is using it as DMA transfer buffer
(= no rate convert), and Gen1 is only supported at this point.
This patch cleanup it with focusing about SRC and Gen2 part.
rsnd_scu_set_route() is needed only Gen1.
This patch renames it to rsnd_scu_set_route_if_gen1()
and it adds comment to rsnd_reg member
in order to clarify it is used for Gen1.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This driver is assuming that
RBGA is used as source clock of 44.1kHz category, and
RBGB is used as source clock of 48kHz category.
This patch clarifies the variable name.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Use correct register name which appears in the datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
we can check rsnd_ssi_init(), not, rsnd_ssi_start()
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds rsnd_adg_set_ssi_clk() to access to
AUDIO_CLK_SEL0/1/2, and removes last user of
rsnd_write/read/bset which is very low level function.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
When call snd_soc_register_card, it will set driver data to this
device through dev_set_drvdata, then in driver, no need to call
platform_set_drvdata again, so remove it.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Revert the SAI's endianess for fifo data to/from DMA engine.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This is maybe one bug or a limitation of the hardware that the {T,R}CR2's
Synchronous Mode bits must be set as late as possible, or the SAI device
maybe hanged up, and there has not any explaination about this limitation
in the SAI Data Sheet.
And the {T,R}CR2's Synchronous Mode bits must be set at the same time whether
for Tx or Rx stream.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Enables/Disables the corresponding data channel for tx/rx operation.
A channel must be enabled before its FIFO is accessed, and then disable
it when tx/rx is stopped or idle.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
commit 5d229ce569 ("ASoC: samsung: move plat/ headers to local directory")
moved the header files but forgot to clean the pointers to their old locaton.
Remove them now.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Because we cannot make sure which one of _dai_fmt() and _dai_sysclk()
will be firstly called. So move the RCSR/TCSR and TCR1/RCR1's
initialization to _dai_probe(), and this can make sure that before any
of {T,R}CR{1~5} register to be set the RCSR/TCSR's RE/TE bit has been
cleared for the hareware limitation.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This series converts the Tegra DTs and drivers to use the common/
standard DMA and reset bindings, rather than custom bindings. It also
adds complete documentation for the Tegra clock bindings without
actually changing any binding definitions.
This conversion relies on a few sets of patches in branches from outside
the Tegra tree:
1) A patch to add an DMA channel request API which allows deferred probe
to be implemented.
2) A patch to implement a common part of the of_xlate function for DMA
controllers.
3) Some ASoC patches (which in turn rely on (1) above), which support
deferred probe during DMA channel allocation.
4) The Tegra clock driver changes for 3.14.
Consequently, this branch is based on a merge of all of those external
branches.
In turn, this branch is or will be pulled into a few places that either
rely on features introduced here, or would otherwise conflict with the
patches:
a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid
conflicts.
b) The DRM tree, which introduces new code that relies on the reset
controller framework introduced in this branch, and to avoid
conflicts.
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Merge tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup
From Stephen Warren:
ARM: tegra: implement common DMA and resets DT bindings
This series converts the Tegra DTs and drivers to use the common/
standard DMA and reset bindings, rather than custom bindings. It also
adds complete documentation for the Tegra clock bindings without
actually changing any binding definitions.
This conversion relies on a few sets of patches in branches from outside
the Tegra tree:
1) A patch to add an DMA channel request API which allows deferred probe
to be implemented.
2) A patch to implement a common part of the of_xlate function for DMA
controllers.
3) Some ASoC patches (which in turn rely on (1) above), which support
deferred probe during DMA channel allocation.
4) The Tegra clock driver changes for 3.14.
Consequently, this branch is based on a merge of all of those external
branches.
In turn, this branch is or will be pulled into a few places that either
rely on features introduced here, or would otherwise conflict with the
patches:
a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid
conflicts.
b) The DRM tree, which introduces new code that relies on the reset
controller framework introduced in this branch, and to avoid
conflicts.
* tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits)
spi: tegra: checking for ERR_PTR instead of NULL
ASoC: tegra: update module reset list for Tegra124
clk: tegra: remove bogus PCIE_XCLK
clk: tegra: remove legacy reset APIs
ARM: tegra: remove legacy DMA entries from DT
ARM: tegra: remove legacy clock entries from DT
USB: EHCI: tegra: use reset framework
Input: tegra-kbc - use reset framework
serial: tegra: convert to standard DMA DT bindings
serial: tegra: use reset framework
spi: tegra: convert to standard DMA DT bindings
spi: tegra: use reset framework
staging: nvec: use reset framework
i2c: tegra: use reset framework
ASoC: tegra: convert to standard DMA DT bindings
ASoC: tegra: allocate AHUB FIFO during probe() not startup()
ASoC: tegra: call pm_runtime APIs around register accesses
ASoC: tegra: use reset framework
dma: tegra: register as an OF DMA controller
dma: tegra: use reset framework
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Merging in external dependencies for the Tegra DMA and reset controller
refactoring from external trees.
Per Stephen Warren, the stability of these branches have been negotiated
with the relevant parties (Vinod/Mark/Mike)
* depends/asoc-dma:
ASoC: dmaengine: fix deferred probe detection
ASoC: dmaengine: support deferred probe for DMA channels
dma: add channel request API that supports deferred probe
ASoC: dmaengine: add custom DMA config to snd_dmaengine_pcm_config
ASoC: don't leak on error in snd_dmaengine_pcm_register
ASoC: restructure dmaengine_pcm_request_chan_of()
ASoC: generic-dmaengine-pcm: Set BATCH flag when residue reporting is not supported
ASoC: Add resource managed snd_dmaengine_pcm_register()
* depends/dma-of:
dma: add dma_get_any_slave_channel(), for use in of_xlate()
* depends/tegra-clk: (42 commits)
clk: tegra: fix __clk_lookup() return value checks
clk: tegra: Do not print errors for clk_round_rate()
clk: tegra: Initialize DSI low-power clocks
clk: tegra: add FUSE clock device
clk: tegra: Properly setup PWM clock on Tegra30
clk: tegra: Initialize secondary gr3d clock on Tegra30
clk: tegra114: Initialize clocks needed for HDMI
clk: tegra124: add suspend/resume function for tegra_cpu_car_ops
clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_ops
clk: tegra124: Add support for Tegra124 clocks
clk: tegra124: Add new peripheral clocks
clk: tegra124: Add common clk IDs to clk-id.h
clk: tegra: add TEGRA_PERIPH_NO_GATE
clk: tegra: add locking to periph clks
clk: tegra: Add periph regs bank X
clk: tegra: Add support for PLLSS
clk: tegra: move tegra20 to common infra
clk: tegra: move tegra30 to common infra
clk: tegra: introduce common gen4 super clock
clk: tegra: move PMC, fixed clocks to common files
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Daniel Glöckner <daniel-gl@gmx.net>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Generally we would write code for local variable like:
static new_func()
{
struct xxx *yyy;
...
int ret;
}
But this driver only follows this pattern for some functions, not all.
Thus this patch sorts the local variable in the general way.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Since using dev_err() there's no need to mention SAI any more, it will
print the full name of the driver -- fsl_sai.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
We can save this ret to make the code neater.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
SAi only supports two data channels on hardware level and the driver also does
register the min->1 and max->2, so no need to check channels.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Use common helper function snd_pcm_format_width() to make code neater.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
There are two functions haven't clk_disable_unprepare() if having error.
Thus fix them.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The name of cpu DAI maybe omitted, and then strlen() will lead
kernel panic.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
There is no need of this function and makes the code slightly shorter
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Tested-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
We can rely on mfd driver to manage the register caching via regmap. The
driver still need to cache some registers associated with DL1/2 routes.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The MFD core takes care of the restore via standard regmap API, no need to
do this anymore here.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Introduce a small register cache for registers which needs special caching
to reduce pop noise:
TWL6040_REG_HSLCTL, TWL6040_REG_HSRCTL, TWL6040_REG_EARCTL, TWL6040_REG_HFLCTL
and TWL6040_REG_HFRCTL.
Switch over and use the new small cache for these registers instead of the
main reg_cache.
This is in preparation to remove the local ASoC reg_cache from the driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds three main functions for DAI master mode: set_dai_fmt(),
set_dai_sysclk() and set_dai_tdm_slot(), and one essential baud clock
accordingly. After appending this patch, the fsl_ssi driver on i.MX series
has the ability to derive LRCLK and BCLK from baud clock source so as to
support some audio Codecs which can only be used in slave mode.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The kernel as a number of cases of gendered language. The majority of these
refer to objects that don't have gender in English, and so I've replaced
them with "it" and "its". Some refer to people (developers or users), and
I've replaced these with the singular "they" variant. Some are simply
typos that I've fixed up.
I've left cases where gendered language was used to refer to specific
individuals, was a quote or is part of license text.
Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Makes the code slightly shorter.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add support for configuring the sample rate on the SYSCLK side of the
ASRC.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Currently, the driver only supports configuration of the lower sample
rate (FSL) on the ISRCs. With the higher rate being fixed a SYSCLK, this
patch adds support for configuring the higher sample rate (FSH).
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Certain use-cases require the DRE to be disabled so expose controls for
the enables.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
spear_pcm_request_chan() is almost identical to
dmaengine_pcm_compat_request_channel(), with the exception that the
latter:
a) Assumes that the DAI DMA data is a struct snd_dmaengine_dai_dma_data
pointer rather than some custom type.
b) dma_data->filter_data rather than dma_data should be passed to
snd_dmaengine_pcm_request_channel() as the filter data.
Make minor changes to the SPEAr DAI drivers so that those two conditions
are met. This allows removal of the custom .compat_request_channel().
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Modify the SPEAr PCM driver so that it's a utility library that can be
registered on each DAI, rather than a separate struct device. This is
more in line with how many recent DT-converted platforms operate, and
avoids the need for yet another struct device.
This is also required as a pre-cursor to removing
spear_pcm_request_chan().
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
ep93xx_compat_request_channel() is almost identical to
dmaengine_pcm_compat_request_channel(), with the exception that the
latter:
a) Assumes that the DAI DMA data is a struct snd_dmaengine_dai_dma_data
pointer rather than some custom type.
b) dma_data->filter_data rather than dma_data should be passed to
snd_dmaengine_pcm_request_channel() as the filter data.
Make minor changes to the ep93xx DAI drivers so that those two conditions
are met. This allows removal of the custom .compat_request_channel().
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Modify the ep93xx PCM driver so that it's a utility library that can be
registered on each DAI, rather than a separate struct device. This is
more in line with how many recent DT-converted platforms operate, and
avoids the need for yet another struct device.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Function sgtl5000_enable_regulators() is somehow odd in handling the
optional external VDDD supply. The driver can only enable this supply
on SGTL5000 chip before revision 0x11, and of course when this external
VDDD is present. It currently does something like below.
1. Check if regulator_bulk_get() on VDDA, VDDIO and VDDD will fail. If
it fails, VDDD must be absent and it falls on internal LDO by calling
sgtl5000_replace_vddd_with_ldo(). Otherwise, VDDD is used. And in
either case, regulator_bulk_enable() will be called to enable
3 supplies.
2. In case that SGTL5000 revision is later than 0x11, even if external
VDDD is present, it has to roll back the 'enable' and 'get' calls
with regulator_bulk_disable() and regulator_bulk_free(), and starts
over again by calling sgtl5000_replace_vddd_with_ldo() and
regulator_bulk_enable().
Such back and forth calls sequence is complicated and unnecessary.
Also, since commit 4ddfebd (regulator: core: Provide a dummy regulator
with full constraints), regulator_bulk_get() will always succeeds
because of the dummy regulator. Thus the VDDD detection is broken.
The patch changes the flow to something like the following, which should
be more reasonable and clear, and also fix the VDDD detection breakage.
1. Check if we're running a chip before revision 0x11, on which an
external VDDD can possibly be an option.
2. If it is an early revision, call regulator_get_optional() to detect
whether an external VDDD supply is available.
3. If external VDDD is present, call sgtl5000_replace_vddd_with_ldo() to
update sgtl5000->supplies info.
4. Drop regulator_bulk_get() call in sgtl5000_replace_vddd_with_ldo(),
and call it in sgtl5000_enable_regulators() no matter it's an
external VDDD or internal LDO.
5. Call regulator_bulk_enable() to enable these 3 regulators.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
This adds Freescale SAI ASoC Audio support.
This implementation is only compatible with device tree definition.
Features:
o Supports playback/capture
o Supports 16/20/24 bit PCM
o Supports 8k - 96k sample rates
o Supports master and slave mode.
Signed-off-by: Alison Wang <b18965@freescale.com>
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The kernel as a number of cases of gendered language. The majority of these
refer to objects that don't have gender in English, and so I've replaced
them with "it" and "its". Some refer to people (developers or users), and
I've replaced these with the singular "they" variant. Some are simply
typos that I've fixed up.
I've left cases where gendered language was used to refer to specific
individuals, was a quote or is part of license text.
Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
When wm8904 work in DSP mode B, we still need to configure it to
work in DSP mode. Or else, it will work in Right Justified mode.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
Some devices are getting very close to the limit whilst polling the RAM
start, this patch adds a small delay to this loop to give a longer
startup timeout.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
This patch fixes the rates declared in the CPU DAI parameters:
- SNDRV_PCM_RATE_KNOT and the discrete rates SNDRV_PCM_RATE_xxx should
not be used with SNDRV_PCM_RATE_CONTINUOUS,
- SNDRV_PCM_RATE_CONTINUOUS asks for rate_min and rate_max,
- the device may do streaming down to 5512Hz.
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Mark Brown <broonie@linaro.org>
Matching works completely based on the cpu of_node.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Reported-by: Kyung-Kwee Ryu <kyung-kwee.ryu@wolfsonmicro.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
use snd_dmaengine_pcm_prepare_slave_config to set slave config,
and remove the max_burst_size = 4 hard code.
select SND_SOC_GENERIC_DMAENGINE_PCM for mmp-pcm.
Signed-off-by: Qiao Zhou <zhouqiao@marvell.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
When writing the patch write to the device asynchronously, allowing better
performance when used with a bus like SPI which supports this by
minimising the need to context switch back to the driver to get the
next bit of data.
Signed-off-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
When writing the patch write to the device asynchronously, allowing better
performance when used with a bus like SPI which supports this by
minimising the need to context switch back to the driver to get the
next bit of data.
Signed-off-by: Mark Brown <broonie@linaro.org>
Tested-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
When writing the patch write to the device asynchronously, allowing better
performance when used with a bus like SPI which supports this by
minimising the need to context switch back to the driver to get the
next bit of data.
Signed-off-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Where possible write to the device asynchronously, allowing better
performance when used with a bus like SPI which supports this by
minimising the need to context switch back to the driver to get the
next bit of data.
Signed-off-by: Mark Brown <broonie@linaro.org>
Tested-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Because the "ASoC: dmaengine-pcm: Provide default config" has provided
us one defualt config of DMA. When using this, the config parameter of
devm_snd_dmaengine_pcm_register() will be NULL, so here we need to have
a check before using it.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
devm_request_and_ioremap() has been deprecated in favour of
devm_ioremap_resource(). Fixes the following coccinelle warning:
sound/soc/adi/axi-spdif.c:194:8-32: ERROR: deprecated devm_request_and_ioremap() API used on line 194
Generated by: coccinelle/api/devm_ioremap_resource.cocci
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
devm_request_and_ioremap() has been deprecated in favour of
devm_ioremap_resource(). Fixes the following coccinelle warning:
sound/soc/adi/axi-i2s.c:195:8-32: ERROR: deprecated devm_request_and_ioremap() API used on line 195
Generated by: coccinelle/api/devm_ioremap_resource.cocci
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Store chip revision in struct sgtl5000_priv when sgtl5000_i2c_probe()
reads it out from register, so that we can use it in
sgtl5000_enable_regulators() with no need to read register again.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
DPCM can dynamically alter the FE to BE PCM links at runtime based
on mixer/mux setting updates. Add soc_dpcm_runtime_update() calling in
get/put function for mixer/mux to support this feature.
Signed-off-by: Nenghua Cao <nhcao@marvell.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add the missing clk_disable_unprepare() before return from
tegra20_ac97_platform_probe() in the error handling case.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
By enabling dual fifo mode, it would allow SSI enter a better performance
to transimit/receive data without occasional hardware underrun/overrun.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Acked-by: Timur Tabi <timur@tabi.org>
Acked-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Tegra124 adds a number of extra modules into the configlink bus, which
must be taken out of reset before the bus is used. Update the AHUB
driver to know about these extra modules (the AHUB HW module hosts the
configlink bus).
Based-on-work-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Based-on-work-by: Songhee Baek <sbaek@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
---
This patch depends on "ASoC: tegra: use reset framework" to compile,
which is ack'd and slated to go through a (large) topic branch in the
Tegra tree. So, we can either:
a) Merge that Tegra topic branch into the ASoC tree, then apply this.
Note that I haven't created the topic branch yet, since I'm still
waiting for DMA dependencies to be applied.
b) Apply this change to the Tegra tree too. This change isn't directly
related to the changes in the Tegra tree; it just makes use of the new
reset controller feature that's introduced there.
This AT91 specific Kconfig option removed the code that dealt with
programmable clocks. Each AT91 SoC embeds programmable clocks and
there is little gain to remove this code in case that such a clock
is not used.
If this option is not selected, it causes certain drivers to fail
to build. We simply remove this option instead of adding code just
to build a workaround.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Since all Exynos platforms have been converted to dmaengine and many of
the older platforms are in the process of conversion they do not need to
use the legacy s3c-dma APIs for DMA but can instead use the standard ASoC
dmaengine helpers. This both allows them to benefit from improvements
implemented in the generic code and supports multiplatform.
This patch includes some fixes from Padma for Exynos SoCs, her testing
was on a slightly earlier version of the patch due to unrelated breakage
preventing testing.
Signed-off-by: Mark Brown <broonie@linaro.org>
Tested By: Padmavathi Venna <padma.v@samsung.com>
In preparation for using the dmaengine helpers in ASoC rather than the
dmaengine wrappers for the Samsung API wrap the configuration of dma_data.
The dmaengine code expects different data to that used by the legacy API.
Signed-off-by: Mark Brown <broonie@linaro.org>
By passing no flags when calling snd_dmaengine_pcm_register() from
tegra_pcm.c, we end up using dma_request_slave_channel() rather than
dmaengine_pcm_compat_request_channel(), and hence rely on the standard
DMA DT bindings and stashing the DMA slave ID away during channel
allocation. This means there's no need to use a custom DT property to
store the slave ID. So, remove all the code that parsed it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
The Tegra30 I2S driver currently allocates DMA FIFOs from the AHUB only
when an audio stream starts playback. This is theoretically nice for
resource sharing, but makes no practical difference for any configuration
the drivers currently support. However, this deferral prevents conversion
to the standard DMA DT bindings, since conversion requires knowledge of
the specific DMA channel to be allocated, which in turn depends on which
specific FIFO was allocated.
For this reason, move the FIFO allocation into probe() to allow later
conversion to the standard DMA DT bindings.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Call pm_runtime_get_sync() before all register accesses; the HW requires
clocks to be running when accessing registers.
This hasn't been needed to date, since all register IO was performed
while playback was active, and hence the ASoC core had already called
pm_runtime_get(). However, an imminent future commit will allocate and
set up the FIFOs and routing during probe(), when that "protection"
won't be in place.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.
This change also renames "clock"/"clk" to "modules"/"mod" in symbols
related to entries in configlink_clocks[], since:
- We don't care about clock handles any more, but rather reset handles,
so the old name isn't applicable.
- It really is a list of modules on the bus, about which we currently
only care about reset handles.
If we start caring about any other aspect of the modules in the future,
we won't have to rename all these symbols again.
Note: The addition of "depends COMMON_CLOCK" is something that was missing
before, not a new requirement.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
This is the work so far on dmaengine for v3.14, it is being cross merged
into the Tegra tree to support a large DMA overhaul there. The main
additions are a change in the DMA request API which allows better
interaction at system startup using deferred probes and methods for
overriding the default device and channel names used to request DMA.
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Merge tag 'asoc-dma-v3.14' into for-3.14/dmas-resets-rework
ASoC: dma: Generic ASoC dmaengine driver enhancements
This is the work so far on dmaengine for v3.14, it is being cross merged
into the Tegra tree to support a large DMA overhaul there. The main
additions are a change in the DMA request API which allows better
interaction at system startup using deferred probes and methods for
overriding the default device and channel names used to request DMA.
Check the return value of dma_request_slave_channel_reason() to see if
deferred probe happens, not the variable the return value will be
assigned to later.
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Fixes: 5eda87b890 ("ASoC: dmaengine: support deferred probe for DMA channels")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Enhance dmaengine_pcm_request_chan_of() to support deferred probe for
DMA channels, by using the new dma_request_slave_channel_or_err() API.
This prevents snd_dmaengine_pcm_register() from succeeding without
acquiring DMA channels due to the relevant DMA controller not yet being
registered.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Remove original filter from fsi_dma_probe(),
and use SH-DMA suitable filter.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Optional DT property to specify the desired parent clock for the McASP fck
clock.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
An earlier patch overlooked this when the compatible has been changed from
omap2 -> am33x.
Rename omap2_mcasp_pdata to am33xx_mcasp_pdata.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Instead of passing __iomem address (mcasp->base + register_offset) pass
the main mcasp structure and only access the mcasp->base in the low level
IO functions.
In most cases this helps with code readability and it will make it easier
to switch over to regmap in the future.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The IP in DRA7xx is similar to the IP found in TI81xxAM3xxx/AM4xxx type of
SoCs but it is is integrated with sDMA instead of eDMA. The suitable pcm
driver for DRA7xx is the omap-pcm driver which is using dmaengine.
In the driver we can configure both dma related structures used for eDMA and
sDMA. The only thing we need to make sure that we set the correct dma_data
at startup with snd_soc_dai_set_dma_data()
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
In synchronous mode both transmit and receive sections are using the TX
clocks. In setup like this the TX clocks need to be enabled when capture
is running.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The audio data to/from McASP can be sent/received via two method:
Via the data port (preferred) or via the configuration bus.
Currently the driver assumes that all data communication will be done via
the data port.
This patch adds support for selecting the configuration port as data
interface.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The FIFO registers base address is different in dm646x compared to newer
SoCs with McASP IP. Instead of using two paths (switch/case) to handle the
difference we can simply pick the correct base address beforehand and use
offsets to address the register we need to configure.
With this change the indentation depth can be reduced as well.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Replace mcasp->base use with plain base in the davinci_mcasp_set_dai_fmt()
function since it has been already used by the remaining part of the function.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Rename the private struct from davinci_audio_dev to davinci_mcasp.
Change the local use of the pointer to this struct from *dev to *mcasp.
The aim is to have better readable code for the first look since having
dev->xxxx in the code when using the local private struct is a bit
surprising.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
It brings no benefit to inline this function due to it's size and function.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Since it is a private struct strictly used by the davinci-mcasp driver it
can be moved from header file to the source file.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
It is better for readability to have the register definitions out from the
source file.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
These are not used, probably leftovers from the past.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Specify the dai formats to use within the snd_soc_dai_link structures. In
this way we can remove the code dealing with the dai format configuration
from the machin driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
AM43xx have the same McASP IP as AM33xx and both platform uses eDMA. Modify
the Kconfig so it will be possible to add audio support for AM43xx based
boards later.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
We have several boards using the same machine driver for audio support.
All of these machines can select a generic machine driver config option to
build the needed driver while keeping the config options used within the
driver for compile time code path selection.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The help text is misleading and the prompt itself explains the purpose of
this config section.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Gen2 has 0 - 9, total 10 channels, not 9 channels.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add fields to struct snd_dmaengine_pcm_config to allow custom:
- DMA channel names.
This is useful when the default "tx" and "rx" channel names don't
apply, for example if a HW module supports multiple channels, each
having different DMA channel names. This is the case with the FIFOs
in Tegra's AHUB. This new facility can replace
SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME.
- DMA device
This allows requesting DMA channels for a device other than the device
which is registering the "PCM" driver. This is quite unusual, but is
currently useful on Tegra. In much HW, and in Tegra20, each DAI HW
module contains its own FIFOs which DMA writes to. However, in Tegra30,
the DMA FIFOs were split out AHUB HW module, which then routes the data
through a cross-bar, and into the DAI HW modules. However, the current
ASoC driver structure does not expose this detail, and acts as if the
FIFOs are still part of the DAI HW modules. Consequently, the "PCM"
driver is registered with the DAI HW module, yet the DMA channels must
be looked up in the AHUB HW module's device tree node. This new config
field allows that to happen. Eventually, the Tegra drivers will be
reworked to fully expose the AHUB, and this config field can be
removed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
If snd_dmaengine_pcm_register()'s call to snd_soc_add_platform() fails,
all objects allocated during registration are leaked. Fix this by adding
error-handling code.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Restructure the internals of dmaengine_pcm_request_chan_of() as a loop
over all channels to be allocated. This makes it easier to add logic
that applies to all allocated channels, without having to duplicate that
logic in each of the half-duplex/full-duplex paths.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
if codec driver is used for AIC3X_MODEL_3007 the mono iout controls overwrite
registers for class-d amplifier.
classd amplifier controls are only used for AIC3X_MODEL_3007.
Removing all mono snd_kcontrol_new, snd_soc_dapm_widget, snd_soc_dapm_route
and aic3x_init stuff from common code and call only for not AIC3X_MODEL_3007
codecs.
Testet only with AIC3X_MODEL_3007
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds a ASoC driver for the AXI-SPDIF softcore. The core implements a
simple SPDIF transmitter and is used on some Analog Devices' reference designs
for various FPGA platforms. For now the driver only support the PL330 as the the
DMA controller.
The driver uses the generic PCM dmaengine driver for its PCM. The only
restriction is that we need to set the SND_DMAENGINE_PCM_FLAG_NO_RESIDUE flag as
the dmaengine driver for the DMA core (PL330) that is used with this core has no
residue reporting capabilities yet. This will be fixed in the future though.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds support for the AXI-I2S softcore. The core implements a simple
bidirectional I2S transceiver and is used by Analog Devices in some of their
reference designs for various FPGA platforms.
The driver uses the generic PCM dmaengine driver for its PCM. The only
restriction is that we need to set the SND_DMAENGINE_PCM_FLAG_NO_RESIDUE flag as
the dmaengine driver for the DMA core (PL330) that is used with this core has no
residue reporting capabilities yet. This will be fixed in the future though.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
If we update it here, the set_bias_level() of Codec driver won't be normally
called and we will then miss some essential procedures in set_bias_level() of
the Codec driver. Thus drop it.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
In tegra*_i2s_set_fmt(), in the (fmt == SND_SOC_DAIFMT_CBM_CFM) case,
"val" is never assigned to, but left uninitialized. The other case does
initialized it. Fix this by initializing val at the start of the
function, and only ever ORing into it.
Update the handling of "mask" so it works the same way for consistency.
Update tegra20_spdif.c to use the same code-style for consistency, even
though it doesn't happen to suffer from the same problem at present.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Fixes: 0f163546a7 ("ASoC: tegra: use regmap more directly")
Cc: <stable@vger.kernel.org>
DSPCLK_DIV can be only generated correctly after enabling SYSCLK. But if the
current bias_level hasn't reached SND_SOC_BIAS_ON, DAPM won't enable SYSCLK,
which would cause the calculation result from DSPCLK_DIV invalid since bit
DSPCLK_DIV will be finally turned to its true value after DAPM enables SYSCLK
while the driver won't calculate it again for the current instance. In this
circumstance, a playback which needs non-zero DSPCLK_DIV would be distorted
due to unexpected clock frequency resulted from an invalid DSPCLK_DIV value.
So this patch provisionally enables the SYSCLK to get a valid DSPCLK_DIV for
calculation and then disables it afterward.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Initially, this binding and driver only describe/support playback to
headphones and speakers, and capture from the external microphone, with
GPIO-based jack detection for the headphone jack only.
This driver is useful for the Venice2 board.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
clk_prepare_enable() may fail, so let's check its return value and propagate it
in the case of error.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This will allow a marginal speed improvement when used with a bus that
supports async I/O by reducing the amount of context thrashing between
writes, allowing the bus to be more fully utilised.
Signed-off-by: Mark Brown <broonie@linaro.org>
Change sam9x5 with wm8731 work in DSP A mode, this will fix the
left/right channel swap issue.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
According to the SSC specifiation, it should be enabled after DMA is
enabled. So, add trigger operation to make sure the right sequence.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The snd_soc_dai_digital_mute() here will be never executed because we only
decrease codec->active in snd_soc_close(). Thus correct it.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch removed the redundant snd_soc_dai_digital_mute() in close() since
it's better to mute in hw_free() which's slightly earlier and symmetrical for
the case of reconfiguration: 'aplay 44k1.wav 48k.wav', for example, will be
open()->hw_params()->prepare(unmute)->playi1ng->hw_free(mute)->hw_params()->
parepare(unmute)->playing->hw_free(mute)->close()
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Now that there is a dmaengine driver for the jz4740 DMA core we can use the
generic dmaengine PCM driver. This allows us to remove the custom jz4740-pcm
code completely.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
According to WM8731 "PD, Rev 4.9 October 2012" datasheet, when it
works in DSP mode A, LRP = 1, while works in DSP mode B, LRP = 0.
So, fix LRP for DSP mode as the datesheet specification.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
Let the core take care of applying sample rate and sample bits constraints
instead of open-coding this in the driver.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Since we introduced symmetric_channels and symmetric_samplebits, we implement
these two features to fsl_ssi so as to drop some no-more-needed code and make
the driver neat and clean.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The normal mode of SSI allows it to send/receive data to/from the first
slot of each period. So we can use this normal mode to trick I2S signal
by puting/getting data to/from the first slot only (the left channel)
so as to support monaural audio playback and recording.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Support for loading the simple-card module via DeviceTree.
It requests CPU/CODEC information.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Unbalanced calls to imx_ssi_trigger() may result in endless
SSI activity and thus provoke eternal sound. While on the first glance,
the switch statement looks pretty symmetric, the SUSPEND/RESUME
pair is not: the suspend case comes along snd_pcm_suspend_all(),
which for fsl/imx-pcm-fiq is called only at snd_soc_suspend(),
but the resume case originates straight from the SNDRV_PCM_IOCTL_RESUME.
This way userland may provoke an unbalanced resume, which might cause
the ssi->enabled counter to increase and never return to zero again,
so eventually SSI_SCR_SSIEN is never disabled.
As the information on whether to enable the SSI or not is contained
in the two bits for TE/RE, we save all the software mirroring of
hardware state here and simply use the hardware register itself
to keep the state of whether someone is currently playing or capturing.
This is essentially the same stuff as in sound/soc/fsl/imx-pcm-fiq.c
which I send a patch for three days ago. Astonishing enough this
highly fragile scheme is used twice in parallel to serve the very
same control function, synchronously: Once out of sync you are lost
until reboot.
Note, that these fixes wont prevent state machine distortion on alsa
level to cut sound or the like. It just makes sure we have a chance
to synchronise again later on.
Signed-off-by: Oskar Schirmer <oskar@scara.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This moves us towards being able to remove the ASoC level I/O code which
duplicates regmap functionality. Currently the only difference between
the supported devices in the driver is the regmap so we can replace the
CODEC driver selections with regmap selection instead.
Signed-off-by: Mark Brown <broonie@linaro.org>
If there are symmetry constraints between the playback and the capture channel
set the SNDRV_PCM_INFO_JOINT_DUPLEX flag to let userspace know about this.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
For dmaengine drivers which do not support transfer residue reporting we update
the PCM pointer with period granularity. Set the SNDRV_PCM_INFO_BATCH flag in
this case to let userspace know about this.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
N810 audio driver has stopped working at some point. Probably when
OMAP2 was converted to common clock framework since now call to clk_enable
dumps the stack trace in drivers/clk/clk.c: __clk_enable() due
clk->prepare_count is zero.
Fix this by converting clk_enable/_disable calls to those that take care
of clock prepare/unprepare.
I'm not queueing this to linux-stable since OMAP2 common clock framework
conversion in commit ed1ebc4948 ("ARM: OMAP2: clock: Convert to common clk")
happened before N810 was really usable in mainline and user base for N810 is
anyway small. Potential linux-stable candidates are only those after
commit 3d3a6d18ab ("watchdog: introduce retu_wdt driver").
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
platform_set_drvdata(op, pdata) in pcm030_fabric_probe()
will be overwrited when calling snd_soc_register_card(card),
but cm030_fabric_remove() use drvdata as a type of struct
pcm030_audio_data, so we should move platform_set_drvdata()
below snd_soc_register_card() call.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
Originally snd_hrtimer_callback() used iprtd->period_time for
some jiffies based estimation to determine the right moment
to call snd_pcm_period_elapsed(). As timer drifts may well be a
problem, this was changed in commit b4e82b5b78 to be based
on buffer transmission progress, using iprtd->offset and
runtime->buffer_size to calculate the amount of data since last
period had elapsed.
Unfortunately, iprtd->offset counts in bytes, while
runtime->buffer_size counts frames, so adding these to find some
delta is like comparing apples and oranges, and eventually results
in negative delta values every now and then. This is no big harm,
because it simply causes snd_pcm_period_elapsed() being called
more often than necessary, as negative delta is taken for a
large unsigned value by implicit conversion rule.
Nonetheless, the calculation is broken, so one would replace
the runtime->buffer_size by its equivalent in bytes.
But then, there are chances snd_pcm_period_elapsed() is called
late, because calculating the moment for the elapsed period
into delta is based against the iprtd->last_offset, which is not
necessarily the first byte of the period in question, but some
random byte which the FIQ handler left us with in r8/r9 by
accident. Again, negative impact is low, as there are plenty of
periods already prefilled with data, and snd_pcm_period_elapsed()
will probably be called latest when the following period is
reached. However, the calculation is conceptually broken, and we
are best off removing the clever stuff altogether.
snd_pcm_period_elapsed() is now simply called once everytime
snd_hrtimer_callback() is run, which may not be most accurate,
but at least this way we are quite sure we dont miss an end of
period. There is not much extra effort wasted by superfluous
calls to snd_pcm_period_elapsed(), as the timer frequency
closely matches the period size anyway.
Signed-off-by: Oskar Schirmer <oskar@scara.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
No need to have a specific OOM message, since there is generic MM out of memory
message in place.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
snd_soc_bytes_put treats the data in the binary control as big endian
words, however snd_soc_bytes_get uses the endian of the host machine.
This causes the two functions to be inconsistant with how the mask is
applied on little endian machines.
This patch applies the big_endian format used in snd_soc_bytes_put to
snd_soc_bytes_get.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds Gen2 sound support for Renesas R-Car.
But, it is supporting PIO transfer only at this point
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Current rcar driver gen.c is using rcar_gen_ops
which was made with the assumption that
Gen1 and Gen2 need different behavior.
but it was not needed.
This patch removes unnecessary complex method.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
rsnd_gen_ops has .path_init/exit callback function
which cares SRU/SSI (if Gen1) SCU/SSIU/SSI (if Gen2)
path settings.
But, the differences between Gen1/Gen2 are cared
in ssi.c/scu.c, and the path itself is same in Gen1/Gen2.
This patch removes .path_init/exit callback.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Current rcar driver is supporting Gen1,
and Gen2 will be supported soon.
Then, some registers are used from Gen1 only,
or from Gen2 only.
To avoid NULL pointer access, this patch adds
register accessible check function.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The repmap initialization difference between Gen1/Gen2 is
only register offset.
This patch separates rsnd_gen1_regmap_init()
into common part and Gen1 specific part.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
When locating the memory region relating to a coefficient block written
through a bin file we keep processing the list of regions even after we
have found the region we require. This patch adds a break, so we don't
process redundant list items.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Makes the code slightly shorter.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
For many drivers using the generic dmaengine PCM driver one of the few (or the
only) things left to do in the drivers remove function is to unregister the PCM
device. This patch adds a resource managed version of snd_dmaengine_pcm_register()
which makes it possible to simplify the remove function as well as the error
path in the probe function for those drivers.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds device tree support for the CS42L52 Codec
Signed-off-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
MICA/B Single-Ended input selection depends on mica/b config so lets
make the mixer controls for them only show for selected mic's
Signed-off-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch reworks the MICA an MICB config for single-ended or
differential and the selection of which MIC for the single config
Signed-off-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
once code return from request_threaded_irq, irq was setup enabled by
default, but completion var dcs_done not got initialized yet, if then a
dcs done irq was raised, system will got hung as the sync mechanism is
invalid now.
so this patch move dcs done irq request to the end of initialization
of completion.
Signed-off-by: wang, biao <biao.wang@intel.com>
Signed-off-by: Zhang, Di <di.zhang@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Using the IS_ENABLED() macro can make the code shorter and simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>