This adds the NAND flash controller (NFC) peripherial. The driver
supports the SLC NAND chips found on Freescale's Vybrid Tower System
Module. The Micron NAND chip on the module needs 4-bit ECC per 512
byte page. Use 24-bit ECC per 2k page, which is supported by the
driver.
Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Based on i.MX6 Quad with 4GB of DDR3.
http://boundarydevices.com/product/nitrogen6max/
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the different touchscreens that can be connected using
the displays available for this board.
http://boundarydevices.com/product-category/displays/
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds support for the 7" LCD display available for Sabrelite:
http://boundarydevices.com/product/7-800x480-display/
Also add label to backlight_lcd and connect it to the panel.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds support for the 7" LCD display available for Nitrogen6x:
http://boundarydevices.com/product/7-800x480-display/
Also add label to backlight_lcd and connect it to the panel.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add device tree node for touchscreen support on Colibri VF50. The
touchscreen functionality on VF50 uses the ADC channels of Vybrid
and some GPIOs. Also add pinctrl nodes for proper pinmux.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change corrects cpu compatible property to a defined one,
see Documentation/devicetree/bindings/arm/cpus.txt
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change corrects cpu compatible property to a defined one,
see Documentation/devicetree/bindings/arm/cpus.txt
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add device tree node to support iomuxc-lpsr controller, fsl,input-sel
phandle allows to get input select register base address which is
shared from main iomuxc controller.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The INA220 monitors both shunt drop and supply voltage.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds dma-coherent property for eTSEC nodes, so
coherent DMA operations are supported.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for USBOTG1 and USBOTG2.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add imx6ul touchscreen controller support.
TSC module need ADC2 module to measure the touchscreen
coordinate value. This patch put TSC and ADC2 together,
make ADC2 module only be used for TSC, can't be used as
a normal ADC.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The DCP block present on MX6SL is compatible with the one on MX28,
so add the compatible string and also complete the interrupt entries.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Starting with commit 8947e396a8 ("Documentation: dt: mtd: replace
"nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor"
binding indicating support for JEDEC identification.
Use it for all flashes that are supposed to support READ ID op according
to the datasheets.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch enables On Chip OTP support for i.MX23 and i.MX28 SoCs,
but keeps the old compatible string.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx7d-sdb board has a eMMC5.0 on usdhc3. This eMMC support HS400.
This patch add usdhc3 support for HS400
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Acked-by: Dong Aisheng <aisheng.dong@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6UL can be powered off by programming SNVS.
When long press ON/OFF button(5 seconds),
PMIC_ON_REQ pin will be set to low and external
PMIC will be powered off.
And system can be powered on by long press ON/OFF
button again.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add SRAM support for i.MX6UL, it has 128KB ocram
starting from 0x900000.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Sinovoip BPI-M2 is a SBC board based on the A31s SoC it features
1G RAM, a microsd slot, Gbit ethernet, 4 usb-a USB-2 ports, ir receiver,
stereo headphone jack and hdmi video output.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a pinmux setting for using mmc2 in regular 4 bit mode.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
When the gpio interrupt bindings where changed to add a bank to the
specifier list, the r_pio nodes of A23/A31/A33 where not updated to
match and neither was the pio node of the A80, this fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
With omap5-board-common.dtsi, we can now easily add support for various omap5
board variants. Let's add minimal support for isee igepv5.
So far I've tested that basic things work, such as serial, USB Ethernet, HDMI
and WLAN.
Note that like omap5-uevm, these boards seem to need to reserve 16MB for a
trap section as in commit 03178c66d2 ("ARM: dts: omap5-evm: Update
available memory to 2032 MB") and also noted in a u-boot commit at
http://marc.info/?l=u-boot&m=134376852603255 and also at
http://patchwork.ozlabs.org/patch/159881/.
Not sure why this is not needed for omap5-cm-t54.dts, maybe because of
different u-boot configuration.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like thevarious omap5-uevm models and igepv5 are very similar. So let's
create omap5-board-common.dtsi to allow fixing up things properly for mainline
kernel to support all these.
Even if we eventually end up having only PMIC + MMC + eMMC + SDIO WLAN + SATA +
USB + HDMI configuration in the omap5-board-common.dtsi, this is the easiest
way to add support for other boards rather than diffing various versions of
out of tree dts files.
My guess is that also omap5-sbc-t54.dts can use this, but I don't have that
board so that will need to be dealt with later on.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 99f84cae43 ("ARM: dts: add wl12xx/wl18xx bindings") added
device tree bindings for the TI WLAN SDIO on many omap variants.
I recall wondering how come omap5-uevm did not have the WLAN
added and this issue has been bugging me for a while now, and
I finally tracked it down to a bad pinmux regression, and a missing
deferred probe handling for the 32k clock from palmas that's
requested by twl6040.
Basically 392adaf796 ("ARM: dts: omap5-evm: Add mcspi data")
added pin muxing for mcspi4 that conflicts with the onboard
WLAN. While some omap5-uevm don't have WLAN populated, the
pins are not reused for other devices. And as the SDIO bus
should be probed, let's try to enable WLAN by default.
Let's fix the regression and add the WLAN configuration as
done for the other boards in 99f84cae43 ("ARM: dts: add
wl12xx/wl18xx bindings"). And let's use the new MMC pwrseq for
the 32k clock as suggested by Javier Martinez Canillas
<javier@dowhile0.org>.
Note that without a related deferred probe fix for twl6040,
the 32k clock is not initialized if palmas-clk is a module
and twl6040 is built-in.
Let's also use the generic "non-removable" instead of the
legacy "ti,non-removable" property while at it.
And finally, note that omap5 seems to require WAKEUP_EN for
the WLAN GPIO interrupt.
Fixes: 392adaf796 ("ARM: dts: omap5-evm: Add mcspi data")
Cc: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The newest revisions of A388-GP (v1.5 and higher) support only
DAT3-based card detection. Revisions < v1.5 based on GPIO detection
via I2C expander, but this solution is supposed to be deprecated on
new boards. In order to satisfy all type of hardware this commit
changes card detection to use software polling mechanism. Also a
comment is added on possible card detection options in A388-GP
DT board file.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The sorting policy for this file is alphabetically.
Reorder all nodes, that are out of place.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The NMI interrupt controller is in charge of the NMI pin exposed by
the SoC to the PMIC. The PMIC signals interrupts through this.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add FPGA manager to device tree for SoCFPGA.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* Implement id_table driver matching in SMD
* Avoid NULL pointer exception on remove of SMEM
* Reorder SMEM/SMD configs
* Make qcom_smem_get() return a pointer
* Handle big endian CPUs correctly in SMEM
* Represent SMD channel layout in structures
* Use __iowrite32_copy() in SMD
* Remove use of VLAIs in SMD
* Handle big endian CPUs correctly in SMD/RPM
* Handle big endian CPUs corretly in SMD
* Reject sending SMD packets that are too large
* Fix endianness issue in SCM __qcom_scm_is_call_available
* Add missing prototype for qcom_scm_is_available()
* Correct SMEM items for upper channels
* Use architecture level to build SCM correctly
* Delete unneeded of_node_put in SMD
* Correct active/slep state flagging in SMD/RPM
* Move RPM message ram out of SMEM DT node
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Merge tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/drivers
Pull "Qualcomm ARM Based SoC Updates for 4.4" from Andy Gross:
* Implement id_table driver matching in SMD
* Avoid NULL pointer exception on remove of SMEM
* Reorder SMEM/SMD configs
* Make qcom_smem_get() return a pointer
* Handle big endian CPUs correctly in SMEM
* Represent SMD channel layout in structures
* Use __iowrite32_copy() in SMD
* Remove use of VLAIs in SMD
* Handle big endian CPUs correctly in SMD/RPM
* Handle big endian CPUs corretly in SMD
* Reject sending SMD packets that are too large
* Fix endianness issue in SCM __qcom_scm_is_call_available
* Add missing prototype for qcom_scm_is_available()
* Correct SMEM items for upper channels
* Use architecture level to build SCM correctly
* Delete unneeded of_node_put in SMD
* Correct active/slep state flagging in SMD/RPM
* Move RPM message ram out of SMEM DT node
* tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
soc: qcom: smem: Move RPM message ram out of smem DT node
soc: qcom: smd-rpm: Correct the active vs sleep state flagging
soc: qcom: smd: delete unneeded of_node_put
firmware: qcom-scm: build for correct architecture level
soc: qcom: smd: Correct SMEM items for upper channels
qcom-scm: add missing prototype for qcom_scm_is_available()
qcom-scm: fix endianess issue in __qcom_scm_is_call_available
soc: qcom: smd: Reject send of too big packets
soc: qcom: smd: Handle big endian CPUs
soc: qcom: smd_rpm: Handle big endian CPUs
soc: qcom: smd: Remove use of VLAIS
soc: qcom: smd: Use __iowrite32_copy() instead of open-coding it
soc: qcom: smd: Represent channel layout in structures
soc: qcom: smem: Handle big endian CPUs
soc: qcom: Make qcom_smem_get() return a pointer
soc: qcom: Reorder SMEM/SMD configs
soc: qcom: smem: Avoid NULL pointer exception on remove
soc: qcom: smd: Implement id_table driver matching
- DCAN sleep pins for am437x-gp-evm
- A series of changes to add audio support for dra7
- Add support for gpio keys and LEDs on dra7
- Regulator clean-up for am335x-wega
- A series of changes to enable IOMMUs and mailboxes for dra7
accelerators
- Add support for am335x-bonegreen
- Fix up GPIO flags where 0 was used instead of GPIO_ACTIVE_HIGH
- Fix omap3-lilly-am33x IRQ level flag
- Remove duplicate uart2 pinmux for igep and fix indentation and
update igep to use pinctrl macros for the register offsets
- Fix MMC cd-gpios usage
Note that this branch is against v4.3-rc4 as that contains critical
MMC related fixes to boot with MMC working on most omaps.
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Merge tag 'omap-for-v4.4/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "Device tree changes for omaps for v4.4 merge window:" from Tony Lindgren:
- DCAN sleep pins for am437x-gp-evm
- A series of changes to add audio support for dra7
- Add support for gpio keys and LEDs on dra7
- Regulator clean-up for am335x-wega
- A series of changes to enable IOMMUs and mailboxes for dra7
accelerators
- Add support for am335x-bonegreen
- Fix up GPIO flags where 0 was used instead of GPIO_ACTIVE_HIGH
- Fix omap3-lilly-am33x IRQ level flag
- Remove duplicate uart2 pinmux for igep and fix indentation and
update igep to use pinctrl macros for the register offsets
- Fix MMC cd-gpios usage
Note that this branch is against v4.3-rc4 as that contains critical
MMC related fixes to boot with MMC working on most omaps.
* tag 'omap-for-v4.4/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (33 commits)
ARM: dts: omap3-igep: Use OMAP3_CORE1_IOPAD pinmux macro
ARM: dts: dra7xx: am57xx: fix cd-gpios definition as per hardware design and dt binding docs
ARM: dts: am43xx: fix cd-gpios definition as per hardware design and dt binding docs
ARM: dts: am335x: fix cd-gpios definition as per hardware design and dt binding docs
ARM: dts: omap3-igep0020: Remove duplicate uart2 pinmux
ARM: dts: omap3-igep: Fix indentation
ARM: dts: omap3-lilly-a83x: Don't use IRQ level flag for a GPIO
ARM: dts: DRA74x: Add IOMMU nodes for DSP2
ARM: dts: DRA7: Add common IOMMU nodes
ARM: dts: DRA74x: Add dsp2_system syscon node
ARM: dts: DRA7: Add dsp1_system syscon node
ARM: dts: Use defined GPIO constants in flags cell for OMAP2+ boards
ARM: dts: Add am335x-bonegreen
ARM: dts: beagle-x15: Enable the system mailboxes 5 and 6
ARM: dts: dra72-evm: Enable the system mailboxes 5 and 6
ARM: dts: dra7-evm: Enable the system mailboxes 5 and 6
ARM: dts: DRA72x: Add IPC sub-mailbox nodes for IPU1, IPU2 & DSP1
ARM: dts: DRA74x: Add IPC sub-mailbox nodes for all IPUs & DSPs
ARM: dts: am335x-wega: Clean up regulators
ARM: dts: dra7-evm: add gpio key support
...
While the addition of these properties is technically correct it unveils
a bug with deferred probe. The problem is that the presence of the gpio-
range property causes the gpio-tegra driver to defer probe (it needs the
pinctrl driver to be ready). That's technically correct, but it causes a
couple of issues:
- The keyboard on Chromebooks stops working. The reason for that is
that the gpio-tegra device has not registered an IRQ domain by the
time the EC SPI device is registered, hence the interrupt number
resolves to 0. This is technically a bug in the SPI core, since it
should really resolve the interrupt at probe time and defer if the
IRQ domain isn't available yet. This is similar to what's done for
I2C and platform device already.
- The gpio-tegra device deferring probe means that it is moved to the
end of the dpm_list. This list defines the suspend/resume order for
devices. However the core lacks a way to move all users of the
gpio-tegra device to the end of the dpm_list at the same time. This
in turn results in a subtle bug on Jetson TK1, where the gpio-keys
device is used to expose the power key as input. The power key is a
convenient way to wake the system from suspend. Interestingly, the
gpio-keys device ends up getting probed at a point after gpio-tegra
has been probed successfully from having been deferred earlier. As
such the driver doesn't need to defer the probe itself, and hence
the device isn't moved to the end of the dpm_list. This causes the
gpio-tegra device to be suspended before gpio-keys, which in turn
leaves gpio-keys unable to wake the system from suspend.
There are patches in the works to fix both of the above issues, but they
are too involved to make it into v4.3, so in the meantime let's fix the
regressions by commenting out the gpio-ranges properties until the fixes
have landed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Enable the following on the porter board:
I2C2, PCI, PCIe, QSPI, SATA0, SDHI0/2, USB PHY and VIN0/ADV7180.
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Merge tag 'renesas-dt2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.4" from Simon Horman:
* Enable the following on the porter board:
I2C2, PCI, PCIe, QSPI, SATA0, SDHI0/2, USB PHY and VIN0/ADV7180.
* tag 'renesas-dt2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: porter: enable internal PCI and USB PHY
ARM: shmobile: porter: enable PCIe
ARM: shmobile: porter: add QSPI DT support
ARM: shmobile: porter: add VIN0/ADV7180 DT support
ARM: shmobile: porter: add I2C2 DT support
ARM: shmobile: porter: enable SATA0
ARM: shmobile: porter: add SDHI0/2 DT support
In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces
0x00000000 - 0x0fffffff
0x40000000 - 0x4fffffff
are both mapped to the external bus (also called system bus),
so either was OK.
In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is
assigned for the serial NOR interface.
For the consistency, use the latter for all the SoCs.
Also, fix the range properties to reflect the real address mapping,
where the support card is located at the offset address 0x01f00000
of CS1 of the external bus.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Regulator fix for beagle-x15 to fix HDMI without a SD card being
inserted
- GPMC fix for showing proper timings and to allow enabling debug
options that somehow was unselectable earlier
- Add minimal documentation for new MMC1 dependency on
REGULATOR_PBIAS as it may not be obvious for people with
targeted .config files
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Merge tag 'omap-for-v4.3/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "Fixes for omap against v4.3-rc5" from Tony Lindgren:
- Regulator fix for beagle-x15 to fix HDMI without a SD card being
inserted
- GPMC fix for showing proper timings and to allow enabling debug
options that somehow was unselectable earlier
- Add minimal documentation for new MMC1 dependency on
REGULATOR_PBIAS as it may not be obvious for people with
targeted .config files
* tag 'omap-for-v4.3/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Documentation: ARM: List new omap MMC requirements
memory: omap-gpmc: dump "before" state before first modification
memory: omap-gpmc: Fix unselectable debug option for GPMC
ARM: dts: am57xx-beagle-x15: set VDD_SD to always-on
The IRQ signal from external devices on this board is connected to
the XIRQ4 pin of the SoC. The IRQ number should be 52, not 50.
Fixes: a5e921b477 ("ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add support for new PLL-type for stih418 A9-PLL.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The B2199 board is mounted with Realtek RTL8367 switch.
We consider the bootloader will have intiliazed the switch before jumping into
the kernel, so we declare it as a fixed link.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
These boards are mounted with Realtek RTL8367 switch.
We consider the bootloader will have intiliazed the switch before jumping into
the kernel, so we declare it as a fixed link.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This commit enables standby support on Armada 385 DB-AP board, because
the PM initalization routine requires "marvell,armada380" compatible
string for all Armada 38x-based platforms.
Beside the compatible "marvell,armada38x" was wrong and should be fixed
in the stable kernels too.
[gregory.clement@free-electrons.com: add information, about the fixes]
Fixes: e5ee12817e ("ARM: mvebu: Add Armada 385 Access Point
Development Board support")
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: <stable@vger.kernel.org>
This patch adds a label for uart0 to allow changing of uart0 pins.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
The DTS erronously uses the wrong reg mapping and IRQ numbers for some
UART, WDT and timer nodes. Fix this.
Reported-by: John Wehle <john@feith.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SMEM is a software construct built on top of a DDR reserved region
and sometimes a device memory region called RPM message ram. Having
the RPM message ram in the smem DT node's reg property leads to the
smem node being located in different places depending on if the
message ram is being used or not. Let's add a qcom specific
property, qcom,rpm-msg-ram, and point to the device memory from
the SMEM node via a phandle. As SMEM is a software construct, it
really needs to reside at the root of the DT regardless of whether
it's using the message ram or not.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Use the macro instead of absolute register offsets to make the code more
readable as the values now match register addresses from the datasheet.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- New board support
: add exynos5250-snow-rev5 DT file to support Snow Rev5+ board
: add exynos5422-odroidxu4 DT file to support Odroid XU4 board
: split exynos5422-odroidxu3-audio DT file from odroidxu3-common
- USE GPIO constants for flags cells for exynos boards
- fix cpu compatible value to 'arm926ej-s' for s3c2416
- add DMA support for serial ports for exynos4
- add suspend opp for exynos4412
- remove regulator-compatible usage for exynos4412-trats2
- enable EC vboot context support for Peach boards
- move display-timings node to DP for exynos5250-arndale, smdk5250 and smdk5420
- for exynos4412-odroid/odroidu3
: unify voltage regulator style and
: remove redundant pinctrl settings
: add pwm-fan node and use it as a colling device
- for exynos5422-odroidxu3
: fix power off method and LEDs
- dt-bindings
: grounded AC0KB pin on S2MPS11
: entry how to use PWM FAN as a cooling device
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Merge tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung DT updates for v4.4" from Kukjin Kim:
- New board support
: add exynos5250-snow-rev5 DT file to support Snow Rev5+ board
: add exynos5422-odroidxu4 DT file to support Odroid XU4 board
: split exynos5422-odroidxu3-audio DT file from odroidxu3-common
- USE GPIO constants for flags cells for exynos boards
- fix cpu compatible value to 'arm926ej-s' for s3c2416
- add DMA support for serial ports for exynos4
- add suspend opp for exynos4412
- remove regulator-compatible usage for exynos4412-trats2
- enable EC vboot context support for Peach boards
- move display-timings node to DP for exynos5250-arndale, smdk5250 and smdk5420
- for exynos4412-odroid/odroidu3
: unify voltage regulator style and
: remove redundant pinctrl settings
: add pwm-fan node and use it as a colling device
- for exynos5422-odroidxu3
: fix power off method and LEDs
- dt-bindings
: grounded AC0KB pin on S2MPS11
: entry how to use PWM FAN as a cooling device
* tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (22 commits)
ARM: dts: Use GPIO constants for flags cells in exynos5440 boards
ARM: dts: Use GPIO constants for flags cells in exynos5420/5422/5800 boards
ARM: dts: Use GPIO constants for flags cells in exynos4412 boards
ARM: dts: Use GPIO constants for flags cells in exynos4120 boards
ARM: dts: Use GPIO constants for flags cells in exynos3250 boards
ARM: dts: Enable EC vboot context support on Peach boards
ARM: dts: Remove regulator-compatible usage in exynos4412-trats2
ARM: dts: Move display-timings node from fimd to dp in exynos5250-arndale, smdk5250 and smdk5420
ARM: dts: Add Exynos5250 Snow Rev5+ support on exynos5250-snow-rev5
ARM: dts: Unify voltage regulator style in exynos4412-odroid
ARM: dts: Remove redundant pinctrl settings in exynos4412-odroid
ARM: dts: Fix cpu compatible value for s3c2416
ARM: dts: Add support Odroid XU4 board for exynos5422-odroidxu4
ARM: dts: Split audio configuration to separate exynos5422-odroidxu3-audio
ARM: dts: Fix power off method for exynos5422-odroidxu3-common
dt-bindings: Document grounded ACOKB pin on S2MPS11
ARM: dts: use pwm-fan device as a cooling device for exynos4412-odroidu3
ARM: dts: Add pwm-fan node for exynos4412-odroidu3
dt-bindings: Documentation entry to explain how to use PWM FAN as a cooling device
ARM: dts: add suspend opp to exynos4412
...
The DTS erronously uses the wrong reg mapping and IRQ numbers for some
UART, WDT and timer nodes. Fix this.
Reported-by: John Wehle <john@feith.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
DT patches for the 4.4 merge window, most notably:
- Enable the OTG controller on more boards
- Create new DTSI for the q8's design
- Added RSB support to the A23 and A33 SoCs
- New boards: Olimex A20 EVB, Yones bs1078v2
Plus the usual random patches enabling and / or enhancing a few things in
particular boards.
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Merge tag 'sunxi-dt-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT changes for 4.4" from Maxime Ripard:
DT patches for the 4.4 merge window, most notably:
- Enable the OTG controller on more boards
- Create new DTSI for the q8's design
- Added RSB support to the A23 and A33 SoCs
- New boards: Olimex A20 EVB, Yones bs1078v2
Plus the usual random patches enabling and / or enhancing a few things in
particular boards.
* tag 'sunxi-dt-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (59 commits)
ARM: dts: sun6i: hummingbird: Drop AXP221 DC1SW and DC5LDO supplies
ARM: dts: sun8i: sinlinx-sina33: Enable Reduced Serial Bus controller
ARM: dts: sun8i: q8-common: Enable RSB controller for A23/A33 Q8 tablets
ARM: dts: sun8i: Add Reduced Serial Bus controller device node to A23/A33 dtsi
ARM: dts: sun4i: Add AXP209 PMU regulators for pcDuino1/2
ARM: sun7i: dt: Add new Olimex A20 EVB device
ARM: dts: sun6i: hummingbird: Add aliases for rtc devices
ARM: dts: sun7i: Add dts file for Wits Pro A20 DKT
ARM: dts: sun7i: Enable USB DRC on Wexler TAB7200
ARM: dts: sun7i: Enable USB DRC on the Orange pi
ARM: dts: sun7i: Enable USB DRC on orangepi-mini
ARM: dts: axp209: Add usb_power_supply child node to the ax209 node
ARM: dts: sun8i: Make ippo-q8h-v1.2.dts a symlink to q8-tablet.dts
ARM: dts: sun8i: Add sun8i-a33-q8-tablet.dts file
ARM: dts: sun6i: Add support for Yones Toptech bs1078v2 tablets
ARM: dts: sun4i: Enable USB DRC on the Marsboard A10
ARM: dts: sun4i: gemei-g9: Add accelerometer (bma250) IRQ
ARM: dts: sun8i-a33: Add security system crypto engine clock and device nodes
ARM: dts: sun8i: Add pwm-backlight device for A23/A33 Q8 format tablets
ARM: sun8i: A23: Add missing msgbox gate
...
- use serial aliases and stdout path
- add cpufreq properties to all SoCs
- add pwm nodes for all SoCs
This depends on topic branch berlin-cpuclk-for-4.4-1
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Merge tag 'berlin-dt-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "Marvell Berlin DT for 4.4 take 1" from Sebastian Hesselbarth:
- use serial aliases and stdout path
- add cpufreq properties to all SoCs
- add pwm nodes for all SoCs
This depends on topic branch berlin-cpuclk-for-4.4-1
* tag 'berlin-dt-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: berlin: add a PWM node on the BG2CD
ARM: berlin: add a PWM node on the BG2
ARM: berlin: add a PWM node on the BG2Q
ARM: berlin: dts: add the cpufreq-dt bindings on the BG2CD
ARM: berlin: dts: add the cpufreq-dt bindings on the BG2
ARM: berlin: dts: add the cpufreq-dt bindings on the BG2Q
arm: dts: berlin: use stdout-path
arm: dts: berlin: add aliases for serial
Update dts to use the new crypto driver on mvebu SoCs
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Merge tag 'mvebu-dt-4.4-1' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt for 4.4 (part 1)" from Gregory CLEMENT:
Update dts to use the new crypto driver on mvebu SoCs
* tag 'mvebu-dt-4.4-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: modify Orion and Kirkwoord crypto compatible strings
ARM: mvebu: use new bindings for existing crypto devices
ARM: mvebu: define crypto SRAM ranges for all armada-38x boards
ARM: mvebu: add crypto related nodes to armada 38x dtsi
ARM: mvebu: define crypto SRAM ranges in armada-375-db.dts
ARM: mvebu: add crypto related nodes to armada 375 dtsi
ARM: mvebu: define crypto SRAM ranges for all armada-370 boards
ARM: mvebu: add crypto related nodes to armada 370 dtsi
ARM: mvebu: define crypto SRAM ranges for all armada-xp boards
ARM: mvebu: add crypto related nodes to armada-xp.dtsi
ARM: mvebu: add CPU config registers in the Armada 370/XP Device Tree
It includes a single fix for i.MX7D, which corrects the base address of
UART2 in device tree.
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Merge tag 'imx-fixes-4.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Pull "The i.MX fixes for 4.3, 2nd round:" from Shawn Guo:
It includes a single fix for i.MX7D, which corrects the base address of
UART2 in device tree.
* tag 'imx-fixes-4.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx7d: Fix UART2 base address
- BG2Q USB PHY compatible fix (also tagged for stable v4.2)
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Merge tag 'berlin-fixes-for-4.3-1' of git://git.infradead.org/users/hesselba/linux-berlin into fixes
Merge "Marvell Berlin fixes for v4.3 take 1" from Sebastian Hesselbarth:
- BG2Q USB PHY compatible fix (also tagged for stable v4.2)
* tag 'berlin-fixes-for-4.3-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: dts: berlin: change BG2Q's USB PHY compatible
New bindings and driver have been created for STM32 series parts. This
patch integrates this changes.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Replace "disable" by "disabled" in the Qualcomm MSM8974 dtsi
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
clock controller nodes which also support power domains (gdscs') need
to have a #power-domain-cells property. Add these for gcc and mmcc
nodes of msm8974, gcc of apq8084 and msm8916.
Also update gcc and mmcc bindings for it.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds notify led support on IFC6410, whose trigger can be
configured from userspace.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Add pwrseq support to sdcc4 which would enable a proper reset of WLAN
without ugly hacks in the board support file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds pwrseq for WLAN which resets the WLAN just before the
SDIO bus is up.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
CM-QS600.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds missing gsbi7 uart pinctrl, this is the default debug
uart on most boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Usage of generic names like "uart_pins" is confusing to the reader, given
the fact that there could be more than one uart on APQ8064.
This patch adds gsbi prefix to uart pinctrl nodes so as to avoid such
confusion.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds support to pm8921 power button.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds rtc node for pmic8921.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch removes unnecessary eeprom label, which is not used
anywhere in the board file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch removes unnecessary eeprom label, which is not used
anywhere in the board file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch removes i2c pinctrl properties from board which which are now
mentioned in the SOC specific file. This will avoid redundant properties
across multiple board fiiles.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This doesn't match the binding, and the driver doesn't look to
be using it. Remove the extra element.
CC: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Add low priority accumulator channel that can monitor multiple QMSS
queues. User for example could use the accumular queue for Netcp
Rx completion. While at it, also add an extra line end of each top
level node in DTS to make it more readable.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The DC5LDO regulator supplies VDD-CPUS, which is for the embedded
controller in the A31 SoC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have axp22x.dtsi describing common axp22x hardware, use
it and reference the nodes instead of declaring the whole tree.
Also drop the "always-on" from the vdd-gpu regulator, since we don't
support the GPU anyway.
And add a regulator reference for cpu0.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The power configuration on this board is the same as the pcDuino v3.
This will enable frequency/voltage scaling over the standard A20
operating points from 144 MHz to 960 MHz.
Tested using cpufreq-ljt-stress-test on two pcDuino v3 Nano boards; also
tested successfully with voltages reduced by 0.025 V.
Signed-off-by: Adam Sampson <ats@offog.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
We've everything we need to support the gmac on Colombus, turn it on.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A33 Q8 tablets with the et-q8-v1.6 pcb will work fine with the
generic q8-tablet.dts and given the many variants of PCBs found in
Q8 tablets using such a specific dts name was a mistake in hindsight.
We cannot just drop the et-q8-v1.6.dtb as existing u-boot configs
may very well point to it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A23 Q8 tablets with the ippo-q8h-v* pcb will work fine with the
generic q8-tablet.dts and given the many variants of PCBs found in
Q8 tablets using such a specific dts name was a mistake in hindsight.
We cannot just drop the ippo-q8h-v*.dtb as existing u-boot configs
may very well point to it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This is a generic dts file for A23 based q8 formfactor tablets,
this is intended to replace both sun8i-a23-ippo-q8h-v5.dts and
sun8i-a23-ippo-q8h-v1.2.dts (these can be fully dropped after a
transition period).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This enables the SPDIF optical audio output on the Radxa Rock
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached
to them and also enable USB PHY device for the Porter board. We have to
enable everything in one patch since EHCI/OHCI devices are already linked
to the USB PHY device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In DRA74x, DRA72x and AM57xx EVMs the card detect gpio is
designed as active low gpio. So correcting the dt card detect
gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In AM43xx the card detect gpio is designed as active low gpio.
So correcting the dt card detect gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In AM335x the card detect gpio is designed as active low gpio.
So correcting the dt card detect gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
uart2 pinmux is already defined in omap3-igep0020-common.dtsi, remove
the duplicate node.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use tabs instead of spaces for indentation.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The card detect GPIO is using IRQ_TYPE_LEVEL_LOW in the GPIO flag cells
but this defined constant is meant to be used for a IRQ and not a GPIO.
So instead use GPIO_ACTIVE_LOW that seems to be the original intention.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
LDO1 regulator (VDD_SD) is connected to SoC's vddshv8. vddshv8 needs to
be kept always powered (see commit 5a0f93c657 ("ARM: dts: Add
am57xx-beagle-x15"), but at the moment VDD_SD is enabled/disabled
depending on whether an SD card is inserted or not.
This patch sets LDO1 regulator to always-on.
This patch has a side effect of fixing another issue, HDMI DDC not
working when SD card is not inserted:
Why this happens is that the tpd12s015 (HDMI level shifter/ESD
protection chip) has LS_OE GPIO input, which needs to be enabled for the
HDMI DDC to work. LS_OE comes from gpio6_28. The pin that provides
gpio6_28 is powered by vddshv8, and vddshv8 comes from VDD_SD.
So when SD card is not inserted, VDD_SD is disabled, and LS_OE stays
off.
The proper fix for the HDMI DDC issue would be to maybe have the pinctrl
framework manage the pin specific power.
Apparently this fixes also a third issue (copy paste from Kishon's
patch):
ldo1_reg in addition to being connected to the io lines is also
connected to the card detect line. On card removal, omap_hsmmc
driver does a regulator_disable causing card detect line to be
pulled down. This raises a card insertion interrupt and once the
MMC core detects there is no card inserted, it does a
regulator disable which again raises a card insertion interrupt.
This happens in a loop causing infinite MMC interrupts.
Fixes: 5a0f93c657 ("ARM: dts: Add am57xx-beagle-x15")
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reported-by: Louis McCarthy <compeoree@gmail.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DRA74x family of SoCs have a second DSP, that also has
two MMUs just like the DSP1 subsystem. Add the IOMMU nodes
for this DSP2 subsystem in disabled state to the DRA74x
specific DTS file, the nodes would need to be enabled
appropriately in the respective board DTS files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DRA7xx family of SOCs have two IPUs and one DSP processor
subsystems in common. The IOMMU DT nodes have been added for
these processor subsystems, and have been disabled by default.
These MMUs are very similar to those on OMAP4 and OMAP5, with
the only difference being the presence of a second MMU within
the DSP subsystem for the EDMA port. The DSP IOMMUs also need
an additional 'ti,syscon-mmuconfig' property compared to the
IPU IOMMUs.
NOTE: The enabling of these nodes is left to the respective
board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DSP_SYSTEM sub-module is a dedicated system control logic
module present within a DRA7 DSP processor sub-system. This
module is responsible for power management, clock generation
and connection to the device PRCM module.
Add a syscon node for this module for the DSP2 processor
sub-system. This is added as a syscon node as it is a common
configuration module that can be used by the different IOMMU
instances and the corresponding remoteproc device.
The node is added to the dra74x.dtsi file, as the DSP2 processor
subsystem is usually present only on the DRA74x variants of the
DRA7 SoC family.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DSP_SYSTEM sub-module is a dedicated system control logic
module present within a DRA7 DSP processor sub-system. This
module is responsible for power management, clock generation
and connection to the device PRCM module.
Add a syscon node for this module for the DSP1 processor
sub-system. This is added as a syscon node as it is a common
configuration module that can be used by the different IOMMU
instances and the corresponding remoteproc device.
The node is added to the common dra7.dtsi file, as the DSP1
processor sub-system is mostly common across all the variants
of the DRA7 SoC family.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Many OMAP2+ DTS are not using the defined constants to express
the GPIO polarity. Replace these so the DTS are easier to read.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
SeeedStudio BeagleBone Green (BBG) is clone of the BeagleBone Black (BBB) minus
the HDMI port and addition of two Grove connectors (i2c2 and usart2).
This board can be identified by the 1A value after A335BNLT (BBB) in the at24 eeprom:
1A: [aa 55 33 ee 41 33 33 35 42 4e 4c 54 1a 00 00 00 |.U3.A335BNLT....|]
http://beagleboard.org/greenhttp://www.seeedstudio.com/wiki/Beaglebone_green
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tony Lindgren <tony@atomide.com>
CC: Jason Kridner <jkridner@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding child
sub-mailbox (IPC 3.x) nodes for the Beagle X15 EVM boards. This
is needed to enable communication with the respective remote
processors IPU1, IPU2, DSP1 and DSP2 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding
child sub-mailbox (IPC 3.x) nodes for the DRA72 EVM board.
This is needed to enable communication with the respective
remote processors IPU1, IPU2, and DSP1 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding
child sub-mailbox (IPC 3.x) nodes for the DRA7 EVM board.
This is needed to enable communication with the respective
remote processors IPU1, IPU2, DSP1 and DSP2 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the sub-mailbox nodes that are used to communicate between
MPU and the remote processors IPU1, IPU2 and DSP1. These match the
respective node definitions on DRA74x to maintain compatibility for
the equivalent remote processors. There is no DSP2 on DRA72x, and
so the corresponding sub-mailbox node is not added.
These sub-mailbox nodes are added to match the hard-coded mailbox
configuration used within the TI IPC 3.x software package. The
Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to
be running in SMP-mode, and hence only a single sub-mailbox node
is added for each.
All these sub-mailbox nodes are left in disabled state, and should
be enabled (and modified if needed) as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the sub-mailbox nodes that are used to communicate between
MPU and the remote processors IPU1, IPU2, DSP1 and DSP2.
The sub-mailbox nodes utilize the System Mailbox instances 5 and 6.
These sub-mailbox nodes are added to match the hard-coded mailbox
configuration used within the TI IPC 3.x software package. The
Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to
be running in SMP-mode, and hence only a single sub-mailbox node
is added for each.
All these sub-mailbox nodes are left in disabled state, and should
be enabled (and modified if needed) as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cleaned up the regulators on the wega board. Created a simple bus,
renamed the regulators according to the schematics and added missing
regulator on wega.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dra7-evm has 2 gpio keys wired through TS_LCD_GPIO3, TS_LCD_GPIO4
which in turn connected to PCF8575 GPIO pcf_lcd: gpio@20 expander
pins 2 and 3.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dra7-evm has 4 user gpio leds connected to PCF8575 GPIO pcf_lcd:
gpio@20 expander pins [4,5,6,7], so add corresponding DT nodes.
Do not enable any triggers by default as not all of them are proved
to work on -RT.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds DT definition for CF8575 GPIO pcf_lcd: gpio@20
expander which is connected to i2c bus 1 and has slave address 0x20.
It allows to control:
- tc_lcd gpios, pins p0-p3
- user leds, pins p4-p7
- control LCD panel power, p15
PCF8575 GPIO pcf_lcd: gpio@20 expander supports interrupt controller
functionality and its INT line is connected to dra7 GPIO6.11 pin.
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The analog audio setup consists of:
McASP3 <-> tlv320aic3104 codec
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DVDD is supplied via TPS77018DBVT fixed regulator from vdd_3v3
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses tlv320aic3106 codec connected to McASP3. The master clock
for the codec and McASP3 is coming from ATL2.
McASP3 is the master on the I2S bus.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The GPIO expander's p1 on i2c5 bus 0x26 address is used for selecting
between audio and VIN6 functionality. For VIN6 use an add on card is
needed while audio is present on the board itself.
Select the audio functionality over the VIN6 in the dts file.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DVDD is supplied via TPS77018DBVT fixed regulator from evm_3v3
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses tlv320aic3106 codec connected to McASP3. The master clock
for the codec and McASP3 is coming from ATL2.
McASP3 is the master on the I2S bus.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This GPIO expander is used for controlling various muxes on the board.
By default select audio functionality over VIN6 by setting the P1
(vin6_sel_s0) pin to low.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
TPS77018DBVT is used to create 1.8V from avm_3v3_sw's 3.3V connected to
aic3106's DVDD.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the name for the supply as it is in the schematics since the same
supply is used for other peripherals than MMC2, like audio.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add arch timer node to enable arch-timer support. MT8127 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add arch timer node to enable arch-timer support. MT8135 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This cosmetic patch reorder nodes under internal-regs by increasing
address order, as expected.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
By default, armada-370-xp.dtsi file has internal RTC enabled.
NETGEAR ReadyNAS 102, 104 and 2120 all use an Intersil ISL12057
I2C RTC chip. The internal RTC not being disabled in the .dts
files of those devices result in the following useless first
line during boot:
[ 4.500056] rtc-mv d0010300.rtc: internal RTC not ticking
[ 4.505684] i2c /dev entries driver
[ 4.513246] rtc-isl12057 0-0068: rtc core: registered rtc-isl12057 as rtc0
This patch marks Armada internal RTC as disabled in individual .dts
files of those devices.
Reported-by: TuxOholic <tuxoholic@hotmail.de>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch adds DT support for the Seagate Personal Cloud 1 and 2-Bay.
Here are some information allowing to identify these devices:
Product name | Personal Cloud | Personal Cloud 2-Bay
Code name (board/PCB) | Cumulus | Cumulus Max
Model name (case sticker) | SRN21C | SRN22C
Material desc (product spec) | STCRxxxxxxx | STCSxxxxxxx
Chipset list:
- SoC Marvell Armada 370 88F6707, CPU @1GHz
- SDRAM memory: 512MB DDR3 667MHz (16-bits bandwidth)
- SPI flash 1MB (Macronix MX25L8006E)
- 1 or 2 SATA internal ports
- 1 Ethernet Gigabit port (PHY Marvell 88E1518)
- 1 USB3 host port (PCIe controller ASM1042)
- 1 USB2 host port (SoC)
- 2 push buttons (power and reset)
- 1 SATA LED (bi-color, white and red)
Note that support for the white SATA LED is missing. A dedicated LED
driver is needed.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch adds DT support for the Seagate NAS 2 and 4-Bay.
Here are some information allowing to identify these devices:
Product name | Seagate NAS 2-Bay | Seagate NAS 4-Bay
Code name (board/PCB) | Dart 2-Bay | Dart 4-Bay
Model name (case sticker) | SRPD20 | SRPD40
Material desc (product spec) | STCTxxxxxxx | STCUxxxxxxx
Chipset list (common):
- SoC Marvell Armada 370 88F6707, CPU @1.2GHz
- SDRAM memory: 512MB DDR3 600MHz (16-bits bandwidth)
- NAND flash 256MB, 8-bits (Micron MT29F2G08AAB or Hinyx H27U2G8F2CTR-BC)
- 2 SATA II ports (SoC)
- 1 Ethernet Gigabit ports (PHY Marvell 88E1518)
- 2 USB3 host ports (PCIe controller ASM1042)
- GPIO fan (4 speeds)
- External I2C RTC (MCP7940NT)
- 3 push buttons (power, backup and reset)
- 2 SATA LEDs (bi-color, blue and red)
- 1 power LED (bi-color, blue and red)
Only on 4-Bay models:
- 2 extra SATA III ports (PCIe AHCI controller Marvell 88SE9170)
- 1 extra Ethernet Gigabit ports (PHY Marvell 88E1518)
- I2C GPIO expander (PCA9554A)
- 2 extra SATA LEDs (bi-color, blue and red)
Note that support for the white SATA LEDs associated with HDDs 0 and 1
is missing. A dedicated LED driver is needed.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Stefan Agner