Commit Graph

557 Commits

Author SHA1 Message Date
Krzysztof Kozlowski 1a1e7580e7 memory: omap-gpmc: Fix whitespace issue
Fix minor whitespace and comment issues.  No functional changes.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski 07852c3f7f memory: omap-gpmc: Include <linux/sizes.h> for SZ_16M
The driver uses SZ_16M which is defined in include/linux/sizes.h.  On
ARM it was pulled by other headers but its inclusion is necessary for
compile testing on other architectures.

This fixes build error when compile testing on i386 architecture:

    drivers/memory/omap-gpmc.c: In function ‘gpmc_cs_remap’:
    drivers/memory/omap-gpmc.c:961:12: error: ‘SZ_16M’ undeclared (first use in this function)

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski 3aa5a6c2d9 memory: mtk-smi: Add argument to function pointer definition
Fix checkpatch warning:

    WARNING: function definition argument 'struct device *' should also have an identifier name

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski bf77f3f465 memory: brcmstb_dpfe: Remove unneeded braces
Single statement blocks don't need braces.  Fixes checkpatch warning:

    WARNING: braces {} are not necessary for single statement blocks

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Markus Mayer <mmayer@broadcom.com>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski a6ca67a838 memory: brcmstb_dpfe: Constify the contents of string
The string itself can be made const for safety.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Markus Mayer <mmayer@broadcom.com>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski 96424aa976 memory: ti-emif-pm: Fix cast to iomem pointer
Cast pointer to iomem memory properly to fix sparse warning:

    drivers/memory/ti-emif-pm.c:251:38: warning: incorrect type in argument 1 (different address spaces)
    drivers/memory/ti-emif-pm.c:251:38:    expected void const volatile [noderef] __iomem *addr
    drivers/memory/ti-emif-pm.c:251:38:    got void *

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski fdc482ff73 memory: ti-aemif: Rename SS to SSTROBE to avoid name conflicts
SS conflicts with compile test build on i386:

    drivers/memory/ti-aemif.c:40:0: warning: "SS" redefined
    In file included from arch/x86/include/uapi/asm/ptrace.h:6:0,
                     from arch/x86/include/asm/ptrace.h:7,
                     from arch/x86/include/asm/math_emu.h:5,
                     from arch/x86/include/asm/processor.h:13,
                     from include/linux/mutex.h:19,
                     from include/linux/notifier.h:14,
                     from include/linux/clk.h:14,
                     from drivers/memory/ti-aemif.c:12:
    arch/x86/include/uapi/asm/ptrace-abi.h:23:0: note: this is the location of the previous definition
     #define SS   16

Use more descriptive name (SSTROBE) to avoid the conflict.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski e79f384937 memory: emif: Silence platform_get_irq() error in driver
The platform_get_irq() already prints error message so there is no need
to do it again in the driver.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski 28dc76f1ed memory: emif: Fix whitespace coding style violations
Make the code and printed messages slightly more readable.  Fixes
checkpatch warnings:

    WARNING: quoted string split across lines
    ERROR: space prohibited before that ',' (ctx:WxW)

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski ec6652bda5 memory: emif: Put constant in comparison on the right side
Fixes checkpatch warning:

    WARNING: Comparisons should place the constant on the right side of the test

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski a53f7f08c0 memory: emif-asm-offsets: Add GPLv2 SPDX license header
Add GPLv2 license header and remove GPL boiler plate text.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski df30727336 memory: of: Remove unneeded extern from function declarations
Function declarations in headers do not need to come with extern
keyword.  Remove them to make the declaration slightly shorter.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski 9825095a09 memory: of: Correct indentation
Correct indentation to match open parenthesis.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski efc4646327 memory: of: Remove __func__ in device related messages
Messages printed by generic of_memory code will still be using device
context so their location/meaning will be known.  Printing __func__ is
not needed.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski a4022f6a21 memory: of: Remove unused headers
The of_memory.c does not use platform_device nor linked list.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 16:18:32 +02:00
Krzysztof Kozlowski c4f16e96d8 memory: samsung: exynos5422-dmc: Do not ignore return code of regmap_read()
Check for regmap_read() return code before using the read value in
following write in exynos5_switch_timing_regs().  Pass reading error
code to the callers.

This does not introduce proper error handling for such failed reads (and
obviously regmap_write() error is still ignored) because the driver
ignored this in all places.  Therefor it only fixes reported issue while
matching current driver coding style:

       drivers/memory/samsung/exynos5422-dmc.c: In function 'exynos5_switch_timing_regs':
    >> drivers/memory/samsung/exynos5422-dmc.c:216:6: warning: variable 'ret' set but not used [-Wunused-but-set-variable]

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 09:42:44 +02:00
Thierry Reding 46c019239f memory: tegra: Add Tegra132 compatible string match
Ensure that the driver will bind against the Tegra132 instantiation of
the external memory controller. While the two are roughly the same from
a capability perspective, they do require some incompatible changes to
the programming sequences and therefore need separate compatible
strings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15 11:55:21 +02:00
Jon Hunter 0454efbcb2 memory: tegra: Fix KCONFIG variables for Tegra186 and Tegra194
Commit a127e690b0 ("memory: tegra: Add support for the Tegra194 memory
controller") and commit 4e04b88633 ("memory: tegra: Only include
support for enabled SoCs") incorrectly added the KCONFIG variables
CONFIG_ARCH_TEGRA186_SOC and CONFIG_ARCH_TEGRA194_SOC to the Tegra EMC
driver. These KCONFIG variables do not exist and prevent the EMC driver
from being probed on Tegra186 and Tegra194. These KCONFIG variable
names are simply missing one underscore and so fix this by adding the
necessary underscore to the variable names.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-14 17:37:05 +02:00
Ming-Fan Chen fc492f339f memory: mtk-smi: Add basic support for MT6779
Add smi-larb and smi-common nodes and config_port for MT6779.

changelog since v2:
Split basic nodes and config_port support from initial golden setting patch

Signed-off-by: Ming-Fan Chen <ming-fan.chen@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/1578465691-30692-4-git-send-email-ming-fan.chen@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2020-07-13 15:28:56 +02:00
Christophe Kerello 66b8173a19 memory: stm32-fmc2-ebi: add STM32 FMC2 EBI controller driver
The driver adds the support for the STMicroelectronics FMC2 EBI controller
found on STM32MP SOCs.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1591975362-22009-5-git-send-email-christophe.kerello@st.com
2020-07-07 20:58:17 +02:00
Sergei Shtylyov ca7d8b980b
memory: add Renesas RPC-IF driver
Add the memory driver for Renesas RPC-IF which registers either SPI or
HyperFLash device depending on the contents of the device tree subnode.
It also provides the absract "back end" device APIs that can be used by
the "front end" SPI/MTD drivers to talk to the real hardware.

Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/9a3606ec-d4d0-c63a-4fb6-631ab38e621c@cogentembedded.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-01 22:45:14 +01:00
Dan Carpenter 5a6b5d5383 memory: tegra: Delete some dead code
The debugfs_create_dir() function never returns NULL and anyway the
correct behavior is to ignore errors in this situation.  The
debugfs_create_file() will become a no-op if "emc->debugfs.root" is an
error pointer.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-22 13:54:58 +02:00
Arnd Bergmann 2de758997e memory: tegra: Avoid unused function warnings
The suspend/resume functions have no callers depending on
configuration, so they must be marked __maybe_unused to
avoid these harmless warnings:

drivers/memory/tegra/tegra186.c:1578:12: error: 'tegra186_mc_resume' defined but not used [-Werror=unused-function]
 1578 | static int tegra186_mc_resume(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~~
drivers/memory/tegra/tegra186.c:1573:12: error: 'tegra186_mc_suspend' defined but not used [-Werror=unused-function]
 1573 | static int tegra186_mc_suspend(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~~~

Fixes: 177602b006 ("memory: tegra: Add system sleep support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-22 13:54:58 +02:00
Geert Uytterhoeven 1b93fadf2a memory: tegra: Drop <linux/clk-provider.h>
The Tegra EMC scaling support code is not a clock provider, but merely a
clock consumer, and thus does not need to include
<linux/clk-provider.h>.

Fixes: 0bf368c5b2cf ("memory: tegra: Add EMC scaling support code for Tegra210")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-22 13:54:58 +02:00
Christophe JAILLET c3d4eb3bf6 memory: tegra: Fix an error handling path in tegra186_emc_probe()
The call to tegra_bpmp_get() must be balanced by a call to
tegra_bpmp_put() in case of error, as already done in the remove
function.

Add an error handling path and corresponding goto.

Fixes: 52d15dd23f ("memory: tegra: Support DVFS on Tegra186 and later")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-22 13:54:58 +02:00
Dmitry Osipenko 930c68180f memory: tegra30-emc: Poll EMC-CaR handshake instead of waiting for interrupt
The memory clock-rate change could be running on a non-boot CPU, while the
boot CPU handles the EMC interrupt. This introduces an unnecessary latency
since boot CPU should handle the interrupt and then notify the sibling CPU
about clock-rate change completion. In some rare cases boot CPU could be
in uninterruptible state for a significant time (like in a case of KASAN +
NFS root), it could get to the point that completion timeouts before boot
CPU gets a chance to handle interrupt. The solution is to get rid of the
completion and replace it with interrupt-status polling.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-22 13:54:57 +02:00
Dmitry Osipenko adbcec8862 memory: tegra20-emc: Poll EMC-CaR handshake instead of waiting for interrupt
The memory clock-rate change could be running on a non-boot CPU, while the
boot CPU handles the EMC interrupt. This introduces an unnecessary latency
since boot CPU should handle the interrupt and then notify the sibling CPU
about clock-rate change completion. In some rare cases boot CPU could be
in uninterruptible state for a significant time (like in a case of KASAN +
NFS root), it could get to the point that completion timeouts before boot
CPU gets a chance to handle interrupt. The solution is to get rid of the
completion and replace it with interrupt-status polling.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-22 13:54:57 +02:00
Thierry Reding 0553d7b204 memory: tegra: Support derated timings on Tegra210
Derated timings are used to ensure that the memory chips keep operating
correctly at high temperatures. This adds code to support polling of the
chip operating state when high temperatures are measured on the chip and
change the refresh mode accordingly. Under very high temperatures, the
driver will switch to the derated tables to ensure proper operation of
the memory chips.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-22 13:54:57 +02:00
Joseph Lo 9b9d8632f5 memory: tegra: Add EMC scaling sequence code for Tegra210
This patch includes the sequence for clock tuning and the dynamic
training mechanism for the clock above 800MHz.

And historically there have been different sequences to change the EMC
clock. The sequence to be used is specified in the EMC table.
However, for the currently supported upstreaming platform, only the most
recent sequence is used. So only support that in this patch.

Based on the work of Peter De Schrijver <pdeschrijver@nvidia.com>.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-22 13:54:57 +02:00
Joseph Lo 10de21148f memory: tegra: Add EMC scaling support code for Tegra210
This is the initial patch for Tegra210 EMC frequency scaling. It has the
code to program various aspects of the EMC that are standardized, but it
does not yet include the specific programming sequence needed for clock
scaling.

The driver is designed to support LPDDR4 SDRAM. Devices that use LPDDR4
need to perform training of the RAM before it can be used. Firmware will
perform this training during early boot and pass a table of supported
frequencies to the kernel via device tree.

For the frequencies above 800 MHz, periodic retraining is needed to
compensate for changes in timing. This periodic training will have to be
performed until the frequency drops back to or below 800 MHz.

This driver provides helpers used during this runtime retraining that
will be used by the sequence specific code in a follow-up patch.

Based on work by Peter De Schrijver <pdeschrijver@nvidia.com>.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-22 13:54:57 +02:00
Dmitry Osipenko 6cc8823ad3 memory: tegra: Make debugfs permissions human-readable
Replace the symbolic permissions with octals in order to make them
readable.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-22 13:54:56 +02:00
Arnd Bergmann 0d583273b4 Merge branch 'baikal/drivers' into arm/drivers
[arnd: This is a patch series from Serge Semin to add a few drivers
 that don't have any other subsystem maintainer tree to go through,
 so I'm picking them up through the soc tree, full series description
 from the mailing list below]

Baikal-T1 SoC CPU is based on two MIPS Warrior P5600 cores. Their main
memory Non-Coherent IO interface is connected to the OCP2AXI bridge,
which in turn is then connected to the DW AMBA 3 AXI Interconnect (so
called Main Interconnect) with nine masters and four slaves ports. Main
Interconnect is responsible for the AXI-bus traffic arbitration (QoS)
and its routing from one component to another. In addition there is
a Errors Handler Block (EHB) accesible by means of the Baikal-T1 SoC
System Controller responsible to detect AXI protocol errors and device
not responding situations built on top the interconnect. Baikal-T1 AXI-bus
driver included in this patchset will be responsible for working with that
functionality, though currently it doesn't support QoS tuning. Instead
it's capable of detecting the error events, reporting an info about
them to the system log, injecting artificial errors to test the driver
functionality. Since AXI Interconnect doesn't provide a way to find
out which devices are connected to it, so its DT node is supposed to
be compatible with "simple-bus" driver, while sub-nodes shall represent
the masters attached to the bus.

One of the AXI Interconnect slaves is an AXI-APB bridge used to access the
Baikal-T1 SoC subsystems CSRs. MMIO request from CPU and DMAC masters are
routed there if they are detected to be within [0x08000000 0x1FFFFFFF]
range of the physical memory. In case if an attempted APB transaction
stays with no response for a pre-defined time it will be detected by
the APB-bus Errors Handler Block (EHB), which will raise an interrupt,
then the bus gets freed for a next operation. The APB-bus driver provides
the interrupt handler to detect the erroneous address, update an errors
counter and prints an error message about the faulty address. The counter
and the APB-bus operations timeout can be accessed via corresponding sysfs
nodes. A dedicated sysfs-node can be also used to artificially cause the
bus errors described above. Since APB-bus is a platform bus, it doesn't
provide a way to detect slave devices connected to it, so similarly to
the AXI-bus it's also supposed to be compatible with "simple-bus" driver.

Aside from PCIe/SATA/DDR/I2C/EHB/CPU/reboot specific settings the
Baikal-T1 System Controller provides a MIPS P5600 CM2 L2-cache tuning
block. It is responsible for the setting up the Tag/Data/WS L2-to-RAM
latencies. The last small patch in this patchset provides a driver and
DT-schema-based binding for the described device. So that the latencies
can be tuned up by means of dedicated DT properties and sysfs nodes.

This patchset is rebased and tested on the mainline Linux kernel
5.7-rc4.

Changelog v2 (AXI/APB bus):
- Assign dual GPL/BSD licenses to the bindings.
- Use single lined copyright headers in the bindings.
- Replace "additionalProperties: false" property with
  "unevaluatedProperties: false" in the bindings.
- Don't use a multi-arg clock phandle reference in DT binding examples.
  Thus remove includes from there.
- Fix some commit message and Kconfig help text spelling.
- Move drivers from soc to the bus subsystem.
- Convert a simple EHB drivers to the Baikal-T1 AXI and APB bus ones.
- Convert APB bus driver to using regmap MMIO API.
- Use syscon regmap to access the AXI-bus erroneous address.
- Add reset line support.
- Add Main Interconnect clock support to the AXI-bus driver.
- Remove probe-status info string printout.
- Discard of_match_ptr() macro utilization.
- Don't print error-message if no platform IRQ found. Just return an
  error.
- Use generic FIELD_{GET,PREP} macros instead of handwritten ones in the
  AXI-bus driver.

Changelog v2 (l2 driver):
- Fix some commit message and Kconfig help text spelling.
- Move the driver to the memory subsystem.
- Assign dual GPL/BSD license to the DT binding.
- Use single lined copyright header in the binding.
- Discard reg property and syscon compatible string.
- Move "allOf" restrictions to the root level of the properties.
- The DT node is supposed to be a child of the Baikal-T1 system
  controller node. So regmap will be fetched from there.
- Use generic FIELD_{GET,PREP} macro.
- Remove probe-status info string printout.
- Since the driver depends on the OF config we can remove of_match_ptr()
  macro utilization.

Changelog v3:
- Combine l2 and AXI/APB bus patches in a single patchset.
- Retrieve AXI-bus QoS registers by resource name "qos".
- Discard CONFIG_OF dependency since there is none at compile-time.
- Add syscon EHB registers range to the AXI-bus reg property as optional
  entry.
- Fix invalid of_property_read_u32() return value test in the l2-ctl
  driver.
- Get the reg property back into the l2-ctl DT bindings even though the
  driver is using the parental syscon regmap.
- The l2-ctl DT schema will live separately from the system controller,
  but the corresponding sub-node of the later DT schema will $ref this
  one.
- Set non-default latencies in the l2-ctl DT example.

* baikal/drivers:
  memory: Add Baikal-T1 L2-cache Control Block driver
  bus: Add Baikal-T1 APB-bus driver
  bus: Add Baikal-T1 AXI-bus driver
  dt-bindings: bus: Add Baikal-T1 APB-bus binding
  dt-bindings: bus: Add Baikal-T1 AXI-bus binding

Link: https://lore.kernel.org/lkml/20200526130841.ap6qlxv7hqmabnh5@mobilestation/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-28 14:18:11 +02:00
Serge Semin 83ca8b3e8f memory: Add Baikal-T1 L2-cache Control Block driver
Baikal-T1 SoC provides a way to tune the MIPS P5600 CM2 L2-cache
performance up. It can be done by changing the L2-RAM Data/Tag/WS
latencies in a dedicated register exposed by the system controller.
The driver added by this commit provides a dts properties-based and
sysfs-based interface for it. The device DT node is supposed to be a
child of Baikal-T1 System Controller node.

Link: https://lore.kernel.org/r/20200526125928.17096-7-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: soc@kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-28 14:17:41 +02:00
Bernard Zhao 108c31e775 memory: samsung: exynos5422-dmc: Reduce protected code area in IRQ handler
Speed-up a bit this IRQ processing as there is no need to protect
return value or printing.

Signed-off-by: Bernard Zhao <bernard@vivo.com>
Acked-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-12 15:11:47 +02:00
Bernard Zhao 4bff7214d2 memory: samsung: exynos5422-dmc: Fix tFAW timings alignment
Aligning of tFAW timing with standard was using wrong argument as
minimum acceptable value.  This could lead to wrong timing if provided
timings and clock period do not match the standard.

Fixes: 6e7674c3c6 ("memory: Add DMC driver for Exynos5422")
Cc: <stable@vger.kernel.org>
Signed-off-by: Bernard Zhao <bernard@vivo.com>
Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-08 16:46:41 +02:00
Linus Torvalds d18292dc07 ARM: driver updates
These are the usual updates for SoC specific device drivers and related
 subsystems that don't have their own top-level maintainers:
 
 - ARM SCMI/SCPI updates to allow pluggable transport layers
 
 - TEE subsystem cleanups
 
 - A new driver for the Amlogic secure power domain controller
 
 - Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU and
   TI OMAP2+ sysc drivers.
 
 - Qualcomm SoC driver updates, including a new library module for
   "protection domain" notifications
 
 - Lots of smaller bugfixes and cleanups in other drivers
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann:
 "These are the usual updates for SoC specific device drivers and
  related subsystems that don't have their own top-level maintainers:

   - ARM SCMI/SCPI updates to allow pluggable transport layers

   - TEE subsystem cleanups

   - A new driver for the Amlogic secure power domain controller

   - Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU
     and TI OMAP2+ sysc drivers.

   - Qualcomm SoC driver updates, including a new library module for
     "protection domain" notifications

   - Lots of smaller bugfixes and cleanups in other drivers"

* tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (70 commits)
  soc: fsl: qe: fix sparse warnings for ucc_slow.c
  soc: fsl: qe: ucc_slow: remove 0 assignment for kzalloc'ed structure
  soc: fsl: qe: fix sparse warnings for ucc_fast.c
  soc: fsl: qe: fix sparse warnings for qe_ic.c
  soc: fsl: qe: fix sparse warnings for ucc.c
  soc: fsl: qe: fix sparse warning for qe_common.c
  soc: fsl: qe: fix sparse warnings for qe.c
  soc: qcom: Fix QCOM_APR dependencies
  soc: qcom: pdr: Avoid uninitialized use of found in pdr_indication_cb
  soc: imx: drop COMPILE_TEST for IMX_SCU_SOC
  firmware: imx: add COMPILE_TEST for IMX_SCU driver
  soc: imx: gpc: fix power up sequencing
  soc: imx: increase build coverage for imx8m soc driver
  soc: qcom: apr: Add avs/audio tracking functionality
  dt-bindings: soc: qcom: apr: Add protection domain bindings
  soc: qcom: Introduce Protection Domain Restart helpers
  devicetree: bindings: firmware: add ipq806x to qcom_scm
  memory: tegra: Correct debugfs clk rate-range on Tegra124
  memory: tegra: Correct debugfs clk rate-range on Tegra30
  memory: tegra: Correct debugfs clk rate-range on Tegra20
  ...
2020-04-03 15:05:35 -07:00
Masahiro Yamada d198b34f38 .gitignore: add SPDX License Identifier
Add SPDX License Identifier to all .gitignore files.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-25 11:50:48 +01:00
Dmitry Osipenko 141267bffd memory: tegra: Correct debugfs clk rate-range on Tegra124
Correctly set clk rate-range if number of available timings is zero.
This fixes noisy "invalid range [4294967295, 0]" error messages during
boot.

Fixes: 6b9acd9355 ("memory: tegra: Refashion EMC debugfs interface on Tegra124")
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-11 15:24:16 +01:00
Dmitry Osipenko a53670e1a7 memory: tegra: Correct debugfs clk rate-range on Tegra30
Correctly set clk rate-range if number of available timings is zero.
This fixes noisy "invalid range [4294967295, 0]" error messages during
boot.

Fixes: 8cee32b400 ("memory: tegra: Implement EMC debugfs interface on Tegra30")
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-11 15:24:16 +01:00
Dmitry Osipenko 2243af4111 memory: tegra: Correct debugfs clk rate-range on Tegra20
Correctly set clk rate-range if number of available timings is zero.
This fixes noisy "invalid range [4294967295, 0]" error messages during
boot.

Fixes: 8209eefa3d ("memory: tegra: Implement EMC debugfs interface on Tegra20")
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-11 15:24:15 +01:00
Olof Johansson c7ce73eb01 mvebu drivers for 5.6 (part 1)
- Various cleanup on the following drivers:
    - Turris Mox rWTM firmware
    - Moxtet bus
    - Armada 37xx rWTM mailbox
    - Marvell EBU Device Bus
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Merge tag 'mvebu-drivers-5.6-1' of git://git.infradead.org/linux-mvebu into arm/drivers

mvebu drivers for 5.6 (part 1)

 - Various cleanup on the following drivers:
   - Turris Mox rWTM firmware
   - Moxtet bus
   - Armada 37xx rWTM mailbox
   - Marvell EBU Device Bus

* tag 'mvebu-drivers-5.6-1' of git://git.infradead.org/linux-mvebu:
  mailbox: armada-37xx-rwtm: convert to devm_platform_ioremap_resource
  memory: mvebu-devbus: convert to devm_platform_ioremap_resource
  bus: moxtet: declare moxtet_bus_type as static
  firmware: turris-mox-rwtm: small white space cleanup

Link: https://lore.kernel.org/r/877e1x3nxc.fsf@FE-laptop
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16 10:45:44 -08:00
Olof Johansson 083b4db857 memory: tegra: Changes for v5.6-rc1
This adds a couple of fixes for the Tegra30 EMC frequency scaling code
 and adds support for EMC frequency scaling on Tegra186 and later.
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Merge tag 'tegra-for-5.6-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

memory: tegra: Changes for v5.6-rc1

This adds a couple of fixes for the Tegra30 EMC frequency scaling code
and adds support for EMC frequency scaling on Tegra186 and later.

* tag 'tegra-for-5.6-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra30-emc: Correct error message for timed out auto calibration
  memory: tegra30-emc: Firm up hardware programming sequence
  memory: tegra30-emc: Firm up suspend/resume sequence
  memory: tegra: Correct reset value of xusb_hostr
  memory: tegra: Add support for the Tegra194 memory controller
  memory: tegra: Only include support for enabled SoCs
  memory: tegra: Support DVFS on Tegra186 and later
  memory: tegra: Add system sleep support
  memory: tegra: Extract memory client SID programming
  memory: tegra: Add per-SoC data for Tegra186
  memory: tegra: Rename tegra_mc to tegra186_mc on Tegra186
  memory: tegra: Implement EMC debugfs interface on Tegra30
  memory: tegra: Implement EMC debugfs interface on Tegra20
  memory: tegra: Refashion EMC debugfs interface on Tegra124

Link: https://lore.kernel.org/r/20200111003553.2411874-3-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16 10:41:48 -08:00
Dmitry Osipenko 5e5eca6644 memory: tegra30-emc: Correct error message for timed out auto calibration
The code waits for auto calibration to be finished and not to be disabled.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-10 15:48:48 +01:00
Dmitry Osipenko 0f8bb9da5a memory: tegra30-emc: Firm up hardware programming sequence
Previously there was a problem where a late handshake handling caused
a memory corruption, this problem was resolved by issuing calibration
command right after changing the timing, but looks like the solution
wasn't entirely correct since calibration interval could be disabled as
well. Now programming sequence is completed immediately after receiving
handshake from CaR, without potentially long delays and in accordance to
the TRM's programming guide.

Secondly, the TRM's programming guide suggests to flush EMC writes by
reading any *MC* register before doing CaR changes. This is also addressed
now.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-10 15:48:40 +01:00
Dmitry Osipenko 51bb73f934 memory: tegra30-emc: Firm up suspend/resume sequence
The current code doesn't prevent race conditions of suspend/resume vs CCF.
Let's take exclusive control over the EMC clock during suspend in a way
that is free from race conditions.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-10 15:47:18 +01:00
Nicolin Chen 5f5636ef1d memory: tegra: Correct reset value of xusb_hostr
According to Tegra X1 (Tegra210) TRM, the reset value of xusb_hostr
field (bit [7:0]) should be 0x7a. So this patch simply corrects it.

Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-10 15:34:06 +01:00
Thierry Reding a127e690b0 memory: tegra: Add support for the Tegra194 memory controller
The memory and external memory controllers on Tegra194 are very similar
to their predecessors from Tegra186. Add the necessary SoC-specific data
to support the newer versions.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09 19:38:38 +01:00
Thierry Reding 4e04b88633 memory: tegra: Only include support for enabled SoCs
The memory client tables can be fairly large and they can easily be
omitted if support for the corresponding SoC is not enabled.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09 19:35:54 +01:00
Thierry Reding 52d15dd23f memory: tegra: Support DVFS on Tegra186 and later
Add a Tegra186 (and later) EMC driver that reads the EMC DVFS tables
from BPMP and uses the EMC clock to change the external memory clock.

This currently only provides a debugfs interface to show the available
frequencies and set lower and upper limits of the allowed range. This
can be used for testing the various frequencies. The goal is to
eventually integrate this with the interconnect framework so that the
EMC frequency can be scaled based on demand from memory clients.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09 19:35:54 +01:00
Thierry Reding 177602b006 memory: tegra: Add system sleep support
Add system suspend/resume support for the memory controller found on
Tegra186 and later. This is required so that the SID registers can be
reprogrammed after their content was lost during system sleep.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09 19:12:55 +01:00
Thierry Reding 6d3ba76163 memory: tegra: Extract memory client SID programming
Move programming of the memory client to SID mapping into a separate
function so that it can be reused from multiple call sites.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09 19:12:40 +01:00
Thierry Reding 7d723c03e0 memory: tegra: Add per-SoC data for Tegra186
Instead of hard-coding the memory client table, use per-SoC data in
preparation for adding support for other SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09 19:12:24 +01:00
Thierry Reding 0859fe9ff5 memory: tegra: Rename tegra_mc to tegra186_mc on Tegra186
This is just for consistency with the rest of the driver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09 19:12:19 +01:00
Thierry Reding 8cee32b400 memory: tegra: Implement EMC debugfs interface on Tegra30
A common debugfs interface is already available on Tegra20, Tegra124,
Tegra186 and Tegra194. Implement the same interface on Tegra30 to enable
testing of the EMC frequency scaling code using a unified interface.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09 19:09:31 +01:00
Thierry Reding 8209eefa3d memory: tegra: Implement EMC debugfs interface on Tegra20
A common debugfs interface is already available on Tegra124, Tegra186
and Tegra194. Implement the same interface on Tegra20 to enable testing
of the EMC frequency scaling code using a unified interface.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09 19:09:16 +01:00
Thierry Reding 6b9acd9355 memory: tegra: Refashion EMC debugfs interface on Tegra124
The current debugfs interface is only partially useful. While it allows
listing supported frequencies and testing individual clock rates, it is
limited in that it can't be used to restrict the range of frequencies
that the driver is allowed to set. This is something we may want to use
to test adaptive scaling once that's implemented.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09 19:05:47 +01:00
Yangtao Li f3ba1c86c2 memory: mvebu-devbus: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-01-08 10:39:25 +01:00
Krzysztof Kozlowski 0536309373 memory: samsung: Rename Exynos to lowercase
Fix up inconsistent usage of upper and lowercase letters in "Exynos"
name.

"EXYNOS" is not an abbreviation but a regular trademarked name.
Therefore it should be written with lowercase letters starting with
capital letter.

The lowercase "Exynos" name is promoted by its manufacturer Samsung
Electronics Co., Ltd., in advertisement materials and on website.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-07 20:46:32 +01:00
Yangtao Li 5383953f1c memory: samsung: exynos5422-dmc: Convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Acked-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-12-30 18:33:15 +01:00
Olof Johansson 916a914062 memory: tegra: Fixes for v5.5-rc1
This contains a fix for a kernel panic that can occur on suspend if EMC
 timings are not available in device tree.
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Merge tag 'tegra-for-5.5-memory-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes

memory: tegra: Fixes for v5.5-rc1

This contains a fix for a kernel panic that can occur on suspend if EMC
timings are not available in device tree.

* tag 'tegra-for-5.5-memory-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra30-emc: Fix panic on suspend

Link: https://lore.kernel.org/r/20191204130753.3614278-1-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-06 08:28:51 -08:00
Linus Torvalds ec939e4c94 ARM: SoC-related driver updates
Various driver updates for platforms:
 
  - A larger set of work on Tegra 2/3 around memory controller and
  regulator features, some fuse cleanups, etc..
 
  - MMP platform drivers, in particular for USB PHY, and other smaller
  additions.
 
  - Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
  and ASV (adaptive voltage), allowing the platform to run at more
  optimal operating points.
 
  - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
 
  - Clock/reset control driver for TI/OMAP
 
  - Meson-A1 reset controller support
 
  - Qualcomm sdm845 and sda845 SoC IDs for socinfo
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Olof Johansson:
 "Various driver updates for platforms:

   - A larger set of work on Tegra 2/3 around memory controller and
     regulator features, some fuse cleanups, etc..

   - MMP platform drivers, in particular for USB PHY, and other smaller
     additions.

   - Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
     and ASV (adaptive voltage), allowing the platform to run at more
     optimal operating points.

   - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas

   - Clock/reset control driver for TI/OMAP

   - Meson-A1 reset controller support

   - Qualcomm sdm845 and sda845 SoC IDs for socinfo"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
  firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
  soc: fsl: add RCPM driver
  dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
  memory: tegra: Consolidate registers definition into common header
  memory: tegra: Ensure timing control debug features are disabled
  memory: tegra: Introduce Tegra30 EMC driver
  memory: tegra: Do not handle error from wait_for_completion_timeout()
  memory: tegra: Increase handshake timeout on Tegra20
  memory: tegra: Print a brief info message about EMC timings
  memory: tegra: Pre-configure debug register on Tegra20
  memory: tegra: Include io.h instead of iopoll.h
  memory: tegra: Adapt for Tegra20 clock driver changes
  memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
  memory: tegra: Add gr2d and gr3d to DRM IOMMU group
  memory: tegra: Set DMA mask based on supported address bits
  soc: at91: Add Atmel SFR SN (Serial Number) support
  memory: atmel-ebi: switch to SPDX license identifiers
  memory: atmel-ebi: move NUM_CS definition inside EBI driver
  soc: mediatek: Refactor bus protection control
  soc: mediatek: Refactor sram control
  ...
2019-12-05 11:43:31 -08:00
Dmitry Osipenko 030d2829f4 memory: tegra30-emc: Fix panic on suspend
Trying to suspend driver results in a crash if timings aren't available in
device-tree.

Reported-by: Jon Hunter <jonathanh@nvidia.com>
Fixes: e34212c75a ("memory: tegra: Introduce Tegra30 EMC driver")
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-18 13:54:40 +01:00
Olof Johansson 57a54dfe48 memory: tegra: Changes for v5.5-rc1
This contains a couple of fixes and adds support for EMC frequency
 scaling on Tegra30.
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Merge tag 'tegra-for-5.5-memory-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

memory: tegra: Changes for v5.5-rc1

This contains a couple of fixes and adds support for EMC frequency
scaling on Tegra30.

* tag 'tegra-for-5.5-memory-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Consolidate registers definition into common header
  memory: tegra: Ensure timing control debug features are disabled
  memory: tegra: Introduce Tegra30 EMC driver
  memory: tegra: Do not handle error from wait_for_completion_timeout()
  memory: tegra: Increase handshake timeout on Tegra20
  memory: tegra: Print a brief info message about EMC timings
  memory: tegra: Pre-configure debug register on Tegra20
  memory: tegra: Include io.h instead of iopoll.h
  memory: tegra: Adapt for Tegra20 clock driver changes
  memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
  memory: tegra: Add gr2d and gr3d to DRM IOMMU group
  memory: tegra: Set DMA mask based on supported address bits
  clk: tegra: Add Tegra20/30 EMC clock implementation

Link: https://lore.kernel.org/r/20191111143836.4027200-1-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-11 13:13:23 -08:00
Dmitry Osipenko 141bef44e1 memory: tegra: Consolidate registers definition into common header
The Memory Controller registers definition is sparse and duplicated,
let's consolidate everything into a common place for consistency.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:27 +01:00
Dmitry Osipenko 77b7182ff1 memory: tegra: Ensure timing control debug features are disabled
Timing control debug features should be disabled at a boot time, but you
never now and hence it's better to disable them explicitly because some of
those features are crucial for the driver to do a proper thing.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:27 +01:00
Dmitry Osipenko e34212c75a memory: tegra: Introduce Tegra30 EMC driver
Introduce driver for the External Memory Controller (EMC) found on Tegra30
chips, it controls the external DRAM on the board. The purpose of this
driver is to program memory timing for external memory on the EMC clock
rate change.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:27 +01:00
Dmitry Osipenko 88c5bfecaa memory: tegra: Do not handle error from wait_for_completion_timeout()
Contrary to its wait_for_completion_timeout_interruptible() sibling, the
wait_for_completion_timeout() function does not return an error.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:26 +01:00
Dmitry Osipenko b56563d013 memory: tegra: Increase handshake timeout on Tegra20
Turned out that it could take over a millisecond under some circumstances,
like running on a very low CPU/memory frequency. TRM says that handshake
happens when there is a "safe" moment, but not explains exactly what that
moment is. Apparently at least memory should be idling and thus the low
frequency should be a reasonable cause for a longer handshake delay.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:26 +01:00
Dmitry Osipenko f541efaa74 memory: tegra: Print a brief info message about EMC timings
During boot print how many memory timings got the driver and what's the
RAM code. This is a very useful information when something is wrong with
boards memory timing.

Suggested-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:26 +01:00
Dmitry Osipenko c72396f941 memory: tegra: Pre-configure debug register on Tegra20
The driver expects certain debug features to be disabled in order to
work properly. Let's disable them explicitly for consistency and to not
rely on a boot state.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:25 +01:00
Dmitry Osipenko d039cf2834 memory: tegra: Include io.h instead of iopoll.h
The register polling code was gone, but the included header change was
missed. Fix it up for consistency.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:25 +01:00
Dmitry Osipenko 77ab499dca memory: tegra: Adapt for Tegra20 clock driver changes
Now Tegra20 and Tegra30 EMC drivers should provide clock-rounding
functionality using the new Tegra clock driver API.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:25 +01:00
Dmitry Osipenko fa6749d40e memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
The memory frequency scaling will be managed by tegra20-devfreq driver
and PM QoS once all the prerequisite patches will get upstreamed.
The parent clock is now managed by the clock driver and we also should
assume that PLLM rate can't be changed on some devices (Galaxy Tab 10.1
for example). Altogether there is no point in touching of clock's rate
from the EMC driver.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:25 +01:00
Thierry Reding 63a613fdb1 memory: tegra: Add gr2d and gr3d to DRM IOMMU group
All of the devices making up the Tegra DRM device want to share a single
IOMMU domain. Put them into a single group to allow them to do that.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:25 +01:00
Thierry Reding c4c21f2215 memory: tegra: Set DMA mask based on supported address bits
The memory controller on Tegra124 and later supports 34 or more address
bits. Advertise that by setting the DMA mask based on the number of the
address bits.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-11-11 14:55:24 +01:00
Olof Johansson e24eb5e6e9 AT91 drivers for 5.5
- a new driver exposing the serial number registers through nvmem
  - a few documentation and definition changes
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Merge tag 'at91-5.5-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/drivers

AT91 drivers for 5.5

 - a new driver exposing the serial number registers through nvmem
 - a few documentation and definition changes

* tag 'at91-5.5-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  soc: at91: Add Atmel SFR SN (Serial Number) support
  memory: atmel-ebi: switch to SPDX license identifiers
  memory: atmel-ebi: move NUM_CS definition inside EBI driver
  ARM: at91: Documentation: update the sama5d3 and armv7m datasheets

Link: https://lore.kernel.org/r/20191107221644.GA201884@piout.net
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-08 10:33:20 -08:00
Tudor Ambarus 5db3fb404a memory: atmel-ebi: switch to SPDX license identifiers
Adopt the SPDX license identifiers to ease license compliance
management.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20190906151519.19442-1-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-11-07 22:33:10 +01:00
Tudor Ambarus dbbf98392a memory: atmel-ebi: move NUM_CS definition inside EBI driver
The total number of EBI CS lines is described by the EBI controller
and not by the Matrix. Move the definition for the number of CS
inside EBI driver.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20190906150632.19039-1-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-11-07 22:33:09 +01:00
Olof Johansson e6ce7f5a7d Merge branch 'for_5.5/driver-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
* 'for_5.5/driver-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  memory: emif: remove set but not used variables 'cs1_used' and 'custom_configs'
  soc: ti: omap-prm: fix return value check in omap_prm_probe()
  soc: ti: omap-prm: add omap5 PRM data
  soc: ti: omap-prm: add am4 PRM data
  soc: ti: omap-prm: add dra7 PRM data
  soc: ti: omap-prm: add data for am33xx
  soc: ti: omap-prm: add omap4 PRM data
  soc: ti: omap-prm: add support for denying idle for reset clockdomain
  soc: ti: omap-prm: poll for reset complete during de-assert
  soc: ti: add initial PRM driver with reset control support
  dt-bindings: omap: add new binding for PRM instances

Link: https://lore.kernel.org/r/1572372856-20598-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03 16:53:08 -08:00
YueHaibing faee19ece8 memory: emif: remove set but not used variables 'cs1_used' and 'custom_configs'
drivers/memory/emif.c:1616:9: warning:
 variable cs1_used set but not used [-Wunused-but-set-variable]
drivers/memory/emif.c:1624:36: warning:
 variable custom_configs set but not used [-Wunused-but-set-variable]

They are never used since introduction.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2019-10-29 09:57:57 -07:00
Olof Johansson 3c1aa0c0cb This pull request contains Broadcom ARM/ARM64/MIPS based SoCs drivers
updates for 5.5, please pull the following:
 
 - Markus updates the DPFE driver so as to support deferring the firmware
   loading process until the first sysfs attribute is accessed, in the
   process he does a bunch of cleanups and minor fixes
 
 - Florian adds support for the DPFE on 7211 which uses a "new style" API
   v2 and makes necessary changes along the way
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Merge tag 'arm-soc/for-5.5/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom ARM/ARM64/MIPS based SoCs drivers
updates for 5.5, please pull the following:

- Markus updates the DPFE driver so as to support deferring the firmware
  loading process until the first sysfs attribute is accessed, in the
  process he does a bunch of cleanups and minor fixes

- Florian adds support for the DPFE on 7211 which uses a "new style" API
  v2 and makes necessary changes along the way

* tag 'arm-soc/for-5.5/drivers' of https://github.com/Broadcom/stblinux:
  memory: brcmstb: dpfe: Fixup API version/commands for 7211
  memory: brcmstb: dpfe: Compute checksum at __send_command() time
  memory: brcmstb: dpfe: support for deferred firmware download
  memory: brcmstb: dpfe: pass *priv as argument to brcmstb_dpfe_download_firmware()
  memory: brcmstb: dpfe: move init_data into brcmstb_dpfe_download_firmware()
  memory: brcmstb: dpfe: add locking around DCPU enable/disable
  memory: brcmstb: dpfe: initialize priv->dev
  memory: brcmstb: dpfe: rename struct private_data

Link: https://lore.kernel.org/r/20191023212814.30622-2-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-10-23 20:00:49 -07:00
Florian Fainelli b61d3e87b6 memory: brcmstb: dpfe: Fixup API version/commands for 7211
7211 uses a newer version of API v2 which is half way between what was
defined as API v3 and what used to be called API v2 but was used with
DPFE firmwares with major versions 1.x.x.x. Starting with **the new**
API v2, we are no longer getting loadable firmware images, so the
capability to load it is removed (like v3).

To avoid spreading more confusion, map 7268/7271/7278 to the old DPFE
API version 2, 7211 to the new API v2 and introduce the specific
commands for that, and leave newer versions to map to API v3.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Markus Mayer <mmayer@broadcom.com>
2019-10-18 12:11:59 -07:00
Florian Fainelli 5d06f53d95 memory: brcmstb: dpfe: Compute checksum at __send_command() time
Instead of pre-computing the checksum, do it at the time we send the
command, this reduces the possibility of introducing errors as well as
limits the amount of code necessary while adding new commands and/or new
API versions. The MSG_CHKSUM enumeration value is no longer necessary
and is removed.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Markus Mayer <mmayer@broadcom.com>
2019-10-18 12:11:50 -07:00
Markus Mayer 242fb2f1d9 memory: brcmstb: dpfe: support for deferred firmware download
We add support for deferred downloading of the DPFE firmware. It may be
necessary to do this if the root file system containing the firmware
image is not yet available at the time the driver's probe function is
being called.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-10-18 10:07:43 -07:00
Markus Mayer ac2ea9cfce memory: brcmstb: dpfe: pass *priv as argument to brcmstb_dpfe_download_firmware()
Rather than passing a (struct platform_device *) to
brcmstb_dpfe_download_firmware(), we pass a (struct private_data *).
This is the more sensible thing to do.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-10-18 10:07:39 -07:00
Markus Mayer 6ef972b192 memory: brcmstb: dpfe: move init_data into brcmstb_dpfe_download_firmware()
Rather than declaring our init_data in several places and passing it as
parameter into brcmstb_dpfe_download_firmware(), we declare it inside
brcmstb_dpfe_download_firmware() instead.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-10-18 10:07:36 -07:00
Markus Mayer 75d316e763 memory: brcmstb: dpfe: add locking around DCPU enable/disable
To ensure consistency, we add locking primitives inside the DCPU enable
and disable routines.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-10-18 10:07:29 -07:00
Markus Mayer 56ece3fabf memory: brcmstb: dpfe: initialize priv->dev
Add missing initialization of priv->dev. It is only used in an
emergency error message that is very unlikely to ever occur, which is
how this has remained unnoticed.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-10-18 10:07:19 -07:00
Markus Mayer abf94566bb memory: brcmstb: dpfe: rename struct private_data
To avoid potential (future) conflicts with other data structures we
rename "struct private_data" to "struct brcmstb_dpfe_priv".

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-10-18 10:07:11 -07:00
Yong Wu fb03082a54 memory: mtk-smi: Add PM suspend and resume ops
In the commit 4f0a1a1ae3 ("memory: mtk-smi: Invoke pm runtime_callback
to enable clocks"), we use pm_runtime callback to enable/disable the smi
larb clocks. It will cause the larb's clock may not be disabled when
suspend. That is because device_prepare will call pm_runtime_get_noresume
which will keep the larb's PM runtime status still is active when suspend,
then it won't enter our pm_runtime suspend callback to disable the
corresponding clocks.

This patch adds suspend pm_ops to force disable the clocks, Use "LATE" to
make sure it disable the larb's clocks after the multimedia devices.

Fixes: 4f0a1a1ae3 ("memory: mtk-smi: Invoke pm runtime_callback to enable clocks")
Signed-off-by: Anan Sun <anan.sun@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-10-15 14:25:34 +02:00
Lukasz Luba bbf918863e memory: samsung: exynos5422-dmc: Add support for interrupt from performance counters
Introduce a new interrupt driven mechanism for managing speed of the
memory controller. The interrupts are generated due to performance
counters overflow. The performance counters might track memory reads,
writes, transfers, page misses, etc. In the basic algorithm tracking
read transfers and calculating memory pressure should be enough to skip
polling mode in devfreq.

Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02 19:37:37 +02:00
Lukasz Luba d51e6a69f4 memory: samsung: exynos5422-dmc: Fix kfree() of devm-allocated memory and missing static
Fix issues captured by static checkers: use of kfree() on
resource-managed memory and missing 'static' in the private function.

Fixes Smatch warning:
    drivers/memory/samsung/exynos5422-dmc.c:272
        exynos5_init_freq_table() warn: passing devm_ allocated variable to kfree. 'dmc->opp'

Fixes Sparse warning:
    drivers/memory/samsung/exynos5422-dmc.c:736:1:
        warning: symbol 'exynos5_dmc_align_init_freq' was not declared.

Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-01 20:28:38 +02:00
Colin Ian King 7a5a687ec3 memory: samsung: exynos5422-dmc: Fix spelling mistake "counld" -> "could"
There is a spelling mistake in a dev_err message. Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-01 20:28:38 +02:00
Lukasz Luba 6e7674c3c6 memory: Add DMC driver for Exynos5422
Add driver for Exynos5422 Dynamic Memory Controller.  The driver
provides support for dynamic frequency and voltage scaling for DMC and
DRAM.  It supports changing timings of DRAM running with different
frequency.  There is also an algorithm to calculate timings based on
memory description provided in DT.

Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-01 20:28:38 +02:00
Lukasz Luba 976897dd96 memory: Extend of_memory with LPDDR3 support
Add AC timings information needed to support LPDDR3 and memory
controllers along with helpers to obtain it.  These will be necessary
for upcoming Exynos5422 Dynamic Memory Controller driver.

Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-01 20:28:38 +02:00
Yong Wu 1ee9feb2c9 iommu/mediatek: Clean up struct mtk_smi_iommu
Remove the "struct mtk_smi_iommu" to simplify the code since it has only
one item in it right now.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-08-30 15:57:27 +02:00
Yong Wu ec2da07ca1 memory: mtk-smi: Get rid of need_larbid
The "mediatek,larb-id" has already been parsed in MTK IOMMU driver.
It's no need to parse it again in SMI driver. Only clean some codes.
This patch is fit for all the current mt2701, mt2712, mt7623, mt8173
and mt8183.

After this patch, the "mediatek,larb-id" only be needed for mt2712
which have 2 M4Us. In the other SoCs, we can get the larb-id from M4U
in which the larbs in the "mediatek,larbs" always are ordered.

Correspondingly, the larb_nr in the "struct mtk_smi_iommu" could also
be deleted.

CC: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-08-30 15:57:27 +02:00
Yong Wu 567e58cf96 memory: mtk-smi: Add bus_sel for mt8183
There are 2 mmu cells in a M4U HW. we could adjust some larbs entering
mmu0 or mmu1 to balance the bandwidth via the smi-common register
SMI_BUS_SEL(0x220)(Each larb occupy 2 bits).

In mt8183, For better performance, we switch larb1/2/5/7 to enter
mmu1 while the others still keep enter mmu0.

In mt8173 and mt2712, we don't get the performance issue,
Keep its default value(0x0), that means all the larbs enter mmu0.

Note: smi gen1(mt2701/mt7623) don't have this bus_sel.

And, the base of smi-common is completely different with smi_ao_base
of gen1, thus I add new variable for that.

CC: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-08-30 15:57:27 +02:00
Yong Wu 4f0a1a1ae3 memory: mtk-smi: Invoke pm runtime_callback to enable clocks
This patch only move the clk_prepare_enable and config_port into the
runtime suspend/resume callback. It doesn't change the code content
and sequence.

This is a preparing patch for adjusting SMI_BUS_SEL for mt8183.
(SMI_BUS_SEL need to be restored after smi-common resume every time.)
Also it gives a chance to get rid of mtk_smi_larb_get/put which could
be a next topic.

CC: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-08-30 15:57:27 +02:00
Yong Wu 907ba6a195 iommu/mediatek: Add mt8183 IOMMU support
The M4U IP blocks in mt8183 is MediaTek's generation2 M4U which use
the ARM Short-descriptor like mt8173, and most of the HW registers
are the same.

Here list main differences between mt8183 and mt8173/mt2712:
1) mt8183 has only one M4U HW like mt8173 while mt2712 has two.
2) mt8183 don't have the "bclk" clock, it use the EMI clock instead.
3) mt8183 can support the dram over 4GB, but it doesn't call this "4GB
mode".
4) mt8183 pgtable base register(0x0) extend bit[1:0] which represent
the bit[33:32] in the physical address of the pgtable base, But the
standard ttbr0[1] means the S bit which is enabled defaultly, Hence,
we add a mask.
5) mt8183 HW has a GALS modules, SMI should enable "has_gals" support.
6) mt8183 need reset_axi like mt8173.
7) the larb-id in smi-common is remapped. M4U should add its larbid_remap.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-08-30 15:57:27 +02:00
Yong Wu 64fea74a0d memory: mtk-smi: Add gals support
In some SoCs like mt8183, SMI add GALS(Global Async Local Sync) module
which can help synchronize for the modules in different clock frequency.
It can be seen as a "asynchronous fifo". This is a example diagram:

            M4U
             |
         ----------
         |        |
     gals0-rx   gals1-rx
         |        |
         |        |
     gals0-tx   gals1-tx
         |        |
        ------------
         SMI Common
        ------------
             |
  +-----+--------+-----+- ...
  |     |        |     |
  |  gals-rx  gals-rx  |
  |     |        |     |
  |     |        |     |
  |  gals-tx  gals-tx  |
  |     |        |     |
larb1 larb2   larb3  larb4

GALS only help transfer the command/data while it doesn't have the
configuring register, thus it has the special "smi" clock and doesn't
have the "apb" clock. From the diagram above, we add "gals0" and
"gals1" clocks for smi-common and add a "gals" clock for smi-larb.

This patch adds gals clock supporting in the SMI. Note that some larbs
may still don't have the "gals" clock like larb1 and larb4 above.

This is also a preparing patch for mt8183 which has GALS.

CC: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-08-30 15:57:27 +02:00
Yong Wu 42d42c76f8 memory: mtk-smi: Use a struct for the platform data for smi-common
Use a struct as the platform special data instead of the enumeration.

Also there is a minor change that moving the position of
"enum mtk_smi_gen" definition, this is because we expect define
"struct mtk_smi_common_plat" before it is referred.

This is a preparing patch for mt8183.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-08-30 15:57:26 +02:00
Yong Wu 2e9b0908f5 memory: mtk-smi: Use a general config_port interface
The config_port of mt2712 and mt8183 are the same. Use a general
config_port interface instead.

In addition, in mt2712, larb8 and larb9 are the bdpsys larbs which
are not the normal larb, their register space are different from the
normal one. thus, we can not call the general config_port. In mt8183,
IPU0/1 and CCU connect with smi-common directly, they also are not
the normal larb. Hence, we add a "larb_direct_to_common_mask" for these
larbs which connect to smi-commmon directly.

This is also a preparing patch for adding mt8183 SMI support.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-08-30 15:57:26 +02:00
Linus Torvalds 168c79971b Kbuild updates for v5.3 (2nd)
- match the directory structure of the linux-libc-dev package to that of
   Debian-based distributions
 
 - fix incorrect include/config/auto.conf generation when Kconfig creates
   it along with the .config file
 
 - remove misleading $(AS) from documents
 
 - clean up precious tag files by distclean instead of mrproper
 
 - add a new coccinelle patch for devm_platform_ioremap_resource migration
 
 - refactor module-related scripts to read modules.order instead of
   $(MODVERDIR)/*.mod files to get the list of created modules
 
 - remove MODVERDIR
 
 - update list of header compile-test
 
 - add -fcf-protection=none flag to avoid conflict with the retpoline
   flags when CONFIG_RETPOLINE=y
 
 - misc cleanups
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Merge tag 'kbuild-v5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild

Pull more Kbuild updates from Masahiro Yamada:

 - match the directory structure of the linux-libc-dev package to that
   of Debian-based distributions

 - fix incorrect include/config/auto.conf generation when Kconfig
   creates it along with the .config file

 - remove misleading $(AS) from documents

 - clean up precious tag files by distclean instead of mrproper

 - add a new coccinelle patch for devm_platform_ioremap_resource
   migration

 - refactor module-related scripts to read modules.order instead of
   $(MODVERDIR)/*.mod files to get the list of created modules

 - remove MODVERDIR

 - update list of header compile-test

 - add -fcf-protection=none flag to avoid conflict with the retpoline
   flags when CONFIG_RETPOLINE=y

 - misc cleanups

* tag 'kbuild-v5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (25 commits)
  kbuild: add -fcf-protection=none when using retpoline flags
  kbuild: update compile-test header list for v5.3-rc1
  kbuild: split out *.mod out of {single,multi}-used-m rules
  kbuild: remove 'prepare1' target
  kbuild: remove the first line of *.mod files
  kbuild: create *.mod with full directory path and remove MODVERDIR
  kbuild: export_report: read modules.order instead of .tmp_versions/*.mod
  kbuild: modpost: read modules.order instead of $(MODVERDIR)/*.mod
  kbuild: modsign: read modules.order instead of $(MODVERDIR)/*.mod
  kbuild: modinst: read modules.order instead of $(MODVERDIR)/*.mod
  scsi: remove pointless $(MODVERDIR)/$(obj)/53c700.ver
  kbuild: remove duplication from modules.order in sub-directories
  kbuild: get rid of kernel/ prefix from in-tree modules.{order,builtin}
  kbuild: do not create empty modules.order in the prepare stage
  coccinelle: api: add devm_platform_ioremap_resource script
  kbuild: compile-test headers listed in header-test-m as well
  kbuild: remove unused hostcc-option
  kbuild: remove tag files by distclean instead of mrproper
  kbuild: add --hash-style= and --build-id unconditionally
  kbuild: get rid of misleading $(AS) from documents
  ...
2019-07-20 09:34:55 -07:00
Linus Torvalds 8362fd64f0 ARM: SoC-related driver updates
Various driver updates for platforms and a couple of the small driver
 subsystems we merge through our tree:
 
  - A driver for SCU (system control) on NXP i.MX8QXP
  - Qualcomm Always-on Subsystem messaging driver (AOSS QMP)
  - Qualcomm PM support for MSM8998
  - Support for a newer version of DRAM PHY driver for Broadcom (DPFE)
  - Reset controller support for Bitmain BM1880
  - TI SCI (System Control Interface) support for CPU control on AM654
    processors
  - More TI sysc refactoring and rework
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms and a couple of the small driver
  subsystems we merge through our tree:

   - A driver for SCU (system control) on NXP i.MX8QXP

   - Qualcomm Always-on Subsystem messaging driver (AOSS QMP)

   - Qualcomm PM support for MSM8998

   - Support for a newer version of DRAM PHY driver for Broadcom (DPFE)

   - Reset controller support for Bitmain BM1880

   - TI SCI (System Control Interface) support for CPU control on AM654
     processors

   - More TI sysc refactoring and rework"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (84 commits)
  reset: remove redundant null check on pointer dev
  soc: rockchip: work around clang warning
  dt-bindings: reset: imx7: Fix the spelling of 'indices'
  soc: imx: Add i.MX8MN SoC driver support
  soc: aspeed: lpc-ctrl: Fix probe error handling
  soc: qcom: geni: Add support for ACPI
  firmware: ti_sci: Fix gcc unused-but-set-variable warning
  firmware: ti_sci: Use the correct style for SPDX License Identifier
  soc: imx8: Use existing of_root directly
  soc: imx8: Fix potential kernel dump in error path
  firmware/psci: psci_checker: Park kthreads before stopping them
  memory: move jedec_ddr.h from include/memory to drivers/memory/
  memory: move jedec_ddr_data.c from lib/ to drivers/memory/
  MAINTAINERS: Remove myself as qcom maintainer
  soc: aspeed: lpc-ctrl: make parameter optional
  soc: qcom: apr: Don't use reg for domain id
  soc: qcom: fix QCOM_AOSS_QMP dependency and build errors
  memory: tegra: Fix -Wunused-const-variable
  firmware: tegra: Early resume BPMP
  soc/tegra: Select pinctrl for Tegra194
  ...
2019-07-19 17:13:56 -07:00
Linus Torvalds fa121bb3fe The main MIPS changes for a pretty light v5.3 cycle, including:
- Removal of readq & writeq for MIPS32 kernels where they would simply
   BUG() anyway, allowing drivers or other code that #ifdefs on their
   presence to work properly.
 
 - Improvements for Ingenic JZ4740 systems, including support for the
   external memory controller & pinmuxing fixes for qi_lb60/NanoNote
   systems.
 
 - Improvements for Lantiq systems, in particular around SMP & IPIs.
 
 - DT updates for ralink/MediaTek MT7628a systems to probe & configure a
   bunch more devices.
 
 - Miscellaneous cleanups & build fixes.
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Merge tag 'mips_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Paul Burton:
 "A light batch this time around but significant improvements for
  certain systems:

   - Removal of readq & writeq for MIPS32 kernels where they would
     simply BUG() anyway, allowing drivers or other code that #ifdefs on
     their presence to work properly.

   - Improvements for Ingenic JZ4740 systems, including support for the
     external memory controller & pinmuxing fixes for qi_lb60/NanoNote
     systems.

   - Improvements for Lantiq systems, in particular around SMP & IPIs.

   - DT updates for ralink/MediaTek MT7628a systems to probe & configure
     a bunch more devices.

   - Miscellaneous cleanups & build fixes"

* tag 'mips_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits)
  MIPS: fix some more fall through errors in arch/mips
  MIPS: perf events: handle switch statement falling through warnings
  mips/kprobes: Export kprobe_fault_handler()
  MAINTAINERS: Add myself as Ingenic SoCs maintainer
  MIPS: ralink: mt7628a.dtsi: Add watchdog controller DT node
  MIPS: ralink: mt7628a.dtsi: Add SPI controller DT node
  MIPS: ralink: mt7628a.dtsi: Add GPIO controller DT node
  MIPS: ralink: mt7628a.dtsi: Add pinctrl DT properties to the UART nodes
  MIPS: ralink: mt7628a.dtsi: Add pinmux DT node
  MIPS: ralink: mt7628a.dtsi: Add SPDX GPL-2.0 license identifier
  MIPS: lantiq: Add SMP support for lantiq interrupt controller
  MIPS: lantiq: Shorten register names, remove unused macros
  MIPS: lantiq: Fix bitfield masking
  MIPS: lantiq: Remove unused macros
  MIPS: lantiq: Fix attributes of of_device_id structure
  MIPS: lantiq: Change variables to the same type as the source
  MIPS: lantiq: Move macro directly to iomem function
  mips: Remove q-accessors from non-64bit platforms
  FDDI: defza: Include linux/io-64-nonatomic-lo-hi.h
  MIPS: configs: Remove useless UEVENT_HELPER_PATH
  ...
2019-07-17 09:42:03 -07:00
Masahiro Yamada eef58fdd01 memory: ti-emif-sram: move driver-specific asm-offset.h to drivers/memory/
<generated/ti-emif-asm-offsets.h> is only generated and included
by drivers/memory/, so it does not need to reside in the globally
visible include/generated/.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
2019-07-17 10:25:10 +09:00
Linus Torvalds 97ff4ca46d Char / Misc driver patches for 5.3-rc1
Here is the "large" pull request for char and misc and other assorted
 smaller driver subsystems for 5.3-rc1.
 
 It seems that this tree is becoming the funnel point of lots of smaller
 driver subsystems, which is fine for me, but that's why it is getting
 larger over time and does not just contain stuff under drivers/char/ and
 drivers/misc.
 
 Lots of small updates all over the place here from different driver
 subsystems:
   - habana driver updates
   - coresight driver updates
   - documentation file movements and updates
   - Android binder fixes and updates
   - extcon driver updates
   - google firmware driver updates
   - fsi driver updates
   - smaller misc and char driver updates
   - soundwire driver updates
   - nvmem driver updates
   - w1 driver fixes
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc driver updates from Greg KH:
 "Here is the "large" pull request for char and misc and other assorted
  smaller driver subsystems for 5.3-rc1.

  It seems that this tree is becoming the funnel point of lots of
  smaller driver subsystems, which is fine for me, but that's why it is
  getting larger over time and does not just contain stuff under
  drivers/char/ and drivers/misc.

  Lots of small updates all over the place here from different driver
  subsystems:
   - habana driver updates
   - coresight driver updates
   - documentation file movements and updates
   - Android binder fixes and updates
   - extcon driver updates
   - google firmware driver updates
   - fsi driver updates
   - smaller misc and char driver updates
   - soundwire driver updates
   - nvmem driver updates
   - w1 driver fixes

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (188 commits)
  coresight: Do not default to CPU0 for missing CPU phandle
  dt-bindings: coresight: Change CPU phandle to required property
  ocxl: Allow contexts to be attached with a NULL mm
  fsi: sbefifo: Don't fail operations when in SBE IPL state
  coresight: tmc: Smatch: Fix potential NULL pointer dereference
  coresight: etm3x: Smatch: Fix potential NULL pointer dereference
  coresight: Potential uninitialized variable in probe()
  coresight: etb10: Do not call smp_processor_id from preemptible
  coresight: tmc-etf: Do not call smp_processor_id from preemptible
  coresight: tmc-etr: alloc_perf_buf: Do not call smp_processor_id from preemptible
  coresight: tmc-etr: Do not call smp_processor_id() from preemptible
  docs: misc-devices: convert files without extension to ReST
  fpga: dfl: fme: align PR buffer size per PR datawidth
  fpga: dfl: fme: remove copy_to_user() in ioctl for PR
  fpga: dfl-fme-mgr: fix FME_PR_INTFC_ID register address.
  intel_th: msu: Start read iterator from a non-empty window
  intel_th: msu: Split sgt array and pointer in multiwindow mode
  intel_th: msu: Support multipage blocks
  intel_th: pci: Add Ice Lake NNPI support
  intel_th: msu: Fix single mode with disabled IOMMU
  ...
2019-07-11 15:34:05 -07:00
Linus Torvalds 2ec98f5678 Bulk GPIO changes for the v5.3 kernel cycle:
Core:
 
 - When a gpio_chip request GPIOs from itself, it can now fully
   control the line characteristics, both machine and consumer
   flags. This makes a lot of sense, but took some time before I
   figured out that this is how it has to work.
 
 - Several smallish documentation fixes.
 
 New drivers:
 
 - The PCA953x driver now supports the TI TCA9539.
 
 - The DaVinci driver now supports the K3 AM654 SoCs.
 
 Driver improvements:
 
 - Major overhaul and hardening of the OMAP driver by Russell
   King.
 
 - Starting to move some drivers to the new API passing irq_chip
   along with the gpio_chip when adding the gpio_chip instead
   of adding it separately.
 
 Unrelated:
 
 - Delete the FMC subsystem.
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Merge tag 'gpio-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the big slew of GPIO changes for the v5.3 kernel cycle. This
  is mostly incremental work this time.

  Three important things:

   - The FMC subsystem is deleted through my tree. This happens through
     GPIO as its demise was discussed in relation to a patch decoupling
     its GPIO implementation from the standard way of handling GPIO. As
     it turns out, that is not the only subsystem it reimplements and
     the authors think it is better do scratch it and start over using
     the proper kernel subsystems than try to polish the rust shiny. See
     the commit (ACKed by the maintainers) for details.

   - Arnd made a small devres patch that was ACKed by Greg and goes into
     the device core.

   - SPDX header change colissions may happen, because at times I've
     seen that quite a lot changed during the -rc:s in regards to SPDX.
     (It is good stuff, tglx has me convinced, and it is worth the
     occasional pain.)

  Apart from this is is nothing controversial or problematic.

  Summary:

  Core:

   - When a gpio_chip request GPIOs from itself, it can now fully
     control the line characteristics, both machine and consumer flags.
     This makes a lot of sense, but took some time before I figured out
     that this is how it has to work.

   - Several smallish documentation fixes.

  New drivers:

   - The PCA953x driver now supports the TI TCA9539.

   - The DaVinci driver now supports the K3 AM654 SoCs.

  Driver improvements:

   - Major overhaul and hardening of the OMAP driver by Russell King.

   - Starting to move some drivers to the new API passing irq_chip along
     with the gpio_chip when adding the gpio_chip instead of adding it
     separately.

  Unrelated:

   - Delete the FMC subsystem"

* tag 'gpio-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (87 commits)
  Revert "gpio: tegra: Clean-up debugfs initialisation"
  gpiolib: Use spinlock_t instead of struct spinlock
  gpio: stp-xway: allow compile-testing
  gpio: stp-xway: get rid of the #include <lantiq_soc.h> dependency
  gpio: stp-xway: improve module clock error handling
  gpio: stp-xway: simplify error handling in xway_stp_probe()
  gpiolib: Clarify use of non-sleeping functions
  gpiolib: Fix references to gpiod_[gs]et_*value_cansleep() variants
  gpiolib: Document new gpio_chip.init_valid_mask field
  Documentation: gpio: Fix reference to gpiod_get_array()
  gpio: pl061: drop duplicate printing of device name
  gpio: altera: Pass irqchip when adding gpiochip
  gpio: siox: Use devm_ managed gpiochip
  gpio: siox: Add struct device *dev helper variable
  gpio: siox: Pass irqchip when adding gpiochip
  drivers: gpio: amd-fch: make resource struct const
  devres: allow const resource arguments
  gpio: ath79: Pass irqchip when adding gpiochip
  gpio: tegra: Clean-up debugfs initialisation
  gpio: siox: Switch to IRQ_TYPE_NONE
  ...
2019-07-09 09:07:00 -07:00
Olof Johansson 09c4e038d4 memory: tegra: Changes for v5.3-rc1
A single fix for an unused constant variable, due to it being declared
 outside the only #ifdef that it was being used from.
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Merge tag 'tegra-for-5.3-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

memory: tegra: Changes for v5.3-rc1

A single fix for an unused constant variable, due to it being declared
outside the only #ifdef that it was being used from.

* tag 'tegra-for-5.3-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Fix -Wunused-const-variable

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 05:42:12 -07:00
Greg Kroah-Hartman 8083f3d788 Merge 5.2-rc6 into char-misc-next
We need the char-misc fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-23 09:23:33 +02:00
Paul Cercueil a00b004218 memory: jz4780_nemc: Add support for the JZ4740
Add support for the JZ4740 SoC from Ingenic.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-21 16:08:19 +02:00
Paul Cercueil 1a927ad64b memory: jz4780-nemc: Reduce size of const array
The maximum value found in that array is 15, there's no need to store
these values as uint32_t, a uint8_t is enough.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-21 16:08:19 +02:00
Paul Cercueil 94b3a02c31 memory: Kconfig: Drop dependency on MACH_JZ4780 for jz4780
Depending on MACH_JZ4780 prevent us from creating a generic kernel that
works on more than one MIPS board. Instead, we just depend on MIPS being
set.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-21 16:08:19 +02:00
Thomas Gleixner d2912cb15b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:55 +02:00
Thomas Gleixner 714c29cf98 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 471
Based on 1 normalized pattern(s):

  released under the gplv2 only spdx license identifier gpl 2 0

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 3 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Enrico Weigelt <info@metux.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081203.262169268@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:11 +02:00
Olof Johansson 426356392c This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes
for 5.3, please pull the following:
 
 - Markus provides a set of updates to the DPFE driver to support a new
   revision of the API to the firmware (version 3) and provides minor fixes
   about how the MR4-8 words are read for LPDDR4 devices
 
 - Florian removes a print of a virtual address in brcmstb_gisb.c
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Merge tag 'arm-soc/for-5.3/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes
for 5.3, please pull the following:

- Markus provides a set of updates to the DPFE driver to support a new
  revision of the API to the firmware (version 3) and provides minor fixes
  about how the MR4-8 words are read for LPDDR4 devices

- Florian removes a print of a virtual address in brcmstb_gisb.c

* tag 'arm-soc/for-5.3/drivers' of https://github.com/Broadcom/stblinux:
  memory: brcmstb: dpfe: introduce DPFE API v3
  memory: brcmstb: dpfe: prepare for API-dependent sysfs attributes
  memory: brcmstb: dpfe: prepare support for multiple API versions
  memory: brcmstb: dpfe: wait for DCPU to be ready
  memory: brcmstb: dpfe: report firmware loading error
  memory: brcmstb: dpfe: remove unused code and fix formatting
  bus: brcmstb_gisb: Remove print of base address
  memory: brcmstb: dpfe: use byte 3 of registers MR4-MR8
  memory: brcmstb: dpfe: optimize generic_show()
  memory: brcmstb: dpfe: use msleep() over udelay()

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-17 04:52:52 -07:00
Masahiro Yamada 5ec47cda74 memory: move jedec_ddr.h from include/memory to drivers/memory/
Now that jedec_ddr_data.c was moved from lib/ to drivers/memory/,
<memory/jedec_ddr.h> is included only from drivers/memory/.

Make it a local header of drivers/memory/.

The directory include/memory is now gone.

While I am here, I also changed #include <linux/module.h> to
<linux/export.h>. Because CONFIG_DDR is bool, jedec_ddr_data.c is
never compiled as a module.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-17 04:45:21 -07:00
Masahiro Yamada 7b43b8fdc9 memory: move jedec_ddr_data.c from lib/ to drivers/memory/
jedec_ddr_data.c exports 3 symbols, and all of them are only
referenced from drivers/memory/{emif.c,of_memory.c}

drivers/memory/ is a better location than lib/.

I removed the Kconfig prompt "JEDEC DDR data" because it is only
select'ed by TI_EMIF, and there is no other user. There is no good
reason in making it a user-configurable CONFIG option.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-17 04:45:17 -07:00
Nathan Huckleberry 76ce48bdb3 memory: tegra: Fix -Wunused-const-variable
Clang produces the following warning

drivers/memory/tegra/tegra124.c:36:28: warning: unused variable
'tegra124_mc_emem_regs' [-Wunused-const-variable]
static const unsigned long tegra124_mc_emem_regs[] = {
                           ^

The only usage of this variable is from within an ifdef.
It seems logical to move the variable into the ifdef as well.

Cc: clang-built-linux@googlegroups.com
Link: https://github.com/ClangBuiltLinux/linux/issues/526
Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-14 18:02:02 +02:00
Geert Uytterhoeven d171df6b73
memory: jz4780-nemc: Grammar s/the its/its/
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Kosina <trivial@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
2019-06-11 15:46:21 -07:00
Paul Cercueil 56a171e5dc
memory: jz4780-nemc: Reduce size of const array
The maximum value found in that array is 15, there's no need to store
these values as uint32_t, a uint8_t is enough.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-06-11 15:46:18 -07:00
Paul Cercueil fcbc3b104d
memory: jz4780_nemc: Add support for the JZ4740
Add support for the JZ4740 SoC from Ingenic.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-06-11 15:46:14 -07:00
Paul Cercueil ffa7546283
memory: Kconfig: Drop dependency on MACH_JZ4780 for jz4780
Depending on MACH_JZ4780 prevent us from creating a generic kernel that
works on more than one MIPS board. Instead, we just depend on MIPS being
set.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-06-11 15:45:57 -07:00
Linus Walleij 5923ea6c2c gpio: pass lookup and descriptor flags to request_own
When a gpio_chip wants to request a descriptor from itself
using gpiochip_request_own_desc() it needs to be able to specify
fully how to use the descriptor, notably line inversion
semantics. The workaround in the gpiolib.c can be removed
and cases (such as SPI CS) where we need at times to request
a GPIO with line inversion semantics directly on a chip for
workarounds, can be fully supported with this call.

Fix up some users of the API that weren't really using the
last flag to set up the line as input or output properly
but instead just calling direction setting explicitly
after requesting the line.

Cc: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-07 23:20:23 +02:00
Thomas Gleixner 2b72c9e36c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 340
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation version 2 of the license this program
  is distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not see http www gnu org
  licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 15 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190530000437.052642892@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:07 +02:00
Thomas Gleixner 9c92ab6191 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Based on 1 normalized pattern(s):

  this software is licensed under the terms of the gnu general public
  license version 2 as published by the free software foundation and
  may be copied distributed and modified under those terms this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 285 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Thomas Gleixner 1802d0beec treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 655 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:41 -07:00
Thomas Gleixner 2874c5fd28 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:32 -07:00
Thomas Gleixner 74ba9207e1 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 61
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  675 mass ave cambridge ma 02139 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 441 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190520071858.739733335@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-24 17:36:45 +02:00
Thomas Gleixner ec8f24b7fa treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 10:50:46 +02:00
Markus Mayer e3b7472362 memory: brcmstb: dpfe: introduce DPFE API v3
Introduce code to handle DPFE API v3. We also change the driver to
default to v3 by default and use API v2 only for select chips.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:32:35 -07:00
Markus Mayer 5ef108b446 memory: brcmstb: dpfe: prepare for API-dependent sysfs attributes
Prepare the driver so that sysfs attributes can differ based on the API
version.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:32:35 -07:00
Markus Mayer 58a8499f43 memory: brcmstb: dpfe: prepare support for multiple API versions
Extend the driver, so it can handle different API versions for
interacting with the DCPU. This is in preparation for the upcoming API
v3.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:32:35 -07:00
Markus Mayer a7c25759d8 memory: brcmstb: dpfe: wait for DCPU to be ready
We wait for the DCPU to be ready before sending a command.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:32:35 -07:00
Markus Mayer 6ca5d2ba9e memory: brcmstb: dpfe: report firmware loading error
Print an error message if the DCPU firmware couldn't be downloaded.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:32:35 -07:00
Markus Mayer 1ffc0b580b memory: brcmstb: dpfe: remove unused code and fix formatting
Remove an unused struct and fix source code formatting in a few areas.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:32:35 -07:00
Markus Mayer 78a6f5bef9 memory: brcmstb: dpfe: use byte 3 of registers MR4-MR8
For dual-rank LPDDR4, result data for any command is placed in byte 0
and byte 3 of the corresponding MR register by the firmware.
Single-rank RAM was supposed to work the same way. However, due to a
firmware bug, result values are only placed in byte 3 of the
corresponding MR register.

Since byte 3 works for single-rank and dual-rank setups, we change the
Linux driver to always use byte 3, thus returning the correct value in
either case.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:32:35 -07:00
Markus Mayer 900c8f578b memory: brcmstb: dpfe: optimize generic_show()
We can pass a (struct priv_data *) to generic_show() rather than a
(struct device *). For two of the three callers of this function, the
change means one less call to dev_get_drvdata(). For the third caller,
it makes no difference.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:32:35 -07:00
Markus Mayer 7ccd2ffce0 memory: brcmstb: dpfe: use msleep() over udelay()
To be more "scheduler friendly", we use msleep() rather than udelay()
while we wait for the DCPU to respond.

Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:32:35 -07:00
Linus Torvalds 815d469d8c One more patch to remove io.h from clk-provider.h. We used to need this
include when we had clk_readl() and clk_writel(), but those are gone now
 so this patch pushes the dependency out to the users of clk-provider.h.
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull more clk framework updates from Stephen Boyd:
 "One more patch to remove io.h from clk-provider.h.

  We used to need this include when we had clk_readl() and clk_writel(),
  but those are gone now so this patch pushes the dependency out to the
  users of clk-provider.h"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: Remove io.h from clk-provider.h
2019-05-16 19:05:35 -07:00
Linus Torvalds dc413a90ed ARM: SoC-related driver updates
Various driver updates for platforms and a couple of the small driver
 subsystems we merge through our tree:
 
 Among the larger pieces:
 
  - Power management improvements for TI am335x and am437x (RTC suspend/wake)
  - Misc new additions for Amlogic (socinfo updates)
  - ZynqMP FPGA manager
  - Nvidia improvements for reset/powergate handling
  - PMIC wrapper for Mediatek MT8516
  - Misc fixes/improvements for ARM SCMI, TEE, NXP i.MX SCU drivers
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms and a couple of the small driver
  subsystems we merge through our tree:

  Among the larger pieces:

   - Power management improvements for TI am335x and am437x (RTC
     suspend/wake)

   - Misc new additions for Amlogic (socinfo updates)

   - ZynqMP FPGA manager

   - Nvidia improvements for reset/powergate handling

   - PMIC wrapper for Mediatek MT8516

   - Misc fixes/improvements for ARM SCMI, TEE, NXP i.MX SCU drivers"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits)
  soc: aspeed: fix Kconfig
  soc: add aspeed folder and misc drivers
  spi: zynqmp: Fix build break
  soc: imx: Add generic i.MX8 SoC driver
  MAINTAINERS: Update email for Qualcomm SoC maintainer
  memory: tegra: Fix a typos for "fdcdwr2" mc client
  Revert "ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+"
  memory: tegra: Replace readl-writel with mc_readl-mc_writel
  memory: tegra: Fix integer overflow on tick value calculation
  memory: tegra: Fix missed registers values latching
  ARM: tegra: cpuidle: Handle tick broadcasting within cpuidle core on Tegra20/30
  optee: allow to work without static shared memory
  soc/tegra: pmc: Move powergate initialisation to probe
  soc/tegra: pmc: Remove reset sysfs entries on error
  soc/tegra: pmc: Fix reset sources and levels
  soc: amlogic: meson-gx-pwrc-vpu: Add support for G12A
  soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask
  fpga manager: Adding FPGA Manager support for Xilinx zynqmp
  dt-bindings: fpga: Add bindings for ZynqMP fpga driver
  firmware: xilinx: Add fpga API's
  ...
2019-05-16 09:19:14 -07:00
Stephen Boyd 62e59c4e69 clk: Remove io.h from clk-provider.h
Now that we've gotten rid of clk_readl() we can remove io.h from the
clk-provider header and push out the io.h include to any code that isn't
already including the io.h header but using things like readl/writel,
etc.

Found with this grep:

  git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \
  	xargs git grep -l \
	-e '\<__iowrite32_copy\>' --or \
	-e '\<__ioread32_copy\>' --or \
	-e '\<__iowrite64_copy\>' --or \
	-e '\<ioremap_page_range\>' --or \
	-e '\<ioremap_huge_init\>' --or \
	-e '\<arch_ioremap_pud_supported\>' --or \
	-e '\<arch_ioremap_pmd_supported\>' --or \
	-e '\<devm_ioport_map\>' --or \
	-e '\<devm_ioport_unmap\>' --or \
	-e '\<IOMEM_ERR_PTR\>' --or \
	-e '\<devm_ioremap\>' --or \
	-e '\<devm_ioremap_nocache\>' --or \
	-e '\<devm_ioremap_wc\>' --or \
	-e '\<devm_iounmap\>' --or \
	-e '\<devm_ioremap_release\>' --or \
	-e '\<devm_memremap\>' --or \
	-e '\<devm_memunmap\>' --or \
	-e '\<__devm_memremap_pages\>' --or \
	-e '\<pci_remap_cfgspace\>' --or \
	-e '\<arch_has_dev_port\>' --or \
	-e '\<arch_phys_wc_add\>' --or \
	-e '\<arch_phys_wc_del\>' --or \
	-e '\<memremap\>' --or \
	-e '\<memunmap\>' --or \
	-e '\<arch_io_reserve_memtype_wc\>' --or \
	-e '\<arch_io_free_memtype_wc\>' --or \
	-e '\<__io_aw\>' --or \
	-e '\<__io_pbw\>' --or \
	-e '\<__io_paw\>' --or \
	-e '\<__io_pbr\>' --or \
	-e '\<__io_par\>' --or \
	-e '\<__raw_readb\>' --or \
	-e '\<__raw_readw\>' --or \
	-e '\<__raw_readl\>' --or \
	-e '\<__raw_readq\>' --or \
	-e '\<__raw_writeb\>' --or \
	-e '\<__raw_writew\>' --or \
	-e '\<__raw_writel\>' --or \
	-e '\<__raw_writeq\>' --or \
	-e '\<readb\>' --or \
	-e '\<readw\>' --or \
	-e '\<readl\>' --or \
	-e '\<readq\>' --or \
	-e '\<writeb\>' --or \
	-e '\<writew\>' --or \
	-e '\<writel\>' --or \
	-e '\<writeq\>' --or \
	-e '\<readb_relaxed\>' --or \
	-e '\<readw_relaxed\>' --or \
	-e '\<readl_relaxed\>' --or \
	-e '\<readq_relaxed\>' --or \
	-e '\<writeb_relaxed\>' --or \
	-e '\<writew_relaxed\>' --or \
	-e '\<writel_relaxed\>' --or \
	-e '\<writeq_relaxed\>' --or \
	-e '\<readsb\>' --or \
	-e '\<readsw\>' --or \
	-e '\<readsl\>' --or \
	-e '\<readsq\>' --or \
	-e '\<writesb\>' --or \
	-e '\<writesw\>' --or \
	-e '\<writesl\>' --or \
	-e '\<writesq\>' --or \
	-e '\<inb\>' --or \
	-e '\<inw\>' --or \
	-e '\<inl\>' --or \
	-e '\<outb\>' --or \
	-e '\<outw\>' --or \
	-e '\<outl\>' --or \
	-e '\<inb_p\>' --or \
	-e '\<inw_p\>' --or \
	-e '\<inl_p\>' --or \
	-e '\<outb_p\>' --or \
	-e '\<outw_p\>' --or \
	-e '\<outl_p\>' --or \
	-e '\<insb\>' --or \
	-e '\<insw\>' --or \
	-e '\<insl\>' --or \
	-e '\<outsb\>' --or \
	-e '\<outsw\>' --or \
	-e '\<outsl\>' --or \
	-e '\<insb_p\>' --or \
	-e '\<insw_p\>' --or \
	-e '\<insl_p\>' --or \
	-e '\<outsb_p\>' --or \
	-e '\<outsw_p\>' --or \
	-e '\<outsl_p\>' --or \
	-e '\<ioread8\>' --or \
	-e '\<ioread16\>' --or \
	-e '\<ioread32\>' --or \
	-e '\<ioread64\>' --or \
	-e '\<iowrite8\>' --or \
	-e '\<iowrite16\>' --or \
	-e '\<iowrite32\>' --or \
	-e '\<iowrite64\>' --or \
	-e '\<ioread16be\>' --or \
	-e '\<ioread32be\>' --or \
	-e '\<ioread64be\>' --or \
	-e '\<iowrite16be\>' --or \
	-e '\<iowrite32be\>' --or \
	-e '\<iowrite64be\>' --or \
	-e '\<ioread8_rep\>' --or \
	-e '\<ioread16_rep\>' --or \
	-e '\<ioread32_rep\>' --or \
	-e '\<ioread64_rep\>' --or \
	-e '\<iowrite8_rep\>' --or \
	-e '\<iowrite16_rep\>' --or \
	-e '\<iowrite32_rep\>' --or \
	-e '\<iowrite64_rep\>' --or \
	-e '\<__io_virt\>' --or \
	-e '\<pci_iounmap\>' --or \
	-e '\<virt_to_phys\>' --or \
	-e '\<phys_to_virt\>' --or \
	-e '\<ioremap_uc\>' --or \
	-e '\<ioremap\>' --or \
	-e '\<__ioremap\>' --or \
	-e '\<iounmap\>' --or \
	-e '\<ioremap\>' --or \
	-e '\<ioremap_nocache\>' --or \
	-e '\<ioremap_uc\>' --or \
	-e '\<ioremap_wc\>' --or \
	-e '\<ioremap_wc\>' --or \
	-e '\<ioremap_wt\>' --or \
	-e '\<ioport_map\>' --or \
	-e '\<ioport_unmap\>' --or \
	-e '\<ioport_map\>' --or \
	-e '\<ioport_unmap\>' --or \
	-e '\<xlate_dev_kmem_ptr\>' --or \
	-e '\<xlate_dev_mem_ptr\>' --or \
	-e '\<unxlate_dev_mem_ptr\>' --or \
	-e '\<virt_to_bus\>' --or \
	-e '\<bus_to_virt\>' --or \
	-e '\<memset_io\>' --or \
	-e '\<memcpy_fromio\>' --or \
	-e '\<memcpy_toio\>'

I also reordered a couple includes when they weren't alphabetical and
removed clk.h from kona, replacing it with clk-provider.h because
that driver doesn't use clk consumer APIs.

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Cc: Chris Zankel <chris@zankel.net>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: John Crispin <john@phrozen.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-05-15 13:21:37 -07:00
Linus Torvalds 4dbf09fea6 This pull request contains the following changes for MTD:
MTD core changes:
 - New AFS partition parser
 - Update MAINTAINERS entry
 - Use of fall-throughs markers
 
 NAND core changes:
 - Support having the bad block markers in either the first, second or
   last page of a block. The combination of all three location is now
   possible.
 - Constification of NAND_OP_PARSER(_PATTERN) elements.
 - Generic NAND DT bindings changed to yaml format (can be used to
   check the proposed bindings. First platform to be fully supported:
   sunxi.
 - Stopped using several legacy hooks.
 - Preparation to use the generic NAND layer with the addition of
   several helpers and the removal of the struct nand_chip from generic
   functions.
 - Kconfig cleanup to prepare the introduction of external ECC engines
   support.
 - Fallthrough comments.
 - Introduction of the SPI-mem dirmap API for SPI-NAND devices.
 
 Raw NAND controller drivers changes:
 - nandsim:
   * Switch to ->exec-op().
 - meson:
   * Misc cleanups and fixes.
   * New OOB layout.
 - Sunxi:
   * A23/A33 NAND DMA support.
 - Ingenic:
   * Full reorganization and cleanup.
   * Clear separation between NAND controller and ECC engine.
   * Support JZ4740 an JZ4725B.
 - Denali:
   * Clear controller/chip separation.
   * ->exec_op() migration.
   * Various cleanups.
 - fsl_elbc:
   * Enable software ECC support.
 - Atmel:
   * Sam9x60 support.
 - GPMI:
   * Introduce the GPMI_IS_MXS() macro.
 - Various trivial/spelling/coding style fixes.
 
 SPI NOR core changes:
 - Print all JEDEC ID bytes on error
 - Fix comment of spi_nor_find_best_erase_type()
 - Add region locking flags for s25fl512s
 
 SPI NOR controller drivers changes:
 - intel-spi:
   * Avoid crossing 4K address boundary on read/write
   * Add support for Intel Comet Lake SPI serial flash
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Merge tag 'mtd/for-5.2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Richard Weinberger:
 "MTD core changes:
   - New AFS partition parser
   - Update MAINTAINERS entry
   - Use of fall-throughs markers

  NAND core changes:
   - Support having the bad block markers in either the first, second or
     last page of a block. The combination of all three location is now
     possible.
   - Constification of NAND_OP_PARSER(_PATTERN) elements.
   - Generic NAND DT bindings changed to yaml format (can be used to
     check the proposed bindings. First platform to be fully supported:
     sunxi.
   - Stopped using several legacy hooks.
   - Preparation to use the generic NAND layer with the addition of
     several helpers and the removal of the struct nand_chip from
     generic functions.
   - Kconfig cleanup to prepare the introduction of external ECC engines
     support.
   - Fallthrough comments.
   - Introduction of the SPI-mem dirmap API for SPI-NAND devices.

  Raw NAND controller drivers changes:
   - nandsim:
      - Switch to ->exec-op().
   - meson:
      - Misc cleanups and fixes.
      - New OOB layout.
   - Sunxi:
      - A23/A33 NAND DMA support.
   - Ingenic:
      - Full reorganization and cleanup.
      - Clear separation between NAND controller and ECC engine.
      - Support JZ4740 an JZ4725B.
   - Denali:
      - Clear controller/chip separation.
      - ->exec_op() migration.
      - Various cleanups.
   - fsl_elbc:
      - Enable software ECC support.
   - Atmel:
      - Sam9x60 support.
   - GPMI:
      - Introduce the GPMI_IS_MXS() macro.
   - Various trivial/spelling/coding style fixes.

  SPI NOR core changes:
   - Print all JEDEC ID bytes on error
   - Fix comment of spi_nor_find_best_erase_type()
   - Add region locking flags for s25fl512s

  SPI NOR controller drivers changes:
   - intel-spi:
      - Avoid crossing 4K address boundary on read/write
      - Add support for Intel Comet Lake SPI serial flash"

* tag 'mtd/for-5.2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (120 commits)
  mtd: part: fix incorrect format specifier for an unsigned long long
  mtd: lpddr_cmds: Mark expected switch fall-through
  mtd: phram: Mark expected switch fall-throughs
  mtd: cfi_cmdset_0002: Mark expected switch fall-throughs
  mtd: cfi_util: mark expected switch fall-throughs
  MAINTAINERS: MTD Git repository is hosted on kernel.org
  MAINTAINERS: Update jffs2 entry
  mtd: afs: add v2 partition parsing
  mtd: afs: factor the IIS read into partition parser
  mtd: afs: factor footer parsing into the v1 part parsing
  mtd: factor out v1 partition parsing
  mtd: afs: simplify partition detection
  mtd: afs: simplify partition parsing
  mtd: partitions: Add OF support to AFS partitions
  mtd: partitions: Add AFS partitions DT bindings
  mtd: afs: Move AFS partition parser to parsers subdir
  mtd: maps: Make uclinux_ram_map static
  mtd: maps: Allow MTD_PHYSMAP with MTD_RAM
  MAINTAINERS: Add myself as MTD maintainer
  MAINTAINERS: Remove my name from the MTD and NAND entries
  ...
2019-05-12 17:57:52 -04:00
Olof Johansson 2195471254 memory: tegra: Changes for v5.2-rc1
These are a set of fixes for various issues related to the Tegra memory
 controller.
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Merge tag 'tegra-for-5.2-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

memory: tegra: Changes for v5.2-rc1

These are a set of fixes for various issues related to the Tegra memory
controller.

* tag 'tegra-for-5.2-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Fix a typos for "fdcdwr2" mc client
  Revert "ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+"
  memory: tegra: Replace readl-writel with mc_readl-mc_writel
  memory: tegra: Fix integer overflow on tick value calculation
  memory: tegra: Fix missed registers values latching
  memory: tegra: Properly spell "tegra"
  memory: tegra: Make terga20_mc_reset_ops static

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-28 23:35:18 -07:00
Edward Cragg 67a8d5b0fa memory: tegra: Fix a typos for "fdcdwr2" mc client
Fix typo for fdcwr2 to fdcdwr2 to match the TRM.

Signed-off-by: Edward Cragg <drq.11235@gmail.com>
Signed-off-by: Kejia Hu <kejia.hu@codethink.co.uk>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-18 11:51:17 +02:00
Dmitry Osipenko 48791f9722 memory: tegra: Replace readl-writel with mc_readl-mc_writel
There is no need for a memory barriers on reading/writing of register
values as we only care about the read/write order, hence let's use the
common helpers.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-18 11:36:10 +02:00
Dmitry Osipenko b906c056b6 memory: tegra: Fix integer overflow on tick value calculation
Multiplying the Memory Controller clock rate by the tick count results
in an integer overflow and in result the truncated tick value is being
programmed into hardware, such that the GR3D memory client performance is
reduced by two times.

Cc: stable <stable@vger.kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-18 11:35:55 +02:00
Dmitry Osipenko 76b959a44c memory: tegra: Fix missed registers values latching
Some of Memory Controller registers are shadowed and require latching in
order to copy assembly state into the active, MC_EMEM_ARB_CFG is one of
these registers.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-18 11:35:38 +02:00
Thierry Reding cb2b58391e memory: tegra: Properly spell "tegra"
Rename all occurrences of "terga" to "tegra". It's an easy typo to make
and a difficult one to spot.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-11 17:58:41 +02:00