The cpuidle support calls cpu_suspend(), which is compiled conditionally,
and fails to link unless something selects CONFIG_ARM_CPU_SUSPEND.
arch/arm/mach-imx/cpuidle-imx6sx.o: In function `imx6sx_enter_wait':
cpuidle-imx6sx.c:(.text+0x6c): undefined reference to `cpu_suspend'
This adds an explicit select statement here.
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add i.MX 6SoloLiteLite (i.MX6SLL) SoC support on top of the existing
i.MX6SL platform code.
- Improve the SoC revision mapping by utilizing the MAJOR field of
ANATOP DIGPROG register.
- Add CPUIDLE_FLAG_TIMER_STOP flag for cpuidle ARM power off state,
so that we can use ARM generic timer for some i.MX6 SoC.
- Set low-power interrupt mask for i.MX25 to support STOP mode.
- Drop EPIT driver as there is no user of it.
- Simplify the error path of imx6_pm_get_base() a bit.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJaqidWAAoJEFBXWFqHsHzO5OgIALasN3eUJ8TmVJOChBBC4lCc
20e9B0dqrnKfh3rXfPKl2LiG7SWid288V1T9X4K54PScgSaWFvV8zAwabchXP1Ev
cl2yUzOT7YZlcRFw8EYJufEPS41KgTrF84Vkm6hDYeEErKDu9tw/L8qyhMPm6421
jkHvfU4kVVtJ+k9szwId7ua7nw021l9KtI1G1qdQZ3e/Kkagg3/MemVKiAERsou3
J11hUc5rG5+1/5pgU7HTwN2q3Q6JbBvhF2MHfVEuAP0GUVBk2hFAD4mxczcvSOjW
KyQJQaQ4qEbpiJqdaHhBjA2XDSASo8S/y/92AdMRs+4+U9g0BbB+LaPyD4DVt6Y=
=YDxX
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Pull "i.MX SoC changes for 4.17" from Shawn Guo:
- Add i.MX 6SoloLiteLite (i.MX6SLL) SoC support on top of the existing
i.MX6SL platform code.
- Improve the SoC revision mapping by utilizing the MAJOR field of
ANATOP DIGPROG register.
- Add CPUIDLE_FLAG_TIMER_STOP flag for cpuidle ARM power off state,
so that we can use ARM generic timer for some i.MX6 SoC.
- Set low-power interrupt mask for i.MX25 to support STOP mode.
- Drop EPIT driver as there is no user of it.
- Simplify the error path of imx6_pm_get_base() a bit.
* tag 'imx-soc-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: Add basic msl support for imx6sll
ARM: imx: pm-imx6: Return the error directly
ARM: imx: avic: set low-power interrupt mask for imx25
ARM: imx: Improve the soc revision calculation flow
ARM: imx: add timer stop flag to ARM power off state
ARM: imx: Remove epit support
This patchs adds the minimal defconfig for the OXNAS ARMv6 SoCs
including the OX820 SoC and needed minimal configurations.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ARM-based SoC for 4.17, please pull the following:
- Tuomas enables the BCM2835 AUX driver which is necessary to provide
console on the Raspberry Pi 3
- Stefan turns on support for the BCM43438 Bluetooth adapter connected
via UART on the Raspberry Pi Zero Wireless and he also turns on
support for the thermal driver on the Pi 2 and 3.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJaqCoCAAoJEIfQlpxEBwcEE20QAKu+LiIm0Ap8mSGPPN0LHq0u
M+2evW1WHE8daQGNguJq/9sGz2KDs9rO9hPveuqehKnRujjXtzKcbTqD4xUZwxzh
EBwjHU+SFFTwafyTDTjVp8aMSH6eZRC7FkH3aEY68+ci2iQ5a618V/cHfngo0bHk
0oelWrMBINOvWog1dP5mAUShq+zXUigMtN9hUCoTAGSznGgGo4QlHfOMTZHV6N12
EOrNpvqYzomN5iTqYIAAmqnosh6n0dlo03TVCrPaV8T1Yd27uxmIaaegU2rRjWoh
yzC2fx6WcaT6VqzRbCEPYMsAxbE12pPKumrw2l7fHl4+d0LEefZbs7Oz6hBgPNTJ
v7nZqDIGRfCTSUtBLDNQc9fDXCMDtWr0330RercKHsdr5vxdoA2+cIadzndApxNX
4Sdwz3SCFGhD/9G2csicDIj7JLxt0SNBuOeziiqk+X4h1Bf7WQ7qFPhw2RfttMam
ObmsYHaFNnJ4CQpoyU56a5ph9yyT5PcjKF5c+XL6syAQoatFbOJy0a5Nz2JEFBk2
T+WxaGOHg5YOrOZk+9sHTaka+WeV8NRUHgbDTkeDmh7ZtjChxaNDstGU14Wet3Hi
3yA5wmHoSBWKsjp3IBBZ0ICP7eVHdefdSRJ3bzdP4DKSJU6+WuhLrSXDG1mJvlnJ
ImfSktkOSyhlJaH+ORis
=3aYj
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.17/defconfig' of https://github.com/Broadcom/stblinux into next/soc
Pull "Broadcom defconfig changes for 4.17" from Florian Fainelli:
This pull request contains multi_v7_defconfig changes for Broadcom
ARM-based SoC for 4.17, please pull the following:
- Tuomas enables the BCM2835 AUX driver which is necessary to provide
console on the Raspberry Pi 3
- Stefan turns on support for the BCM43438 Bluetooth adapter connected
via UART on the Raspberry Pi Zero Wireless and he also turns on
support for the thermal driver on the Pi 2 and 3.
* tag 'arm-soc/for-4.17/defconfig' of https://github.com/Broadcom/stblinux:
ARM: multi_v7_defconfig: Enable thermal driver for RPi 2/3
ARM: bcm2385_defconfig: Enable BT support for BCM43438
ARM: multi_v7_defconfig: Enable serial console on RPi 3
- minor changes for property API
- clock API fix for ULPI driver warning
It exceptionally contains a merge from the mtd tree from Boris
to prevent any merge conflicts in the PXA tree.
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEExgkueSa0u8n4Ls+HA/Z63R24yxIFAlqi9CMXHHJvYmVydC5q
YXJ6bWlrQGZyZWUuZnIACgkQA/Z63R24yxIa0g//aCllCGnEY2S5+hxtg7eCAkEg
QKqBTpHhGUDpvix8MwWrt+089Kj5CWHknx7PWQs3YQj/XzevA5mX65szteICfDX2
K0BJj/OsecKBTCdHjVOEerM6Yy6nKrL0gX7zzUuD81H54Dk6os2pnruZEYEIn1HD
/YhWprLs0sDqwjPI/a9Tfqw5N3nM3uStl0hp3HDplw2AtIovL/E4CrPt9Q3CCtEy
Qj1PtM0ON9UkrlnHnFNEh3f5bja9Lwo1v3IueSoTWw8UdyxoA3itPXo+5pHZv5GG
H4UXan1vYSaj1ISsAnOt9YuFxEMl4+d8BfKmzrqr2CAlNAeMPJRZ66UdYTecx1FJ
z65kxxLiBi7r1eQqvBz6PhtKndHKUbBHJjc4RVJFm8PY7fzW/6LReDnHhUYpxfB1
K5BfzfIPjH3ex9PME370gZx6wdtaepSgeQFpo2jpCI1AXO1IFEdD0v/IkQounrUe
fgBle5yW4qQMuG+EDDOn/aDosVx7uM4856V7JtMrhUecB8fMwZ0elCaCSnchZO/G
mOeZUa9YXUOfFVBpKdidQzVxMQBP62zd8MFKOCOIkKUjfBC9AHRn1nLkXQak8hNt
HjRY34YqIEzbn5+3SRJO9doTV7oXMSOTfDvsQFugalhOKgHRZo7IpkREhqWWXByw
r7vKVVY1elTGKVVWdUQ=
=/vgG
-----END PGP SIGNATURE-----
Merge tag 'pxa-for-4.17' of https://github.com/rjarzmik/linux into next/soc
Pull "This is the pxa changes for v4.17 cycle" from Robert Jarzmik:
- minor changes for property API
- clock API fix for ULPI driver warning
It exceptionally contains a merge from the mtd tree from Boris
to prevent any merge conflicts in the PXA tree.
* tag 'pxa-for-4.17' of https://github.com/rjarzmik/linux:
ARM: pxa/raumfeld: use PROPERTY_ENTRY_U32() directly
ARM: pxa: ulpi: fix ulpi timeout and slowpath warn
ARM: pxa: cm-x300: remove inline directive
ARM: pxa: fix static checker warning in pxa3xx-ulpi
MAINTAINERS: remove entry for deleted pxa3xx_nand driver
arm: dts: pxa: use reworked NAND controller driver
dt-bindings: mtd: remove pxa3xx NAND controller documentation
mtd: nand: remove useless fields from pxa3xx NAND platform data
mtd: nand: remove deprecated pxa3xx_nand driver
mtd: nand: use Marvell reworked NAND controller driver with all platforms
- Rename Atmel to Microhip in MAINTAINERS, Documentation and Kconfig
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEXx9Viay1+e7J/aM4AyWl4gNJNJIFAlqjaZAACgkQAyWl4gNJ
NJJ9tw//ZvOojGuvXokU++d1zlzyojhdZxLFrt/2X7ZX1IrlhP62wBEJ1YUFpGVM
l8VcrOy5wCk/z2wn/Ji1kzHK9NiFzDzQ8IT7BB3n/QHx8Y9cd+1U1My2nDgKFFWe
xie155JoxRcvfa9XuMaNjET1/nZaC4slsfaXFX5YlGpiCzJ1Cppne/DfUH8WI7qi
j7ZslzeBz5F58qvH8OQM9+elg0q9rd7htzTM7EAjfK59UehNo/kSJJ74khqPUNYJ
qeo03E1tz6e/Euy/NgJDpXstCDa78mM2/k+W99z0X0qsmEwdtBzzSdSVz2P3/rPX
5VTBj7Gx5VlNCeJdPfKFMXTcKaNP1cqOC4kpMW36dHAYk0aV8q/j0j+skaUMHkLE
cKO43Z/2PjqB7PznyGT24dhEbpCm8GWAFC8ewQ2WoeZJzpjsYvtsYzfWDI2f22/I
VNZnAQDAyzphyoAeQ+RutO805VDnzYycjNHK04utDqEDcZylEftM7mBjSx4aBEBl
1M4xM0yRVfOzD20sgr9qCEuIalCTeyduG5DdKU8zjfQB9kq7ELau8NUMqezgVHfz
6yh+1Rn5Dgp0w0e0NF3qgmcped+JVKI2Fi+LbZ/xE7MIltJjwHtF0FI4drib+rJy
l3rBwdfVqowu8otJa+VXJ/isIw+8IwJb4ipznCK2oVtm6yo8jIY=
=oLw9
-----END PGP SIGNATURE-----
Merge tag 'at91-ab-4.17-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/soc
Pull "AT91 SoC for 4.17: from Alexandre Belloni:
- Rename Atmel to Microhip in MAINTAINERS, Documentation and Kconfig
* tag 'at91-ab-4.17-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: at91: Kconfig: Update company to Microchip
Documentation: at91: Update Microchip SoC documentation
MAINTAINERS: ARM: at91: update entry for ARM/Microchip
Add basic MSL support for i.MX6SLL.
The i.MX 6SoloLiteLite application processors are NXP's latest
additions to a growing family of multimedia-focused products
offering high-performance processing optimized for lowest power
consumption. The i.MX 6SoloLiteLite processors feature NXP's advanced
implementation of the ARM Cortex-A9 core, which can be interfaced
with LPDDR3 and LPDDR2 DRAM memory devices.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
1. Add few remaining SPDX license identifiers.
2. Add cpuidle support to all Midas-based boards (including new
GT-I9300/GT-I9305/GT-N7100/GT-N7105).
-----BEGIN PGP SIGNATURE-----
iQItBAABCAAXBQJantXhEBxrcnprQGtlcm5lbC5vcmcACgkQwTdm5oaLg9dwzw//
bxG9xzeZT83sxBk6QhgvDH2w5E0jtOtEvh//vHPyFt+CQNpOuauLULmqbEoVKhEd
XFWNima/eJtY69DzJ5pjJwm5vfE6EAqLb3XNjMc90aIGKJOhEX9q16IOHoSrdeqX
kjDXGGYmbpwSUVXgYq6noutr3S5U/t5A7zs+Rz+2OZo2NZY31PwmYs06VWHZ7ygL
uISte/Rhcq5i02iGHLEJ9lmyoLlUS9RAWR+Wujd5WY3xKNm0lMPEjIs80pSJXZDz
VADGMQJVHYok8O7DI30+SuHnIjIk6pyjl/SAmxKgPV9N8GJ4UueuQRijC4R2dPLY
jBD4ZboSjsc2vN3ioxvLTmmaSsLKHBIfv7LZW69olKVLgqYPubEcGJcdOTzUursp
7qKSB5Q1eEuiFkWB+M+aowKKuu3wy4gZNlC69hPKxEJtaBQ2AT5ltoiE58qa8IaE
jOCeHOVw6Q/NSEOEyFcRLBvH4+JLZYGYTCmxFlfjVGOYOKV0pAXXeMX0BabfRaLn
lc0Tc5x1MyDBnByXomJzd33H3mg8axPg5Cik3YlNskm5qbWTckf6uEqkg4H7kumQ
7GR3qfWsZdafFxINBHbVHM+sij8aY1Yl4w2sNW/HsWIk/VdCIyK8ahdKhMPevU3A
xWNnh0fJwxELZTv9GO3dlWqSAdUBs2Hxn4/V38XuAo4=
=sUWr
-----END PGP SIGNATURE-----
Merge tag 'samsung-soc-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Pull "Samsung mach/soc changes for v4.17" from Krzysztof Kozłowski:
1. Add few remaining SPDX license identifiers.
2. Add cpuidle support to all Midas-based boards (including new
GT-I9300/GT-I9305/GT-N7100/GT-N7105).
* tag 'samsung-soc-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: EXYNOS: Extend cpuidle support to Midas boards
ARM: EXYNOS: Add SPDX license identifiers
This series of changes enables the use device tree based sysconfig
data for ti-sysc driver. As we already have SmartReflex data configured,
we use that as the first driver to enable. To do that in a way where
SmartReflex is not probed twice, we need to prepare the SmartReflex
driver before flipping dts data on for it in the last patch of the
series.
To avoid regressions, we are checking the passed dts data against
existing platform data since we still have it available. Then after the
dts files are converted, we can simply drop the related platform data
at some point in the future.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlqdehERHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMRihAA2jlmAf4dePwe0K5V1VlQINbAU/FV+tXN
1oasvGwNBxaJMqJeZAdBd/veuXgrsprIbmlMmF+zP/wQDYiMccr0+ZvzMsUKJ9aA
mgzpW/pkpZEbi0ncci4UhQVOuZLja1xxtQ+ZGx82Vo7MXyU2jU9/Wzk67B4BZLws
1MGTsy5VZZh+wicq46eW9AspvFhKCMIw6Ylor3lfmm08H3V/cq9A8dHQeWX2jjsC
hSw9RzglGMi58FQ8cqNkxbD38r1VZh74OOqzOOlcJ5CwLWzIJwanWfwDesVb4ZTL
bdrn/Aps5b223LTAFN97vwUmyux/ja17YyCC5fU6C6wskgN+9jhPSslzFbFbU0kT
4chc5OYcdq5Lhm+vLCe2H5rB14KQxy6Ugb6aT+XAUOq0hw6tRSG17kqlXk/KtwrG
cDzPJzPjG/PDb8hW0Bd7JcjLqadmh7w1180KtT+9IayQM50XxcwwAOPT0XdUEUeP
aKIp5cRfOm/75KUIiNomhmoAd1pxX1G6y2qo49p3fbY0nJx09MgtQvWlbDrbhL8+
ACp2adGAlLqsW26E44cqNwMPPhyVcQXlVD9bc2D04nVhXapvRHtlrW4cRkkbQzfw
dAiQHDaBn4geSBUqGayQaIvX1WWqeZ6nzpI0JlyHPMiQdkdDvtyUqhJuK2uaY39n
vyRPw2H09ZM=
=/hJY
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.17/ti-sysc-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "Driver changes for ti-sysc for v4.17" from Tony Lindgren:
This series of changes enables the use device tree based sysconfig
data for ti-sysc driver. As we already have SmartReflex data configured,
we use that as the first driver to enable. To do that in a way where
SmartReflex is not probed twice, we need to prepare the SmartReflex
driver before flipping dts data on for it in the last patch of the
series.
To avoid regressions, we are checking the passed dts data against
existing platform data since we still have it available. Then after the
dts files are converted, we can simply drop the related platform data
at some point in the future.
* tag 'omap-for-v4.17/ti-sysc-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Enable ti-sysc to use device tree data for smartreflex
PM / AVS: SmartReflex: Prepare to use device tree based probing
ARM: OMAP2+: Try to parse earlycon from parent too
ARM: OMAP2+: Add checks for device tree based sysconfig data
ARM: OMAP2+: Add functions to allocate module data from device tree
bus: ti-sysc: Handle some devices in omap_device compatible way
bus: ti-sysc: Add support for platform data callbacks
bus: ti-sysc: Remove unnecessary debugging statements
bus: ti-sysc: Improve handling for no-reset-on-init and no-idle-on-init
bus: ti-sysc: Handle stdout-path for debug console
bus: ti-sysc: Add suspend and resume handling
bus: ti-sysc: Add fck clock alias for children with notifier_block
ARM: OMAP2+: Prepare to pass auxdata for smartreflex
This series of changes from Dave Gerlach adds the PM related
code to allow low-power suspend states. The code consists of
the SoC specific assembly code and a related PM driver.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlqdeI4RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPRoxAA3M1qhApgnJBrvCoVbOQbDsL/Jst5geJz
eQIQMjqzLTJQDd6+0SJVggjRhDYW2mKk+SYbpbzjVfmdJeKAIX3IZj9MUMstbRSD
g8YCzSpW9C2EuOHlDhDDd4U6pc7/pMmWHH87PMaj05Qfct+hcSpI7OB5RfntX0Os
mhQ6e3SxlM9EZikiW2BXXjjKmQHYmqkfSZHhjbiGtpEXTa/zq/fVM67NEjdez7/F
1Uy3Hefv895H0TU+P3TtzLmvcQQn4JrIXNqi4wWM7ATf6MN9d9cPMxZ9mdTweCgd
B0nSYgwwzXS2bNd7KhtghAXckGqLRL+0CifB0xw+jCExwL+aOQPwKdvbfnF2JVqe
R8MochWgDBUAVX8hYpYD+IJ6qeoWFfu4ZEwFeMaQ0M2T7I417SSRwtNF2P9YSYOj
b6dv8Fe54m8QhPJo2OPD/bbzo2wwNuLqJ9bqI3oy9yrMe5EEAzuhtqGBeg1B4WKB
zWB2TQYLLl4FVJsfxV7wgsO2fk9xzs1cn70JWqdWMQ1kUl7k0NorZhSVlXt5x+oH
gPfkWO2S7+Il/FKsOAdb+HeCklDyy/xh/B0VFErHvqXOK78j1IpcUh6I9lgg1GFs
OXioMaGE13p+yOKQHDGqeK42Qjw2F6cPdkCGm67Mte66IqBV0khLpwK8WwzlcEio
C5jhVOor2u8=
=hBzh
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.17/am-pm-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "Add am335x and am437x PM code for v4.17" from Tony Lindgren:
This series of changes from Dave Gerlach adds the PM related
code to allow low-power suspend states. The code consists of
the SoC specific assembly code and a related PM driver.
* tag 'omap-for-v4.17/am-pm-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
soc: ti: Add pm33xx driver for basic suspend support
ARM: OMAP2+: pm33xx-core: Add platform code needed for PM
ARM: OMAP2+: Introduce low-level suspend code for AM43XX
ARM: OMAP2+: Introduce low-level suspend code for AM33XX
This series from Keerthy and Ladislav Michl move omap dmtimer code
to drivers. As we don't want to export custom timer functions to
random drivers, we also need to update the related PWM driver to
pass the timer specific functions in platform data.
Note that this series is based on a merge of omap1 specific timer
fix and omap2+ platform data clean-up to keep things working and
make the move a bit simpler.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlqdd1IRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNziQ/+OywQPRLgeYodIl5AXJCMaZhyFJPN1BP3
OXsDllCnqJOpH4yjIPz4WoEI3ciVRJw+iBOl28pDtomdyejyE9qx/FmIhL081Wgm
T7TgJTieungliRfZu3UWRJdinpEyEzvTtEWlSVWa++lH5Bsub7lIPJsZ3A2bYVMh
9n6uE9bzU/ECdq/1hP9fhM2rssf8mu5l1IKlYmPWuxoFm/YSYoiyneU+rOILnJQ6
dsbc71p3+VdsZBDI+nMGcLE923LGXKEmxlHoR9+9EY12MOIwbTt/jxcI8j+Iugfk
vetncsXbpKnbutTP1iXr64IXa5QFOZKtMNlfNqLo4aihWMJ6tV4570w/pxk/qMgq
+qCidWm9RgVUm1N4t8kMm8aWm1BC1L8g9fw2/l0JFBHcuIlOYewa6cZ6gcUI6XxN
BqcET9iyxG9HgqgB6yekHRI3niywgGcpw420RS0DLmxIzpnpeQHGkXrva0tVcVS7
4SZ9UWgLQVCKgm/8mSDv4PkIzuPXyu4fqjxzMihQdNUHAG1xeqODfU8SLsItW43a
sGojvPPNWhCyvL2hpWuyWsRSOTc8MyAteeowYN1PzoSCO0cI3MTL0TUpxRTBV/9/
y1l5DYmdc1HUARXxJWreBSl3uToADguqzYUv3rHe/B20+LA19F9GRzoc9uOhqTGn
ePjiA5EC64o=
=2B8N
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.17/timer-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "Move omap timer to drivers for 4.17" from Tony Lindgren:
This series from Keerthy and Ladislav Michl move omap dmtimer code
to drivers. As we don't want to export custom timer functions to
random drivers, we also need to update the related PWM driver to
pass the timer specific functions in platform data.
Note that this series is based on a merge of omap1 specific timer
fix and omap2+ platform data clean-up to keep things working and
make the move a bit simpler.
* tag 'omap-for-v4.17/timer-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
clocksource: timer-ti-dm: Check prescaler value
clocksource: timer-ti-dm: Consolidate set source
clocksource: timer-ti-dm: Make unexported functions static
ARM: OMAP: pdata-quirks: Remove unused timer pdata
pwm: pwm-omap-dmtimer: Adapt driver to utilize dmtimer pdata ops
clocksource: timer-ti-dm: Hook device platform data if not already assigned
clocksource: timer-ti-dm: Populate the timer ops to the pdata
clocksource: timer-ti-dm: Add timer ops to the platform data structure
ARM: OMAP: Move dmtimer driver out of plat-omap to drivers under clocksource
clocksource: timer-ti-dm: Replace architecture
ARM: OMAP: Move dmtimer.h out of plat-omap
ARM: OMAP: timer: Wrap the inline functions under OMAP2PLUS define
ARM: OMAP: dmtimer: Remove all the exports
ARM: OMAP: Fix dmtimer init for omap1
This series is mostly a series from Suman Anna to remove now unused
platform data that is now coming from device tree. This also make it
a bit simpler to move the timer code to live under drivers in a
separate series of patches. There are also few minor clean-ups for
omap4 PM code.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlqddVYRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMy3BAAvhomxzjCQeIAaKJpMT0FQIKHYyk8mNB3
twuIqRAw+HPLTR+GXQlZc4ejR5ZicY+rrghhXgZ6q8pLNpra94qEAmulY+6t8VEt
KMoAWQyxfLuXiGPxrdUDKMhimS2pzoCY4jZPfeOwTQV4nW5gyIlHEA204VVdWyCk
Xli7OCEFRtccCbk605rDDRC1CYVCya59iqnUPywhQ3lFt0Ja93Z6ozLSSzmvLjyO
D08e7E3TrgNQq9QtxxItG5+I49vu34Qnxcf/zda4oL+Tk13awgGTeoYAIkcgvepJ
GX9SpRMss7A+k+usIVv+o3//bdeyLWSfWkyycVeBtdQtFJszC4SNYXsUUdDvoRh9
vkxnGA2JKKqdP+pPuNHnRBHZMaQCDpt7oTQjg7EZoHHyLqJKfWpnpUOCJznMvF5m
doODYlwq99tytD/D6HzIHejU+0RGr6Zb3MhuZ2KVtz91OuDC15PIJb8A0+UWzElR
HHc+eAj9hUoVSrtxoLCuoeKe7tAWB1rUTbIYQX+juMd7QmfgukRojeIIKVkTDzHF
WRCyfeaUce1Mqy1AIxvUHTgE7pGXE8+4h6197nQro602HBMFAOSbrt3XNESWHlth
1XIYI8E9KgDsTyvDoYUoS1jWEx2qFImjB20zLhm6oiFgl/vygBVB214H+AAJqCEr
mnlDRfSuafY=
=ivau
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.17/soc-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "SoC changes for omaps for v4.17" from Tony Lindgren:
This series is mostly a series from Suman Anna to remove now unused
platform data that is now coming from device tree. This also make it
a bit simpler to move the timer code to live under drivers in a
separate series of patches. There are also few minor clean-ups for
omap4 PM code.
* tag 'omap-for-v4.17/soc-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Fix typo for wakeup_ns_pa_addr
ARM: OMAP2+: Use v7_invalidate_l1 in omap4_finish_suspend
ARM: OMAP2+: Remove unused gpio header file references
ARM: OMAP: Move plat/i2c.h into mach-omap1 folder
ARM: OMAP2+: Cleanup omap_mcbsp_dev_attr and other legacy data
ARM: OMAP2+: Cleanup omap2_spi_dev_attr and other legacy data
ARM: OMAP2+: Cleanup omap_timer_capability_dev_attr usage
ARM: OMAP2+: Cleanup omap_i2c_dev_attr usage
ARM: OMAP2+: Cleanup omap_gpio_dev_attr usage
ARM: OMAP2+: Include types.h directly for hwmod data
Highlights:
----------
-Add STM32F769 MCU support
-Add STM32MP157 MPU support
-Add AMBA PL180 MMCI support for F4 and F7 MCUs
-Move STM32 documentation to rst format
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJanSCjAAoJEH+ayWryHnCF4rAP/3pT2Dj8XFR5NLN1eFlSWw5s
ZgL/Sjhu84vc0zAxnCI/La5emSR+lDOU5mQnQNXVXAyNyPeb/kk+EJuIW+YbZdOB
Kf2+R5eru8ucgv9SmA164mY707wBav5xhbT51QKnSDOLmIRQdwUr23llr1zeDNmq
77YfttkmqY8OBWx+xVcxQu7550sGT04GAXgOVvr5EtPCcHMz8o5Ky8v65XN7ZlmM
HtUr48k37Ni+m30l1YoSAmjaryohsHvLKYgn+yk+kZHLl7I+8IoCAmjigDn2ZAub
m62Pod1BogGjZkVhiFi1AiYC4vlkJLhDfPGZtY3ABTKHIliIaoExPsPQFC4Qvv92
/ctANJAqzRWVm/Zusmy/MvlHhW1Km+/JvMHzv2Ht4BL6/P0/mQn/2GeXICk3w33F
4MTCJEIzKKfsKLYt3xgX5+5FpvmUbrjGQHAy3UQ+7yHlEyFfUwWWJcOcrqE6fu9v
uAcRp9sx8osWZV2LIQegyD1GWXZs/gWHFiL1uEN0DkX7Ms2kQCHU8p/q9zlCOTOZ
Vhq9oYyPQv0neXb6Xb0LPH39oImIcbdwKNq3Buh6lyIfKo6Y5bZRrtZ/zjVpChKZ
ipM+ew4Me5QbuSzLlflS6akL0roul1PfW9RbeUnuOKucvv8NDMxEDIUgNa7wnO2b
QezaZAUunM1Ch+AMaP1r
=HDCw
-----END PGP SIGNATURE-----
Merge tag 'stm32-soc-for-v4.17-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/soc
Pull "STM32 SOC updates for v4.17, round 1." from Alexandre Torgue:
Highlights:
----------
-Add STM32F769 MCU support
-Add STM32MP157 MPU support
-Add AMBA PL180 MMCI support for F4 and F7 MCUs
-Move STM32 documentation to rst format
* tag 'stm32-soc-for-v4.17-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: stm32: restore reboot capabilities
ARM: stm32: Add AMBA support for STM32F4 and STM32F7 SoCs
ARM: stm32: add initial support for STM32MP157
ARM: stm32: prepare stm32 family to welcome armv7 architecture
Documentation: arm: stm32: move to rst format
ARM: stm32: Fix copyright
ARM: stm32: add new STM32F769 MCU
ARM: stm32: Kconfig: introduce MACH_STM32F769 flag
As SoCFPGA uses the standard suspend_valid_only_mem() for its
platform_suspend_ops.valid() callback, its platform_suspend_ops.enter()
callback will never be called with state equal to PM_SUSPEND_STANDBY.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
nspire_map_io() just calls debug_ll_io_init().
If machine_desc.map_io is not set, devicemaps_init() in the
common ARM code will call debug_ll_io_init(), so nspire_map_io() and the
initialization of .map_io can be removed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reorder the mach-* inclusions so the comment about them being ordered
alphabetically ends up being true.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable SYSCON_REBOOT_MODE needed for Lego EV3 and build the DaVinci
watchdog driver in so reboot works even when modules are not loaded.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJalP16AAoJEGFBu2jqvgRNI0MP/A7Ws3MQ2z/EM18HnRkHYZ3D
o/e28++QvLq+WYYkZhDhPz7kIlQf/6TZmqkTN4vR7fjje2mybUjjjkc9gYQVVjLY
VU+jSF9we0kLjFFSOcry3LfDGCNCVtg5uHJkjWkFvPqpy2/mVxI+YZAMY/NX7L6n
m4OjQWEU34hG4kfjUCTNi2u/sYszuhILu74XCAeFtc2KL2SuXj6GwjgUVW0DDF/F
VXD8vP8TJujgmyVVCAvn0v+Z7lrC7w2ePzrg63OU0ZGveZ4GUnvIrrtPbuBEyIkI
QGA4npgr1t+0QzqZv0n0Pl3LBp2L/F1WVlcNees6qN5VzInmt4u8fDr0LlAPoWym
iGpL8EDRBb4P1haHTojXXqfUvyN4vcjj41HWczu7x4URsRZWwwwKOSuJeETjn0aW
fPSavASBqAwifHcoZStu71Csz5UgdhqQ2gM9UOidujLVm6Rf5PMD64w3jq8wZtEe
XRwNwNKSNhRYgu4Y0yPYWPT62G02Sm7ppuW6bVYrb+caO2ckLDga7NSXo3319JOK
4OzelK6n8yt2Fv578o3c/mnonxyP8leDLGchngglaAffgav44M9KnmxohCXUcDkF
lyuwsyD1SQF5cGlbD0/cXsraDkahvU06mrCE74NnQz0lTo3FHIyJfw5RkRyGyL6e
uyeK05kw4FyO3DJCohAF
=+lpS
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.17/defconfig' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Pull "DaVinci defconfig updates for v4.17" from Sekhar Nori:
Enable SYSCON_REBOOT_MODE needed for Lego EV3 and build the DaVinci
watchdog driver in so reboot works even when modules are not loaded.
* tag 'davinci-for-v4.17/defconfig' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci_all_defconfig: set CONFIG_DAVINCI_WATCHDOG=y
ARM: davinci_all_defconfig: enable SYSCON_REBOOT_MODE
* rationalization of con_id names for phy clocks to make DT conversion easy
* A patch to move away from syscon as platform device. This is needed for
common clock framework conversion as well as helps get rid of
syscon_regmap_lookup_by_pdevname() by removing the last known user.
* convert mach-davinci to use reset support available in watchdog driver
* a non-critical warning fix. It has been around since beginning so not sending
as a standalone fix for -rc cycle.
* moving mach-davinci clock init to .init_time() for legacy boot. This is
again in preparation for CCF conversion.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJalPjTAAoJEGFBu2jqvgRNHwcP+gP6U9YQd7txyFy0bv73nTfu
wn9ebJSWwzGruqMHO3ZhpC6MI0cKxIZ3mJbfADs/y/5Ha73sT06D3ajZT/+/Ij68
Pm9bgvEail+P2rhevBqiKShdTWMFcbSy35RF+O0u9o446lVRFDNtEuoyb2OToA1F
Q+dvuDNzVASxFsOI+hgPkyfol4LkazPWvI3KrOjHhZBi7Nf2d+/03/vI4JhsnCjc
BhPDfbrAodubpxhGqTOT9MHuTHvGOxrKp73OajdPgn+Z1na0U4XbMapshnaQQH0K
fNU4SO92qVv7ElgQVPNknVS9x3/vpI1024HIpxcHEPYPV+akl947AXlmpprX98Jx
8Cb2xVnY8FCYxuQsMCKrmt/gM0dDYLg9S+mo94hkZYNoWqoZvtc64uZE+IxiyLEw
z3IAtoC2+D+6VL66gnoMUsVGxkkcj16E3O6p0NKLLJhMqpZdsm9yvRupohEU8Y+6
z+XipvnR+P/fEt6m7paM8uKcm/fGlRBLr77GIJR86o4gPKSSHT5vpxqvab51Adl3
lXreP0ZlwXmOlU6tRffHPqHj6agBTalOHr7vSd7QRma/AotNcLkwJ+8rzNNgUjfa
jJS72/AJONHsFDyjtbUWQFNPcu7sWNbzE7FoXDQJyd2vdivhiL0TyrEONGpynA2Z
drZUuRS1Y6BCHqWRrCq7
=2MBq
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.17/soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Pull "Miscellaneous DaVinci SoC support improvements for v4.17" from Sekhar Nori:
* rationalization of con_id names for phy clocks to make DT conversion easy
* A patch to move away from syscon as platform device. This is needed for
common clock framework conversion as well as helps get rid of
syscon_regmap_lookup_by_pdevname() by removing the last known user.
* convert mach-davinci to use reset support available in watchdog driver
* a non-critical warning fix. It has been around since beginning so not sending
as a standalone fix for -rc cycle.
* moving mach-davinci clock init to .init_time() for legacy boot. This is
again in preparation for CCF conversion.
* tag 'davinci-for-v4.17/soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: move davinci_clk_init() to init_time
ARM: davinci: board-da830-evm: fix unused const variable warning
ARM: davinci: remove watchdog reset
ARM: da8xx: use platform data for CFGCHIP syscon regmap
phy: da8xx-usb: rename clock con_ids
Instead of using PROPERTY_ENTRY_INTEGER() with explicitly supplied type,
use PROPERTY_ENTRY_U32() dedicated macro.
It will help modify internals of built-in device properties API.
No functional change intended.
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Both cm-x300 and pxa3xx-ulpi use the plain clk_{en,dis}able() API.
With the new clocking framework this results in warnings of type:
------------[ cut here ]------------
WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:714 clk_core_enable+0x90/0x9c
Modules linked in:
CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc5-cm-x300+ #15
Hardware name: CM-X300 module
[<c001007c>] (unwind_backtrace) from [<c000df94>] (show_stack+0x10/0x14)
[<c000df94>] (show_stack) from [<c00199a8>] (__warn+0xd8/0x100)
[<c00199a8>] (__warn) from [<c0019a0c>] (warn_slowpath_null+0x3c/0x48)
[<c0019a0c>] (warn_slowpath_null) from [<c024e8c0>] (clk_core_enable+0x90/0x9c)
[<c024e8c0>] (clk_core_enable) from [<c024ea54>] (clk_core_enable_lock+0x18/0x2c)
[<c024ea54>] (clk_core_enable_lock) from [<c0016994>] (cm_x300_u2d_init+0x4c/0xe8)
[<c0016994>] (cm_x300_u2d_init) from [<c00163e0>] (pxa3xx_u2d_probe+0xe0/0x244)
[<c00163e0>] (pxa3xx_u2d_probe) from [<c0283de0>] (platform_drv_probe+0x38/0x88)
...
------------[ cut here ]------------
and alike...
And finally, it results in:
------------[ cut here ]------------
pxa310_ulpi_poll: ULPI access timed out!
OTG transceiver init failed
------------[ cut here ]------------
It might be that disabling the warning in kernel config would also do
the job, but IMO a better solution would be to switch to
clk_prepare_enable() and clk_disable_unprepare() APIs.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
cm_x300_u2d_init() function is only used through its function pointer
that is passed through platform_data structure to the driver.
Therefore it can never be inlined.
Remove the inline directive.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Static checker reports the following warning:
arch/arm/mach-pxa/pxa3xx-ulpi.c:336 pxa3xx_u2d_probe()
warn: did you mean to pass the address of 'u2d'
Fix it by passing the correct pointer.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
To be able to reboot the platform we need to use armv7m_restart for STM32
SoCs using ARMv7 cores.
Fixes: e0644101bd2f ("ARM: mach-stm32: prepare stm32 family to welcome armv7 architecture)
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
As both STM32F4 and STM32F7 SoCs embeds an AMBA PL180 mmci IP,
we need to enable AMBA support in mach-stm32.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch adds initial support of STM32MP157 microprocessor (MPU)
based on Arm Cortex-A7. New Cortex-A infrastructure (gic, timer,...)
are selected if ARCH_MULTI_V7 is defined.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch prepares the STM32 machine for the integration of Cortex-A
based microprocessor (MPU), on top of the existing Cortex-M
microcontroller family (MCU). Since both MCUs and MPUs are sharing
common hardware blocks we can keep using ARCH_STM32 flag for most of
them. If a hardware block is specific to one family we can use either
ARM_SINGLE_ARMV7M or ARCH_MULTI_V7 flag.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch introduces the MACH_STM32F769 to make possible to only select
STM32F769 pinctrl driver.
By default, all the MACH_STM32Fxxx flags will be set with STM32 defconfig.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Use the new bindings of the reworked Marvell NAND controller driver.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
The "enable arbiter" bit is available only for pxa3xx based platforms
but it was experimentally shown that even if this bit is reserved,
some Marvell platforms (64-bit) actually need it to be set. The driver
always set this bit regardless of this property, which is harmless.
Then this property is not needed.
The "num_cs" field is always 1 and for a good reason, the old driver
(pxa3xx_nand.c) could only handle one. The new driver that replaces it
(marvell_nand.c) can handle more, but better use device tree for such
description. As there is only one available chip select, there is no
need for an array of partitions neither an array of partition numbers.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Let's enable ti-sysc probing of child devices. So far we have only used
ti-sysc to probe interconnect target modules to idle them for cases where
the SoC does not have any child devices configured for the module, such
as smartreflex on dra7.
As we have smartreflex driver configured in the device tree for some SoCs,
we need to flip things on with a single patch to prevent both omap_device
and ti-sysc to probe smartreflex. So let's stop probing smartreflex with
omap_device and probe it with ti-sysc by enabling passing the auxdata.
Signed-off-by: Tony Lindgren <tony@atomide.com>
With ti-sysc driver the "ti,hwmods" property will be moved to the
interconnect target module instead of the child device. To keep
earlycon working, we need to match against the interconnect target
module in the ti-sysc case.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can check the device tree based sysconfig data against the existing
platform data to make sure we're not introducing regressions. Then at
some point after the sysconfig data comes from device tree, we can just
drop the related platform data.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can have ti-sysc driver manage the interconnect target module via
platform data callback functions to hwmod code. This allows initializing
and idling the devices using dts data instead of the legacy static data
for interconnect target modules.
Let's add functions to configure the module sysconfig data with platform
callbacks from ti-sysc driver.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This is the first set of bugfixes for ARM SoCs, fixing a couple
of stability problems, mostly on TI OMAP and Rockchips platforms:
- OMAP2 hwmod clocks must be enabled in the correct order
- OMAP3 Wakeup from resume through PRM IRQ was unreliable
- One regression on OMAP5 caused by a kexec fix
- Rockchip ethernet needs some settings for stable operation on Rock64
- Rockchip based Chrombook Plus needs another clock setting for
stable display suspend/resume
- Rockchip based phyCORE-RK3288 was able to run at an invalid
CPU clock frequency
- Rockchip MMC link was sometimes unreliable
- Multiple fixes to avoid crashes in the Broadcom STB DPFE driver
Other minor changes include:
- Devicetree fixes for incorrect hardware description (rockchip,
omap, Gemini, amlogic)
- Some MAINTAINER file updates to correct email and git addresses
- Some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
cavium, qualcomm, hisilicon, zx)
- Fixes for LTO-compilation (orion, davinci, clps711x)
- One fix for an incorrect Kconfig errata selection
- A memory leak in the OMAP timer driver
- A kernel data leak in OMAP1 debugfs files
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJalzTaAAoJEGCrR//JCVInBeQP/3wBXCnzfCkmSSliZHoNzgYB
XGkC+JIqw9AnHvn/ckvHMwUv8kQlbi7ImPXz1P8yafy3h2vHIdN2My0XYtRyQkNT
NoAxIXT+NiQx9sAoLGY8gWTN4Do63q1vw5SLmOEDD2GYzo1jao4s7J0mhFZopBLw
WkgHf8t4jRmoBDA4GEYcdJZS5shMydFDyb9CiiqNHVA4S4IL87XcPoJDpJmyVDZ4
vZVeccyhw0Xh0NJLzRIhVDGRN2pj1ayFFVodfRNTseRGf0QRexntiIyIHa2wOi1l
93IjJ3XgHuYEj0NNNpZiHV5OZxxRbQlTD/ji5L8j71lklVjIedJsJdWFUKiK53oh
ufQXTRZaVMmh4xcvihABSchg8vEXMqx4cZ/hj/+LIepDJM6GC39uGipg6enORVym
BuZpol8b1owABN461Bt2RfAVyXqJ7TRkdVy+RaP7RCsddLEcdKdI6HYi3aeDVmHQ
krvTrLQhRsDL4IHvi6rQDqyJMf5GDP4y7aInf7YzvJlbV2uU+M0ndiSHpGhw6vbG
brhc/n56U/waMPG8tOv9AB1+afARQOc4Fo9xg96PADA69SXn7Eq2dgf1D/ern8UQ
6KgNZ1hmmEHzkxsAXjEcStlmhpwk4lh4T0nSDbamsMRvZRNQaqmskMbmYYepIXKC
71k/Uwf4CQhMxe2aXIOo
=fcv0
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"This is the first set of bugfixes for ARM SoCs, fixing a couple of
stability problems, mostly on TI OMAP and Rockchips platforms:
- OMAP2 hwmod clocks must be enabled in the correct order
- OMAP3 Wakeup from resume through PRM IRQ was unreliable
- one regression on OMAP5 caused by a kexec fix
- Rockchip ethernet needs some settings for stable operation on
Rock64
- Rockchip based Chrombook Plus needs another clock setting for
stable display suspend/resume
- Rockchip based phyCORE-RK3288 was able to run at an invalid CPU
clock frequency
- Rockchip MMC link was sometimes unreliable
- multiple fixes to avoid crashes in the Broadcom STB DPFE driver
Other minor changes include:
- Devicetree fixes for incorrect hardware description (rockchip,
omap, Gemini, amlogic)
- some MAINTAINER file updates to correct email and git addresses
- some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
cavium, qualcomm, hisilicon, zx)
- fixes for LTO-compilation (orion, davinci, clps711x)
- one fix for an incorrect Kconfig errata selection
- a memory leak in the OMAP timer driver
- a kernel data leak in OMAP1 debugfs files"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
MAINTAINERS: update entries for ARM/STM32
ARM: dts: bcm283x: Move arm-pmu out of soc node
ARM: dts: bcm283x: Fix unit address of local_intc
ARM: dts: NSP: Fix amount of RAM on BCM958625HR
ARM: dts: Set D-Link DNS-313 SATA to muxmode 0
ARM: omap2: set CONFIG_LIRC=y in defconfig
ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6 DualLite/Solo RQS
memory: brcmstb: dpfe: support new way of passing data from the DCPU
memory: brcmstb: dpfe: fix type declaration of variable "ret"
memory: brcmstb: dpfe: properly mask vendor error bits
ARM: BCM: dts: Remove leading 0x and 0s from bindings notation
ARM: orion: fix orion_ge00_switch_board_info initialization
ARM: davinci: mark spi_board_info arrays as const
ARM: clps711x: mark clps711x_compat as const
arm: zx: dts: Remove leading 0x and 0s from bindings notation
arm64: dts: Remove leading 0x and 0s from bindings notation
arm64: dts: cavium: fix PCI bus dtc warnings
MAINTAINERS: ARM: at91: update my email address
soc: imx: gpc: de-register power domains only if initialized
ARM: dts: rockchip: Fix DWMMC clocks
...
We can use just v7_invalidate_l1 here instead of v7_flush_dcache_all
like the comments say.
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
4.16, please pull the following:
- Mathieu fixes leading 0x and 0's from bindings and Device Tree source
files, he has done this treewide and most of his changes are already in
4.16
- Stefan provides two changes to the BCM283x DTS files in order to fix
DTC warnings
- Florian fixes the amount of RAM on the BCM958625HR reference board to
properly limit to what is initialized by the bootloader
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJalfuUAAoJEIfQlpxEBwcEaMoQAIR2oLcNZcrUzsgOuBSQ/m1N
+EpXw5TIeDzZRIdNTqofcldGDn0FMnAsPEBnMMYCti+2iPntPGK64IFAD0u7E8JW
+CU6sfk3SYijPP/nz5/KOSwRZ2KrDombYx73yrXqY2hs4kYupT078NfiI70jZYSB
6v8cua4Pg/Uw9c2ZSC/lkgrW3G1ZImAxA6tgAOZvRaq7qgCBlBvWEweLIgMcBAGY
Eq5p6KsmC01/1QGNV0sL9v90Mg8uAe3IJK0hGgk57BeYERcyVZ/V1C6veQmiiyjj
XYcILm2ww3KOfbZYslwKBfr9V76lFcsTPQD16Z8IOWTL9X/B0DRXDXiRnUX5P6w+
ZIzVBjLH8UxSU5bgD2tXVBWfEKs/kgvQPAv+8FlpCU0bY7fB2y8E6Pr44FVH/dTV
7Vkm60Jz9AFGVjaqhx+t8hyjQ7g2NQGwonWYGUWYXD7Wi+OK7cazC49lnebZJyPN
rSJjOWGxblHUAh2CjGUQNyk4CplbUybuo8441xacGK2BXJS0gl+xvGdxY+uaUcbc
zMb1Ox4I0gpe8xpWcc7vyKt+cgWCaXnyLHpFdcaC3bBT63O04yVU5mirlHYQu/NR
R/yY7lPStA+DzL6uihRi4K05+BoO12J7I3Mm0Wq//KgE1ij7LeHL7Nzy+AzQI2Rs
Dy1H//EWpDvfZTbONIwz
=9RVY
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.16/devicetree-fixes' of https://github.com/Broadcom/stblinux into fixes
Pull "Broadcom devicetree fixes for 4.16" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
4.16, please pull the following:
- Mathieu fixes leading 0x and 0's from bindings and Device Tree source
files, he has done this treewide and most of his changes are already in
4.16
- Stefan provides two changes to the BCM283x DTS files in order to fix
DTC warnings
- Florian fixes the amount of RAM on the BCM958625HR reference board to
properly limit to what is initialized by the bootloader
* tag 'arm-soc/for-4.16/devicetree-fixes' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm283x: Move arm-pmu out of soc node
ARM: dts: bcm283x: Fix unit address of local_intc
ARM: dts: NSP: Fix amount of RAM on BCM958625HR
ARM: BCM: dts: Remove leading 0x and 0s from bindings notation
- Fix i.MX GPC driver to remove power domains only when they are
initialized in imx_gpc_probe().
- Fix the broken Engicam i.CoreM6 DualLite/Solo RQS board DT to include
imx6dl.dtsi instead of imx6q.dtsi.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJalfO8AAoJEFBXWFqHsHzOPk4IALx0Gl07tgaTy2VgZJT2w0ud
ZoyeicSNxfM42auRHjC6QhYpQztw8+k4PCuGmUOutHc2Hbw21EXDxLiSwYgGarBR
3OuYShxBg6IExpUk7TM0kDFU0Z4GcpTjAovloM7yjLxCj88dzS+NIiUwPSl02kTp
iAGxVtTQOYLotJFZLQ+DGH3SuaEvOEzeQZz/v4v2/z1IsJRI5IQ2ILtSFEOYhMwh
vgagvvHopS2jIfLXd47PJJvUQuRjXH00FMvrEmBT2b31HJDU2uKn+y4BtMCJHzJV
cTaCwKcrJcLCH2tv5LVUg86VcbL7qbMGjqKQk4aSuEtMtJkpkD4palNG+y69N9g=
=NKMF
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Pull "i.MX fixes for 4.16" from Shawn Guo:
- Fix i.MX GPC driver to remove power domains only when they are
initialized in imx_gpc_probe().
- Fix the broken Engicam i.CoreM6 DualLite/Solo RQS board DT to include
imx6dl.dtsi instead of imx6q.dtsi.
* tag 'imx-fixes-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6 DualLite/Solo RQS
soc: imx: gpc: de-register power domains only if initialized
Update AT91 Kconfig text and help to move from Atmel to Microchip.
The AT91 wording is kept in the title for historical reasons.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Simplify the error path by returning the error code directly rather
than jumping to a label.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx25 contains two registers (LPIMR0 and 1) to define which interrupts
are enabled in low-power mode. As of today, those two registers are
configured to enable all interrupts. Before going to low-power mode, the
AVIC's INTENABLEH and INTENABLEL registers are configured to enable only
those interrupts which are used as wakeup sources.
It turned out that this approach is not sufficient if we want the imx25
to go into stop mode during suspend-to-ram. (Stop mode is the low-power
mode that consumes the least power. The peripheral master clock is
switched off in this mode). For stop mode to work, the LPIMR0 and 1
registers have to be configured with the set of interrupts that are
allowed in low-power mode. Fortunately, the bits in the LPIMR registers
are assigned to the same interrupts as the bits in INTENABLEH and
INTENABLEL. However, LPIMR uses 1 to mask an interrupt whereas the
INTENABLE registers use 1 to enable an interrupt.
This patch sets the LPIMR registers to the inverted bitmask of the
INTENABLE registers during suspend and goes back to "all interrupts
masked" when we wake up again. We also make this the default at startup.
As far as I know, the other supported imx architectures have no similar
mechanism. Since the LPIMR registers are part of the CCM module, we
query the device tree for an imx25 ccm node in order to detect if we're
running on imx25.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The ARM PMU doesn't have a reg address, so fix the following DTC warning
(requires W=1):
Node /soc/arm-pmu missing or empty reg/ranges property
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This patch fixes the following DTC warning (requires W=1):
Node /soc/local_intc simple-bus unit address format error, expected "40000000"
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Jon attempted to fix the amount of RAM on the BCM958625HR in commit
c53beb47f6 ("ARM: dts: NSP: Correct RAM amount for BCM958625HR board")
but it seems like we tripped over some poorly documented schematics.
The top-level page of the schematics says the board has 2GB, but when
you end-up scrolling to page 6, you see two chips of 4GBit (512MB) but
what the bootloader really initializes only 512MB, any attempt to use
more than that results in data aborts. Fix this again back to 512MB.
Fixes: c53beb47f6 ("ARM: dts: NSP: Correct RAM amount for BCM958625HR board")
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Most of the PM code needed for am335x and am437x can be moved into a
module under drivers but some core code must remain in mach-omap2 at the
moment. This includes some internal clockdomain APIs and low-level ARM
APIs which are also not exported for use by modules.
Implement a few functions that handle these low-level platform
operations can be passed to the pm33xx module through the use of
platform data.
In addition to this, to be able to share data structures between C and
the sleep33xx and sleep43xx assembly code, we can automatically generate
all of the C struct member offsets and sizes as macros by processing
pm-asm-offsets.c into assembly code and then extracting the relevant
data as is done for the generated platform asm-offsets.h files.
Finally, add amx3_common_pm_init to create a dummy platform_device for
pm33xx so that our soon to be introduced pm33xx module can probe on
am335x and am437x platforms to enable basic suspend to mem and standby
support.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Arnd Bergmann