Commit Graph

57993 Commits

Author SHA1 Message Date
Stefan Agner b8ad2985c6 ARM: OMAP2: drop explicit assembler architecture
OMAP2 depends on ARCH_MULTI_V6, which makes sure that the kernel is
compiled with -march=armv6. The compiler frontend will pass the
architecture to the assembler. There is no explicit architecture
specification necessary.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 09:44:29 -07:00
Stefan Agner 3fe1ee40b2 ARM: use arch_extension directive instead of arch argument
The LLVM Target parser currently does not allow to specify the security
extension as part of -march (see also LLVM Bug 40186 [0]). When trying
to use Clang with LLVM's integrated assembler, this leads to build
errors such as this:
  clang-8: error: the clang compiler does not support '-Wa,-march=armv7-a+sec'

Use ".arch_extension sec" to enable the security extension in a more
portable fasion. Also make sure to use ".arch armv7-a" in case a v6/v7
multi-platform kernel is being built.

Note that this is technically not exactly the same as the old code
checked for availabilty of the security extension by calling as-instr.
However, there are already other sites which use ".arch_extension sec"
unconditionally, hence de-facto we need an assembler capable of
".arch_extension sec" already today (arch/arm/mm/proc-v7.S). The
arch extension "sec" is available since binutils 2.21 according to
its documentation [1].

[0] https://bugs.llvm.org/show_bug.cgi?id=40186
[1] https://sourceware.org/binutils/docs-2.21/as/ARM-Options.html

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Mans Rullgard <mans@mansr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 09:44:25 -07:00
Olof Johansson 50f5ef466d SoCFPGA DTS updates for v5.3
- Use the new "altr,socfpga-stmmac-a10-s10" for the EMAC controllers on
   Arria10/Stratix10
 - Add the ltc2497 i2c entry on the Arria10 devkit
 - Add the EMAC OCP reset property on the Arria10
 -----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAlz+d5oUHGRpbmd1eWVu
 QGtlcm5lbC5vcmcACgkQGZQEC4GjKPSl9g/8DvMqBsyvtoNJwqkEiZXjjBecjMBW
 rN1O226DtbhHbaDA595vZE5U/va9fx+QVVEfxIT22r31BQ9b8c7RKWtly5DD3Il/
 VIZ5JvUXmXvc/uDHDntRGbWmRbDmU8VEEjzzaGuGI5j4+dKhvy27jdRcqJLBKtdI
 9cfdDv2Tqh047FuUDs2Q7PwrhBktPEJrvnAUmpBv+BBc/eRkzOz7QaAjTVgfO85E
 WBBocEc1Zi/VjJzHGY4bGrmmf3CFriC+eO4lnuoBO+o1heNdBM97QB4cUHdfZ6/t
 UCrNzrkvksMmFOyEuJbZahQ/rRhunBSK6LyfPtLWhEMxxkJXO7DxuUuMnsBsZuR8
 64QrRKuXzrHqk18p805LQiqQupJn4WfkK3/r4qlNSD7mdFTshHOGynQ7HAJunbT9
 pplYHF7bhMjskeeOW6FipWGPFUFn1MbYOgM8weZ7I+9+TKj5H3BxYKhpt90ae5Lu
 cS1uk2bkDemSt9o6xzzb/xdBSRgzxGE5agYuUzuLwTK2SK6SlQZ/IZwwMu9GXEwh
 rA4Wjg4LliEk/LEGEcwcosB6OalCuLCIa0ywnn9WOZMOHJCBPwoWtgJyeWEvPYiD
 e1Oh/yBNOiOfnKi3bw3EvnwstTNzIaWqI12qO1BIJ1JEwSgC/rDy6P7eQQ8WMfBM
 Im7ivw8tfEj/6Ik=
 =22jl
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_dts_updates_for_v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA DTS updates for v5.3
- Use the new "altr,socfpga-stmmac-a10-s10" for the EMAC controllers on
  Arria10/Stratix10
- Add the ltc2497 i2c entry on the Arria10 devkit
- Add the EMAC OCP reset property on the Arria10

* tag 'socfpga_dts_updates_for_v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: arria10: Add EMAC OCP reset property
  ARM: dts: socfpga: add ltc2497 on arria10 devkit
  arm64: dts: stratix10: use the "altr,socfpga-stmmac-a10-s10" binding
  ARM: dts: socfpga: use the "altr,socfpga-stmmac-a10-s10" binding

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 09:00:58 -07:00
Leo Yan 06c3cba62b ARM: dts: hip04: Update coresight DT bindings
CoreSight DT bindings have been updated, thus the old compatible strings
are obsolete and the drivers will report warning if DTS uses these
obsolete strings.

This patch switches to the new bindings for CoreSight dynamic funnel and
static replicator, so can dismiss warning during initialisation.

Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-06-19 16:28:34 +01:00
Thomas Gleixner 4cb2acc0df treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 506
Based on 1 normalized pattern(s):

  this software program is licensed subject to the gnu general public
  license gpl version 2 june 1991 available at http www fsf org
  copyleft gpl html

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Daniel German <dmg@turingmachine.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081207.687420463@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:11:22 +02:00
Thomas Gleixner d2912cb15b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:55 +02:00
Thomas Gleixner caab277b1d treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not see http www gnu org
  licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 503 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Enrico Weigelt <info@metux.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:07 +02:00
Thomas Gleixner 33eea064b2 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 226
Based on 1 normalized pattern(s):

  licensed under the terms of the gplv2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 1 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190602204653.087533673@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:06 +02:00
Arnd Bergmann 27e23d8975 ARM: omap2: remove incorrect __init annotation
omap3xxx_prm_enable_io_wakeup() is marked __init, but its caller is not, so
we get a warning with clang-8:

WARNING: vmlinux.o(.text+0x343c8): Section mismatch in reference from the function omap3xxx_prm_late_init() to the function .init.text:omap3xxx_prm_enable_io_wakeup()
The function omap3xxx_prm_late_init() references
the function __init omap3xxx_prm_enable_io_wakeup().
This is often because omap3xxx_prm_late_init lacks a __init
annotation or the annotation of omap3xxx_prm_enable_io_wakeup is wrong.

When building with gcc, omap3xxx_prm_enable_io_wakeup() is always
inlined, so we never noticed in the past.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 07:27:05 -07:00
Olof Johansson ef51ea44a9 This fixes up two issues with the Gemini DTS files:
- Blank console after a while on the DIR-685 so as
   not to waste power
 - Fix up the erroneous compatible string on the DNS-313
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl0KHBoACgkQQRCzN7AZ
 XXMYShAAzHt7Mi4w8voKEjoGdL5FCnrs1tILmGqn4ZSGMq4ePqTP6NdDq+Lk5cVm
 a8CFmBdujAf4S3IVoQ4gepuysDLqxlK18857DkoiYak9CyZ5nk+/hAxhoJRbSNxo
 OlrhaI/fMvvP3Z61T69B2X8YifGnr/Fj6ZK6Pv4FIwXx0kuaaihqtPcq0h2N4Elb
 ah6qvx5UGhSPSGQxqBDijFcDpbmBt3CZl0o8TE5N+Y+pM6ibyndpU/RHuYjtm0P1
 Z44zgEh3JvyoG/dkpH546YW5tqQFyfSiYshcRriW1XzD1TUYicjrhmbGTYOnwwj/
 hOzXVgp48hmoqEl8O47dTs+zvJO9Gzg7+lnh6WWdoKN0feGyFll5Doj4gj6R3TkN
 T7c46ICk/XNJvapvYMdjyDQxJ591GmN7I4q4g2z8WVlXgdGt1GwU+7p7YikBmiyt
 KWMP/2K2Vl3kxZ7DK9rkQpNyjb+/WkkuczkA8ymj34vh8qYOhQ4alqxyUYv306eq
 PM2+/by6WnDzOZl6IxtOnKylMFfrY1ULVcn+85V/8oJQ+7ls1VNuBo31/iBE2H+3
 tVY0JtUcBApI8zsx0HcQFRblViOOJwlHvZOrJs2HY6h2BRKSrY04T9LxS2AWnAcL
 /SiHCUY9oje9Sb+b9kEph6vsGYDJozwDiWI2iAFeB3whtVI8YFM=
 =lkt2
 -----END PGP SIGNATURE-----

Merge tag 'gemini-dts-v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/fixes

This fixes up two issues with the Gemini DTS files:
- Blank console after a while on the DIR-685 so as
  not to waste power
- Fix up the erroneous compatible string on the DNS-313

* tag 'gemini-dts-v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: gemini Fix up DNS-313 compatible string
  ARM: dts: Blank D-Link DIR-685 console

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 07:26:35 -07:00
Neil Armstrong 8d955f24db ARM: multi_v7_defconfig: enable Lima driver
A bunch of armv7 boards can now use the Lima driver, let's enable it
in defconfig, it will be useful to have it enabled for KernelCI
boot and runtime testing.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 07:18:07 -07:00
Tomeu Vizoso f56a1fa75c ARM: multi_v7_defconfig: add Panfrost driver
With the goal of making it easier for CI services such as KernelCI to
run tests for it.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 07:11:30 -07:00
Krzysztof Kozlowski 6c48edcc95 ARM: configs: Remove useless UEVENT_HELPER_PATH
Remove the CONFIG_UEVENT_HELPER_PATH because:
1. It is disabled since commit 1be01d4a57 ("driver: base: Disable
   CONFIG_UEVENT_HELPER by default") as its dependency (UEVENT_HELPER) was
   made default to 'n',
2. It is not recommended (help message: "This should not be used today
   [...] creates a high system load") and was kept only for ancient
   userland,
3. Certain userland specifically requests it to be disabled (systemd
   README: "Legacy hotplug slows down the system and confuses udev").

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 07:09:39 -07:00
Krzysztof Kozlowski 39bda3158e ARM: config: Remove left-over BACKLIGHT_LCD_SUPPORT
The CONFIG_BACKLIGHT_LCD_SUPPORT was removed in commit 8c5dc8d9f1
("video: backlight: Remove useless BACKLIGHT_LCD_SUPPORT kernel
symbol"). Options protected by CONFIG_BACKLIGHT_LCD_SUPPORT are now
available directly.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 07:02:07 -07:00
Olof Johansson ecf8902355 Merge tag 'samsung-dt-5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.3

1. Fixes for minor warnings.
2. Enable ADC on Exynos5410 Odroid XU board.

* tag 'samsung-dt-5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: Add ADC node to Exynos5410 and Odroid XU
  ARM: dts: exynos: Raise maximum buck regulator voltages on Arndale Octa
  ARM: dts: exynos: Move CPU OPP tables out of SoC node on Exynos5420

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:36:38 -07:00
Olof Johansson f82695814c Merge tag 'vexpress-updates-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv7 Vexpress updates for v5.3

1. Couple of updates switching to use new/updated bindings for CoreSight
   dynamic funnel components and NOR flash partition type
2. Disable NOR flash on Vexpress TC2 platform as it conflicts with CPU
   power management. This follows what we have on ARMv8 Juno platform
   and is required after recent commit that enabled CFI NOR FLASH in
   multi_v7 defconfig

* tag 'vexpress-updates-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  ARM: dts: vexpress: set the right partition type for NOR flash
  arm: dts: vexpress-v2p-ca15_a7: disable NOR flash node by default
  ARM: dts: vexpress-v2p-ca15_a7: update coresight DT bindings

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:36:34 -07:00
Olof Johansson b3dbb6e3ef Merge tag 'omap-for-v5.3/ti-sysc-dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
ti-sysc dts changes for v5.3

We can now drop the custom dts property "ti,hwmods" for drivers that
have the ti-sysc interconnect target module configured in dts.

Let's start with a minimal changes to omap4 uart and mmc. We use
omap4 as the starting point as it has runtime PM implemented and all
the omap variants after that are based on it with similar clkctrl
clock for the modules. More devices will be updated later on as they
get tested.

Note that these changes are based on the related ti-sysc driver
changes.

* tag 'omap-for-v5.3/ti-sysc-dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
  ARM: dts: Drop legacy custom hwmods property for omap4 mmc
  ARM: dts: Drop legacy custom hwmods property for omap4 uart
  bus: ti-sysc: Detect uarts also on omap34xx
  bus: ti-sysc: Do rstctrl reset handling in two phases
  bus: ti-sysc: Add support for disabling module without legacy mode
  bus: ti-sysc: Set ENAWAKEUP if available
  bus: ti-sysc: Handle swsup idle mode quirks
  bus: ti-sysc: Handle clockactivity for enable and disable
  bus: ti-sysc: Enable interconnect target module autoidle bit on enable
  bus: ti-sysc: Allow QUIRK_LEGACY_IDLE even if legacy_mode is not set
  bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits
  bus: ti-sysc: Support 16-bit writes too
  bus: ti-sysc: Add support for missing clockdomain handling
  ARM: dts: dra71x: Disable usb4_tm target module
  ARM: dts: dra71x: Disable rtc target module
  ARM: dts: dra76x: Disable usb4_tm target module
  ARM: dts: dra76x: Disable rtc target module
  ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values
  ARM: dts: am57xx-idk: Remove support for voltage switching for SD card
  bus: ti-sysc: Handle devices with no control registers
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:36:28 -07:00
Olof Johansson 0164a087a6 Merge tag 'omap-for-v5.3/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
dts changes for omap variants for v5.3

This series of changes improves support for few boards:

- configure another lcd type for logicpd torpedo devkit

- a series of updates for am335x phytec boards

- configure mmc card detect pin for am335x-baltos

* tag 'omap-for-v5.3/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x-baltos: add support for MMC1 CD pin
  ARM: dts: am335x-baltos: Fix PHY mode for ethernet
  ARM: dts: Add support for phyBOARD-REGOR-AM335x
  ARM: dts: am335x-pcm-953: Remove eth phy delay
  ARM: dts: am335x-pcm-953: Update user led names
  ARM: dts: am335x-phycore-som: Enable gpmc node in dts files
  ARM: dts: am335x-phycore-som: Add emmc node
  ARM: dts: am335x phytec boards: Remove regulator node
  ARM: dts: Add LCD type 28 support to LogicPD Torpedo DM3730 devkit

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:36:25 -07:00
Olof Johansson 5b8ea6bfa4 A lot more love for rk3288 in general and veyron specially with changes
all over the place.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlz/ZecQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgYtuB/9uu5l+8ny2ea/5p11up58Vu97AYffchY4z
 PuKTZvLlPGL/oe/7ZBCAZBrWiE2qDXrU+tDGnBGD9ZiF5aTHNNMFMH+GXlUNNQby
 2gh3sVxjkesgg4fuMUhoipJVtIzZxh/t/+bKus2OSNTBfYAUY/LuB3MKO4NWSz+j
 EnaKtzjV9WBn0K5NDxf6BiU6Inzhud+9xehKd55glwt6XWcvKCC+ejss9IYV+rC+
 o/nA9Oz5K3vnJDZZCGKHcloowP5EWNXCXdVdMM1KpoIS0nTCKtO98vJ6Q7YXWIXD
 L4Ia8NbqNKUfUhXYDA1MJN2y0dU9AhmptdOKbL/b/qhjenTUYQCT
 =02qt
 -----END PGP SIGNATURE-----

Merge tag 'v5.3-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

A lot more love for rk3288 in general and veyron specially with changes
all over the place.

* tag 'v5.3-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
  ARM: dts: rockchip: Split GPIO keys for veyron into multiple devices
  ARM: dts: rockchip: Add HDMI i2c unwedging for rk3288-veyron
  ARM: dts: rockchip: Add unwedge pinctrl entries for dw_hdmi on rk3288
  ARM: dts: rockchip: Switch to builtin HDMI DDC bus on rk3288-veyron
  ARM: dts: rockchip: Add pin names for rk3288-veyron jaq, mickey, speedy
  ARM: dts: rockchip: fix pwm-cells for rk3288's pwm3
  ARM: dts: rockchip: Configure the GPU thermal zone for mickey
  ARM: dts: rockchip: Use the GPU to cool CPU thermal zone of veyron mickey
  ARM: dts: rockchip: remove GPU 500 MHz OPP on rk3288
  ARM: dts: rockchip: Use GPU as cooling device for the GPU thermal zone of the rk3288
  ARM: dts: rockchip: Add #cooling-cells entry for rk3288 GPU
  ARM: dts: rockchip: Mark that the rk3288 timer might stop in suspend
  ARM: dts: rockchip: Add pin names for rk3288-veyron-jerry
  ARM: dts: rockchip: Add pin names for rk3288-veyron-minnie
  ARM: dts: raise GPU trip point temperature for speedy to 80 degC
  ARM: dts: rockchip: raise GPU trip point temperatures for veyron
  ARM: dts: rockchip: raise CPU trip point temperature for veyron to 100 degC
  ARM: dts: rockchip: Make rk3288-veyron-minnie run at hs200
  ARM: dts: rockchip: Make rk3288-veyron-mickey's emmc work again
  ARM: dts: rockchip: Remove bogus 'i2s_clk_out' from rk3288-veyron-mickey
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:22:09 -07:00
Olof Johansson 0dfe186a45 DTS updates for the Integrator, target kernel v5.3.
-----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc66qFAAoJEEEQszewGV1z07EP/Auc0N9u1Q8w0MPh8/w6ZB4q
 CnPTl6rxw5OiInHXTZpYz6JR+2jylFOlG5AjknsaohDBBK4Nsj2uwXwveRjqwDak
 d5oJCRpeNuYFNKs+PD0qSys4cW9zS7SvdZh3XsZJsmm7kgTqNU8D9PSj21mqWs5L
 GIzlEAx3wr760BqtyboaWiSn6bp8Q+VsyXzOwVBnKfH5V8zbTcDEI9YReVmS15PA
 hTxt9zJXuHm868tSRPY8Cwhh2wFZ+4NI1OxZBQ2R33xRfPeP9zP0f2ORE9VjJPNw
 HKrQtB+YCmFM25UpzUTQcqIXkNATzIEu9055qGdfMUdfxlL7EcY6rcwsuKBiaq6d
 Flfu6Sill75iDfcrw8R0bPwCdL0DEK3Jczlij9WTj/ScojrEugupHK+PcYksPpj3
 Uba0GZoZCAjLzL9KMKXtvLnVtG2QdFBaY/Z5QrIwwePQNFYWJbPmR5uVqZsK+rYO
 zxpwTh4jc1gK1aFqlXvk4eAtP168iWaSAH5PXJWbDVEPteaZhkZTepunv8cupGIL
 RQ3hkvW46DWGk782PCyWm8wqWrH0Bu3QGXAk7FOP2G+VJIaLxU11Ncsd1Qu2fkP3
 crAZLP4yivDXF1QXV6beFM1lD74yxmJcaiV8eGbM2rb333VdI6D0xvx1CpEEmqCl
 z7NarmvcKLZHzi6kDEUa
 =6KG1
 -----END PGP SIGNATURE-----

Merge tag 'integrator-dts-v5.3-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt

DTS updates for the Integrator, target kernel v5.3.

* tag 'integrator-dts-v5.3-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: dts: vexpress: specify AFS partition
  ARM: dts: realview: specify AFS partition
  ARM: dts: versatile: specify AFS partition
  ARM: dts: integrator: specify AFS partition

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:15:10 -07:00
Linus Walleij 3655802012 ARM: dts: gemini Fix up DNS-313 compatible string
It's a simple typo in the DNS file, which was pretty serious.
No scripts were working properly. Fix it up.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-19 13:24:03 +02:00
Linus Walleij cf18ea7593 ARM: dts: Blank D-Link DIR-685 console
Leaving this NAS with display and backlight on heats it up
and dissipates power. Turn off the screen after 4 minutes,
it comes back on when a user touches the keys.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-19 13:23:47 +02:00
Mark Brown e1d700f7c9 Linux 5.2-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlz8fAYeHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiG1asH/3ySguxqtqL1MCBa
 4/SZ37PHeWKMerfX6ZyJdgEqK3B+PWlmuLiOMNK5h2bPLzeQQQAmHU/mfKmpXqgB
 dHwUbG9yNnyUtTfsfRqAnCA6vpuw9Yb1oIzTCVQrgJLSWD0j7scBBvmzYqguOkto
 ThwigLUq3AILr8EfR4rh+GM+5Dn9OTEFAxwil9fPHQo7QoczwZxpURhScT6Co9TB
 DqLA3fvXbBvLs/CZy/S5vKM9hKzC+p39ApFTURvFPrelUVnythAM0dPDJg3pIn5u
 g+/+gDxDFa+7ANxvxO2ng1sJPDqJMeY/xmjJYlYyLpA33B7zLNk2vDHhAP06VTtr
 XCMhQ9s=
 =cb80
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl0JKaQTHGJyb29uaWVA
 a2VybmVsLm9yZwAKCRAk1otyXVSH0DIWB/9IWGRWWkTE3XNNrG3D32aP/KMPMJcG
 2ojsLawEX/URJerfR5ofvleTeb3AoE8N4jWFtXc5BcqB7OtcNNKSlKlxt3rrYO5v
 hbyd9Cc+q82iLAPwTFkLNU3MU2vZS9Q81j268lONPtEgiWDpbB2TZ52LINQ5FF+T
 D/U8ERI29nrHDQ+gSi2NLBbBuQNZqb6MIGga2e1wdJVA7NuH6rIkfFAz4oB/vFmR
 HiVTFmNjSCgb9HX9K4b0BsokFkriy5/UWCYZzjwRDQ+TjxioXkUccYZpMqfFI30F
 EfjcwxgqIbQS4cDta4bK09T0s7vUpFiNxWh7clxc2qLBrFijTKxLlNOB
 =nQaU
 -----END PGP SIGNATURE-----

Merge tag 'v5.2-rc4' into regulator-5.3

Linux 5.2-rc4
2019-06-18 19:12:47 +01:00
Arnd Bergmann 140d90098f ARM: ixp4xx: include irqs.h where needed
Multiple ixp4xx specific files require macros from irqs.h that
were moved out from mach/irqs.h, e.g.:

arch/arm/mach-ixp4xx/vulcan-pci.c:41:19: error: this function declaration is not a prototype [-Werror,-Wstrict-prototypes]
arch/arm/mach-ixp4xx/vulcan-pci.c:49:10: error: implicit declaration of function 'IXP4XX_GPIO_IRQ' [-Werror,-Wimplicit-function-declaration]
                return IXP4XX_GPIO_IRQ(INTA);

Include this header in all files that failed to build because of
that.

Fixes: dc8ef8cd3a ("ARM: ixp4xx: Convert to SPARSE_IRQ")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-18 03:49:44 -07:00
Arnd Bergmann 6d8df60218 ARM: ixp4xx: don't select SERIAL_OF_PLATFORM
Platforms should not normally select all the device drivers, leave that
up to the user and the defconfig file.

In this case, we get a warning for randconfig builds:

WARNING: unmet direct dependencies detected for SERIAL_OF_PLATFORM
  Depends on [n]: TTY [=y] && HAS_IOMEM [=y] && SERIAL_8250 [=n] && OF [=y]
  Selected by [y]:
  - MACH_IXP4XX_OF [=y] && ARCH_IXP4XX [=y]

Fixes: 9540724ca2 ("ARM: ixp4xx: Add device tree boot support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-18 03:49:38 -07:00
Douglas Anderson 1d390437f6 ARM: dts: rockchip: Allow wakeup from rk3288-veyron's dwc2 USB ports
We want to be able to wake from USB if a device is plugged in that
wants remote wakeup.  Enable it on both dwc2 controllers.

NOTE: this is added specifically to veyron and not to rk3288 in
general since it's not known whether all rk3288 boards are designed to
support USB wakeup.  It is plausible that some boards could shut down
important rails in S3.

Also note that currently wakeup doesn't seem to happen unless you use
the "deep" suspend mode (where SDRAM is turned off).  Presumably the
shallow suspend mode is gating some sort of clock that's important but
I couldn't easily figure out how to get it working.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-06-18 11:58:28 +03:00
Andrey Smirnov 6f0af5da86 ARM: dts: imx7d-zii-rpu2: Drop unused pinmux entries
Neither pinctrl_i2c1_gpio nor pinctrl_i2c2_gpio are used anywhere in
the file, drop them.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18 16:05:46 +08:00
Andrey Smirnov d38f5fdb87 ARM: dts: imx7d-zii-rpu2: Fix incorrrect 'stdout-path'
RPU2 uses UART2 as a serial console and UART1 is not used at all. Fix
incorrrectly specified 'stdout-path' to reflect that.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18 16:05:37 +08:00
Manivannan Sadhasivam ae7b3384b6 ARM: dts: Add support for 96Boards Meerkat96 board
Add devicetree support for 96Boards Meerkat96 board from Novtech. This
board is one of the Consumer Edition boards of the 96Boards family based
on i.MX7D SoC. Following are the currently supported features of the
board:

* uSD
* WiFi/BT
* USB

More information about this board can be found in 96Boards product page:
https://www.96boards.org/product/imx7-96/

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18 15:52:35 +08:00
Sébastien Szymanski 470f248368 ARM: dts: imx6ul: Add PXP node
Add PXP node for i.MX6UL/L SoC.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18 15:18:00 +08:00
Anson Huang 6869114832 ARM: dts: imx6sll: Enable SNVS poweroff according to board design
The SNVS poweroff depends on board design, by default it should
be disabled in SoC DT and ONLY be enabled on board DT if it is
wired up to external PMIC.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18 15:15:04 +08:00
Anson Huang 4664179fe6 ARM: dts: imx7s: Enable SNVS power key according to board design
The SNVS power key depends on board design, by default it should
be disabled in SoC DT and ONLY be enabled on board DT if it is
wired up.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18 15:15:02 +08:00
Anson Huang bbfba8c715 ARM: dts: imx6sll: Enable SNVS power key according to board design
The SNVS power key depends on board design, by default it should
be disabled in SoC DT and ONLY be enabled on board DT if it is
wired up.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18 15:14:59 +08:00
Anson Huang 052ce6f4de ARM: dts: imx6ul: Enable SNVS power key according to board design
The SNVS power key depends on board design, by default it should
be disabled in SoC DT and ONLY be enabled on board DT if it is
wired up.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18 15:14:57 +08:00
Anson Huang ee279588ac ARM: dts: imx6sx: Enable SNVS power key according to board design
The SNVS power key depends on board design, by default it should
be disabled in SoC DT and ONLY be enabled on board DT if it is
wired up.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18 15:14:54 +08:00
Anson Huang 770856f0da ARM: dts: imx6qdl: Enable SNVS power key according to board design
The SNVS power key depends on board design, by default it should
be disabled in SoC DT and ONLY be enabled on board DT if it is
wired up.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18 15:14:39 +08:00
David S. Miller 13091aa305 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Honestly all the conflicts were simple overlapping changes,
nothing really interesting to report.

Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-17 20:20:36 -07:00
Arnd Bergmann 5669245b57 ARM: omap1: remove unused variable
The cleanup of the debugfs functions left one variable behind that
should now be removed as well:

arch/arm/mach-omap1/clock.c:1008:6: error: unused variable 'err' [-Werror,-Wunused-variable]

Fixes: d5ddd5a517 ("arm: omap1: no need to check return value of debugfs_create functions")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-17 15:07:42 +02:00
Olof Johansson 24cb4bc8f0 ti-sysc soc changes for v5.3
Just two changes to make few platform data functions static, and to
 call dev_info() if am437x is suspending to RTC-only mode. We want to
 see this in case of issues as it depends on the board wiring for things
 like DDR memory.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl0AvH4RHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXOHcg/6AqtSmtYCOHCj1FgUlB0Ebf8lDg+M3n37
 VxPapucpbF1tdE1FIGqNCBRiNiCzmCMF/0ARLpXN/GrBWe8PTplAOddlaf+9QU0R
 IQyeUOOogYQ/NH388hUep+KPD3uSTA+N83rLiuyPdewBESIBOV82hoHVi40CsqWo
 b0zhFBbrxX8rGJPSRXuKKy1rooxzYqRRrRKmDEzspvG4bmuHRnU0+UKa1GhNMlF5
 YuDumzJ4sbznEZif6TB+bAzdqbKeAaTxs0yj411AvT5F1vsj50GLbUJzz2bC9wZ4
 ihfbL8/+ODSvEZKWW2nrlsZp297GS2y4f3yCuDy48dYA/Ud3dL1nypa1wde44HbI
 sANRz4ihXngRFoYJpTgs+bRrU16al1EPMeXCMmnMTBMPMnSCSd5Vix0jdCn+cQHq
 sQC5sCBnG3A9Yk10vyWvD4/LZ7FVX29zXGUoZxoxICwxbJZvhMlCnZjCbQVCqfn7
 dt99g3jxGcn2COg8mjMqR7zmCzTNn2TuWPbceyZYOC7/POeKOdlqi2xQN1at+RxE
 wm5PLNZ1FkLw2FhrtmtiGbFPQEkXsbHRJo7iJpJYRqBsypvVfeY6y8k7r+w4GE8K
 xWtXNh1oARIWLNVbq/P2UFq/KnzntX3M1UrPiB7sept3xmW0y6q2nu1LMLrhAvUM
 Wk78ehVR518=
 =+Fzf
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.3/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

ti-sysc soc changes for v5.3

Just two changes to make few platform data functions static, and to
call dev_info() if am437x is suspending to RTC-only mode. We want to
see this in case of issues as it depends on the board wiring for things
like DDR memory.

* tag 'omap-for-v5.3/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  soc: ti: pm33xx: Add a print while entering RTC only mode with DDR in self-refresh
  ARM: OMAP2+: Make some variables static

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-17 05:17:10 -07:00
Olof Johansson b06c51debc This pull request contains Broadcom ARM-based SoC Kconfig/machine
changes for 5.3, please pull the following:
 
 - Wen fixes a missing referenc count on the CPU device_node object
   throughout mach-bcm/
 
 - Jim adds the ability for ARCH_BRCMSTB to use reset controllers
 
 - Doug adds the ability for ARCH_BRCMSTB to use the PINCTRL framework
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl0AZXEACgkQh9CWnEQH
 BwRBjQ/9FBksBwgZ0mxziXOMaO26M3sD10Wd08whfS/FPnTx4VXeHaEaFhwR/hTU
 32sTjWUhzC0LfBwVt53Nz6V3xLEBxEligQY1TS+Yb1JTKr732vMV1SQxhGlFpYbi
 or3g+CByAI5jky6oZ6E3SJ/Us7gcuGVDX6aLnpME31K1puvh5ETiWbU3o+1ESsFO
 mL1J9t9WJ2rtZ09rlPo1Oi+7/6qfr8gACFW0zjMnNmXg8vUg3zSnIWBe6TKpGD30
 Ht6kZfWxQ+zlHZHluIkt9RkG8ItiWiFjpa8CHQYIrx2ReD5dsfZ1O7Y+mQksQpX5
 tAZ99QTPIRowCxg6BM4ibRCcav6HGnfAfGsRZE0SgQ9SpVGxiSR/IJwxE334oNYE
 BY1trTXPRC5zrSwLjOfLPukq8GwlRvimPwdemV77P8+k7IEVA52BG95ZQi5YiR9s
 9T5cSU6V073OVDKX1Ew66ivCdijcUn5eFbYgGt2V/u4hCAiwi9iBMmG8itkSMp+q
 6rgteb5ew0SXfrWgj0YyDufEFri1AoZEhUsscqWt1JCNzCmmxe7cp6/NgkDMtj4B
 4i4HXD0Y40G24ZwXnOowfRMwEnI+8UCQi7F7me8bSete3OhROVY20bUnZdpF0ca5
 tk3PkDpEbdwqxTZTbBhuOdeuckTMfVXr5HetJoMyz9z9D8mlAi0=
 =CdUx
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.3/soc' of https://github.com/Broadcom/stblinux into arm/soc

This pull request contains Broadcom ARM-based SoC Kconfig/machine
changes for 5.3, please pull the following:

- Wen fixes a missing referenc count on the CPU device_node object
  throughout mach-bcm/

- Jim adds the ability for ARCH_BRCMSTB to use reset controllers

- Doug adds the ability for ARCH_BRCMSTB to use the PINCTRL framework

* tag 'arm-soc/for-5.3/soc' of https://github.com/Broadcom/stblinux:
  ARM: bcm: Enable PINCTRL for ARCH_BRCMSTB
  ARM: bcm: Enable ARCH_HAS_RESET_CONTROLLER for ARCH_BRCMSTB
  ARM: bcm: fix a leaked reference by adding missing of_node_put

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-17 05:15:22 -07:00
Olof Johansson 4ab3a3e7e8 Another missing of_node_put
-----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlz/ZxgQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgZ8xB/4376IVuRZ29/VMmtsRgBwitoi80CYDSmYP
 alF0ET6o07uixZbHIXwcYZQ+hpLRq+HDL8axWpSXtdadm4/9fyYvj4uXKnmbo7Jb
 G06oZaEyCsrmBQxqU+EyHuEIwR6RvPpf7G+cXnoxUway+5wPrmioZzOLQJj1pS/3
 rVu9SJMvxvSaWo1wxh7VTtaSZ0nAyXpBXjJrQtf+FIm2/nCAOjtmvjmn8BM0FVu+
 2Q8mulW29BH1kZsA6/uqSTBE3maJzCXK9x3X0PM2o9zmLBh1o8j115mHabFmyjA8
 SCAjI4/7ZsnYVPVBH/pDSvGwkjcDVo8cxF9N/ems7mORhWNDcrAb
 =1pXX
 -----END PGP SIGNATURE-----

Merge tag 'v5.3-rockchip-soc32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/soc

Another missing of_node_put

* tag 'v5.3-rockchip-soc32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: rockchip: fix missing of_node_put calls in smp code

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-17 05:14:24 -07:00
Olof Johansson 449c1cd297 Versatile platform updates for the v5.3 kernel cycle:
- Drop a slew of unused CLCD platform data
 - Fix OF reference counts
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc7kmAAAoJEEEQszewGV1z1ZAP/R4nxFgh4f2bTlW0GclNLY5+
 B3f5yvEAIhUxKEV2FVjjP+3kg4AFQNMHf6KEzZUzinGp2tv3VaYbOIqRTlvWLWEg
 KS9OKWNGWxhNdvpv5KqC04UG2WML8DdCqEluyRPjvaqR3LWRbFnx80aPOSPVbx2W
 rLpVJm4HUth+6m+Fqywv8MzYI692RVTHk6Kg/ZEOdGAgfiCcRPIShFGc/UMxaHB/
 AOnUvIlZzJr/7P6hLSZrqKvq5ftA2lI2OsmSHLzooykwT8tg/Cam6lWtY6XbwJNu
 EnZVqPbbVK/2K0c4bEzv2GEJindMj8hrY+/Wf72HuPWNky3xEB1EUDMwu4xzLndD
 QRkpUTCkXZ9H8hjsA6SpKtnIG+UIOyyRtvIYhE+QLY1EYRoP0+VOLdm/1W/N4Ucs
 9RmxxcMoldl3c9VV0KxAH+xg2nZqqKPJ6ol9Ify8B+VKPSeW1q3pbIKSUiM+F2xp
 y2/1S9lcAuaqPl90EFMc5RMTx78M1SAP4c/0qpj4w+1oGPOj0rd3WhFzuhtu7Jij
 ndfVILPYvP10rY/XyQ5FrK/XFXL5/5SMqnv3bN82jXCnE7163UyRPnSZsRay5orf
 LOPMS6wHbIU30NcVNnviKAIuuAIlsCKvbzskGyQDQNjwj3tQUzg5q6f+YQLDxdJ+
 SwaIVxE7geVR5iuS7hb4
 =+jk4
 -----END PGP SIGNATURE-----

Merge tag 'versatile-v5.3-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/soc

Versatile platform updates for the v5.3 kernel cycle:
- Drop a slew of unused CLCD platform data
- Fix OF reference counts

* tag 'versatile-v5.3-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: versatile: Drop CLCD platform data
  ARM: versatile: fix a leaked reference by addingmissing of_node_put

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-17 05:11:53 -07:00
Olof Johansson 6ad135992e This deletes the NetX 100/500 machine support.
-----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc7RjjAAoJEEEQszewGV1zRuQQAJZ6pM/2jOppdpftIjjdgXjy
 QNE4ss7gWqpKL+C1PFUOGau8J/A5+ypoKT1c4NUvPBSh6z3o5J6mLO3ATvYAdiqC
 ImjuxR3yz08fQ6trtZqAM9198ttfU1R5cx8r4e6Aa+/pejDod2MPbTvkSaXT7fks
 vBLPJp/OSGRM3jm+HUU2T7vb5vfXLEZwPR5l5yluZB5TbrwGikJnpFMZ8tHYB3LG
 wwuZa3fkVjtl2wEgKJRRhmlW7REACPFlZIxDf8nF+KLdpO/E+zj9z4E2NgrYvmEj
 hfyXc9p49oGsjx+U/eoRmgwy8wssYDfhk2kMWjeNOLsTKeinmYpSo/znpzQt+t6C
 SyoBazDkMRxO4/RrunzJO61jfrzzBnwE8psgcVxo10jyz8K5VTJ/xeQLuU8y877b
 9iBBYnwXMPU+34Fo0rOCzMq8cxpLTOpX2crMHT9idKl+X/7LCMN/R7nk/3UmnQDL
 Myzz618DkI4vPbfb831erlAAWcBn+u1ToNt8qaQW8C+FbOSmJkDncXGKRQEdVFRO
 aNuLvLfI+NC1r7Yzm4hGkRoxtdDz7HUtDSFpFkgc60A5LZ/EAKVHy5jhs2z6ch73
 0fcOBQyaaCnNW1OP7AWeltnY+tfXrO7xnurpytEUU4lpWT2OyNxdY6fq1gY6nefC
 ku4M0pYR7EoeVW86WKw/
 =MxUr
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drop-netx-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/soc

This deletes the NetX 100/500 machine support.

After discussing with the subarch maintainers and Hilscher,
we concluded that the netx subarchitecture (Netx 100/500)
is no longer maintained or tested, and noone will miss it
if we delete it. So delete it.

There is a newer Netx 4000 architecture which we may see
included at some point, but this will be supported using
the standard multiplatform and devicetree mechanisms and is
easier to develop from scratch.

* tag 'armsoc-drop-netx-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: delete netx machine

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-17 05:09:55 -07:00
Olof Johansson c3bd15a078 ti-sysc interconnect target module driver changes for v5.3
This series of changes improves probing devices with ti-sysc to the
 point where we can now probe most devices without the custom dts
 property "ti,hwmods" and no legacy platform data :)
 
 We add support for platform data callbacks for idling and unidling the
 clockdomain the module belongs to. The rest of the series mostly adds
 handling for the various quirks needed by old legacy modules such as
 i2c and watchdog. Some quirk handling is still missing for few modules,
 but those will be added as they get tested.
 
 The related platform data and dts changes will be sent separately.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl0AuTURHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXPn4A//Z7uWk98dwcIs8/28CaFTPsRGhx3p+hj0
 Mafl3eT5Q/y0TFGkMw3g5LSX5EZlz+5t6eFsolU+O8p6jsPoo5mcsGQfgkraydE3
 x0wfSkFiqJcTP4FFvrwcekSQZGjpeZoUdQZ/e2epSDWvPx9gRzLFR3wCLPJ1MOgg
 dveEJTnPfpFLliTZeVpcn4v2P4+KfBn4iu2ojr9qcLZL9QNFZr3NQLRdx6kUw7qf
 b3eRugzx3sBA4pKLEfqrOzqjP77W9sy1zDN5rA3GNgo+b+OyBhdu/pxxkREP4t4+
 8/1E/JndDVkO98ooFJ+MWdnh8HQmefEjyaoaYa7LN6438mivkOFPFAUMtuOdKzv/
 FTa9r7xpo1Iq5b3HyE7NA+xZfoHKBEHzY0zbNyJLz75Ctnh3zOuHAA3xwxOlbgn+
 UX/1DAS/7ALUXrXkk331VVzYX5UfOxrH2+CF2GF9vpCNZZ17Qp3ZKy4XW1Qv9nfy
 nozOkqSvbGG0tzhq+wLd6Soo2Vns7CfHRqDB8txLeBGtrk/kahHsxe7dLo4+fHk6
 DH0R7mZ6QnvaMWpJwkqoBUp7lD9ej9/pw2newbb5RyUDQqMjNvdY3zcBOeXeWulh
 m2hWFKt1JTGTvXtbTjOOnfQIyICUClMzo4VowLBplfZELJvK781/5P3Jb4ZOFF0N
 I1DN4vDxqMg=
 =Fxul
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.3/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers

ti-sysc interconnect target module driver changes for v5.3

This series of changes improves probing devices with ti-sysc to the
point where we can now probe most devices without the custom dts
property "ti,hwmods" and no legacy platform data :)

We add support for platform data callbacks for idling and unidling the
clockdomain the module belongs to. The rest of the series mostly adds
handling for the various quirks needed by old legacy modules such as
i2c and watchdog. Some quirk handling is still missing for few modules,
but those will be added as they get tested.

The related platform data and dts changes will be sent separately.

* tag 'omap-for-v5.3/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  bus: ti-sysc: Add support for module specific reset quirks
  bus: ti-sysc: Detect uarts also on omap34xx
  bus: ti-sysc: Do rstctrl reset handling in two phases
  bus: ti-sysc: Add support for disabling module without legacy mode
  bus: ti-sysc: Set ENAWAKEUP if available
  bus: ti-sysc: Handle swsup idle mode quirks
  bus: ti-sysc: Handle clockactivity for enable and disable
  bus: ti-sysc: Enable interconnect target module autoidle bit on enable
  bus: ti-sysc: Allow QUIRK_LEGACY_IDLE even if legacy_mode is not set
  bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits
  bus: ti-sysc: Support 16-bit writes too
  bus: ti-sysc: Add support for missing clockdomain handling
  ARM: dts: dra71x: Disable usb4_tm target module
  ARM: dts: dra71x: Disable rtc target module
  ARM: dts: dra76x: Disable usb4_tm target module
  ARM: dts: dra76x: Disable rtc target module
  ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values
  ARM: dts: am57xx-idk: Remove support for voltage switching for SD card
  bus: ti-sysc: Handle devices with no control registers
  ARM: dts: Configure osc clock for d_can on am335x

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-17 04:53:32 -07:00
Ingo Molnar 410df0c574 Linux 5.2-rc5
-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAl0Gj1MeHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGctkH/0At3+SQPY2JJSy8
 i6+TDeytFx9OggeGLPHChRfehkAlvMb/kd34QHnuEvDqUuCAMU6HZQJFKoK9mvFI
 sDJVayPGDSqpm+iv8qLpMBPShiCXYVnGZeVfOdv36jUswL0k6wHV1pz4avFkDeZa
 1F4pmI6O2XRkNTYQawbUaFkAngWUCBG9ECLnHJnuIY6ohShBvjI4+E2JUaht+8gO
 M2h2b9ieddWmjxV3LTKgsK1v+347RljxdZTWnJ62SCDSEVZvsgSA9W2wnebVhBkJ
 drSmrFLxNiM+W45mkbUFmQixRSmjv++oRR096fxAnodBxMw0TDxE1RiMQWE6rVvG
 N6MC6xA=
 =+B0P
 -----END PGP SIGNATURE-----

Merge tag 'v5.2-rc5' into locking/core, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-06-17 12:06:34 +02:00
Yannick Fertré ccaf591d63 ARM: dts: stm32: enable display on stm32mp157c-dk1 board
Enable hdmi bridge sii9022 & display controller.

Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-17 09:53:31 +02:00
Olof Johansson 80d1d46525 Fixes for omap variants
Three fixes mostly for dra7 SoC variants that have some devices disabled
 compared to the base SoC. These got broken by the change of making devices
 probe with ti-sysc interconnect target module and went unnnoticed for a
 while. And there is no clkcel bit for timer12 unlike timer1. Also included
 is a GPIO direction fix for phytec SDIO card detection.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlz+CUURHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXN0fA/6Avr8yF2fN/EyHhab6dK5r6WkxCmk0Dpg
 RnlunnQ+2dN5IDT5AbNpou/2kr/aEqnzQfzHez7eD7+JURllcpm7oUoiS6h6iWTK
 Koyau7BtFA9Zy5R9vXjITaAseKTlD4l/KF8coMvSiZ2fa/ApuP33BW+2edwv27EF
 jB44F01vGKkjpX8k3CsG2nrPzrhydLNAgEXHGTSXV9OU4nfgpE/LYhfTn7Cw63wr
 tCcAJdTCF9envRGd+m6uYWKbsjYbWYCywS17RqsMBGdcWeoFXYRR00fJfZ2dhPFO
 xEYhgNqyVU08VBASMOZTmMjUz5nlJPTPMISM9DPjD5XRmY9vby1kO1kZBOybKS4e
 oHj26sWhCqCpA5jAq+I3LcFHIxJDNITg2u06u58SxbZHml3Y5wFUGn+gvcjB5xuW
 k/ASGpawv3dA1MyfoCgZJrprdv0/YnFuVvW/TAa13cW/AUWseRyJcJlI6BI0cBPN
 GH/wTQkKERNo+ugclbGNlz27VELoL4lsiSJALp8UOLEOg80nxoXLMlwVs9lqCW0w
 Invewxaz00iDa0hjpdvuFiqwE67bC4I0wtS69NgR8BL+84UZmVj1oCdFA2njyell
 TPj15GJK4ofND2r4FvFY7lnpVOvt3EpaiQ1Cmvn5YXXsTovQ7OiOQkLbnTs/hTFI
 ekUIQgEuMq4=
 =g05K
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.2/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Fixes for omap variants

Three fixes mostly for dra7 SoC variants that have some devices disabled
compared to the base SoC. These got broken by the change of making devices
probe with ti-sysc interconnect target module and went unnnoticed for a
while. And there is no clkcel bit for timer12 unlike timer1. Also included
is a GPIO direction fix for phytec SDIO card detection.

* tag 'omap-for-v5.2/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x phytec boards: Fix cd-gpios active level
  ARM: dts: dra72x: Disable usb4_tm target module
  ARM: dts: Drop bogus CLKSEL for timer12 on dra7

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-16 13:33:51 -07:00
Olof Johansson d5d3652af1 DaVinci fixes for v5.2 kernel.
This addresses an issue with probe of IO expander on DA850 EVM. There is
 also a WARN_ON() fix on DA850 and DA830 devices.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJdA63xAAoJEGFBu2jqvgRNx8YP/1V8mA2qGQTwvU7/qv6BPXQs
 uPgN3zDJ5O+4k1vPJolxLzFq2o1ttFFEBz0uWjPkpKylNZWgmMwUgAkfU2/nbhwh
 PWXZzob/fGzydoxZHHY3yYqGQkRMIE0hgoKnm1/ByT1ErOewF/8SN6yxe/ylgLey
 e4LzEBh/anD1mZNqGyXiD3MAGS1lBx4iwM91S2aaZapLvzeSmPK/qkibs3U3x13u
 A97W+hmx+Oy5ZCYJCod5No9umP5MT++G5j/OaUQFC56VZdWEt/x+Sm6yCIyPNBks
 LhH5pKfkg6BMgMfL4v77QV/94eKiH7qeKeIYrS88wmoyvcPBUlTSJPaKWgHBZk2Q
 bsln3mdsWq/3ogmslz4GtPWn5jFIvyNOTTjCUd2iOparLU3Bjfe8Fwg67M/vGCXC
 NSr6fCxApp0IhVmgmQmOAv4UHoOGTOjmt//oUv4dn7NqpqaP8Hdt+KxDK6loHUjG
 uPcXjuf6oKIMeuwpinshIm3Ygv2sKmNxJf4Be2ZUDi5XEKpXWW1tIaJZevc1rLKT
 PWo5wCCSb8udZhF8BprmhWqqpUAjS6TdZVqC0i8z5rpL8da5OzWvlbMrZBprTcVA
 9Of39mXp93zVOTacCkagDab/Pw83JG9zdQ9VIb0lJvzEh+k4MqvVx4gmzXBJe1Gd
 GPVjR1GYWM07Jw4+vbDT
 =1gFV
 -----END PGP SIGNATURE-----

Merge tag 'davinci-fixes-for-v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes

DaVinci fixes for v5.2 kernel.

This addresses an issue with probe of IO expander on DA850 EVM. There is
also a WARN_ON() fix on DA850 and DA830 devices.

* tag 'davinci-fixes-for-v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: da8xx: specify dma_coherent_mask for lcdc
  ARM: davinci: da850-evm: call regulator_has_full_constraints()

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-16 13:33:13 -07:00
Olof Johansson 75d91ba475 mvebu fixes for 5.2 (part 1)
Fixing defconfig allowing to use Ethernet again on Armada 38x based
 boards
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXQNQDAAKCRALBhiOFHI7
 1dqXAJ9ght2djbWrvtPLbfr10y7kkYFQHgCfbupD05I+H4+aGx7pnIvdvZ21qYU=
 =SU1/
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-fixes-5.2-1' of git://git.infradead.org/linux-mvebu into fixes

mvebu fixes for 5.2 (part 1)

Fixing defconfig allowing to use Ethernet again on Armada 38x based
boards

* tag 'mvebu-fixes-5.2-1' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu_v7_defconfig: fix Ethernet on Clearfog

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-16 13:32:47 -07:00
Olof Johansson 9f22081ea2 This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.2-rc1, please pull the following:
 
 - Florian fixes the remaining Broadcom DTS files to have a valid
 device_type = "memory" property which was missed during the removal of
 skeleton.dtsi
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlzi3CQACgkQh9CWnEQH
 BwSFkg/+OJtdBwVrNwmXlw4B9di/oh1SRO8XgK+gn6siEVhlYr+qgyIRoKF0ZHcU
 SdQfq8vLisUnccY3IhFymhNrqdKnkuRgFLAQsY5tt0nhTKmZXRfeNlHiloKbjT2y
 bzkD4sA9J+QOawu1cskB8DNlgNHmUsdMN0eZLjaIvQtYB7e6XhxZu6U84O8wQk33
 gKM3+ukAS/MXyQOJt1MfbaGu/M30u+YPtWUqeueKQ5sqUlRum8GymgUXn9DngRv0
 t2eeBGXepwbs5LTMBKmeP/hQXvdSf6zaGO0UGzvp8v/k8Kxxf1oII54Nrk6aA2zy
 h+YFouiuRSO+NrYdFEJJq0ZoQ93YvDM+B31HIrGO1KZk72P4m6yjqstRD5jiS11o
 8OH2KQfv83xMuFA3IfKqw7NClSJn3FPYrSb6ZWSkuLq3xaPucytio2BtNLq2q611
 2EJJsAPp+xV6wh9pCr/gcBg3vsDbk9Vw8uJYMjTds6WGy62JqQvYBfTTjh6mXqWo
 kAVV2+cN0rOTABeFtbwU3xh5ygyVievzAEHhWWC1tHnCYJFlFpIackFWfqIvudm5
 ETMsTQsFZ/OKPkzzJlzKSZjnSrsS/oEqpSuG5SQoqrT/Ih6fy5UBrseNUwMKOPL8
 ch7XVLyPPkiYEkzhB7nFBkEeQoiuekcBFj/M5EnjA3J88Z7MZKA=
 =rECv
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.2/devicetree-fixes' of https://github.com/Broadcom/stblinux into fixes

This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.2-rc1, please pull the following:

- Florian fixes the remaining Broadcom DTS files to have a valid
device_type = "memory" property which was missed during the removal of
skeleton.dtsi

* tag 'arm-soc/for-5.2/devicetree-fixes' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcm: Add missing device_type = "memory" property

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-16 13:29:08 -07:00
Olof Johansson 6515a2ceac Fixes for omap variants for dra7 mmc voltage and boot issues
This series contains dra7 mmc voltage fixes, and fixes to the recent
 changes to probe devices with device tree data insteas of legacy
 platform data:
 
 - Two fixes for dra7 mmc that needs 1.8V mode disabled as in case of a
   reset, the bootrom will try to access the mmc card at 3.3V potentially
   damaging the card
 
 - Two regression fixes for am335x d_can. We must allow devices with no
   control registers for ti-sysc interconnect target module driver for
   at least d_can, and we remove the incorrect control registers for
   d_can. And we must configure the osc clock for d_can as otherwise
   register access may fail depending on the bootloader version
 
 - Four regression fixes for dra7 variant dts files to tag rtc and usb4
   as disabled for dra71x and dra76x. These SoC variants do not have
   these devices, and got accidentally enabled when the L4 interconnect
   got defined in the dra7-l4.dtsi for the dra7 SoC family
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlzuLFwRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXM39Q/8CNz88ctxQupl8zqzAEq3Tr78Z9XdIlmR
 BEk3buRQmUZKd+v1M7k1aP97MFDaBjLM4qIEZRoT7WYuWSD04J6EzjCKOQrAMDMh
 cauv7X5ysNvyQNGUlEXxNIdFy5fB+jqfAqZ/R6dpiRAMXd7OtFMnBkyQR27WXyYM
 2hIVpGwGZJDatTyqdZo2/QW4vEktD/4kzs+iaojMDmePjsIw+engwa+/D0TrnXfk
 dhW5Ay+irME2+gepBeFOXVBRZNiXgl7Y7fgynMpgbYMxwfsbJiYUh2UF/myP7mMt
 bnyIwhRUr2jg4W5+PpCzt1KXh4jirdcREBW5SLWQNcmZ2WA1KklgKSUXcwgUPbAP
 hdgxyMRKFJFGrpCH3U6U9UBXOprO9Niumw8zEna/fQoY5XfN4GrnbZomqdyTon+6
 GzMivM1NnmMIUHd0EWrzxe2pbVLk2vNRH1x/dCvQ38HcnXaTH4gGWqbHZRxkUH7S
 ZkswHZQS32lOI7zK9EMlwfM5fa2QragnkH3e99CNH4ztr9cBs/p5ge2/ZRz0DOru
 vTEd1j69EMlvHyDjPtD3h+P4534hlEcclvHDrqINKQgWwn59zFy8LGgLL6YAT+n/
 cT1VJkWKCN2IPM0VXrFSmWIyQmplgevA1tF1/XdaYSs5NdNJOYXxTQsmludgq1il
 pQ1EK2psBPU=
 =Ajjk
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.2/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Fixes for omap variants for dra7 mmc voltage and boot issues

This series contains dra7 mmc voltage fixes, and fixes to the recent
changes to probe devices with device tree data insteas of legacy
platform data:

- Two fixes for dra7 mmc that needs 1.8V mode disabled as in case of a
  reset, the bootrom will try to access the mmc card at 3.3V potentially
  damaging the card

- Two regression fixes for am335x d_can. We must allow devices with no
  control registers for ti-sysc interconnect target module driver for
  at least d_can, and we remove the incorrect control registers for
  d_can. And we must configure the osc clock for d_can as otherwise
  register access may fail depending on the bootloader version

- Four regression fixes for dra7 variant dts files to tag rtc and usb4
  as disabled for dra71x and dra76x. These SoC variants do not have
  these devices, and got accidentally enabled when the L4 interconnect
  got defined in the dra7-l4.dtsi for the dra7 SoC family

* tag 'omap-for-v5.2/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: dra71x: Disable usb4_tm target module
  ARM: dts: dra71x: Disable rtc target module
  ARM: dts: dra76x: Disable usb4_tm target module
  ARM: dts: dra76x: Disable rtc target module
  ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values
  ARM: dts: am57xx-idk: Remove support for voltage switching for SD card
  bus: ti-sysc: Handle devices with no control registers
  ARM: dts: Configure osc clock for d_can on am335x

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-16 13:27:36 -07:00
Olof Johansson 4bded29983 i.MX fixes for 5.2:
- A build fix for soc-imx8 driver which needs SOC_BUS support.  To
    avoid dealing with the dependency for every single i.MX SoC bus
    driver, we selects at from architecture level.
  - A fix on i.MX SCU firmware driver to ensure SCU irq is enabled only
    after IPC is ready.
  - A regression fix on cpuidle-imx6sx driver, which causes some
    characters loss on serial communication.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJc50FAAAoJEFBXWFqHsHzOt4wIAJJ4MLXCMKj2oVWXimkF3DAF
 g9M7ridrarhPAXowuTYV4FuW7me7nPxr5VTmwVIJE23wEKdaOd7cg0tkmvMi0tG6
 3TlNwCsEjJx+9rtGF196SZfR9HinLziAc4x7Qcl88xlQTQEIptvx6AMPit7Gy0je
 MJ0PzLA1l+tazo7dXvMjZ+LkxlvLTSB/RuBciA8sgOvwsdbG1Azz/AduSLxO7e/T
 ZSmEElTluqIKVxH5sbVY0T7mxWat7l5As28nx27cWDHGPoDMOt/TWiCTAvFR0d6T
 m+bW6xcvy63Z2II1Er//ig4rwcmK1mcUv+3i63/sIkFxl9fa0H4WnTu67T+/mck=
 =zbC7
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

i.MX fixes for 5.2:
 - A build fix for soc-imx8 driver which needs SOC_BUS support.  To
   avoid dealing with the dependency for every single i.MX SoC bus
   driver, we selects at from architecture level.
 - A fix on i.MX SCU firmware driver to ensure SCU irq is enabled only
   after IPC is ready.
 - A regression fix on cpuidle-imx6sx driver, which causes some
   characters loss on serial communication.

* tag 'imx-fixes-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: cpuidle-imx6sx: Restrict the SW2ISO increase to i.MX6SX
  firmware: imx: SCU irq should ONLY be enabled after SCU IPC is ready
  arm64: imx: Fix build error without CONFIG_SOC_BUS

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-16 13:26:55 -07:00
Brian Masney 817bbbb774 ARM: qcom_defconfig: add support for USB networking
Add support for USB networking as a module to qcom_defconfig since its
a useful feature to have for development purposes.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-16 11:31:50 -07:00
Brian Masney ef7a5baf64 ARM: qcom_defconfig: add display-related options
Add the CMA (Contiguous Memory Allocator) for the MSM DRM/KMS driver,
the simple panel, and the TI LM3630A driver in order to support the
display on the LG Nexus 5 (hammerhead) phone.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-16 11:31:29 -07:00
Brian Masney 489bacb298 ARM: dts: qcom: msm8974-hammerhead: add support for display
Add initial support for the display found on the LG Nexus 5 (hammerhead)
phone. This is based on work from Jonathan Marek.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-16 11:27:45 -07:00
Brian Masney 5a9fc531f6 ARM: dts: msm8974: add display support
Add the MDP5, DSI and DSI PHY blocks for the display found on the
msm8974 SoCs. This is based on work from msm8916.dtsi and Jonathan
Marek.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-16 11:27:28 -07:00
Brian Masney 030b6d48eb ARM: dts: qcom: msm8974-hammerhead: add support for backlight
Add necessary device tree nodes for the main LCD backlight.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-16 11:27:23 -07:00
Jonathan Marek 48100d10c9 ARM: dts: qcom: msm8974-hammerhead: add touchscreen support
Add support for the Synaptics RMI4 touchscreen that is found on the
Nexus 5.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-16 11:25:41 -07:00
Mauro Carvalho Chehab d67297ad34 docs: kdump: convert docs to ReST and rename to *.rst
Convert kdump documentation to ReST and add it to the
user faced manual, as the documents are mainly focused on
sysadmins that would be enabling kdump.

Note: the vmcoreinfo.rst has one very long title on one of its
sub-sections:

	PG_lru|PG_private|PG_swapcache|PG_swapbacked|PG_slab|PG_hwpoision|PG_head_mask|PAGE_BUDDY_MAPCOUNT_VALUE(~PG_buddy)|PAGE_OFFLINE_MAPCOUNT_VALUE(~PG_offline)

I opted to break this one, into two entries with the same content,
in order to make it easier to display after being parsed in html and PDF.

The conversion is actually:
  - add blank lines and identation in order to identify paragraphs;
  - fix tables markups;
  - add some lists markups;
  - mark literal blocks;
  - adjust title markups.

At its new index.rst, let's add a :orphan: while this is not linked to
the main index.rst file, in order to avoid build warnings.

Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2019-06-14 14:21:24 -06:00
Jonathan Corbet 8afecfb0ec Linux 5.2-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlz8fAYeHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiG1asH/3ySguxqtqL1MCBa
 4/SZ37PHeWKMerfX6ZyJdgEqK3B+PWlmuLiOMNK5h2bPLzeQQQAmHU/mfKmpXqgB
 dHwUbG9yNnyUtTfsfRqAnCA6vpuw9Yb1oIzTCVQrgJLSWD0j7scBBvmzYqguOkto
 ThwigLUq3AILr8EfR4rh+GM+5Dn9OTEFAxwil9fPHQo7QoczwZxpURhScT6Co9TB
 DqLA3fvXbBvLs/CZy/S5vKM9hKzC+p39ApFTURvFPrelUVnythAM0dPDJg3pIn5u
 g+/+gDxDFa+7ANxvxO2ng1sJPDqJMeY/xmjJYlYyLpA33B7zLNk2vDHhAP06VTtr
 XCMhQ9s=
 =cb80
 -----END PGP SIGNATURE-----

Merge tag 'v5.2-rc4' into mauro

We need to pick up post-rc1 changes to various document files so they don't
get lost in Mauro's massive RST conversion push.
2019-06-14 14:18:53 -06:00
David Lechner 3a4b44d5c0 ARM: davinci_all_defconfig: Enable CPUFREQ_DT
This sets CONFIG_CPUFREQ_DT=m in davinci_all_defconfig. This is used for
frequency scaling on device tree boards.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-06-14 18:22:37 +05:30
Bartosz Golaszewski e8e3699f65 ARM: dts: da850-evm: enable cpufreq
Enable cpufreq-dt support for da850-evm. The cvdd is supplied by the
tps65070 pmic with configurable output voltage. By default da850-evm
boards support frequencies up to 375MHz so enable this operating
point.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-06-14 18:22:37 +05:30
David Lechner fdf1b27461 ARM: dts: da850-lcdk: enable cpufreq
Add a fixed regulator for the da850-lcdk board along with board-specific
CPU configuration.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-06-14 18:22:37 +05:30
David Lechner 3975205ac3 ARM: dts: da850-lego-ev3: enable cpufreq
Add a fixed regulator for the LEGO EV3 board along with board-specific
CPU configuration.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-06-14 18:22:37 +05:30
David Lechner 3be5c7425f ARM: dts: da850: add cpu node and operating points to DT
This adds a cpu node and operating points to the common da850.dtsi file.

All operating points above 300MHz are disabled by default.

Regulators need to be hooked up on a per-board basis.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-06-14 18:22:37 +05:30
Bartosz Golaszewski 68f2515bb3 ARM: davinci: da8xx: specify dma_coherent_mask for lcdc
The lcdc device is missing the dma_coherent_mask definition causing the
following warning on da850-evm:

da8xx_lcdc da8xx_lcdc.0: found Sharp_LK043T1DG01 panel
------------[ cut here ]------------
WARNING: CPU: 0 PID: 1 at kernel/dma/mapping.c:247 dma_alloc_attrs+0xc8/0x110
Modules linked in:
CPU: 0 PID: 1 Comm: swapper Not tainted 5.2.0-rc3-00077-g16d72dd4891f #18
Hardware name: DaVinci DA850/OMAP-L138/AM18x EVM
[<c000fce8>] (unwind_backtrace) from [<c000d900>] (show_stack+0x10/0x14)
[<c000d900>] (show_stack) from [<c001a4f8>] (__warn+0xec/0x114)
[<c001a4f8>] (__warn) from [<c001a634>] (warn_slowpath_null+0x3c/0x48)
[<c001a634>] (warn_slowpath_null) from [<c0065860>] (dma_alloc_attrs+0xc8/0x110)
[<c0065860>] (dma_alloc_attrs) from [<c02820f8>] (fb_probe+0x228/0x5a8)
[<c02820f8>] (fb_probe) from [<c02d3e9c>] (platform_drv_probe+0x48/0x9c)
[<c02d3e9c>] (platform_drv_probe) from [<c02d221c>] (really_probe+0x1d8/0x2d4)
[<c02d221c>] (really_probe) from [<c02d2474>] (driver_probe_device+0x5c/0x168)
[<c02d2474>] (driver_probe_device) from [<c02d2728>] (device_driver_attach+0x58/0x60)
[<c02d2728>] (device_driver_attach) from [<c02d27b0>] (__driver_attach+0x80/0xbc)
[<c02d27b0>] (__driver_attach) from [<c02d047c>] (bus_for_each_dev+0x64/0xb4)
[<c02d047c>] (bus_for_each_dev) from [<c02d1590>] (bus_add_driver+0xe4/0x1d8)
[<c02d1590>] (bus_add_driver) from [<c02d301c>] (driver_register+0x78/0x10c)
[<c02d301c>] (driver_register) from [<c000a5c0>] (do_one_initcall+0x48/0x1bc)
[<c000a5c0>] (do_one_initcall) from [<c05cae6c>] (kernel_init_freeable+0x10c/0x1d8)
[<c05cae6c>] (kernel_init_freeable) from [<c048a000>] (kernel_init+0x8/0xf4)
[<c048a000>] (kernel_init) from [<c00090e0>] (ret_from_fork+0x14/0x34)
Exception stack(0xc6837fb0 to 0xc6837ff8)
7fa0:                                     00000000 00000000 00000000 00000000
7fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
7fe0: 00000000 00000000 00000000 00000000 00000013 00000000
---[ end trace 8a8073511be81dd2 ]---

Add a 32-bit mask to the platform device's definition.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-06-14 16:20:34 +05:30
Bartosz Golaszewski 0c0c9b5753 ARM: davinci: da850-evm: call regulator_has_full_constraints()
The BB expander at 0x21 i2c bus 1 fails to probe on da850-evm because
the board doesn't set has_full_constraints to true in the regulator
API.

Call regulator_has_full_constraints() at the end of board registration
just like we do in da850-lcdk and da830-evm.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-06-14 16:16:56 +05:30
Douglas Anderson f497ab6b4b ARM: dts: rockchip: Configure BT_HOST_WAKE as wake-up signal on veyron
This enables wake up on Bluetooth activity when the device is
suspended. The BT_HOST_WAKE signal is only connected on devices
with BT module that are connected through UART.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-14 11:37:15 +02:00
Krzysztof Kozlowski 5a96019ce5 ARM: defconfig: samsung: Cleanup with savedefconfig
Run savedefconfig to cleanup and reorganize the configs.  Most entries
are only moved around and few options disappear because of defaults.

However this removes the already disabled OSS Emulation and OSS
Sequencer API (SND_MIXER_OSS, SND_PCM_OSS, SND_SEQUENCER_OSS).  These
were already disabled (hidden by missing SND_OSSEMUL and SND_SEQUENCER)
and are not strictly hardware related, therefore they are not necessary
for providing reference hardware config.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-13 22:04:33 +02:00
Iuliana Prodan 0b211338cf ARM: dts: imx7ulp: add crypto support
Add crypto node in device tree for CAAM support.

Noteworthy is that on 7ulp the interrupt line is shared
between the two job rings.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-06-13 14:31:41 +08:00
Eric Biggers 860ab2e502 crypto: chacha - constify ctx and iv arguments
Constify the ctx and iv arguments to crypto_chacha_init() and the
various chacha*_stream_xor() functions.  This makes it clear that they
are not modified.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-06-13 14:31:40 +08:00
Marek Vasut 53f7ca84c0 ARM: dts: imx53: Bind CPLD on M53Menlo
Enable ECSPI2 and bind CPLD to both chip selects.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-13 10:36:40 +08:00
Vladimir Oltean 077ac579ce ARM: dts: Introduce the NXP LS1021A-TSN board
The LS1021A-TSN is a development board built by VVDN/Argonboards in
partnership with NXP.

It features the LS1021A SoC and the first-generation SJA1105T Ethernet
switch for prototyping implementations of a subset of IEEE 802.1 TSN
standards.

It has two regular Ethernet ports and four switched, TSN-capable ports.

It also features:
- One Arduino header
- One expansion header
- Two USB 3.0 ports
- One mini PCIe slot
- One SATA interface
- Accelerometer, gyroscope, temperature sensors

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-13 10:34:36 +08:00
Daniel Vetter 97b67986f1 fbcon: call fbcon_fb_(un)registered directly
With

commit 6104c37094
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Tue Aug 1 17:32:07 2017 +0200

    fbcon: Make fbcon a built-time depency for fbdev

we have a static dependency between fbcon and fbdev, and we can
replace the indirection through the notifier chain with a function
call.

v2: Sam Ravnborg noticed that mach-pxa/am200epd.c has a notifier too,
and listens to this.

...

Looking at the code it seems to wait for some fb to show up, so that
it can get the framebuffer base address from the fb_info struct. I
suspect his is some firmware fbdev. Then it uses that information to
let the real fbdev driver (metronomefb.c by the looks) get at the
framebuffer memory.

This doesn't looke like it's easy to fix (except by deleting the
entire thing, seems untouched since 2008, we might be able to get away
with that), so let's just stuff a few #ifdef into fb.h and fbmem.c and
cry over them for a bit.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "Noralf Trønnes" <noralf@tronnes.org>
Cc: Yisheng Xie <ysxie@foxmail.com>
Cc: Peter Rosin <peda@axentia.se>
Cc: "Michał Mirosław" <mirq-linux@rere.qmqm.pl>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Mikulas Patocka <mpatocka@redhat.com>
Cc: linux-fbdev@vger.kernel.org
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Konstantin Khorenko <khorenko@virtuozzo.com>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Steve Sakoman <steve@sakoman.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: https://patchwork.freedesktop.org/patch/msgid/20190528090304.9388-11-daniel.vetter@ffwll.ch
2019-06-12 20:27:45 +02:00
Igor Opaniuk 20353143a2 ARM: dts: imx6ull-colibri: enable UHS-I for USDHC1
Allows to use the SD interface at a higher speed mode if the card
supports it. For this the signaling voltage is switched from 3.3V to
1.8V under the usdhc1's drivers control.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-12 21:15:32 +08:00
Linus Walleij 9a5ed0bac8
regulator: wm831x: Convert to use GPIO descriptors
This converts the Wolfson Micro WM831x DCDC converter to use
a GPIO descriptor for the GPIO driving the DVS pin.

There is just one (non-DT) machine in the kernel using this, and
that is the Wolfson Micro (now Cirrus) Cragganmore 6410 so we
patch this board to pass a descriptor table and fix up the driver
accordingly.

Cc: Charles Keepax <ckeepax@opensource.cirrus.com>
Cc: Richard Fitzgerald <rf@opensource.cirrus.com>
Cc: patches@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-12 13:59:11 +01:00
Linus Walleij fdb7e884ad i2c: iop: Use GPIO descriptors
The IOP3xx has some elaborate code to directly slam the
GPIO lines multiplexed with I2C down low before enablement,
apparently a workaround for a hardware bug found in the
early chips.

After consulting the developer documentation for IOP80321
and IOP80331 I can clearly see that this may be useful for
IOP80321 family (mach-iop32x) but it is highly dubious for
any 80331 series or later chip: in these chips the lines
are not multiplexed for UARTs.

We convert the code to pass optional GPIO descriptors
and register these only on the 80321-based boards where
it makes sense, optionally obtain them in the driver and
use the gpiod_set_raw_value() to ascertain the line gets
driven low when needed.

The GPIO driver does not give the GPIO chip a reasonable
label so the patch also adds that so that these machine
descriptor tables can be used.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-06-12 13:20:23 +02:00
Leonard Crestez d7bfba7296 ARM: dts: imx7d: Update cpufreq OPP table
According to latest docs imx7d chips can go from 800 to 1200 mhz.
Maximum frequency is determined from two speed grading bits present in
OCOTP fuses at same location as other imx chips.

Also update to "typical" voltages from latest datasheet, 25mv higher
than current dts.

All imx7s parts are still fixed at 800mhz

Based on:
* IMX7DCEC Rev. 6, 03/2019
* IMX7SCEC Rev. 6, 03/2019
* IMX7DRM Rev. 1, 01/2018 Page 1102

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-12 18:32:20 +08:00
Leonard Crestez a5a9dffcc9 ARM: imx: Switch imx7d to imx-cpufreq-dt for speed-grading
The imx-cpufreq-dt driver can handle speed grading bits on imx7d just
like on imx8mq and imx8mm.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-12 18:32:03 +08:00
Jan Kundrát cc538ca430 ARM: mvebu_v7_defconfig: fix Ethernet on Clearfog
Compared to kernel 5.0, patches merged for 5.1 added support for A38x'
PHY guarded by a config option which was not enabled by default. As a
result, there was no eth1 and eth2 on a Solid Run Clearfog Base.

Ensure that A38x PHY is enabled on mvebu.

[gregory: issue appeared in 5.1 not in 5.2 and added Fixes tag]

Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: David S. Miller <davem@davemloft.net>
Cc: Maxime Chevallier <maxime.chevallier@bootlin.com>
Fixes: a10c1c8191 ("net: marvell: neta: add comphy support")
Cc: stable@kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-06-12 10:36:36 +02:00
Peter Robinson 441f728214 ARM: dts: imx6sx-udoo-neo: add bluetooth config to uart3
This updates the WL1831 bluetooth to use the serial serdev driver
interface.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-12 16:04:01 +08:00
Peter Robinson b1368b58ac ARM: dts: imx6sx-udoo-neo: enable i2c-2 and i2c-4 for onboard sensors
The i2c2 bus has a external plug which enables the easy connection of external
"bricks" with sensors of various kinds, while i2c4 on the Extended/Full boards
has a pair of on board motion sensors, accelerometer and magnetometer on one chip
and gyroscope on another so it makes sense to enable these i2c buses for use.
Tested on UDOO Neo Full.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-12 16:04:01 +08:00
Peter Robinson 8fd4f28775 ARM: dts: imx6sx-udoo: Use the correct style for SPDX License Identifier
Use the SPDX License Identifier for GPL-2.0+ OR X11

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-12 16:04:01 +08:00
Tony Lindgren 8f62581f82 Merge branch 'baltos' into omap-for-v5.3/dt 2019-06-12 00:57:27 -07:00
Yegor Yefremov 2cdc9c200d ARM: dts: am335x-baltos: add support for MMC1 CD pin
Baltos 5221/3220 devices provide CD signal on GPIO2_18.
Baltos 2110 device provides CD signal on GPIO1_15.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-12 00:55:50 -07:00
Yegor Yefremov 79499bb11d ARM: dts: am335x-baltos: Fix PHY mode for ethernet
The PHY must add both tx and rx delay and not only on the tx clock.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-12 00:55:44 -07:00
Doug Berger 885895a8ea ARM: bcm: Enable PINCTRL for ARCH_BRCMSTB
ARCH_BRCMSTB needs to use the BCM2835 pin controller for chips like
BCM7211 which adopted that pin controller for GPIO.

Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-11 14:59:50 -07:00
Jim Quinlan 933b9609d3 ARM: bcm: Enable ARCH_HAS_RESET_CONTROLLER for ARCH_BRCMSTB
Allow the use of reset controllers on ARCH_BRCMSTB such as the
recently introduced RESET_BRCMSTB driver.

Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-11 14:59:50 -07:00
Krzysztof Kozlowski d2cac68e0d ARM: dts: exynos: Add ADC node to Exynos5410 and Odroid XU
Move the ADC from exynos5420.dtsi to a shared file between Exynos5410 and
Exynos542x: exynos54xx.dtsi.  Enable the ADC on Odroid XU board.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-11 20:37:21 +02:00
Russell King 0b40deeef6 ARM: riscpc: enable chained scatterlist support
There's no reason why we can't enable chained scatterlist for RiscPC,
we already support chained scatterlists in the IOMD DMA support code.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-06-11 17:44:04 +01:00
Russell King 05002cf177 ARM: riscpc: reduce IRQ handling code
Reduce the amount of IRQ handling code that RiscPC requires; there's no
need for this duplication if we place the virtual iomem base address for
each bank directly in the irq_data structure.  Provide helpers to get
the base address, and setup the base address and register mask.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-06-11 17:42:36 +01:00
Russell King 12290cc462 ARM: riscpc: move RiscPC assembly files from arch/arm/lib to mach-rpc
Move the assembly files for RiscPC from arch/arm/lib to mach-rpc so
that we contain RiscPC bits in one subdirectory.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-06-11 17:42:36 +01:00
Russell King e579201a83 ARM: riscpc: parse video information from tagged list
Correctly parse the video information from the tagged list, so that we
end up with the right bytes-per-char values.  When booting with a
tagged list rather than a param block, this allows the decompressor to
display its messages during boot on the screen.

(Boot loaders normally pass a param block on this platform, but the
latest boot loader version recently released does not.)

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-06-11 17:40:50 +01:00
Russell King 1eac59d731 ARM: riscpc: add ecard quirk for Atomwide 3port serial card
Atomwide 3port serial cards seem to leave their interrupts active when
exiting RISC OS, resulting in an interrupt storm during boot, and the
expansion card interrupt being disabled.  Avoid this by manually
disabling the interrupt on each serial port via a custom quirk function.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-06-11 17:40:50 +01:00
Dinh Nguyen c946feaabb ARM: dts: arria10: Add EMAC OCP reset property
Add the EMAC's OCP reset property on Arria10. The OCP reset bits are
also needed to correctly bring the EMACs out of reset correctly.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-06-10 09:49:37 -05:00
Alan Tull d9b9f805ee ARM: dts: socfpga: add ltc2497 on arria10 devkit
Add the two ltc2497 devices that are on the SoCFPGA Arria10
Socdk board at addresses 0x14 and 0x16.

Signed-off-by: Alan Tull <atull@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-06-10 09:47:01 -05:00
YueHaibing 9037829ca2 ARM: OMAP2+: Make some variables static
Fix sparse warnings:

arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c:532:25: warning: symbol 'am33xx_gpio_hwmod_class' was not declared. Should it be static?
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c:542:19: warning: symbol 'am33xx_gpio1_hwmod' was not declared. Should it be static?
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c:562:19: warning: symbol 'am33xx_gpio2_hwmod' was not declared. Should it be static?
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c:582:19: warning: symbol 'am33xx_gpio3_hwmod' was not declared. Should it be static?

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10 05:16:38 -07:00
Teresa Remmet e3630fd9aa ARM: dts: Add support for phyBOARD-REGOR-AM335x
Adding support for phyBOARD-REGOR-AM335x:
- CAN
- UART0 / UART2
- RS485
- USB device
- i2c RTC
- SD
- ethernet0 RMII
- ethernet1 MII
- Digital I/Os

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10 05:06:44 -07:00
Teresa Remmet 4dc020c507 ARM: dts: am335x-pcm-953: Remove eth phy delay
Default values fit better than these historical settings.
Hardware layout had been adapted accordingly already in
alpha stage. They did not cause problems for a long time.
Removed values now.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10 05:06:38 -07:00
Teresa Remmet 267247d3d2 ARM: dts: am335x-pcm-953: Update user led names
Rename user led nodes to match the phytec user leds name scheme.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10 05:06:32 -07:00
Teresa Remmet 66fa560004 ARM: dts: am335x-phycore-som: Enable gpmc node in dts files
As nand flash is not always the primary storage device any more
disable it in the phycore-som include file. Enable it the device tree
files where it is populated.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10 05:06:26 -07:00
Daniel Schultz 65604db579 ARM: dts: am335x-phycore-som: Add emmc node
The phyCORE-AM335x EMMC modules have an EMMC populated and are based
on the phyCORE-AM335x R2 SOM. Therefore, the EMMC node will be added to
the phycore-som devce tree but is by default disabled.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10 05:06:20 -07:00
Teresa Remmet 81ec03f5d9 ARM: dts: am335x phytec boards: Remove regulator node
Move regulators directly to the root node like most am335x boards do.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10 05:06:13 -07:00
Adam Ford 566734534f ARM: dts: Add LCD type 28 support to LogicPD Torpedo DM3730 devkit
There are two LCD device released by Logic PD for the Torpedo,
type 15 and Type 28.  The stock dts file supports the older LCD,
so this patch enables support for the newer one.

For details between these different LCD's see
https://support.logicpd.com/DesktopModules/Bring2mind/DMX/Download.aspx?portalid=0&EntryId=2777

Signed-off-by: Adam Ford <aford173@gmail.com>
[tony@atomide.com: removed extra blank line for checkpatch]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10 05:03:28 -07:00
Teresa Remmet 8a0098c05a ARM: dts: am335x phytec boards: Fix cd-gpios active level
Active level of the mmc1 cd gpio needs to be low instead of high.
Fix PCM-953 and phyBOARD-WEGA.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10 00:06:57 -07:00
Keerthy cbdce14188 ARM: dts: dra72x: Disable usb4_tm target module
usb4_tm is unsed on dra72 and accessing the module
with ti,sysc is causing a boot crash hence disable its target
module.

Fixes: 549fce068a ("ARM: dts: dra7: Add l4 interconnect hierarchy and ti-sysc data")
Reported-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10 00:04:59 -07:00
Christian Brauner 8f3220a806
arch: wire-up clone3() syscall
Wire up the clone3() call on all arches that don't require hand-rolled
assembly.

Some of the arches look like they need special assembly massaging and it is
probably smarter if the appropriate arch maintainers would do the actual
wiring. Arches that are wired-up are:
- x86{_32,64}
- arm{64}
- xtensa

Signed-off-by: Christian Brauner <christian@brauner.io>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Kees Cook <keescook@chromium.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Adrian Reber <adrian@lisas.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: linux-api@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: x86@kernel.org
2019-06-09 09:29:46 +02:00
Leo Yan 15061c3edd ARM: dts: qcom-msm8974: Update coresight DT bindings
CoreSight DT bindings have been updated, thus the old compatible strings
are obsolete and the drivers will report warning if DTS uses these
obsolete strings.

This patch switches to the new bindings for CoreSight dynamic funnel,
so can dismiss warning during initialisation.

Cc: Andy Gross <agross@kernel.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-08 23:06:31 -05:00
Leo Yan e32d07b2e4 ARM: dts: qcom-apq8064: Update coresight DT bindings
CoreSight DT bindings have been updated, thus the old compatible strings
are obsolete and the drivers will report warning if DTS uses these
obsolete strings.

This patch switches to the new bindings for CoreSight dynamic funnel and
static replicator, so can dismiss warning during initialisation.

Cc: Andy Gross <agross@kernel.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-08 23:06:28 -05:00
Mauro Carvalho Chehab cb1aaebea8 docs: fix broken documentation links
Mostly due to x86 and acpi conversion, several documentation
links are still pointing to the old file. Fix them.

Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Reviewed-by: Wolfram Sang <wsa@the-dreams.de>
Reviewed-by: Sven Van Asbroeck <TheSven73@gmail.com>
Reviewed-by: Bhupesh Sharma <bhsharma@redhat.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2019-06-08 13:42:13 -06:00
Linus Walleij 5923ea6c2c gpio: pass lookup and descriptor flags to request_own
When a gpio_chip wants to request a descriptor from itself
using gpiochip_request_own_desc() it needs to be able to specify
fully how to use the descriptor, notably line inversion
semantics. The workaround in the gpiolib.c can be removed
and cases (such as SPI CS) where we need at times to request
a GPIO with line inversion semantics directly on a chip for
workarounds, can be fully supported with this call.

Fix up some users of the API that weren't really using the
last flag to set up the line as input or output properly
but instead just calling direction setting explicitly
after requesting the line.

Cc: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-07 23:20:23 +02:00
David S. Miller a6cdeeb16b Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Some ISDN files that got removed in net-next had some changes
done in mainline, take the removals.

Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-07 11:00:14 -07:00
Dinh Nguyen cca3731e02 ARM: dts: socfpga: use the "altr,socfpga-stmmac-a10-s10" binding
Because of register and bits difference for setting PHY modes, PTP reference
clock, and FPGA signalling, the Arria10 SoC needs to use the
"altr,socfpga-stmmac-a10-s10" binding to set the correct modes.

On Arria10, each EMAC has its own register for PHY modes, and they all have
the same offset, thus we can use the 2nd parameter to specify the offsets
for the FPGA signal bits.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-06-06 17:33:35 -05:00
Maxime Ripard 913f36b624
ARM: dts: sun8i: r40: Change the RTC compatible
Unlike what's being reported in the device tree so far, the RTC in the R40
is quite different from the H3. Indeed it doesn't have the internal
oscillator output, and it has only a single interrupt. Let's add a
compatible for it.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-06-06 12:56:10 +02:00
Maxime Ripard 33e877f347
ARM: dts: sun8i: v3s: Add external crystals accuracy
The V3s datasheet mandates oscillators accuracy to be within 50ppm. Let's
add that accuracy to their device tree nodes.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-06-06 12:56:10 +02:00
Maxime Ripard 65a4a40215
ARM: dts: sun8i: v3s: Fix the RTC node
For some reason, while the v3s has a dedicated compatible in the RTC
binding, the one actually used was the A31's. However, it turns out that
the controller is pretty different (which justified the compatible).

Let's use the proper compatible, and use the proper binding description as
well.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-06-06 12:56:01 +02:00
Maxime Ripard 562b9526ee
ARM: dts: sun6i: Add external crystals accuracy
The A31 datasheet mandates oscillators accuracy to be within 50ppm. Let's
add that accuracy to their device tree nodes.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-06-06 12:55:06 +02:00
Maxime Ripard b9cb524971
ARM: dts: sun6i: Fix RTC node
The RTC node doesn't match what is described in the binding for historical
reasons. Let's add the proper description.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-06-06 12:55:05 +02:00
Matthias Kaehlcke b8925b7c2f ARM: dts: rockchip: Split GPIO keys for veyron into multiple devices
With a single device DT overrides can become messy, especially when
keys are added or removed. Multiple devices also allow to
enable/disable wakeup per key/group.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
[used actual switch+event constants in new lid-switch entry]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-06 12:41:04 +02:00
Douglas Anderson cd6386087d ARM: dts: rockchip: Add HDMI i2c unwedging for rk3288-veyron
Veyron uses the builtin i2c controller that's part of dw-hdmi.  Hook
up the unwedging feature.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-06 12:28:01 +02:00
Douglas Anderson c077d9d717 ARM: dts: rockchip: Add unwedge pinctrl entries for dw_hdmi on rk3288
This adds the "unwedge" pinctrl entries introduced by a recent dw_hdmi
change that can unwedge the dw_hdmi i2c bus in some cases.  It's
expected that any boards using this would add:

  pinctrl-names = "default", "unwedge";
  pinctrl-0 = <&hdmi_ddc>;
  pinctrl-1 = <&hdmi_ddc_unwedge>;

Note that this isn't added by default because some boards may choose
to mux i2c5 for their DDC bus (if that is more tested for them).

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-06 12:27:48 +02:00
Douglas Anderson bf09924f21 ARM: dts: rockchip: Switch to builtin HDMI DDC bus on rk3288-veyron
Downstream Chrome OS kernels use the builtin DDC bus from dw_hdmi on
veyron.  This is the only way to get them to negotiate HDCP.

Although HDCP isn't currently all supported upstream, it still seems
like it makes sense to use dw_hdmi's builtin I2C.  Maybe eventually we
can get HDCP negotiation working.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-06 12:27:42 +02:00
Sebastian Andrzej Siewior 99ae52edeb ARM: imx6: cpuidle: Use raw_spinlock_t
The idle call back is invoked with disabled interrupts and requires
raw_spinlock_t locks to work.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-06 08:58:11 +08:00
Thomas Gleixner b886d83c5b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 441
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation version 2 of the license

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 315 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Armijn Hemel <armijn@tjaldur.nl>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531190115.503150771@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:17 +02:00
Thomas Gleixner dbf5ebee09 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 429
Based on 1 normalized pattern(s):

  this code is licenced under the gplv2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 1 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Armijn Hemel <armijn@tjaldur.nl>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531190114.383521217@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:16 +02:00
Thomas Gleixner 55716d2643 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 428
Based on 1 normalized pattern(s):

  this file is released under the gplv2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 68 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Armijn Hemel <armijn@tjaldur.nl>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531190114.292346262@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:16 +02:00
Thomas Gleixner 75a6faf617 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 101 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531190113.822954939@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:15 +02:00
Thomas Gleixner 25d5bf4764 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 418
Based on 1 normalized pattern(s):

  this file is free software you can redistribute it and or modify it
  under the terms of the gnu general public license version 2 as
  published by the free software foundation

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 9 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Armijn Hemel <armijn@tjaldur.nl>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531190113.419778592@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:15 +02:00
Thomas Gleixner 0b0191aeda treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 406
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 of
  the license this program is distributed in the hope that it will be
  useful but without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 2 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Armijn Hemel <armijn@tjaldur.nl>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531190112.312783289@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:13 +02:00
Thomas Gleixner a10e763b87 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 372
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation version 2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 135 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531081036.435762997@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:10 +02:00
Thomas Gleixner 2b72c9e36c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 340
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation version 2 of the license this program
  is distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not see http www gnu org
  licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 15 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190530000437.052642892@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:07 +02:00
Thomas Gleixner 2b27bdcc20 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 336
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation inc 51 franklin st fifth floor boston ma 02110
  1301 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 246 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190530000436.674189849@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:07 +02:00
Thomas Gleixner a61127c213 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 335
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation inc 51 franklin st fifth floor boston ma 02110
  1301 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 111 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190530000436.567572064@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:06 +02:00
Thomas Gleixner 4505153954 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 333
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation inc 59 temple place suite 330 boston ma 02111
  1307 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 136 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190530000436.384967451@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:06 +02:00
Thomas Gleixner 1d0ea0692a treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 332
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  publishhed by the free software foundation

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 48 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190530000436.292339952@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:06 +02:00
Thomas Gleixner 3b20eb2372 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 320
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation inc 59 temple place suite 330 boston ma 02111
  1307 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 33 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190530000435.254582722@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:37:05 +02:00
Thomas Gleixner 2025cf9e19 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 263 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Thomas Gleixner 97fb5e8d9b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 and
  only version 2 as published by the free software foundation this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 294 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Thomas Gleixner 9c92ab6191 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Based on 1 normalized pattern(s):

  this software is licensed under the terms of the gnu general public
  license version 2 as published by the free software foundation and
  may be copied distributed and modified under those terms this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 285 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Thomas Gleixner d94d71cb45 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 266
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation 51 franklin street fifth floor boston ma 02110
  1301 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 67 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141333.953658117@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:30:28 +02:00
Anson Huang 86ddd8ad2f ARM: dts: imx7d-sdb: Make SW2's voltage fixed
On i.MX7D SDB board, SW2 supplies a lot of peripheral devices,
its voltage should be fixed at 1.8V. The commit 43967d9b5a
("ARM: dts: imx7d-sdb: Assign corresponding power supply for LDOs")
assigns SW2 as the supplier of vdd1p0d, and when its comsumers
pcie-phy/mipi-phy try to set the vdd1p0d to 1.0V, regulator core
will also set SW2 to its best(min) voltage to 1.5V, and it will
lead to board reset.

This patch makes SW2's voltage fixed at 1.8V to avoid this issue.

Fixes: 43967d9b5a ("ARM: dts: imx7d-sdb: Assign corresponding power supply for LDOs")
Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-05 17:16:40 +08:00
Douglas Anderson d85b2ad35a ARM: dts: rockchip: Add pin names for rk3288-veyron jaq, mickey, speedy
This is like commit 0ca87bd5ba ("ARM: dts: rockchip: Add pin names
for rk3288-veyron-jerry") and commit ca3516b32c ("ARM: dts:
rockchip: Add pin names for rk3288-veyron-minnie") but for 3 more
veyron boards.

A few notes:
- While there is most certainly duplication between all the veyron
  boards, it still feels like it is sane to just have each board have
  a full list of its pin names.  The format of "gpio-line-names" does
  not lend itself to one-off overriding and besides it seems sane to
  more fully match schematic names.  Also note that the extra
  duplication here is only in source code and is unlikely to ever
  change (since these boards are shipped).  Duplication in the .dtb
  files is unavoidable.
- veyron-jaq and veyron-mighty are very closely related and so I have
  shared a single list for them both with comments on how they are
  different.  This is just a typo fix on one of the boards, a possible
  missing signal on one of the boards (or perhaps I was never given
  the most recent schematics?) and dealing with the fact that one of
  the two boards has full sized SD.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-04 21:34:20 +02:00
John Keeping 9dbf05bd8a ARM: dts: rockchip: fix pwm-cells for rk3288's pwm3
This is the same as the other PWMs on this SoC and uses 3 cells.

Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-04 15:34:41 +02:00
Russell King 5c9e4d8c84 ARM: sa1100/neponset: convert serial to use gpiod APIs
Convert the serial modem control signals to use the gpiod APIs rather
than the private platform callbacks.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-06-04 12:56:46 +01:00
Russell King cf56ffaa51 ARM: sa1100/hackkit: remove empty serial mctrl functions
Remove the empty serial modem control signal functions from hackkit
as these are unnecessary - the core code can copes fine without
these.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-06-04 12:56:44 +01:00
Russell King 88a4c748ba ARM: sa1100/badge4: remove commented out modem control initialisers
Remove the commented out modem control initialisers.  These are doing
nothing useful.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-06-04 12:56:41 +01:00
Russell King 3fae166e67 ARM: sa1100/h3xxx: convert serial to gpiod APIs
Convert the iPAQ H3xxx serial modem control signals to use the gpiod
APIs rather than custom callbacks into platform code.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-06-04 12:56:38 +01:00
Russell King 59f06d674f ARM: sa1100/assabet: convert serial to gpiod APIs
Convert the Assabet serial modem control signals to use the gpiod APIs
rather than custom callbacks into platform code.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-06-04 12:56:36 +01:00
Neil Armstrong 677092c39b ARM: dts: meson8b: update with SPDX Licence identifier
While the text specifies "of the GPL or the X11 license" the actual
license text matches the MIT license as specified at [0]

[0] https://spdx.org/licenses/MIT.html

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03 15:27:07 -07:00
Neil Armstrong 5a9ae23516 ARM: dts: meson8b-odroidc1: update with SPDX Licence identifier
While the text specifies "of the GPL or the X11 license" the actual
license text matches the MIT license as specified at [0]

[0] https://spdx.org/licenses/MIT.html

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03 15:27:07 -07:00
Neil Armstrong 47305093e2 ARM: dts: meson8b-mxq: update with SPDX Licence identifier
While the text specifies "of the GPL or the X11 license" the actual
license text matches the MIT license as specified at [0]

[0] https://spdx.org/licenses/MIT.html

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03 15:27:07 -07:00
Neil Armstrong 41e359ed7f ARM: dts: meson8: update with SPDX Licence identifier
While the text specifies "of the GPL or the X11 license" the actual
license text matches the MIT license as specified at [0]

[0] https://spdx.org/licenses/MIT.html

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03 15:27:07 -07:00
Neil Armstrong 699b98904e ARM: dts: meson8-minix-neo-x8: update with SPDX Licence identifier
While the text specifies "of the GPL or the X11 license" the actual
license text matches the MIT license as specified at [0]

[0] https://spdx.org/licenses/MIT.html

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03 15:27:06 -07:00
Neil Armstrong 68b3f11513 ARM: dts: meson6: update with SPDX Licence identifier
While the text specifies "of the GPL or the X11 license" the actual
license text matches the MIT license as specified at [0]

[0] https://spdx.org/licenses/MIT.html

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03 15:27:06 -07:00
Neil Armstrong 504420a041 ARM: dts: meson6-atv1200: update with SPDX Licence identifier
While the text specifies "of the GPL or the X11 license" the actual
license text matches the MIT license as specified at [0]

[0] https://spdx.org/licenses/MIT.html

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03 15:27:06 -07:00
Neil Armstrong 19bda0c5b7 ARM: dts: meson: update with SPDX Licence identifier
While the text specifies "of the GPL or the X11 license" the actual
license text matches the MIT license as specified at [0]

[0] https://spdx.org/licenses/MIT.html

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03 15:27:06 -07:00
Martin Blumenstingl d94f60e3df ARM: dts: meson8b: mxq: improve support for the TRONFY MXQ S805
The TRONFY MXQ comes with either 1GB or 2GB RAM.

Both variants share (like most boards based on Amlogic reference
designs):
- 10/100 PHY (IC Plus IP101GR) with GPIOH_4 being the reset line and
  GPIOH_3 the interrupt line
- SD card slot with the card detection GPIO at CARD_6
- VCCK is generated by PWM_C with a period of 1148ns and XTAL as input
  clock
- USB OTG exposed on one of the USB-A connectors
- 4-port USB hub with 3 ports exposed to the outside

There seem the multiple board revision out there according to various
forum posts:
- storage: eMMC or NAND flash
- wifi: Ampak AP6210 or Realtek 8189

Add support for the following functionality:
- SoC temperature (hwmon)
- changing the CPU voltage
- Ethernet connectivity
- SD card
- USB

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: hexdump <hexdump0815@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-03 15:16:29 -07:00
Krzysztof Kozlowski 9f532d26c7 ARM: exynos_defconfig: Trim and reorganize with savedefconfig
Trim and reorganize the defconfig with savedefconfig on latest
linux-next.  The ARCH_EXYNOS3 is removed because it become the default.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-03 20:34:47 +02:00
Ash Hughes 0e5447626b ARM: dts: armada: netgear-rn104: Add LCD to RN104 dts.
Adds the LCD on the rn104 to its dts file.

Signed-off-by: Ash Hughes <sehguh.hsa@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-06-03 16:03:38 +02:00
Greg Kroah-Hartman db0487abd6 arm: dump: no need to check return value of debugfs_create functions
When calling debugfs functions, there is no need to ever check the
return value.  The function can work or not, but the code logic should
never do something different based on this.

Cc: Russell King <linux@armlinux.org.uk>
Cc: Jinbum Park <jinb.park7@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Laura Abbott <labbott@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-03 15:49:07 +02:00
Greg Kroah-Hartman 30ed997a87 arm: omap2: no need to check return value of debugfs_create functions
When calling debugfs functions, there is no need to ever check the
return value.  The function can work or not, but the code logic should
never do something different based on this.

Cc: Kevin Hilman <khilman@kernel.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-03 15:49:07 +02:00
Greg Kroah-Hartman d5ddd5a517 arm: omap1: no need to check return value of debugfs_create functions
When calling debugfs functions, there is no need to ever check the
return value.  The function can work or not, but the code logic should
never do something different based on this.

Cc: Paul Walmsley <paul@pwsan.com>
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-03 15:49:07 +02:00
Mark Rutland ef4cdc0926 locking/atomic, arm: Use s64 for atomic64
As a step towards making the atomic64 API use consistent types treewide,
let's have the arm atomic64 implementation use s64 as the underlying
type for atomic64_t, rather than long long, matching the generated
headers.

Otherwise, there should be no functional change as a result of this
patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: aou@eecs.berkeley.edu
Cc: arnd@arndb.de
Cc: bp@alien8.de
Cc: catalin.marinas@arm.com
Cc: davem@davemloft.net
Cc: fenghua.yu@intel.com
Cc: heiko.carstens@de.ibm.com
Cc: herbert@gondor.apana.org.au
Cc: ink@jurassic.park.msu.ru
Cc: jhogan@kernel.org
Cc: mattst88@gmail.com
Cc: mpe@ellerman.id.au
Cc: palmer@sifive.com
Cc: paul.burton@mips.com
Cc: paulus@samba.org
Cc: ralf@linux-mips.org
Cc: rth@twiddle.net
Cc: tony.luck@intel.com
Cc: vgupta@synopsys.com
Link: https://lkml.kernel.org/r/20190522132250.26499-7-mark.rutland@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-06-03 12:32:56 +02:00
Alexander Filippov 5da28d7405 ARM: dts: aspeed: Add YADRO VESNIN BMC
VESNIN is an OpenPower machine with an Aspeed 2400 BMC SoC manufactured
by YADRO.

Signed-off-by: Alexander Filippov <a.filippov@yadro.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-06-03 17:32:42 +09:30
Linus Torvalds a68dc61882 SPDX fixes for 5.2-rc3, round 2
Here are just two small patches, that fix up some found SPDX identifier
 issues.
 
 The first patch fixes an error in a previous SPDX fixup patch, that
 causes build errors when doing 'make clean' on the tree (the fact that
 almost no one noticed it reflects the fact that kernel developers don't
 like doing that option very often...)
 
 The second patch fixes up a number of places in the tree where people
 mistyped the string "SPDX-License-Identifier".  Given that people can
 not even type their own name all the time without mistakes, this was
 bound to happen, and odds are, we will have to add some type of check
 for this to checkpatch.pl to catch this happening in the future.
 
 Both of these have passed testing by 0-day.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXPNuiQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymt4ACgmqgJ5qJFr5UC/XLauYpl5IDXvH0AnjEgUb4h
 RQSKj2wjMzGpBYheamtx
 =tI3h
 -----END PGP SIGNATURE-----

Merge tag 'spdx-5.2-rc3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull SPDX fixes from Greg KH:
 "Here are just two small patches, that fix up some found SPDX
  identifier issues.

  The first patch fixes an error in a previous SPDX fixup patch, that
  causes build errors when doing 'make clean' on the tree (the fact that
  almost no one noticed it reflects the fact that kernel developers
  don't like doing that option very often...)

  The second patch fixes up a number of places in the tree where people
  mistyped the string "SPDX-License-Identifier". Given that people can
  not even type their own name all the time without mistakes, this was
  bound to happen, and odds are, we will have to add some type of check
  for this to checkpatch.pl to catch this happening in the future.

  Both of these have passed testing by 0-day"

* tag 'spdx-5.2-rc3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
  treewide: fix typos of SPDX-License-Identifier
  crypto: ux500 - fix license comment syntax error
2019-06-02 10:22:38 -07:00
Sebastian Andrzej Siewior fb092eb63d arch/arm/boot/compressed/decompress.c: fix build error due to lz4 changes
include/linux/cpumask.h: In function 'cpumask_parse':
  include/linux/cpumask.h:636:21: error: implicit declaration of function 'strchrnul'; did you mean 'strchr'? [-Werror=implicit-function-declaration]

Because arch/arm/boot/compressed/decompress.c does

#define _LINUX_STRING_H_

preventing linux/string.h from providing strchrnul.  It also #includes
asm/string.h, which for arm has a declaration of strchr(), explaining why
this didn't use to fail.

Link: http://lkml.kernel.org/r/20190528115346.f5a7kn3hdnuf5rts@linutronix.de
Fixes: 3713a4e1fd ("include/linux/cpumask.h: fix double string traverse in cpumask_parse")
Suggested-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: Yury Norov <ynorov@marvell.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-06-01 15:51:31 -07:00
Masahiro Yamada 8e82fe2ab6 treewide: fix typos of SPDX-License-Identifier
Prior to the adoption of SPDX, it was difficult for tools to determine
the correct license due to incomplete or badly formatted license text.
The SPDX solves this issue, assuming people can correctly spell
"SPDX-License-Identifier" although this assumption is broken in some
places.

Since scripts/spdxcheck.py parses only lines that exactly matches to
the correct tag, it cannot (should not) detect this kind of error.

If the correct tag is missing, scripts/checkpatch.pl warns like this:

 WARNING: Missing or malformed SPDX-License-Identifier tag in line *

So, people should notice it before the patch submission, but in reality
broken tags sometimes slip in. The checkpatch warning is not useful for
checking the committed files globally since large number of files still
have no SPDX tag.

Also, I am not sure about the legal effect when the SPDX tag is broken.

Anyway, these typos are absolutely worth fixing. It is pretty easy to
find suspicious lines by grep.

  $ git grep --not -e SPDX-License-Identifier --and -e SPDX- -- \
    :^LICENSES :^scripts/spdxcheck.py :^*/license-rules.rst
  arch/arm/kernel/bugs.c:// SPDX-Identifier: GPL-2.0
  drivers/phy/st/phy-stm32-usbphyc.c:// SPDX-Licence-Identifier: GPL-2.0
  drivers/pinctrl/sh-pfc/pfc-r8a77980.c:// SPDX-Lincense-Identifier: GPL 2.0
  lib/test_stackinit.c:// SPDX-Licenses: GPLv2
  sound/soc/codecs/max9759.c:// SPDX-Licence-Identifier: GPL-2.0

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-01 18:29:58 +02:00
David S. Miller 0462eaacee Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next
Alexei Starovoitov says:

====================
pull-request: bpf-next 2019-05-31

The following pull-request contains BPF updates for your *net-next* tree.

Lots of exciting new features in the first PR of this developement cycle!
The main changes are:

1) misc verifier improvements, from Alexei.

2) bpftool can now convert btf to valid C, from Andrii.

3) verifier can insert explicit ZEXT insn when requested by 32-bit JITs.
   This feature greatly improves BPF speed on 32-bit architectures. From Jiong.

4) cgroups will now auto-detach bpf programs. This fixes issue of thousands
   bpf programs got stuck in dying cgroups. From Roman.

5) new bpf_send_signal() helper, from Yonghong.

6) cgroup inet skb programs can signal CN to the stack, from Lawrence.

7) miscellaneous cleanups, from many developers.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-31 21:21:18 -07:00
Oleksandr Tyshchenko 51a0daf64d ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
If PSCI is available then most likely we are running on PSCI-enabled
U-Boot which, we assume, has already taken care of resetting CNTVOFF
and updating counter module before switching to non-secure mode
and we don't need to.

As the psci_smp_available() helper always returns false if CONFIG_SMP
is disabled, it can't be used safely as an indicator of PSCI usage.
For that reason, we check for the mandatory PSCI operation to be
available.

Please note, an extra check to prevent secure_cntvoff_init() from
being called for secondary CPUs in headsmp-apmu.S is not needed,
as SMP code for APMU based system is not executed if PSCI is in use.

Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-31 11:38:01 +02:00
Krzysztof Kozlowski 893bffa994 ARM: dts: exynos: Raise maximum buck regulator voltages on Arndale Octa
Raise the buck 1-7 regulators voltages to allow cpufreq choosing them
and to fix warnings during boot:

    core: _opp_supported_by_regulators: OPP minuV: 1250000 maxuV: 1250000, not supported by regulator
    cpu cpu0: _opp_add: OPP not supported by regulators (1800000000)

The maximum value is now in sync with other Exynos5420 boards with
S2MPS11 PMIC (SMDK5420, Odroid XU3 family).  This also matches the
values used in old patches done by Linaro Samsung team.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-05-30 21:09:26 +02:00
Krzysztof Kozlowski a41041ff31 ARM: dts: exynos: Move CPU OPP tables out of SoC node on Exynos5420
The cpus node is a top-level node, not inside the soc.  Therefore its
OPP tables should be there as well.

This also fixes the DTC warnings like:

    arch/arm/boot/dts/exynos5420.dtsi:46.37-109.5:
        Warning simple_bus_reg): /soc/opp_table0: missing or empty reg/ranges property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-05-30 21:09:11 +02:00
Krzysztof Kozlowski 0cca82ec34 ARM: exynos: Make ARCH_EXYNOS3 a default option
By default for ARMv7 Exynos platform we select all flavors.  One kernel
image simplifies testing and maintenance.  However Exynos3 was not
selected by default so far (thus it was not present in multi_v7
kernel).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-05-30 21:07:26 +02:00
Greg Kroah-Hartman 96ac6d4351 treewide: Add SPDX license identifier - Kbuild
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

      GPL-2.0

Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:32:33 -07:00
Thomas Gleixner 02956874a8 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 203
Based on 1 normalized pattern(s):

  the code contained herein is licensed under the gnu general public
  license v2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 1 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528171438.324426348@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:29:52 -07:00
Thomas Gleixner 9952f6918d treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not see http www gnu org
  licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 228 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:29:52 -07:00
Thomas Gleixner af873fcece treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194
Based on 1 normalized pattern(s):

  license terms gnu general public license gpl version 2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 161 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:29:22 -07:00
Thomas Gleixner f50a7f3d92 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 191
Based on 1 normalized pattern(s):

  licensed under gplv2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 99 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170027.163048684@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:29:21 -07:00
Thomas Gleixner 84e5653610 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 190
Based on 1 normalized pattern(s):

  licensed under gplv2 only

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 10 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170027.071422096@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:29:21 -07:00
Thomas Gleixner 84a14ae8c4 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 178
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 24 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170026.162703968@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:29:19 -07:00
Thomas Gleixner 1802d0beec treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 655 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:41 -07:00
Thomas Gleixner 4d3f18bb73 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 171
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or
  modify it under the terms of the gnu general public license version
  2 as published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation inc 59 temple place suite 330 boston ma 02111
  1307 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 1 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Armijn Hemel <armijn@tjaldur.nl>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070034.307127850@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:39 -07:00
Thomas Gleixner fcaf20360a treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159
Based on 1 normalized pattern(s):

  the code contained herein is licensed under the gnu general public
  license you may obtain a copy of the gnu general public license
  version 2 or later at the following locations http www opensource
  org licenses gpl license html http www gnu org copyleft gpl html

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 161 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:37 -07:00
Thomas Gleixner c942fddf87 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Based on 3 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version [author] [kishon] [vijay] [abraham]
  [i] [kishon]@[ti] [com] this program is distributed in the hope that
  it will be useful but without any warranty without even the implied
  warranty of merchantability or fitness for a particular purpose see
  the gnu general public license for more details

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version [author] [graeme] [gregory]
  [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i]
  [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema]
  [hk] [hemahk]@[ti] [com] this program is distributed in the hope
  that it will be useful but without any warranty without even the
  implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1105 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:37 -07:00
Thomas Gleixner 1a59d1b8e0 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  59 temple place suite 330 boston ma 02111 1307 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1334 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:35 -07:00
Thomas Gleixner 2874c5fd28 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:32 -07:00
Thomas Gleixner a912e80bd0 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 151
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version you should have received a copy of the
  gnu general public license along with this program if not write to
  the free software foundation inc 675 mass ave cambridge ma 02139 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 35 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Armijn Hemel <armijn@tjaldur.nl>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.655028468@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:28 -07:00
Sudeep Holla b8e65c1939 ARM: dts: vexpress: set the right partition type for NOR flash
We should set up the partitions in the right way so we will find out
what is in the flash.

The ARM Firmware Suite now has its own compatible and proper device
tree bindings to trigger discovery of the flash contents, and Linux
supports handling the new type of AFS partitions.

Based on commit 7f8e78ca90 ("arm64: dts: juno: set the right partition
type for NOR flash")

Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-05-30 13:39:50 +01:00
Sudeep Holla 6f3710f1f6 arm: dts: vexpress-v2p-ca15_a7: disable NOR flash node by default
Accessing the NOR flash memory from the kernel will disrupt CPU sleep/
idles states and CPU hotplugging. We need to disable this DT node by
default. Setups that want to access the flash can modify this entry to
enable the flash again but also ensuring to disable CPU idle states and
CPU hotplug.

The platform firmware assumes the flash is always in read mode while
Linux kernel driver leaves NOR flash in "read id" mode after
initialization. If it gets used actively, it can be in some other state.

So far we had not seen this issue as the NOR flash drivers in kernel
were not enabled by default. However it was enable in multi_v7 config by
Commit 5f068190cc ("ARM: multi_v7_defconfig: Enable support for CFI NOR FLASH")

So, let's mark the NOR flash disabled so that the platform can boot
again. This based on:
Commit 980bbff018 ("ARM64: juno: disable NOR flash node by default")

Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-05-30 13:39:26 +01:00
Chen-Yu Tsai 96c0dad2f9
ARM: dts: sun8i: a83t: Add device node for CSI (Camera Sensor Interface)
The A83T SoC has a camera sensor interface (known as CSI in Allwinner
lingo), which is similar to the one found on the A64 and H3. The only
difference seems to be that support of MIPI CSI through a connected
MIPI CSI-2 bridge.

Add a device node for it, and pinctrl nodes for the commonly used MCLK
and 8-bit parallel interface. The property /omit-if-no-ref/ is added to
the pinctrl nodes to keep the device tree blob size down if they are
unused.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-30 13:37:50 +02:00
Maxime Ripard bdd33cb6e2
ARM: dts: gr8-evb: Fix RTC vendor
For some reason, the RTC vendor is reported to be phg, while the part is
actually made by the much more known NXP. Fix that.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-30 13:37:50 +02:00
Maxime Ripard ae683c816d
ARM: dts: sun7i: icnova-swac: Fix the model vendor
Even though the SWAC is just a baseboard to the icnova SoM, the vendor of
the baseboard somehow ended up with the board name instead of the vendor
name. Fix that.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-30 13:37:50 +02:00
Maxime Ripard dfe8173dfd
ARM: dts: sun8i: a711: Change LRADC node names to avoid warnings
One of the usage of the LRADC is to implement buttons. The bindings define
that we should have one subnode per button, with their associated voltage
as a property.

However, there was no reg property but we still used the voltage associated
to the button as the unit-address, which eventually generated warnings in
DTC.

Rename the node names to avoid those warnings.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-30 13:37:46 +02:00
Tony Lindgren 34f61de870 ARM: dts: Drop bogus CLKSEL for timer12 on dra7
There is no CLKSEL for timer12 on dra7 unlike for timer1. This
causes issues on booting the device that Tomi noticed if
DEBUG_SLAB is enabled and the clkctrl clock does not properly
handle non-existing clock. Let's drop the bogus CLKSEL clock,
the clkctrl clock handling gets fixed separately.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Fixes: 4ed0dfe3cf ("ARM: dts: dra7: Move l4 child devices to probe them with ti-sysc")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-30 00:25:23 -07:00
Eric W. Biederman 2e1661d267 signal: Remove the task parameter from force_sig_fault
As synchronous exceptions really only make sense against the current
task (otherwise how are you synchronous) remove the task parameter
from from force_sig_fault to make it explicit that is what is going
on.

The two known exceptions that deliver a synchronous exception to a
stopped ptraced task have already been changed to
force_sig_fault_to_task.

The callers have been changed with the following emacs regular expression
(with obvious variations on the architectures that take more arguments)
to avoid typos:

force_sig_fault[(]\([^,]+\)[,]\([^,]+\)[,]\([^,]+\)[,]\W+current[)]
->
force_sig_fault(\1,\2,\3)

Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2019-05-29 09:31:43 -05:00
Eric W. Biederman 351b6825b3 signal: Explicitly call force_sig_fault on current
Update the calls of force_sig_fault that pass in a variable that is
set to current earlier to explicitly use current.

This is to make the next change that removes the task parameter
from force_sig_fault easier to verify.

Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2019-05-29 09:31:43 -05:00
Eric W. Biederman fd65cc848e signal/arm: Remove tsk parameter from __do_user_fault
The __do_user_fault function is always called with tsk == current.
Make that obvious by removing the tsk parameter.

This makes it clear that __do_user_fault calls force_sig_fault
on the current task.

Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2019-05-29 09:31:43 -05:00
Eric W. Biederman e9a0650911 signal/arm: Remove tsk parameter from ptrace_break
The ptrace_break function is always called with tsk == current.
Make that obvious by removing the tsk parameter.

This also makes it clear that ptrace_break calls force_sig_fault
on the current task.

Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2019-05-29 09:31:43 -05:00
Maxime Ripard 9fbbbb7b8d
ARM: dts: sunxi: h3/h5: Fix GPIO regulator state array
Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each voltage state,
which in turns create a validation warning.

Let's fix this.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-29 09:27:56 +02:00
Priit Laes 5f49c38a80
ARM: dts: sun7i: olimex-lime2: Enable ac and power supplies
Lime2 has battery connector so enable these supplies.

Signed-off-by: Priit Laes <plaes@plaes.org>
Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-29 09:25:37 +02:00
Tony Lindgren 22a7fc15cf ARM: dts: Drop legacy custom hwmods property for omap4 mmc
With recent ti-sysc driver changes, we can now finally probe most
modules without needing the custom ti,hwmods property.

Let's drop it for omap4 MMC as we can test that for runtime PM
for core retention idle mode for wlcore WLAN.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28 05:19:17 -07:00
Tony Lindgren bd80c674f8 ARM: dts: Drop legacy custom hwmods property for omap4 uart
With recent ti-sysc driver changes, we can now finally probe most
modules without needing the custom ti,hwmods property.

Let's start with omap4 uart as we can test that for runtime PM
for core retention idle mode.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28 05:19:17 -07:00
Tony Lindgren 2b2f7def05 bus: ti-sysc: Add support for missing clockdomain handling
We need to let ti-sysc driver manage clockdomain autoidle for the
duration of of reset, enable and idle. And we need to do it before we
enable the clock and after we disable it. Currently we are still
relying on platform callbacks indirectly managing clockdomain autoidle.
But I noticed that for device tree only probed drivers it now happens
only after we enabling the clocks and before we disable the clocks,
while it should be the other way around. So far I have not noticed
any issues with this though.

Let's add new ti_sysc_clkdm_deny_idle() and ti_sysc_clkdm_allow_idle()
functions for ti-sysc driver to use to manage clockdomains directly via
platform data callbacks. Note that we can implement the clockdomain
functions in pdata-quirks.c as for probing devices without "ti,hwmods"
custom property we don't need to use the other platform data callbacks.

Let's do this in one patch as there's is still an unlikely chance we
may need to apply this as a fix for v5.2 for dropping legacy platform
data for some devices. We also do have the option of adding back the
platform data if needed in case of trouble.

Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28 05:19:14 -07:00
Linus Walleij 153969fd95 ARM: versatile: Drop CLCD platform data
The Versatile family no longer makes any use of the CLCD
platform data, we have moved over all users to the DRM
driver that has built-in handling of the displays. Delete
the old auxdata.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-28 13:23:46 +02:00
Leo Yan 8de9336f4b ARM: dts: vexpress-v2p-ca15_a7: update coresight DT bindings
CoreSight DT bindings have been updated, thus the old compatible strings
are obsolete and the drivers will report warning if DTS uses these
obsolete strings.

This patch switches to the new bindings for CoreSight dynamic funnel and
static replicator, so can dismiss warning during initialisation.

Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-05-28 11:44:45 +01:00
Eric W. Biederman 3cf5d076fb signal: Remove task parameter from force_sig
All of the remaining callers pass current into force_sig so
remove the task parameter to make this obvious and to make
misuse more difficult in the future.

This also makes it clear force_sig passes current into force_sig_info.

Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2019-05-27 09:36:28 -05:00
Linus Torvalds 862f0a3227 The usual smattering of fixes and tunings that came in too late for the
merge window, but should not wait four months before they appear in
 a release.  I also travelled a bit more than usual in the first part
 of May, which didn't help with picking up patches and reports promptly.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQEcBAABAgAGBQJc6RkmAAoJEL/70l94x66DhEAH/ijCkibV9vOUu8n/lSxMjAzi
 I/Y1VEaVRFuQ6u0QSjWBBg22tVsWuWiVbonJ63w3JMRwi5Q5zW9REE7EaKRAa/eC
 FiFE7vTesYh6sGVwdMCwoinjMDyCp7hybvtBc608+MWhVmrdzTYtPm5N85wxIDtW
 xH5Kr2mVeLC43X3vfegolmXZ1obAbZEToJvOgJrYFhnzsmVYYl182kfGtrppBoO0
 XXDPuDRGpTrm6A2oADMdOv+mT9p51pHsedmHQaDGXwAGEC/BkOGKdIdBfwppEwy7
 QP2NGqwkHIyghV1aCPacT6O6G6xL0i2rfvlJ7+e6o7deU4uMXAqIdQ2DbIcHy3g=
 =5IW2
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM fixes from Paolo Bonzini:
 "The usual smattering of fixes and tunings that came in too late for
  the merge window, but should not wait four months before they appear
  in a release.

  I also travelled a bit more than usual in the first part of May, which
  didn't help with picking up patches and reports promptly"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (33 commits)
  KVM: x86: fix return value for reserved EFER
  tools/kvm_stat: fix fields filter for child events
  KVM: selftests: Wrap vcpu_nested_state_get/set functions with x86 guard
  kvm: selftests: aarch64: compile with warnings on
  kvm: selftests: aarch64: fix default vm mode
  kvm: selftests: aarch64: dirty_log_test: fix unaligned memslot size
  KVM: s390: fix memory slot handling for KVM_SET_USER_MEMORY_REGION
  KVM: x86/pmu: do not mask the value that is written to fixed PMUs
  KVM: x86/pmu: mask the result of rdpmc according to the width of the counters
  x86/kvm/pmu: Set AMD's virt PMU version to 1
  KVM: x86: do not spam dmesg with VMCS/VMCB dumps
  kvm: Check irqchip mode before assign irqfd
  kvm: svm/avic: fix off-by-one in checking host APIC ID
  KVM: selftests: do not blindly clobber registers in guest asm
  KVM: selftests: Remove duplicated TEST_ASSERT in hyperv_cpuid.c
  KVM: LAPIC: Expose per-vCPU timer_advance_ns to userspace
  KVM: LAPIC: Fix lapic_timer_advance_ns parameter overflow
  kvm: vmx: Fix -Wmissing-prototypes warnings
  KVM: nVMX: Fix using __this_cpu_read() in preemptible context
  kvm: fix compilation on s390
  ...
2019-05-26 13:45:15 -07:00
Jiong Wang 163541e6ba arm: bpf: eliminate zero extension code-gen
Cc: Shubham Bansal <illusionist.neo@gmail.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2019-05-24 18:58:37 -07:00
Thomas Gleixner 9ba3dd0b52 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 105
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version author [hema] [hk] [hemahk]@[ti] [com]
  this program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details you should have received a
  copy of the gnu general public license along with this program if
  not write to the free software foundation inc 675 mass ave cambridge
  ma 02139 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190523091649.791555110@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-24 17:39:00 +02:00
Thomas Gleixner fd534e9b5f treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 102
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  51 franklin st fifth floor boston ma 02110 1301 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 50 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190523091649.499889647@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-24 17:39:00 +02:00
Thomas Gleixner 74ba9207e1 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 61
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  675 mass ave cambridge ma 02139 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 441 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190520071858.739733335@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-24 17:36:45 +02:00
James Morse 623e1528d4 KVM: arm/arm64: Move cc/it checks under hyp's Makefile to avoid instrumentation
KVM has helpers to handle the condition codes of trapped aarch32
instructions. These are marked __hyp_text and used from HYP, but they
aren't built by the 'hyp' Makefile, which has all the runes to avoid ASAN
and KCOV instrumentation.

Move this code to a new hyp/aarch32.c to avoid a hyp-panic when starting
an aarch32 guest on a host built with the ASAN/KCOV debug options.

Fixes: 021234ef37 ("KVM: arm64: Make kvm_condition_valid32() accessible from EL2")
Fixes: 8cebe750c4 ("arm64: KVM: Make kvm_skip_instr32 available to HYP")
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-05-24 14:53:20 +01:00
Hongwei Zhang 1304137363 ARM: dts: aspeed: Add Microsoft Olympus BMC
Olympus is a Microsoft OCP platform equipped with Aspeed 1250 or
2400 BMC SoC.

Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:57:34 +09:30
Andrew Peng 9831ae3375 ARM: dts: aspeed: Adding Lenovo Hr630 BMC
Initial introduction of Lenovo Hr630 family equipped with
Aspeed 2500 BMC SoC. Hr630 is a x86 server development kit
with a ASPEED ast2500 BMC manufactured by Lenovo.

Signed-off-by: Andrew Peng <pengms1@lenovo.com>
Signed-off-by: Yonghui Liu <liuyh21@lenovo.com>
Signed-off-by: Lisa Liu <liuyj19@lenovo.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:57:34 +09:30
Tao Ren e39e134d31 ARM: dts: aspeed: Add Facebook YAMP BMC
Add initial version of device tree for Facebook YAMP ast2500 BMC.

Signed-off-by: Tao Ren <taoren@fb.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:57:34 +09:30
Adriana Kobylak 56b646284b ARM: dts: aspeed: swift: Add pca9539 devices
Add the pca9539 devices to the Swift device tree.

Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Reviewed-by: Brandon Wyman <bjwyman@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:57:34 +09:30
Adriana Kobylak 8e8fd0cbd7 ARM: dts: aspeed: Add Swift BMC machine
The Swift BMC is an ASPEED ast2500 based BMC that is part of
a Power9 server. This adds the device tree description for
most upstream components.

Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Reviewed-by: Brandon Wyman <bjwyman@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:57:33 +09:30
Tao Ren b853ab0fa2 ARM: dts: aspeed: cmm: enable ehci host controllers
Enable ehci0 and ehci1 USB host controllers on Facebook Backpack CMM BMC.

Signed-off-by: Tao Ren <taoren@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:55:16 +09:30
Robert Lippert b2cc26af46 ARM: dts: aspeed: zaius: fixed I2C bus numbers for pcie slots
The change to include ibm-power9-cfam.dtsi resulted in a renumbering
of all of the I2C bus numbers behind the on-board muxes.  This breaks
some tools which have hardcoded the bus numbers.

Add device tree aliases for the I2C buses routed through the PCIe slots
so that they return to their former numbers before the cfam change.

Signed-off-by: Robert Lippert <rlippert@google.com>
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:55:16 +09:30
Robert Lippert 66daab2432 ARM: dts: aspeed: zaius: update 12V brick I2C address
The I2C address of the brick is different depending on the board SKU.

Update the values to instantiate addresses which work for most boards.

Signed-off-by: Robert Lippert <rlippert@google.com>
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:55:16 +09:30
Maxim Sloyko 9deea07ed8 ARM: dts: aspeed: zaius: add Infineon and Intersil regulators
Add the nodes for the ir38064 and isl68137 devices on the Zaius board.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Signed-off-by: Robert Lippert <rlippert@google.com>
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:55:16 +09:30
Patrick Venture 29b871f344 ARM: dts: aspeed: quanta-q71: Enable p2a node
Enable the aspeed-p2a-ctrl node and configure with memory-region to
enable mmap access.

Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:55:16 +09:30
Patrick Venture 0215e2a546 ARM: dts: aspeed: Add aspeed-p2a-ctrl node
Add a node for the aspeed-p2a-ctrl module.  This node, when enabled will
disable the PCI-to-AHB bridge and then allow control of this bridge via
ioctls, and access via mmap.

Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:55:15 +09:30
Benjamin Herrenschmidt 8bc7d3ed7c ARM: dts: aspeed: Add Power9 and Power9 CFAM description
To be used by the OpenPower BMC machines.

This provides proper chip IDs but also adds the various sub-devices
necessary for the future OCC driver among other. All the added nodes
comply with the existing upstream FSI bindings.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:55:15 +09:30
Joel Stanley 459a6a2f25 ARM: dts: aspeed: Rename flash-controller nodes
The device tree compiler has started spitting out warnings about these
names, insisting they be called 'spi':

 ../arch/arm/boot/dts/aspeed-g5.dtsi:108.35-128.5: Warning
 (spi_bus_bridge): /ahb/flash-controller@1e631000: node name for SPI
 buses should be 'spi'

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:55:15 +09:30
Andrey Smirnov af79ef726a ARM: dts: vf610-zii-dev: Add QSPI node
Both rev C and rev B of the board come with two QSPI-NOR chips
attached to the SoC. Add DT code describing all of this.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-23 20:56:34 +08:00
Andrey Smirnov 36b7ee5f7e ARM: dts: vf610-zii-dev: Fix incorrect UART2 pin assignment
UART2 is connected to PTD22/23, not PTD0/1. Fix corresponding pinmux
node.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-23 20:56:23 +08:00
Steve Longerbeam e2c1615677 ARM: dts: imx53-smd: Add OV5642 video capture support
Add video capture support from the OV5642 to IPU CSI0 on
the i.MX53 SMD.

Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com>
[fabio: remove unnecessary 'regulator-always-on' from camera regulators]
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-23 17:06:07 +08:00
Steve Longerbeam e5ad32308e ARM: dts: imx53: Add capture-subsystem device
Add video capture_subsystem device node, and include both CSI ports.
Prepare for adding sensors by adding the parallel sensor anchor endpoints
to the CSI ports.

Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-23 17:05:58 +08:00
Rob Herring efb8393cf0 ARM: dts: imx: Avoid colliding 'display' node and property names
While properties and child nodes with the same name are valid DT, the
practice is not encouraged. Furthermore, the collision is problematic for
YAML encoded DT. Let's just avoid the issue and rename the nodes.

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-23 16:31:38 +08:00
YueHaibing efc77e8107 crypto: arm/sha512 - Make sha512_arm_final static
Fix sparse warning:

arch/arm/crypto/sha512-glue.c:40:5: warning:
 symbol 'sha512_arm_final' was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-05-23 14:01:07 +08:00
Martin Blumenstingl 8ee9ee7423 ARM: dts: meson8m2: mxiii-plus: add the supply for the Mali GPU
The Mali GPU is supplied by VDD_EE which is provided by the DCDC2
regulator.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-05-22 18:29:31 -07:00
Martin Blumenstingl 0b67e66a5f ARM: dts: meson8m2: mxiii-plus: rename the DCDC2 regulator
The DCDC2 regulator output is actually called "VDD_EE" in various
Meson8b board schematics. This matches with what Amlogic names it in the
most part of their vendor kernel (there are a few places where it's
actually called VDDAO, schematics of EC-100 suggest that the regulator
output is used for both signals).
While here, also give the regulator an alias as it supplies the Mali GPU
so a phandle to it will be required later on.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-05-22 18:29:31 -07:00
Martin Blumenstingl 872f881e72 ARM: dts: meson8b: add the canvas module
Add the canvas module to Meson8b because it's required for the VPU
(video output) and video decoders.

The canvas module is located inside the "DMC bus" (where also some of
the memory controller registers are located). The "DMC bus" itself is
part of the so-called "MMC bus".

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-05-22 18:18:16 -07:00
Martin Blumenstingl 10256a4755 ARM: dts: meson8m2: update the offset of the canvas module
With the Meson8m2 SoC the canvas module was moved from offset 0x20
(Meson8) to offset 0x48 (same as on Meson8b). The offsets inside the
canvas module are identical.

Correct the offset so the driver uses the correct registers.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-05-22 18:18:09 -07:00
Martin Blumenstingl 47b5818239 ARM: dts: meson8: add the canvas module
Add the canvas module to Meson8 because it's required for the VPU
(video output) and video decoders.

The canvas module is located inside thie "DMC bus" (where also some of
the memory controller registers are located). The "DMC bus" itself is
part of the so-called "MMC bus".

Amlogic's vendor kernel has an explicit #define for the "DMC" register
range on Meson8m2 while there's no such #define for Meson8. However, the
canvas and memory controller registers on Meson8 are all expressed as
"0x6000 + actual offset", while Meson8m2 uses "DMC + actual offset".
Thus it's safe to assume that the DMC bus exists on both SoCs even
though the registers inside are slightly different.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-05-22 18:17:35 -07:00
Linus Walleij ceb02dcf67 ARM: delete netx machine
After discussing with the subarch maintainers and Hilscher,
we concluded that the netx subarchitecture (Netx 100/500)
is no longer maintained or tested, and noone will miss it
if we delete it. So delete it.

There is a newer Netx 4000 architecture which we may see
included at some point, but this will be supported using
the standard multiplatform and devicetree mechanisms and is
easier to develop from scratch.

Cc: Michael Trensch <MTrensch@hilscher.com>
Acked-By: Robert Schwebel <r.schwebel@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-22 13:55:50 +02:00
Matthias Kaehlcke c87efcc3d1 ARM: dts: rockchip: Configure the GPU thermal zone for mickey
mickey crams a lot of hardware into a tiny package, which requires
more aggressive thermal throttling than for devices with a larger
footprint. Configure the GPU thermal zone to throttle the GPU
progressively at temperatures >= 60°C. Heat dissipated by the
CPUs also affects the GPU temperature, hence we cap the CPU
frequency to 1.4 GHz for temperatures above 65°C. Further throttling
of the CPUs may be performed by the CPU thermal zone.

The configuration matches that of the downstream Chrome OS 3.14
kernel, the 'official' kernel for mickey.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-22 11:03:35 +02:00
Matthias Kaehlcke 11983d8530 ARM: dts: rockchip: Use the GPU to cool CPU thermal zone of veyron mickey
On rk3288 the CPU and GPU temperatures are correlated. Limit the GPU
frequency on veyron mickey to 400 MHz for CPU temperatures >= 65°C
and to 300 MHz for CPU temperatures >= 85°C.

This matches the configuration of the downstream Chrome OS 3.14 kernel,
the 'official' kernel for mickey.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-22 11:03:32 +02:00
Matthias Kaehlcke 75481833c6 ARM: dts: rockchip: remove GPU 500 MHz OPP on rk3288
The NPLL is the only safe way to generate 500 MHz for the GPU. The
downstream Chrome OS 3.14 kernel ('official' kernel for veyron
devices) re-purposes NPLL to HDMI and hence disables the OPP for
the GPU (see https://crrev.com/c/1574579). Disable it here as well
to keep in sync and avoid problems in case someone decides to
re-purpose NPLL.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
[moved from veyron to general rk3288, as tying up the NPLL for a
 not-that-helpful opp (not really fast but will still generate
 quite a bit of heat) doesn't make so much sense when it will
 keep us from supporting other display modes  in the future]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-22 11:03:29 +02:00
Matthias Kaehlcke ae2b6ba865 ARM: dts: rockchip: Use GPU as cooling device for the GPU thermal zone of the rk3288
Currently the CPUs are used as cooling devices of the rk3288 GPU
thermal zone. The CPUs are also configured as cooling devices in the
CPU thermal zone, which indirectly helps with cooling the GPU thermal
zone, since the CPU and GPU temperatures are correlated on the rk3288.

Configure the ARM Mali Midgard GPU as cooling device for the GPU
thermal zone instead of the CPUs.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-22 11:01:27 +02:00
Matthias Kaehlcke f6dcbb3ad5 ARM: dts: rockchip: Add #cooling-cells entry for rk3288 GPU
The Mali GPU of the rk3288 can be used as cooling device, add
a #cooling-cells entry for it.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-22 11:00:56 +02:00
Douglas Anderson 8ef1ba39a9 ARM: dts: rockchip: Mark that the rk3288 timer might stop in suspend
This is similar to commit e6186820a7 ("arm64: dts: rockchip: Arch
counter doesn't tick in system suspend").  Specifically on the rk3288
it can be seen that the timer stops ticking in suspend if we end up
running through the "osc_disable" path in rk3288_slp_mode_set().  In
that path the 24 MHz clock will turn off and the timer stops.

To test this, I ran this on a Chrome OS filesystem:
  before=$(date); \
  suspend_stress_test -c1 --suspend_min=30 --suspend_max=31; \
  echo ${before}; date

...and I found that unless I plug in a device that requests USB wakeup
to be active that the two calls to "date" would show that fewer than
30 seconds passed.

NOTE: deep suspend (where the 24 MHz clock gets disabled) isn't
supported yet on upstream Linux so this was tested on a downstream
kernel.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-22 10:02:47 +02:00
Douglas Anderson 0ca87bd5ba ARM: dts: rockchip: Add pin names for rk3288-veyron-jerry
This is like the same change for rk3288-veyron-minnie.  See that patch
for more details.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-22 09:59:13 +02:00
Douglas Anderson ca3516b32c ARM: dts: rockchip: Add pin names for rk3288-veyron-minnie
We can now use the "gpio-line-names" property to provide the names for
all the pins on a board.  Let's use this to provide the names for all
the pins on rk3288-veyron-minnie.

In general the names here come straight from the schematic.  That
means even if the schematic name is weird / doesn't have consistent
naming conventions / has typos I still haven't made any changes.

The exception here is for two pins: the recovery switch and the write
protect detection pin.  These two pins need to have standardized names
since crossystem (a Chrome OS tool) uses these names to query the
pins.  In downstream kernels crossystem used an out-of-tree driver to
do this but it has now been moved to the gpiod API and needs the
standardized names.

It's expected that other rk3288-veyron boards will get similar patches
shortly.

NOTE: I have sorted the "gpio" section to be next to the "pinctrl"
section since it seems to logically make the most sense there.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-22 09:59:08 +02:00
Alexandre Belloni bd5d3873de ARM: dts: at91: sama5d3: switch to new sckc bindings
Remove the child nodes of the sckc as they are not necessary anymore.

Also, switch to the new atmel,sama5d3-sckc compatible string to use the
proper startup time for the RC oscillator (500 µs instead of 75).

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-05-21 17:42:09 +02:00
Alexandre Belloni d77a1de7f6 ARM: dts: at91: at91sam9rl: switch to new sckc bindings
Remove the child nodes of the sckc as they are not necessary anymore.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-05-21 17:42:09 +02:00
Alexandre Belloni 01048f1052 ARM: dts: at91: at91sam9g45: switch to new sckc bindings
Remove the child nodes of the sckc as they are not necessary anymore.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-05-21 17:42:09 +02:00
Alexandre Belloni bf896bd522 ARM: dts: at91: at91sam9x5: switch to new sckc bindings
Remove the child nodes of the sckc as they are not necessary anymore.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-05-21 17:42:09 +02:00
Maxime Ripard 17996e5b0b
ARM: dts: sun6i: Add default address and size cells for SPI
The SPI controller bindings require an address cell size of 1, and a size
cell size of 0. Let's put it at the DTSI level to make sure that's properly
enforced.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-21 16:29:15 +02:00
Alexandre Belloni 2c1eab2b43 ARM: dts: at91sam9261ek: remove unused chosen nodes
The chosen clocksource and clockevent bindings have never been accepted and
parsed, remove them.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-05-21 16:15:45 +02:00