Commit Graph

122 Commits

Author SHA1 Message Date
Kevin Hilman 22770de11c gpio/omap: fix broken context restore for non-OFF mode transitions
The fix in commit 1b1287032 (gpio/omap: fix missing check in
*_runtime_suspend()) exposed another bug in the context restore path.

Currently, the per-bank context restore happens whenever the context
loss count is different in runtime suspend and runtime resume *and*
whenever the per-bank contex_loss_count == 0:

	if (context_lost_cnt_after != bank->context_loss_count ||
					!context_lost_cnt_after) {
		omap_gpio_restore_context(bank);

Restoring context when the context_lost_cnt_after == 0 is clearly
wrong, since this will be true until the first off-mode transition
(which could be never, if off-mode is never enabled.)  This check
causes the context to be restored on *every* runtime PM transition.

Before commit 1b1287032 (gpio/omap: fix missing check in
*_runtime_suspend()), this code was never executed in non-OFF mode, so
there were never spurious context restores happening.  After that
change though, spurious context restores could happen.

To fix, simply remove the !context_lost_cnt_after check. It is not
needed.

This bug was found when noticing that the smc911x NIC on 3530/Overo
was not working, and git bisect tracked it down to this patch.  It
seems that the spurious context restore was causing the smsc911x to
not be properly probed on this platform.

Tested-by: Tony Lindgren <tony@atomide.com>
Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-18 07:01:44 -07:00
Tarun Kanti DebBarma 1b1287032d gpio/omap: fix missing check in *_runtime_suspend()
We do checking for bank->enabled_non_wakeup_gpios in order
to skip redundant operations. Somehow, the check got missed
while doing the cleanup series.

Just to make sure that we do context restore correctly in
*_runtime_resume(), the bank->workaround_enabled check is
moved after context restore. Otherwise, it would prevent
context restore when bank->enabled_non_wakeup_gpios is 0.

Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-11 17:08:40 -07:00
Tarun Kanti DebBarma 4e962e8998 gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()
Add register offsets for GPIO_IRQSTATUS_RAW_0, GPIO_IRQSTATUS_RAW_0
which are present on OMAP4+ processors. Now we can distinguish
conditions applicable to OMAP4,5 and those specific to OMAP24xx
and OMAP3xxx.

Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-11 17:08:40 -07:00
Tarun Kanti DebBarma 9c4ed9e6c0 gpio/omap: remove suspend/resume callbacks
Both omap_gpio_suspend() and omap_gpio_resume() does programming
of wakeup_en register.
_gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0);
_gpio_rmw(base, bank->regs->wkup_en, bank->context.wake_en, 1);

This is redundant in omap_gpio_suspend() because wakeup_en
register automatically gets initialized in _set_gpio_wakeup()
and set_gpio_trigger() while being called either from
chip.irq_set_wake() or chip.irq_set_type().

This is also redundant in omap_gpio_resume() because wakeup_en
register is programmed in omap_gpio_restore_context() called
which is called from runtime resume callback.

Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-11 17:08:40 -07:00
Tarun Kanti DebBarma b1a8e3d2d1 gpio/omap: remove retrigger variable in gpio_irq_handler
commit 672e302e3c (ARM: OMAP: use edge/level handlers from generic IRQ
framework) removed retrigger support in favor of using generic IRQ
framework.  This patch cleans up some unused remnants of that removal.

Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-11 17:08:40 -07:00
Tarun Kanti DebBarma 499fa2871d gpio/omap: remove saved_wakeup field from struct gpio_bank
There is no more need to have saved_wakeup because bank->context.wake_en
already holds that value. So getting rid of read/write operation associated
with this field.

Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-11 17:08:40 -07:00
Tarun Kanti DebBarma 0aa2727399 gpio/omap: remove suspend_wakeup field from struct gpio_bank
Since we already have bank->context.wake_en to keep track
of gpios which are wakeup enabled, there is no need to have
this field any more.

Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-11 17:08:39 -07:00
Tarun Kanti DebBarma c6f31c9ec2 gpio/omap: remove saved_fallingdetect, saved_risingdetect
Since we already have context.fallingdetect and context.risingdetect
there is no more need to have these additional fields. Also, getting
rid of extra reads associated with them.

Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-11 17:08:39 -07:00
Tarun Kanti DebBarma 6edd94db25 gpio/omap: fix incorrect initialization of omap_gpio_mod_init
Initialization of irqenable, irqstatus registers is the common
operation done in this function for all OMAP platforms, viz. OMAP1,
OMAP2+. The latter _gpio_rmw()'s which supposedly got introduced
wrongly to take care of OMAP2+ platforms were overwriting initially
programmed OMAP1 value breaking functionality on OMAP1.
Somehow incorrect assumption was made that each _gpio_rmw()'s were
mutually exclusive. On close observation it is found that the first
_gpio_rmw() which is supposedly done to take care of OMAP1 platform
is generic enough and takes care of OMAP2+ platform as well.
Therefore remove the latter _gpio_rmw() to irqenable as they are
redundant now.

Writing to ctrl and debounce_en registers for OMAP2+ platforms are
modified to match the original(pre-cleanup) code where the registers
are initialized with 0. In the cleanup series since we are using
_gpio_rmw(reg, 0, 1), instead of __raw_writel(), we are just reading
and writing the same values to ctrl and debounce_en. This is not an
issue for debounce_en register because it has 0x0 as the default value.
But in the case of ctrl register the default value is 0x2 (GATINGRATIO
 = 0x1) so that we end up writing 0x2 instead of intended 0 value.
Therefore changing back to __raw_writel() as this is sufficient for
this case besides simpler to understand.

Also, change irqstatus initalization logic that avoids comparison
with bool, besides making it fit in a single line.

Cc: stable@vger.kernel.org
Cc: Tony Lindgren <tony@atomide.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Reported-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-10 07:16:15 -07:00
Tarun Kanti DebBarma 7fcca715de gpio/omap: fix redundant decoding of gpio offset
In gpio_get(), _get_gpio_datain() and _get_gpio_dataout() get rid of
un-necessary operation to compute gpio mask. The gpio offset passed
to gpio_get() is sufficient to do that.

Here is Russell's original comment:
Can someone explain to me this:

static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
{
       void __iomem *reg = bank->base + bank->regs->datain;

       return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0;
}

static int gpio_get(struct gpio_chip *chip, unsigned offset)
{
       struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
       void __iomem *reg = bank->base;
       int gpio = chip->base + offset;
       u32 mask = GPIO_BIT(bank, gpio);

       if (gpio_is_input(bank, mask))
               return _get_gpio_datain(bank, gpio);
       else
               return _get_gpio_dataout(bank, gpio);
}

Given that bank->width on OMAP is either 32 or 16, and GPIO numbers for
any GPIO chip are always aligned to 32 or 16, why does this code bother
adding the chips base gpio number and then modulo the width?

Surely this means if - for argument sake - you registered a GPIO chip
with 8 lines followed by one with 16 lines, GPIO0..7 would be chip 0
bit 0..7, GPIO8..15 would be chip 1 bit 8..15, GPIO16..23 would be
chip 1 bit 0..7.

However, if you registered a GPIO chip with 16 lines first, it would
mean GPIO0..15 would be chip 0 bit 0..15, and GPIO16..31 would be
chip 1 bit 0..15.

Surely this kind of behaviour is not intended?

Is there a reason why the bitmask can't just be (1 << offset) where
offset is passed into these functions as GPIO number - chip->base ?

Reported-by: Russell King - ARM Linux <linux@arm.linux.org.uk>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-03-21 10:21:24 +05:30
Tarun Kanti DebBarma 2a900eb74c gpio/omap: fix incorrect update to context.irqenable1
In _enable_gpio_irqbank() when bank->regs->set_irqenable is TRUE,
gpio_mask can be directly set by writing to set_irqenable register
without overwriting current value. In order to ensure the same is
stored in context.irqenable1, we must avoid overwriting it with
gpio_mask at the end of the function. Instead, update irqenable1
appropriately by OR'ing with gpio_mask.
For the case where bank->regs->set_irqenable is FALSE, irqenable1
can be directly overwritten with 'l' which holds correct computed
value.
        if (bank->regs->set_irqenable) {
                reg += bank->regs->set_irqenable;
                l = gpio_mask;
        } else {
                reg += bank->regs->irqenable;
                l = __raw_readl(reg);
                if (bank->regs->irqenable_inv)
                        l &= ~gpio_mask;
                else
                        l |= gpio_mask;
        }

Make similar change for _disable_gpio_irqbank().

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-03-21 10:18:54 +05:30
Tarun Kanti DebBarma 960edffe29 gpio/omap: fix incorrect context restore logic in omap_gpio_runtime_*
In omap_gpio_runtime_suspend/resume() the context save/restore should
be independent of bank->enabled_non_wakeup_gpios. This was preventing
context restore of GPIO lines which are not wakeup enabled.

Reported-by: Govindraj Raja <govindraj.raja@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-03-20 15:32:46 +05:30
Tarun Kanti DebBarma 2c836f7ea5 gpio/omap: fix missing dataout context save in _set_gpio_dataout_reg
There are two functions, _set_gpio_dataout_reg() and _set_gpio_dataout_mask()
which writes to dataout register and the dataout context must be saved.
It is missing in the first function, _set_gpio_dataout_reg(). Fix this.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-03-20 15:29:52 +05:30
Tarun Kanti DebBarma 8276536cec gpio/omap: fix _set_gpio_irqenable implementation
This function should be capable of both enabling and disabling interrupts
based upon the *enable* parameter. Right now the function only enables
the interrupt and *enable* is not used at all. So add the interrupt
disable capability also using the parameter.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-03-20 15:29:09 +05:30
Tarun Kanti DebBarma 00ece7e482 gpio/omap: fix trigger type to unsigned
The GPIO trigger parameter is of type unsigned.
enum {
        IRQ_TYPE_NONE           = 0x00000000,
        IRQ_TYPE_EDGE_RISING    = 0x00000001,
        IRQ_TYPE_EDGE_FALLING   = 0x00000002,
        IRQ_TYPE_EDGE_BOTH      = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING),
        IRQ_TYPE_LEVEL_HIGH     = 0x00000004,
        IRQ_TYPE_LEVEL_LOW      = 0x00000008,
        IRQ_TYPE_LEVEL_MASK     = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH),
        IRQ_TYPE_SENSE_MASK     = 0x0000000f,

        IRQ_TYPE_PROBE          = 0x00000010,
...
};
Even though gpio_irq_type(struct irq_data *d, unsigned type) has the right type
of parameter, the subsequent called functions set_gpio_triggering() and
set_gpio_trigger() wrongly makes it signed integer. Fix this.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-03-20 15:29:04 +05:30
Tarun Kanti DebBarma 381a752f29 gpio/omap: fix wakeup_en register update in _set_gpio_wakeup()
There are two ways through which wakeup_en register can be programmed
using gpiolib APIs as shown below. It is seen that in the second case
in _set_gpio_wakeup(), even though bank->suspend_wakeup is updated
correctly, its value is not programmed in wakeup_en register. Fix this.

irq_set_type()->gpio_irq_type()->_set_gpio_triggering()->set_gpio_trigger()
irq_set_wake()->gpio_wake_enable()->_set_gpio_wakeup()

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-03-20 15:28:58 +05:30
Tony Lindgren 8805f410e4 gpio/omap: Fix section warning for omap_mpuio_alloc_gc()
Make omap_mpuio_alloc_gc() __devinit as omap_gpio_chip_init()
is __devinit. Otherwise we get:

WARNING: vmlinux.o(.devinit.text+0xa10): Section mismatch in reference
from the function omap_gpio_chip_init() to the function .init.text:omap_mpuio_alloc_gc()
The function __devinit omap_gpio_chip_init() references
a function __init omap_mpuio_alloc_gc().
If omap_mpuio_alloc_gc is only used by omap_gpio_chip_init then
annotate omap_mpuio_alloc_gc with a matching annotation.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2012-03-12 11:44:46 -06:00
Kevin Hilman 68942edb09 gpio/omap: fix wakeups on level-triggered GPIOs
While both level- and edge-triggered GPIOs are capable of generating
interrupts, only edge-triggered GPIOs are capable of generating a
module-level wakeup to the PRCM (c.f. 34xx NDA TRM section 25.5.3.2.)

In order to ensure that devices using level-triggered GPIOs as
interrupts can also cause wakeups (e.g. from idle), this patch enables
edge-triggering for wakeup-enabled, level-triggered GPIOs when a GPIO
bank is runtime-suspended (which also happens during idle.)

This fixes a problem found in GPMC-connected network cards with GPIO
interrupts (e.g. smsc911x on Zoom3, Overo, ...) where network booting
with NFSroot was very slow since the GPIO IRQs used by the NIC were
not generating PRCM wakeups, and thus not waking the system from idle.
NOTE: until v3.3, this boot-time problem was somewhat masked because
the UART init prevented WFI during boot until the full serial driver
was available.  Preventing WFI allowed regular GPIO interrupts to fire
and this problem was not seen.  After the UART runtime PM cleanups, we
no longer avoid WFI during boot, so GPIO IRQs that were not causing
wakeups resulted in very slow IRQ response times.

Tested on platforms using level-triggered GPIOs for network IRQs using
the SMSC911x NIC: 3530/Overo and 3630/Zoom3.

Reported-by: Tony Lindgren <tony@atomide.com>
Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2012-03-12 10:16:11 -06:00
Benoit Cousson 25db711df3 gpio/omap: Fix IRQ handling for SPARSE_IRQ
The driver is still relying on internal OMAP IRQ defines that
are not relevant anymore if OMAP is built with SPARSE_IRQ.

Replace the defines with the proper IRQ base number.
Clean some comment style issue.
Remove some hidden and ugly cpu_class_is_omap1() inside the
gpio header.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
2012-03-05 23:02:53 +01:00
Benoit Cousson 384ebe1c28 gpio/omap: Add DT support to GPIO driver
Adapt the GPIO driver to retrieve information from a DT file.

Allocate the irq_base dynamically and rename bank->virtual_irq_start
to bank->irq_base.
Change irq_base type to int instead of u16 to match irq_alloc_descs
output.

Add documentation for GPIO properties specific to OMAP.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-03-05 23:02:53 +01:00
Benoit Cousson 96751fcbe5 gpio/omap: Use devm_ API and add request_mem_region
Replace the regular kzalloc and ioremap with the devm_ equivalent
to simplify error handling.

Add the missing devm_request_mem_region to reserve the region used
by the driver.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
2012-03-05 23:02:52 +01:00
Benoit Cousson 862ff64011 gpio/omap: Remove bank->id information and misc cleanup
The driver does not need anymore any id to identify the GPIO instance.
Remove every occurence of the bank->id inside the driver.

Remove two trailing spaces.
Add a dev variable for better readability in probe.
Remove unused variable bank->pbase.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
2012-03-05 23:02:51 +01:00
Nishanth Menon f86bcc302a gpio/omap: handle set_dataout reg capable IP on restore
GPIO IP revisions such as those used in OMAP4 have a set_dataout
while the previous revisions used a single dataout register.
Depending on what is available restore the dataout settings
to the right register.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 16:58:45 +05:30
Nishanth Menon 6d13eaaf33 gpio/omap: restore OE only after setting the output level
Setup the dataout register before restoring OE. This is to make
sure that we have valid data in dataout register which would be
made available in output pins as soon as OE is enabled. Else,
there is risk of unknown data getting out into gpio pins.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 16:57:29 +05:30
Nishanth Menon ba805be53c gpio/omap: enable irq at the end of all configuration in restore
Setup the interrupt enable registers only after we have configured the
required edge and required configurations, not before, to prevent
spurious events as part of restore routine.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 16:56:14 +05:30
Nishanth Menon ae547354a8 gpio/omap: save and restore debounce registers
GPIO debounce registers need to be saved and restored for proper functioning
of driver.

Signed-off-by: Nishanth Menon <nm@ti.com>
tarun.kanti@ti.com: Debounce context save is moved to _set_gpio_debounce()
as part of dynamic context save to remove overhead.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 16:54:37 +05:30
Tarun Kanti DebBarma 41d87cbd66 gpio/omap: remove omap_gpio_save_context overhead
Context is now saved dynamically in respective functions whenever and
whichever registers are modified. This avoid overhead of saving all
registers context in the runtime suspend callback.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 16:45:01 +05:30
Tarun Kanti DebBarma 6fd9c42164 gpio/omap: fix incorrect access of debounce module
Enable debounce clock before writing/reading debounce registers.
Disable the clock at the end so that it is synchronized with the
pm_runtime_get/put_sync calls.

Enable debounce clock per module. This call is mandatory because
in omap_gpio_request() when *_runtime_get_sync() is called,
_gpio_dbck_enable() within runtime callbck fails to turn on dbck
 because dbck_enable_mask used within _gpio_dbck_enable() is still
not initialized at that point. Therefore we have to enable dbck here.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 16:41:45 +05:30
Tarun Kanti DebBarma 72f83af998 gpio/omap: fix debounce clock handling
The dbck_enable_mask indicates which all GPIOs within a bank have debounce
enabled and dbck is enabled/disabled based upon this. But there is no
mechanism to track the dbck state. In order to manage the dbck state we need
additional flag and logic so that turning off/on dbck is synchronized with
pm_runtime_put/get_sync calls.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 16:41:35 +05:30
Tarun Kanti DebBarma 2dc983c565 gpio/omap: cleanup prepare_for_idle and resume_after_idle
Since *_prepare_for_idle() and *_resume_after_idle() are called
with interrupts disabled they should be kept as simple as possible.
So, moving most of the stuff to *_runtime_suspend/resume() callbacks.

To avoid invalid context restore happening in *_runtime_resume()
callback as a result of *_get_sync() call in *_gpio_probe(), update
bank->context_loss_count. This would make context restore condition
check false in the callback and skip restore until further
initialization take place. The workaround_enabled static variable
is now a member of struct gpio_bank.

Unlike most GPIO registers the OE has 0xffffffff as the default value.
To make sure invalid context is not restored, updating the OE context
with default value.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 16:40:48 +05:30
Tarun Kanti DebBarma 065cd795d2 gpio/omap: optimize suspend and resume functions
There is no need to operate on all the banks every time the function is called.
Just operate on the current bank passed by the framework.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:44 +05:30
Tarun Kanti DebBarma 55b93c3252 gpio/omap: use pm-runtime framework
Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put()
for enabling/disabling clocks appropriately. Remove syscore_ops and
instead use SET_RUNTIME_PM_OPS macro.

There is no more need to call omap_device_disable_idle_on_suspend
since driver is PM runtime adapted now.

Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:44 +05:30
Charulatha V d0d665a896 gpio/omap: remove bank->method & METHOD_* macros
The only bank->type (method) used in the OMAP GPIO driver is MPUIO type as they
need to be handled separately. Identify the same using a flag and remove all
METHOD_* macros.

mpuio_init() function is defined under #ifdefs. It is required only in case
of MPUIO bank type and only when PM operations are supported by it.
This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type.
For all the other cases it is a dummy function. Hence clean up the same
and remove all the OMAP SoC specific #ifdefs.

Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:43 +05:30
Tarun Kanti DebBarma d3901eaf1f gpio/omap: remove unnecessary bit-masking for read access
Remove un-necessary bit masking. Since the register are 4 byte aligned
and readl would work as is. The 'enabled' mask is already taking care
to mask for bank width.

Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:43 +05:30
Charulatha V fad96ea825 gpio/omap: use pinctrl offset instead of macro
Use regs->pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL

Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:43 +05:30
Tarun Kanti DebBarma ab985f0f7c gpio/omap: cleanup omap_gpio_mod_init function
With register offsets now defined for respective OMAP versions we can get rid
of cpu_class_* checks. This function now has common initialization code for
all OMAP versions. Initialization specific to OMAP16xx has been moved within
omap16xx_gpio_init().

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:42 +05:30
Tarun Kanti DebBarma 5e571f38f6 gpio/omap: cleanup set_gpio_triggering function
Getting rid of ifdefs within the function by adding register offset intctrl
and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files.
Also, use wkup_status register consistently instead of referring to wakeup
clear and wakeup set register offsets. Get rid of cpu_is_xxxx checks in
set_gpio_trigger() using irqctrl.

Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:42 +05:30
Tarun Kanti DebBarma ae10f2336b gpio/omap: remove hardcoded offsets in context save/restore
It is not required to use hard-coded offsets any more in context save and
restore functions and instead use the generic offsets which have been correctly
initialized during device registration.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:42 +05:30
Tarun Kanti DebBarma 9ea14d8cbb gpio/omap: use level/edge detect reg offsets
By adding level and edge detection register offsets and then initializing them
correctly according to OMAP versions during device registrations we can now remove
lot of revision checks in these functions.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:41 +05:30
Tarun Kanti DebBarma 6ed87c5b66 gpio/omap: further cleanup using wkup_en register
Wakeup enable register offset initialized according to OMAP versions
during device registration. Use this to avoid version checks.
Starting with OMAP4, legacy registers should not be used in combination
with the updated regsiters. Use wkup_en register consistently for
all SoCs wherever applicable.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:41 +05:30
Charulatha V c8eef65a2f gpio/omap: avoid cpu checks during module ena/disable
Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio
request/free.

Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:41 +05:30
Charulatha V 803a24343f gpio/omap: make non-wakeup GPIO part of pdata
Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making
non_wakeup_gpios as part of pdata.

Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:41 +05:30
Tarun Kanti DebBarma 60a3437dc9 gpio/omap: handle save/restore context in GPIO driver
Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle() functions
to handle save context & restore context respectively in the OMAP GPIO driver
itself instead of calling these functions from pm specific files.
For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in
gpio_resume_after_idle() call it again. If the count is different, do restore
context.

Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:40 +05:30
Charulatha V 6d62e216b2 gpio/omap: make gpio_context part of gpio_bank structure
Currently gpio_context array used to save gpio bank's context, is used only for
OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it
can be specific to each gpio bank and can be used for any OMAP architecture

Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:40 +05:30
Charulatha V 0cde8d03dd gpio/omap: use flag to identify wakeup domain
In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1
is in wakeup domain. Instead of identifying bank's power domain by bank id,
use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context()
during dev_init.

For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used.
omap_device_get_pwrdm() could not be used as the pwrdm information needs to be
filled in pdata, whereas omap_device_get_pwrdm() could be used only after
omap_device_build() call.

Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:40 +05:30
Charulatha V 03e128ca35 gpio/omap: remove dependency on gpio_bank_count
The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this
dependency from the driver by using list. Also remove the dependency on array of
pointers to gpio_bank struct of all GPIO devices.

Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-02-06 14:13:40 +05:30
Linus Torvalds 80f01ca1fc Merge branch 'gpio/merge' of git://git.secretlab.ca/git/linux-2.6
* 'gpio/merge' of git://git.secretlab.ca/git/linux-2.6:
  gpio: pca953x: propagate the errno from the chip_init functions
  gpio: pca953x: remove unneeded check for chip type
  gpio/omap: check return value from irq_alloc_generic_chip
  gpio/omap: replace MOD_REG_BIT macro with static inline
2011-11-15 14:45:50 -02:00
Linus Torvalds ca90666287 Merge branch 'gpio' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
* 'gpio' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: (43 commits)
  ARM: 7135/1: ep93xx: bring back missing <mach/gpio.h>
  ARM: 7104/1: plat-pxa: break out GPIO driver specifics
  ARM: 7103/1: plat-pxa: move PXA GPIO driver to GPIO subsystem
  ARM: 7042/3: mach-ep93xx: break out GPIO driver specifics
  ARM: 7101/1: arm/tegra: Replace <mach/gpio.h> with <mach/gpio-tegra.h>
  ARM: 7094/1: arm/tegra: Move EN_VDD_1V05_GPIO to board-harmony.h
  ARM: 7083/1: rewrite U300 GPIO to use gpiolib
  ARM: 7074/1: gpio: davinci: eliminate unused variable warnings
  ARM: 7063/1: Orion: gpio: add missing include of linux/types.h
  ARM: 7055/1: arm/tegra: mach/gpio.h: include linux/types.h to fix build
  ARM: 7054/1: arm/tegra: Delete custom gpio_to_irq, and irq_to_gpio
  ARM: 7053/1: gpio/tegra: Implement gpio_chip.to_irq
  ARM: 7052/1: gpio/tegra: Remove use of irq_to_gpio
  ARM: 7057/1: mach-pnx4008: rename GPIO header
  ARM: 7056/1: plat-nomadik: kill off <plat/gpio.h>
  ARM: 7050/1: mach-sa1100: delete irq_to_gpio() function
  ARM: 7049/1: mach-sa1100: move SA1100 GPIO driver to GPIO subsystem
  ARM: 7045/1: mach-lpc32xx: break out GPIO driver specifics
  ARM: 7044/1: mach-lpc32xx: move LPC32XX GPIO driver to GPIO subsystem
  ARM: 7043/1: mach-ixp2000: rename GPIO header
  ...

Fix up trivial conflicts in arch/arm/mach-u300/Kconfig manually
2011-10-27 08:39:10 +02:00
Janusz Krzysztofik 78a4315872 gpio/omap: fix build error with certain OMAP1 configs
With commit f64ad1a0e2, "gpio/omap: cleanup _set_gpio_wakeup(), remove
ifdefs", access to build time conditionally omitted 'suspend_wakeup'
member of the 'gpio_bank' structure has been placed unconditionally in
function _set_gpio_wakeup(), which is always built. This resulted in the
driver compilation broken for certain OMAP1, i.e., non-OMAP16xx,
configurations.

Really required or not in previously excluded cases, define this
structure member unconditionally as a fix.

Tested with a custom OMAP1510 only configuration.

Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-13 11:48:25 -06:00
Todd Poynor 832337490f gpio/omap: check return value from irq_alloc_generic_chip
Ensure return value of irq_alloc_generic_chip() is checked before continuing
on to use it.

Signed-off-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-08-23 10:53:00 -07:00
Kevin Hilman ece9528e5f gpio/omap: replace MOD_REG_BIT macro with static inline
This macro is ugly and confusing, especially since it passes in most
arguments, but uses an implied 'base' from the caller.

Replace it with an equivalent static inline.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-08-23 10:53:00 -07:00
Russell King 1bc857f700 ARM: gpio: omap: convert drivers to use asm/gpio.h rather than mach/gpio.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-08 14:27:44 +01:00
Linus Torvalds c7c8518498 Merge branch 'gpio/next' of git://git.secretlab.ca/git/linux-2.6
* 'gpio/next' of git://git.secretlab.ca/git/linux-2.6: (61 commits)
  gpio/mxc/mxs: fix build error introduced by the irq_gc_ack() renaming
  mcp23s08: add i2c support
  mcp23s08: isolate spi specific parts
  mcp23s08: get rid of setup/teardown callbacks
  gpio/tegra: dt: add binding for gpio polarity
  mcp23s08: remove unused work queue
  gpio/da9052: remove a redundant assignment for gpio->da9052
  gpio/mxc: add device tree probe support
  ARM: mxc: use ARCH_NR_GPIOS to define gpio number
  gpio/mxc: get rid of the uses of cpu_is_mx()
  gpio/mxc: add missing initialization of basic_mmio_gpio shadow variables
  gpio: Move mpc5200 gpio driver to drivers/gpio
  GPIO: DA9052 GPIO module v3
  gpio/tegra: Use engineering names in DT compatible property
  of/gpio: Add new method for getting gpios under different property names
  gpio/dt: Refine GPIO device tree binding
  gpio/ml-ioh: fix off-by-one for displaying variable i in dev_err
  gpio/pca953x: Deprecate meaningless device-tree bindings
  gpio/pca953x: Remove dynamic platform data pointer
  gpio/pca953x: Fix IRQ support.
  ...
2011-07-22 14:50:57 -07:00
Kevin Hilman e5ff4440cf gpio/omap: cleanup show revision, remove cpu_is checks, display only once
Remove cpu_is_* checks from gpio_show_revision() by passing in the
revision address offset from platform data.  SoCs with no revision
register (15xx, 7xx, and all MPUIOs) use -1 (actually, USHRT_MAX) to
signify no register.

While here, all GPIO banks are assumed to be the same revision, so fix
show_revision() to only show the revision for the first bank it finds.
This removes duplicate GPIO revision prints during boot.

Thanks to Charulatha V <charu@ti.com> for finding/fixing a few -1s
that were missed in the original patch.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:14:13 -07:00
Kevin Hilman 9942da0e4b gpio/omap: debounce remove SoC specific registers, use pdata
Use register offsets passed in from pdata for accessing debounce registers.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:14:09 -07:00
Kevin Hilman f64ad1a0e2 gpio/omap: cleanup _set_gpio_wakeup(), remove ifdefs
Make _set_gpio_wakeup() generic by removing ifdefs.  Code for the
various SoCs/bank-methods was already the same, except for the
non-wakeup GPIO checking.  But that flag is set on a per-SoC basis, so
can be used for all SoCs.

While here, use dev_err() and remove GPIO bank calculation assumption
based on subtracting bank pointers.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:14:05 -07:00
Kevin Hilman 7a6f8416e2 gpio/omap: remove useless gpio_valid() & check_gpio() checks
These functions are useless.  They are only called in a few places,
and where they are called, the GPIO has already been converted from an
IRQ or masked, so these functions will never fail.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:14:00 -07:00
Kevin Hilman f8b46b5834 gpio/omap: convert MPUIO IRQ over to generic irq_chip
MPUIO banks have their own dedicated IRQ chip interface, separate from
the "normal" GPIO banks.   Convert the MPUIO IRQ chip over to using
the new generic IRQ chip interface.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:13:54 -07:00
Kevin Hilman 28f3b5a073 gpio/omap: conslidate enable/disable of GPIO IRQs, remove ifdefs
Cleanup GPIO IRQ enable/disable handling by removing SoC-specific

Also split enable/disable IRQ into separate functions for better
readability and also facilitate potentially moving to generic irq_chip
in the future.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:13:51 -07:00
Kevin Hilman eef4bec7bf gpio/omap: consolidate IRQ status handling, remove #ifdefs
Cleanup IRQ status handling by passing IRQ status register offsets
via platform data.

Cleans up clearing of GPIO IRQ status and GPIO ISR handler.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:13:46 -07:00
Kevin Hilman fa87931acb gpio/omap: consolidate direction, input, output, remove #ifdefs
Add register offset fields to GPIO platform_data for registers.

This patch adds registers that control direction, input and output
data.  Using these register offsets in the common driver allows
removal of #ifdefs and greatly improves readability.

Also create dedicated data out functions: one for banks with dedicated
set/clear registers, and another for banks with a single mask
register.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:13:42 -07:00
Charulatha V a8be8dafd0 gpio/omap: remove get_gpio_bank()
use chip info to get the pointer to the struct gpio_bank for a
given GPIO bank and remove get_gpio_bank().

Signed-off-by: Charulatha V <charu@ti.com>
2011-06-16 11:13:37 -07:00
Kevin Hilman 129fd22307 gpio/omap: replace get_gpio_index() by using bank width
The get_gpio_index() function, littered with cpu_is_* checks can be easily
replaced by using bitops based on the GPIO bank width.  Do so.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:13:32 -07:00
Kevin Hilman c390aad033 gpio/omap: _get_gpio_irqbank_mask: replace hard-coded mask with bank->width
Replace hard-coded mask values with bank->width which is already coming
from platform_data.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:13:18 -07:00
Kevin Hilman d5f46247e7 gpio/omap: move bank width into struct gpio_bank
Rather than having a file-global bank_width variable, move it into
struct gpio_bank so it can be bank-specific.   Note the bank width
is already passed per-bank via platform_data, so current code would
be incorrect if any banks had different width.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:13:13 -07:00
Kevin Hilman bdba15db4d gpio/omap: remove MPUIO handling from _clear_gpio_irqbank()
Remove the OMAP1 #ifdef and MPUIO special case for _clear_gpio_irqbank()

The MPUIOs do not need a register access to ack/clear the IRQ status,
since reading the IRQ status clears it.  In addition, the MPUIO
irq_chip has an empty ack method, so _clear_gpio_irqbank() is never
used for MPUIOs.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:13:02 -07:00
Kevin Hilman df3c851716 gpio/omap: _clear_gpio_irqbank: fix flushing of posted write
In commit 78a1a6d341 (ARM: OMAP4: Update
the GPIO support) braces were mistakenly added to included the
register read-back inside the cpu_is_* checking.

Remove the braces, ensuring that a register read-back is done, even
when the IRQSTATUS2 register is not written.

Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2
depending on the CPU, but a read-back of any register in that region
will cause a flush of the posted writes.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-16 11:12:42 -07:00
Ambresh K 55b220cafa gpio/omap4: Fix missing interrupts during device wakeup due to IOPAD.
If gpio pins from bank[2-5] are marked as wakeup enable and if the wake is
through gpio IO pad wakeup, then that wakeup gpio interrupt is lost.

In the current implementation, GPIO driver stores the context of DATAIN of
all the gpio in the bank. During GPIO resuming, it checks DATAIN with wakeup
enabled pins of gpio bank. If there is status change, then manually toggle
GPIO_LEVELDETECT to generate pseudo interrupt.

Reported-by: Philippe Mazet <p-mazet@ti.com>
Tested-by: Philippe Mazet <p-mazet@ti.com>
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-16 08:40:43 -06:00
Colin Cross 85ec7b9705 GPIO: OMAP: add locking around calls to _set_gpio_triggering
_set_gpio_triggering uses read-modify-write on bank registers,
lock bank->lock around all calls to it to prevent register
corruption if two cpus access gpios in the same bank at the
same time.

Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-06 16:12:34 -07:00
Colin Cross 0622b25bf0 GPIO: OMAP: fix setting IRQWAKEN bits for OMAP4
Setting the IRQWAKEN bit was overwriting previous IRQWAKEN bits,
causing only the last bit set to take effect, resulting in lost
wakeups when the GPIO controller is in idle.

Replace direct writes to IRQWAKEN with MOD_REG_BIT calls to
perform a read-modify-write on the register.

Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-06 16:12:23 -07:00
Russell King d52b31deff GPIO: OMAP: fix section mismatch warnings
WARNING: arch/arm/plat-omap/built-in.o(.devinit.text+0x46c): Section mismatch in reference from the function omap_gpio_probe() to the function .init.text:omap_gpio_chip_init()
The function __devinit omap_gpio_probe() references
a function __init omap_gpio_chip_init().
If omap_gpio_chip_init is only used by omap_gpio_probe then
annotate omap_gpio_chip_init with a matching annotation.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-06-06 16:11:55 -07:00
Kevin Hilman e5cdb13ff9 GPIO: OMAP: move to drivers/gpio
Move OMAP GPIO driver to drivers/gpio.  Builds whenever
CONFIG_ARCH_OMAP=y.

Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-05-27 08:43:34 -07:00