Commit Graph

70 Commits

Author SHA1 Message Date
Steve Longerbeam 4cea940d34 gpu: ipu-v3: Add helper function checking if pixfmt is planar
Add simple helper function returning true if passed pixel format is one
of supported planar ones.

Signed-off-by: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:47 +02:00
Steve Longerbeam f835f386a1 gpu: ipu-v3: Add rotation mode conversion utilities
Add two functions:

- ipu_degrees_to_rot_mode(): converts a degrees, hflip, and vflip setting
  to an IPU rotation mode.
- ipu_rot_mode_to_degrees(): converts an IPU rotation mode with given hflip
  and vflip settings to degrees.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:46 +02:00
Steve Longerbeam ae0e9708b3 gpu: ipu-v3: Add ipu_mbus_code_to_colorspace()
Add ipu_mbus_code_to_colorspace() to find ipu_color_space from a
media bus pixel format code.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:45 +02:00
Steve Longerbeam a2be35e332 gpu: ipu-v3: smfc: Add ipu_smfc_set_watermark()
Adds ipu_smfc_set_watermark() which programs a channel's SMFC FIFO
levels at which the watermark signal is set and cleared.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:45 +02:00
Steve Longerbeam 7fafa8f06f gpu: ipu-v3: smfc: Convert to per-channel
Convert the smfc object to be specific to a single smfc channel.
Add ipu_smfc_{get|put} to retrieve and release a single smfc channel
for exclusive use, and add use counter to ipu_smfc_{enable|disable}.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:44 +02:00
Steve Longerbeam fc4353559e gpu: ipu-v3: smfc: Move enable/disable to ipu-smfc.c
Move the SMFC module enable/disable helpers into the ipu-smfc submodule.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:43 +02:00
Steve Longerbeam 1aa8ea0d2b gpu: ipu-v3: Add Image Converter unit
Adds the Image Converter (IC) unit.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>

Condensed the three CSC setup functions into a single one that
uses static tables to set up the CSC task parameters.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:43 +02:00
Steve Longerbeam 2ffd48f2e7 gpu: ipu-v3: Add Camera Sensor Interface unit
Adds the Camera Sensor Interface (CSI) unit required for video capture.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>

Removed the unused clk_get_rate in ipu_csi_init_interface and the
ipu_csi_ccir_err_detection_enable/disable functions.
Checkpatch cleanup.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:42 +02:00
Fabio Estevam e68885e24a gpu: ipu-v3: ipu-smfc: Do not leave DEBUG defined
Let's only define DEBUG for debugging purpose and not by default to avoid
printing debugging message unnecessarily.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 11:13:48 +02:00
Axel Lin e4946cdcab gpu: ipu-v3: Return proper error on ipu_add_client_devices error path
Avoid returning an uninitialized variable in the error path.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 10:43:15 +02:00
Axel Lin b6c044a3d8 gpu: ipu-v3: Select GENERIC_IRQ_CHIP to fix build error
This driver uses GENERIC_IRQ_CHIP, so it needs to select GENERIC_IRQ_CHIP to
avoid build error.

Fixes below build errors:
ERROR: "irq_alloc_domain_generic_chips" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_mask_clr_bit" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_mask_set_bit" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_generic_chip_ops" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_ack_set_bit" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_get_domain_generic_chip" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 10:42:59 +02:00
Steve Longerbeam c2d670fd3b gpu: ipu-v3: Rename and add IDMAC channels
Rename the ENC/VF/PP rotation channel names, to be more consistent
with the convention that *_MEM is write-to-memory channels and
MEM_* is read-from-memory channels. Also add the channels who's
source and destination is the IC.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-08-18 14:17:48 +02:00
Steve Longerbeam ba07975f0f gpu: ipu-v3: Add functions to set CSI/IC source muxes
Adds two new functions, ipu_set_csi_src_mux() and ipu_set_ic_src_mux(),
that select the inputs to the CSI and IC respectively. Both muxes are
programmed in the IPU_CONF register.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-08-18 14:17:47 +02:00
Steve Longerbeam 7d2691da90 gpu: ipu-v3: Add ipu-cpmem unit
Move channel parameter memory setup functions and macros into a new
submodule ipu-cpmem. In the process, cleanup arguments to the functions
to take a channel pointer instead of a pointer into cpmem for that
channel. That allows the structure of the parameter memory to be
private to ipu-cpmem.c.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-08-18 14:17:41 +02:00
Linus Torvalds 682b7c1c8e Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
 "This is the main drm merge window pull request, changes all over the
  place, mostly normal levels of churn.

  Highlights:

  Core drm:
     More cleanups, fix race on connector/encoder naming, docs updates,
     object locking rework in prep for atomic modeset

  i915:
     mipi DSI support, valleyview power fixes, cursor size fixes,
     execlist refactoring, vblank improvements, userptr support, OOM
     handling improvements

  radeon:
     GPUVM tuning and large page size support, gart fixes, deep color
     HDMI support, HDMI audio cleanups

  nouveau:
     - displayport rework should fix lots of issues
     - initial gk20a support
     - gk110b support
     - gk208 fixes

  exynos:
     probe order fixes, HDMI changes, IPP consolidation

  msm:
     debugfs updates, misc fixes

  ast:
     ast2400 support, sync with UMS driver

  tegra:
     cleanups, hdmi + hw cursor for Tegra 124.

  panel:
     fixes existing panels add some new ones.

  ipuv3:
     moved from staging to drivers/gpu"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (761 commits)
  drm/nouveau/disp/dp: fix tmds passthrough on dp connector
  drm/nouveau/dp: probe dpcd to determine connectedness
  drm/nv50-: trigger update after all connectors disabled
  drm/nv50-: prepare for attaching a SOR to multiple heads
  drm/gf119-/disp: fix debug output on update failure
  drm/nouveau/disp/dp: make use of postcursor when its available
  drm/g94-/disp/dp: take max pullup value across all lanes
  drm/nouveau/bios/dp: parse lane postcursor data
  drm/nouveau/dp: fix support for dpms
  drm/nouveau: register a drm_dp_aux channel for each dp connector
  drm/g94-/disp: add method to power-off dp lanes
  drm/nouveau/disp/dp: maintain link in response to hpd signal
  drm/g94-/disp: bash and wait for something after changing lane power regs
  drm/nouveau/disp/dp: split link config/power into two steps
  drm/nv50/disp: train PIOR-attached DP from second supervisor
  drm/nouveau/disp/dp: make use of existing output data for link training
  drm/gf119/disp: start removing direct vbios parsing from supervisor
  drm/nv50/disp: start removing direct vbios parsing from supervisor
  drm/nouveau/disp/dp: maintain receiver caps in response to hpd signal
  drm/nouveau/disp/dp: create subclass for dp outputs
  ...
2014-06-12 11:32:30 -07:00
Philipp Zabel d6ca8ca7ec gpu: ipu-v3: Register the CSI modules
This patch registers the two CSI platform devices per IPU.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-06-04 11:07:12 +02:00
Philipp Zabel 3f5a8a946d gpu: ipu-v3: Add CSI and SMFC module enable wrappers
IPU_CONF_..._EN bits are implementation details, not to be made public.
Add wrappers around ipu_module_enable/disable, so the CSI V4L2 driver
can enable/disable the CSI and SMFC modules.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-06-04 11:07:11 +02:00
Philipp Zabel e90460970f gpu: ipu-v3: Add ipu_idmac_get_current_buffer function
This function returns the currently active buffer (0 or 1)
of a double buffered IDMAC channel. It is to be used by the
CSI driver.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-06-04 11:07:11 +02:00
Philipp Zabel 35de925ffa gpu: ipu-v3: Add SMFC code
The Sensor Multi Fifo Controller (SMFC) is used as a buffer between
the two CSIs (writing simultaneously) and up to four IDMAC channels.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-06-04 11:07:10 +02:00
Philipp Zabel 39b9004d1f gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging
The i.MX Image Processing Unit (IPU) contains a number of image processing
blocks that sit right in the middle between DRM and V4L2. Some of the modules,
such as Display Controller, Processor, and Interface (DC, DP, DI) or CMOS
Sensor Interface (CSI) and their FIFOs could be assigned to either framework,
but others, such as the dma controller (IDMAC) and image converter (IC) can
be used by both.
The IPUv3 core driver provides an internal API to access the modules, to be
used by both DRM and V4L2 IPUv3 drivers.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-06-04 11:06:52 +02:00