mirror of https://gitee.com/openkylin/linux.git
3cea71bc6b
Currently there is no dsb between the tlbi in __cpu_setup and the write to SCTLR_EL1 which enables the MMU in __turn_mmu_on. This means that the TLB invalidation is not guaranteed to have completed at the point address translation is enabled, leading to a number of possible issues including incorrect translations and TLB conflict faults. This patch moves the tlbi in __cpu_setup above an existing dsb used to synchronise I-cache invalidation, ensuring that the TLBs have been invalidated at the point the MMU is enabled. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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.. | ||
Makefile | ||
cache.S | ||
context.c | ||
copypage.c | ||
dma-mapping.c | ||
extable.c | ||
fault.c | ||
flush.c | ||
hugetlbpage.c | ||
init.c | ||
ioremap.c | ||
mm.h | ||
mmap.c | ||
mmu.c | ||
pgd.c | ||
proc-macros.S | ||
proc.S | ||
tlb.S |