linux/drivers/clk/imx
Leonard Crestez f89b9e1be7 clk: imx: Fix PLL_1416X not rounding rates
Code which initializes the "clk_init_data.ops" checks pll->rate_table
before that field is ever assigned to so it always picks
"clk_pll1416x_min_ops".

This breaks dynamic rate rounding for features such as cpufreq.

Fix by checking pll_clk->rate_table instead, here pll_clk refers to
the constant initialization data coming from per-soc clk driver.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Fixes: 8646d4dcc7 ("clk: imx: Add PLLs driver for imx8mm soc")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-12 14:21:43 -07:00
..
Kconfig clk: imx: Add clock driver support for imx8mm 2019-02-21 12:41:16 -08:00
Makefile clk: imx: Add clock driver support for imx8mm 2019-02-21 12:41:16 -08:00
clk-busy.c clk: imx: make mux parent strings const 2018-12-03 11:31:36 -08:00
clk-composite-7ulp.c clk: imx: add imx7ulp composite clk support 2018-12-03 11:31:36 -08:00
clk-composite-8m.c clk: imx: Make parent_names const pointer in composite-8m 2019-02-21 12:41:16 -08:00
clk-cpu.c clk: imx: cpu clock should be always critical 2018-10-17 08:26:03 -07:00
clk-divider-gate.c clk: imx: add gatable clock divider support 2018-12-03 11:31:23 -08:00
clk-fixup-div.c clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h 2016-01-29 12:59:50 -08:00
clk-fixup-mux.c clk: imx: make mux parent strings const 2018-12-03 11:31:36 -08:00
clk-frac-pll.c clk: imx: Fix fractional clock set rate computation 2019-01-24 11:17:28 -08:00
clk-gate-exclusive.c clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h 2016-01-29 12:59:50 -08:00
clk-gate2.c clk: imx: make clk_ops const 2017-11-01 23:25:49 -07:00
clk-imx1.c ARM: i.MX: Remove i.MX1 non-DT support 2016-08-09 22:47:26 +08:00
clk-imx6q.c Merge branches 'clk-of-refcount', 'clk-mmio-fixed-clock', 'clk-remove-clps', 'clk-socfpga-parent' and 'clk-struct-size' into clk-next 2019-03-08 10:26:59 -08:00
clk-imx6sl.c clk: imx6sl: ensure MMDC CH0 handshake is bypassed 2018-12-10 11:34:21 -08:00
clk-imx6sll.c clk: imx6sll: add mmdc1 ipg clock 2018-10-17 11:15:44 -07:00
clk-imx6sx.c clk: imx6sx: fix refcount leak in imx6sx_clocks_init() 2018-12-28 11:40:25 -08:00
clk-imx6ul.c clk: imx6ul: add mmdc1 ipg clock 2018-10-17 11:15:20 -07:00
clk-imx7d.c Merge branches 'clk-of-refcount', 'clk-mmio-fixed-clock', 'clk-remove-clps', 'clk-socfpga-parent' and 'clk-struct-size' into clk-next 2019-03-08 10:26:59 -08:00
clk-imx7ulp.c clk: imx: imx7ulp: use struct_size() in kzalloc() 2019-01-24 11:37:46 -08:00
clk-imx8mm.c clk: imx: imx8mm: Mark init function __init 2019-02-21 15:29:10 -08:00
clk-imx8mq.c clk: imx8mq: add GPIO clocks to clock tree 2019-02-28 10:28:28 -08:00
clk-imx8qxp-lpcg.c clk: imx: fix potential NULL dereference in imx8qxp_lpcg_clk_probe() 2019-01-09 10:34:54 -08:00
clk-imx8qxp-lpcg.h clk: imx: add imx8qxp lpcg driver 2018-12-14 13:01:14 -08:00
clk-imx8qxp.c clk: imx: scu: add fallback compatible string support 2019-02-21 12:41:16 -08:00
clk-imx21.c clk: i.MX: Remove clk.h include 2015-07-20 10:52:49 -07:00
clk-imx25.c clk: imx25: Remove osc clock from driver 2015-11-25 11:49:42 +08:00
clk-imx27.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
clk-imx31.c ARM: clk: imx31: properly init clocks for machines with DT 2016-11-01 16:44:46 +08:00
clk-imx35.c ARM: clk-imx35: annotate clk enum with number values 2016-09-14 11:28:04 -07:00
clk-imx51-imx53.c clk: imx5: add imx5_SCC2_IPG_GATE 2019-02-21 12:41:16 -08:00
clk-lpcg-scu.c clk: imx: add lpcg clock support 2018-12-14 13:00:51 -08:00
clk-pfd.c clk: i.MX: Remove clk.h include 2015-07-20 10:52:49 -07:00
clk-pfdv2.c clk: imx: add pfdv2 support 2018-12-03 11:31:32 -08:00
clk-pll14xx.c clk: imx: Fix PLL_1416X not rounding rates 2019-04-12 14:21:43 -07:00
clk-pllv1.c We have two changes to the core framework this time around. The first being a 2017-11-17 20:04:24 -08:00
clk-pllv2.c clk: imx: pllv2: avoid using uninitialized values 2018-03-16 15:40:41 -07:00
clk-pllv3.c clk: imx7d: Fix the DDR PLL enable bit 2017-06-06 17:42:41 -07:00
clk-pllv4.c clk: imx: add pllv4 support 2018-12-03 11:31:28 -08:00
clk-sccg-pll.c clk: imx: Refactor entire sccg pll clk 2019-02-26 10:09:31 -08:00
clk-scu.c clk: imx: scu: add cpu frequency scaling support 2019-02-26 10:03:38 -08:00
clk-scu.h clk: imx: scu: add set parent support 2019-02-21 12:41:16 -08:00
clk-vf610.c clk: vf610: fix refcount leak in vf610_clocks_init() 2018-12-28 11:40:59 -08:00
clk.c clk: imx: implement new clk_hw based APIs 2018-12-03 11:31:36 -08:00
clk.h clk: imx: Refactor entire sccg pll clk 2019-02-26 10:09:31 -08:00