linux/drivers/gpu
Sylwester Nawrocki e5f8683923 drm/exynos: rework fimc clocks handling
The clocks handling is refactored and a "mux" clock handling is
added to account for changes in the clocks driver. After switching
to the common clock framework the sclk_fimc clock is now split
into two clocks: a gate and a mux clock. In order to retain the
exisiting functionality two additional consumer clocks are passed
to the driver from device tree: "mux" and "parent". Then the driver
sets "parent" clock as a parent clock of the "mux" clock. These two
additional clocks are optional, and should go away when there is a
standard way of setting up parent clocks on DT platforms.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2013-04-29 14:35:32 +09:00
..
drm drm/exynos: rework fimc clocks handling 2013-04-29 14:35:32 +09:00
host1x drm/tegra: don't depend on OF 2013-04-22 12:40:56 +02:00
vga fbcon: fix locking harder 2013-02-08 12:02:43 +10:00
Makefile gpu: host1x: Add host1x driver 2013-04-22 12:32:40 +02:00