[sh4] sleep instruction

This patch adds sleep instruction.

(Shin-ichiro KAWASAKI)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5065 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-08-22 08:57:27 +00:00
parent f3d8b1eb10
commit 833ed38689
5 changed files with 17 additions and 2 deletions

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@ -117,6 +117,7 @@ typedef struct CPUSH4State {
CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */ CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */
tlb_t itlb[ITLB_SIZE]; /* instruction translation table */ tlb_t itlb[ITLB_SIZE]; /* instruction translation table */
void *intc_handle; void *intc_handle;
int intr_at_halt; /* SR_BL ignored during sleep */
} CPUSH4State; } CPUSH4State;
CPUSH4State *cpu_sh4_init(const char *cpu_model); CPUSH4State *cpu_sh4_init(const char *cpu_model);

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@ -41,6 +41,7 @@ static inline int cpu_halted(CPUState *env) {
return 0; return 0;
if (env->interrupt_request & CPU_INTERRUPT_HARD) { if (env->interrupt_request & CPU_INTERRUPT_HARD) {
env->halted = 0; env->halted = 0;
env->intr_at_halt = 1;
return 0; return 0;
} }
return EXCP_HALTED; return EXCP_HALTED;

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@ -87,9 +87,10 @@ void do_interrupt(CPUState * env)
if (do_exp && env->exception_index != 0x1e0) { if (do_exp && env->exception_index != 0x1e0) {
env->exception_index = 0x000; /* masked exception -> reset */ env->exception_index = 0x000; /* masked exception -> reset */
} }
if (do_irq) { if (do_irq && !env->intr_at_halt) {
return; /* masked */ return; /* masked */
} }
env->intr_at_halt = 0;
} }
if (do_irq) { if (do_irq) {

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@ -1091,6 +1091,13 @@ void OPPROTO op_debug(void)
cpu_loop_exit(); cpu_loop_exit();
} }
void OPPROTO op_sleep(void)
{
env->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit();
}
/* Load and store */ /* Load and store */
#define MEMSUFFIX _raw #define MEMSUFFIX _raw
#include "op_mem.c" #include "op_mem.c"

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@ -298,7 +298,12 @@ void _decode_opc(DisasContext * ctx)
case 0x0009: /* nop */ case 0x0009: /* nop */
return; return;
case 0x001b: /* sleep */ case 0x001b: /* sleep */
assert(0); /* XXXXX */ if (ctx->memidx) {
gen_op_sleep();
} else {
gen_op_raise_illegal_instruction();
ctx->bstate = BS_EXCP;
}
return; return;
} }