mirror of https://gitee.com/openkylin/qemu.git
ARM shift fix (Paul Brook)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1167 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -485,6 +485,11 @@ void OPPROTO op_rorl_T1_im(void)
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T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
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T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
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}
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}
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void OPPROTO op_rrxl_T1(void)
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{
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T1 = ((uint32_t)T1 >> 1) | ((uint32_t)env->CF << 31);
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}
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/* T1 based, set C flag */
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/* T1 based, set C flag */
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void OPPROTO op_shll_T1_im_cc(void)
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void OPPROTO op_shll_T1_im_cc(void)
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{
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{
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@ -512,6 +517,14 @@ void OPPROTO op_rorl_T1_im_cc(void)
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T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
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T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
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}
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}
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void OPPROTO op_rrxl_T1_cc(void)
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{
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uint32_t c;
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c = T1 & 1;
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T1 = ((uint32_t)T1 >> 1) | ((uint32_t)env->CF << 31);
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env->CF = c;
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}
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/* T2 based */
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/* T2 based */
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void OPPROTO op_shll_T2_im(void)
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void OPPROTO op_shll_T2_im(void)
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{
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{
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@ -365,6 +365,11 @@ static void disas_arm_insn(DisasContext *s)
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} else {
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} else {
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gen_shift_T1_im[shiftop](shift);
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gen_shift_T1_im[shiftop](shift);
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}
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}
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} else if (shiftop == 3) {
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if (logic_cc)
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gen_op_rrxl_T1_cc();
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else
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gen_op_rrxl_T1();
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}
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}
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} else {
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} else {
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rs = (insn >> 8) & 0xf;
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rs = (insn >> 8) & 0xf;
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