mirror of https://gitee.com/openkylin/qemu.git
37a011e9ba
The UART IRQ is edge sensitive, whereas the machine was registering it as level sensitive. Fix. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> |
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Makefile.objs | ||
boot.c | ||
boot.h | ||
petalogix_ml605_mmu.c | ||
petalogix_s3adsp1800_mmu.c | ||
pic_cpu.c | ||
pic_cpu.h |