DingDing
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9ff2905551
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Update prefix.py
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2023-02-24 19:43:46 +08:00 |
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Achazwl
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35e51713b6
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fix bitfit
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2022-11-20 02:19:25 +00:00 |
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shengdinghu
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ce7f992864
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support bmtrain
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2022-10-23 08:42:21 +00:00 |
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shengdinghu
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e0de6b02ad
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temporary add
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2022-10-20 10:16:05 +00:00 |
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shengdinghu
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3867c0d8dc
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merge parallel-adapter succeed
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2022-10-17 08:44:44 +00:00 |
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shengdinghu
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26e45110b2
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merge parallel adapter
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2022-10-17 06:46:30 +00:00 |
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shengdinghu
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c161440867
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merge parallel adapter
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2022-10-17 06:37:17 +00:00 |
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shengdinghu
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9587a5e930
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v0.3 updates
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2022-10-14 15:15:38 +00:00 |
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shengdinghu
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cf9f30f1fa
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re-implement common structure and pseudo_inputs
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2022-10-11 17:36:38 +00:00 |
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DingDing
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f6f3b01916
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Merge branch 'delta_center_dev' into check_pr_33
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2022-10-10 13:06:38 +08:00 |
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HirasawaaYui
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2351259ecd
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update #31
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2022-10-10 03:23:14 +00:00 |
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Achazwl
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739bebbb8c
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init
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2022-09-03 10:12:12 +00:00 |
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shengdinghu
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b9a0f7cf89
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small update in save_and_load
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2022-07-06 14:00:58 +00:00 |
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shengdinghu
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617955e08e
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update_from_finetuned
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2022-07-01 22:23:02 +08:00 |
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shengdinghu
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9a385f8359
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fixissue
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2022-06-06 21:10:49 +08:00 |
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shengdinghu
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27de7e0ac6
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fixbug
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2022-06-06 16:21:55 +08:00 |
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DingDing
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211dce1b9d
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Merge pull request #16 from ShengdingHu/v1.0.0
update seq2seq examples
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2022-05-11 06:49:44 +08:00 |
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shengdinghu
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84f70b2f07
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update seq2seq examples
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2022-05-11 06:47:53 +08:00 |
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DingDing
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b3935927dc
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Merge pull request #13 from ShengdingHu/v1.0.0
V1.0.0 prepare1
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2022-04-22 19:38:20 +08:00 |
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shengdinghu
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42747f2b81
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update examples
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2022-04-22 19:18:25 +08:00 |
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shengdinghu
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0de3cbd31d
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example_prompt_unify
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2022-04-18 23:28:13 +08:00 |
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DingDing
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b6e522318f
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Update lora.py
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2022-04-14 14:33:03 +08:00 |
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shengdinghu
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6ebfab4a12
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search
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2022-04-14 11:22:41 +08:00 |
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DingDing
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703bc932ea
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Merge pull request #9 from Maxpa1n/main
fix args type
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2022-03-21 21:39:52 +08:00 |
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DingDing
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a14c19e8dc
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Merge branch 'main' into main
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2022-03-21 21:36:12 +08:00 |
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shengdinghu
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f8a5b08844
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v0.0.3
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2022-03-20 10:48:49 +08:00 |
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Maxpa1n
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943f040fd7
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fix args type
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2022-03-19 15:04:42 +08:00 |
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DingDing
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0406866c25
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Merge branch 'thunlp:main' into main
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2022-03-13 22:12:26 +08:00 |
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shengdinghu
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266a00e390
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merge parallel
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2022-03-13 22:04:38 +08:00 |
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shengdinghu
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95590e2d12
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add bmtrain
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2022-03-13 01:21:55 +08:00 |
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Achazwl
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0d38e6509f
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init
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2022-02-26 09:00:12 +08:00 |
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Achazwl
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3468eb872c
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PA init
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2022-02-24 23:21:31 +08:00 |
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Achazwl
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c2e086c6ed
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lora
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2022-02-20 17:24:59 +08:00 |
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shengdinghu
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b856ad0fb9
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first commit
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2022-02-14 21:19:03 +08:00 |