ASoC: SOF: Intel: HDA: use macro for register polling retry count
Define macro and use it for the register polling retry count. Signed-off-by: Keyon Jie <yang.jie@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20191025224122.7718-12-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -323,12 +323,11 @@ int hda_dsp_set_power_state(struct snd_sof_dev *sdev,
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enum sof_d0_substate d0_substate)
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{
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struct hdac_bus *bus = sof_to_bus(sdev);
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int retry = 50;
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int ret;
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u8 value;
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/* Write to D0I3C after Command-In-Progress bit is cleared */
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ret = hda_dsp_wait_d0i3c_done(sdev, retry);
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ret = hda_dsp_wait_d0i3c_done(sdev, HDA_DSP_REG_POLL_RETRY_COUNT);
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if (ret < 0) {
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dev_err(bus->dev, "CIP timeout before D0I3C update!\n");
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return ret;
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@ -339,8 +338,7 @@ int hda_dsp_set_power_state(struct snd_sof_dev *sdev,
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snd_hdac_chip_updateb(bus, VS_D0I3C, SOF_HDA_VS_D0I3C_I3, value);
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/* Wait for cmd in progress to be cleared before exiting the function */
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retry = 50;
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ret = hda_dsp_wait_d0i3c_done(sdev, retry);
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ret = hda_dsp_wait_d0i3c_done(sdev, HDA_DSP_REG_POLL_RETRY_COUNT);
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if (ret < 0) {
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dev_err(bus->dev, "CIP timeout after D0I3C update!\n");
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return ret;
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@ -214,6 +214,7 @@
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#define HDA_DSP_CTRL_RESET_TIMEOUT 100
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#define HDA_DSP_WAIT_TIMEOUT 500 /* 500 msec */
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#define HDA_DSP_REG_POLL_INTERVAL_US 500 /* 0.5 msec */
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#define HDA_DSP_REG_POLL_RETRY_COUNT 50
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#define HDA_DSP_ADSPIC_IPC 1
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#define HDA_DSP_ADSPIS_IPC 1
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