We currently change the macro name for fu540 and fu740 by adding the
prefix respectively, the dt-bindings should be modified as well.
Signed-off-by: Zong Li <zong.li@sifive.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/f9284873c2993a9952d9fe4f8dd5e89f20daab75.1646388139.git.zong.li@sifive.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
We no longer have users for the compatibility clocks and we can drop them.
These are old duplicate clocks for what we using.
Depends-on: 31aa7056bb ("ARM: dts: Don't use legacy clock defines for dra7 clkctrl")
Depends-on: 9206a3af4f ("clk: ti: Move dra7 clock devices out of the legacy section")
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20220203085618.16043-4-tony@atomide.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
We no longer have users for the compatibility clocks and we can drop them.
These are old duplicate clocks for what we using.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20220203085618.16043-3-tony@atomide.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
We no longer have users for the compatibility clocks and we can drop them.
These are old duplicate clocks for what we using.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20220203085618.16043-2-tony@atomide.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add all clock outputs for the StarFive JH7100 audio clock generator.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20220126173953.1016706-4-kernel@esmil.dk
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
For spdx, first line /* */ for *.h, change tab to space
Replacements
devider to divider
Comunications to Communications
periphrals to peripherals
supportted to supported
wich to which
Documentatoin to Documentation
Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220309222302.1114561-1-trix@redhat.com
Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver.
Define CE5_SRC is not used so it's OK to change and we align it to
the QSDK naming.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226135235.10051-12-ansuelsmth@gmail.com
Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM6350 SoCs.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220222011534.3502-3-konrad.dybcio@somainline.org
Add i.MX93 clock definition
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220228020908.2810346-3-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Add NAND support. The sama7g5's SMC IP is the same as sama5d2's with
a slightly change: it provides a synchronous clock output (SMC clock)
that is dedicated to FPGA usage. Since this doesn't interfere with the SMC
NAND configuration, thus code will not be added in the current nand driver
to address the FPGA usage, use the sama5d2's compatible and choose not to
introduce dedicated compatibles for sama7g5.
Tested with Micron MT29F4G08ABAEAWP NAND flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
[nicolas.ferre@microchip.com: add the definition of PMC_MCK1 in
include/dt-bindings/clock/at91.h from another patch]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220111130556.905978-1-tudor.ambarus@microchip.com
- Document the use of the renesas-soc IRC channel,
- Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18 (take two)
- Document the use of the renesas-soc IRC channel,
- Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: dts: renesas: Align GPIO hog names with dtschema
arm64: dts: renesas: Align GPIO hog names with dtschema
arm64: dts: renesas: rzg2lc-smarc-som: Enable watchdog
ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 60s timeout
ARM: dts: r9a06g032: Add the watchdog nodes
dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
arm64: dts: renesas: spider-cpu: Enable watchdog timer
arm64: dts: renesas: r8a779f0: Add RWDT node
MAINTAINERS: Specify IRC channel for Renesas ARM64 port
MAINTAINERS: Specify IRC channel for Renesas ARM32 port
arm64: dts: renesas: ulcb-kf: fix wrong comment
Link: https://lore.kernel.org/r/cover.1645784466.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- External interrupt (INTC-EX) support for the R-Car V3U SoC,
- Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
RZ/V2L SMARC EVK development boards,
- Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
and Condor development boards,
- NAND support for the RZ/N1D SoC,
- DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
- LVDS support for the R-Car M3-W+ SoC,
- HDMI output and 9-axis sensor support for the Kingfisher (ULCB
extension) board,
- MAX96712 GMSL serializer support for the Falcon development board,
- MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
SoCs,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18
- External interrupt (INTC-EX) support for the R-Car V3U SoC,
- Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
RZ/V2L SMARC EVK development boards,
- Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
and Condor development boards,
- NAND support for the RZ/N1D SoC,
- DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
- LVDS support for the R-Car M3-W+ SoC,
- HDMI output and 9-axis sensor support for the Kingfisher (ULCB
extension) board,
- MAX96712 GMSL serializer support for the Falcon development board,
- MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits)
arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
arm64: dts: renesas: rzg2lc-smarc-som: Enable eMMC on SMARC platform
arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK
arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC
dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
arm64: dts: renesas: ulcb/ulcb-kf: switch to use audio-graph-card2 for sound
arm64: dts: renesas: rcar-gen3: Add MOST devices
arm64: dts: renesas: Miscellaneous whitespace fixes
arm64: dts: renesas: falcon-csi-dsi: Add and connect MAX96712
arm64: dts: renesas: ulcb-kf: Add 9-asix sensor device
arm64: dts: renesas: ulcb-kf: Add KF HDMI output
arm64: dts: renesas: r8a77961: Add lvds0 device node
arm64: dts: renesas: r8a779f0: Add sys-dmac nodes
ARM: dts: r9a06g032: Describe the NAND controller
arm64: dts: renesas: Add GMSL cameras .dtsi
...
Link: https://lore.kernel.org/r/cover.1644587200.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the clocks and resets used by the PCIe hardware found on
Tegra234 SoCs.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add clocks, power-domain and memory bindings to support APE subsystem
on Tegra234.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
These new RTC variants all have a single alarm, like the R40 variant.
For the new SoCs, start requiring a complete list of input clocks. The
H616 has three required clocks. The R329 also has three required clocks
(but one is different), plus an optional crystal oscillator input. The
D1 RTC is identical to the one in the R329.
And since these new SoCs will have a well-defined output clock order as
well, they do not need the clock-output-names property.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20220203021736.13434-3-samuel@sholland.org
A series of fixes for omap variants for minor issues, and a fix for a timer
regression for some omap3 beagleboard versions.
The timer fix needs to patch both the dts and the timer code because
otherwise the timer quirk handling for old dtbs will prevent the dts fix
from working.
The other changes are for issues found by automated analysis, a macasp
typo fix, and two cosmetic fixes for clocks.
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Merge tag 'omap-for-v5.17/fixes-for-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps
A series of fixes for omap variants for minor issues, and a fix for a timer
regression for some omap3 beagleboard versions.
The timer fix needs to patch both the dts and the timer code because
otherwise the timer quirk handling for old dtbs will prevent the dts fix
from working.
The other changes are for issues found by automated analysis, a macasp
typo fix, and two cosmetic fixes for clocks.
* tag 'omap-for-v5.17/fixes-for-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Don't use legacy clock defines for dra7 clkctrl
clk: ti: Move dra7 clock devices out of the legacy section
ARM: dts: Fix timer regression for beagleboard revision c
ARM: dts: am335x-wega: Fix typo in mcasp property rx-num-evt
ARM: OMAP2+: adjust the location of put_device() call in omapdss_init_of
ARM: OMAP2+: hwmod: Add of_node_put() before break
Link: https://lore.kernel.org/r/pull-1641801310-149268@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the clock binding doc for i.MXRT1050.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
[Jesse: added clocks from IMXRT1050_CLK_IPG_PDOF to
IMXRT1050_CLK_DMA_MUX and moved IMXRT1050_CLK_END on]
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20220111215415.2075257-4-Mr.Bossman075@gmail.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Clock controller driver of FSD platform is designed to have separate
instances for each particular CMU. So clock IDs in this bindings header
also start from 1 for each CMU block.
Cc: linux-fsd@tesla.com
Reported-by: kernel test robot <lkp@intel.com>
[robot: reported missing #endif]
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-3-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
This new optional property can be used to control the function of the
auxiliary output pin. Introduce a new dt-bindings include file that
contains the numerical values.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220125093336.226787-3-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
MCK1 feeds the External Bus Interface (EBI). EBI's clock rate is used
to translate EBI's timmings to SMC timings, thus we need to handle MCK1
in the EBI driver. Allow MCK1 to be referenced as a PMC_TYPE_CORE clock
from phandle in DT.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220111125310.902856-1-tudor.ambarus@microchip.com
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Make AUDIOPINCK accessible via phandle to select it
as peripheral clock parent using assigned-clock-parents in DT
where available.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Claudiu Beznea <Claudiu.Beznea@microchip.com>
Link: https://lore.kernel.org/r/20220111142051.37957-1-admin@hifiphile.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
they're mostly minor cleanups and some debugfs stuff. The real work
that's in here is the typical pile of clk driver updates and new SoC
support. Per usual (or maybe just recent trends), Qualcomm gains a
handful of SoC drivers additions and has the largest diffstat. After
that there are quite a few updates to the Allwinner (sunxi) drivers to
support modular drivers and Renesas is heavily updated to add more
support for various clks. Overall it looks pretty normal.
New Drivers:
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
- MediaTek mt7986 SoC basic support
- Clock and reset driver for Toshiba Visconti SoCs
- Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
- Allwinner D1 clks
- Lan966x Generic Clock Controller driver and associated DT bindings
- Qualcomm SDX65, SM8450, and MSM8976 GCC clks
- Qualcomm SDX65 and SM8450 RPMh clks
Updates:
- Set suppress_bind_attrs to true for i.MX8ULP driver
- Switch from do_div to div64_ul for throughout all i.MX drivers
- Fix imx8mn_clko1_sels for i.MX8MN
- Remove unused IPG_AUDIO_ROOT from i.MX8MP
- Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
- Removal of all remaining uses of __clk_lookup() in drivers/clk/samsung
- Refactoring of the CPU clocks registration to use common interface
- An update of the Exynos850 driver (support for more clock domains)
required by the E850-96 development board
- Prep for runtime PM and generic power domains on Tegra
- Support modular Allwinner clk drivers via platform bus
- Lan966x clock driver extended to support clock gating
- Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
thermal (TSU) clocks and resets on Renesas RZ/G2L
- Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2 clock
drivers, and in the Renesas SDHI driver
- Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
- Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add GPU clock and resets on Renesas RZ/G2L
- Add clk-provider.h to various Qualcomm clk drivers
- devm version of clk_hw_register_gate()
- kerneldoc fixes in a couple drivers
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"We have a couple patches in the framework core this time around but
they're mostly minor cleanups and some debugfs stuff. The real work
that's in here is the typical pile of clk driver updates and new SoC
support.
Per usual (or maybe just recent trends), Qualcomm gains a handful of
SoC drivers additions and has the largest diffstat. After that there
are quite a few updates to the Allwinner (sunxi) drivers to support
modular drivers and Renesas is heavily updated to add more support for
various clks.
Overall it looks pretty normal.
New Drivers:
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
- MediaTek mt7986 SoC basic support
- Clock and reset driver for Toshiba Visconti SoCs
- Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
- Allwinner D1 clks
- Lan966x Generic Clock Controller driver and associated DT bindings
- Qualcomm SDX65, SM8450, and MSM8976 GCC clks
- Qualcomm SDX65 and SM8450 RPMh clks
Updates:
- Set suppress_bind_attrs to true for i.MX8ULP driver
- Switch from do_div to div64_ul for throughout all i.MX drivers
- Fix imx8mn_clko1_sels for i.MX8MN
- Remove unused IPG_AUDIO_ROOT from i.MX8MP
- Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
- Removal of all remaining uses of __clk_lookup() in
drivers/clk/samsung
- Refactoring of the CPU clocks registration to use common interface
- An update of the Exynos850 driver (support for more clock domains)
required by the E850-96 development board
- Prep for runtime PM and generic power domains on Tegra
- Support modular Allwinner clk drivers via platform bus
- Lan966x clock driver extended to support clock gating
- Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
thermal (TSU) clocks and resets on Renesas RZ/G2L
- Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2
clock drivers, and in the Renesas SDHI driver
- Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
- Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add GPU clock and resets on Renesas RZ/G2L
- Add clk-provider.h to various Qualcomm clk drivers
- devm version of clk_hw_register_gate()
- kerneldoc fixes in a couple drivers"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (131 commits)
clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
clk: mediatek: add mt7986 clock support
clk: mediatek: add mt7986 clock IDs
dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
clk: x86: Fix clk_gate_flags for RV_CLK_GATE
clk: x86: Use dynamic con_id string during clk registration
ACPI: APD: Add a fmw property clk-name
drivers: acpi: acpi_apd: Remove unused device property "is-rv"
x86: clk: clk-fch: Add support for newer family of AMD's SOC
clk: ingenic: Add MDMA and BDMA clocks
dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
clk: bm1880: remove kfrees on static allocations
clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
clk: st: clkgen-mux: search reg within node or parent
clk: st: clkgen-fsyn: search reg within node or parent
clk: Enable/Disable runtime PM for clk_summary
MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
clk: visconti: Add support common clock driver and reset driver
...
- Clock and reset driver for Toshiba Visconti SoCs
* clk-socfpga:
clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_resource()
clk: socfpga: agilex: Make use of the helper function devm_platform_ioremap_resource()
clk: socfpga: remove redundant assignment after a mask operation
clk: socfpga: remove redundant assignment on division
* clk-toshiba:
clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
clk: visconti: Add support common clock driver and reset driver
dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC
dt-bindings: clock: Add DT bindings for PLL of Toshiba Visconti TMPV770x SoC
* clk-st:
clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
clk: st: clkgen-mux: search reg within node or parent
clk: st: clkgen-fsyn: search reg within node or parent
* clk-bitmain:
clk: bm1880: remove kfrees on static allocations
* clk-x86:
clk: x86: Fix clk_gate_flags for RV_CLK_GATE
clk: x86: Use dynamic con_id string during clk registration
ACPI: APD: Add a fmw property clk-name
drivers: acpi: acpi_apd: Remove unused device property "is-rv"
x86: clk: clk-fch: Add support for newer family of AMD's SOC
clk: Introduce clk-tps68470 driver
platform/x86: int3472: Deal with probe ordering issues
platform/x86: int3472: Pass tps68470_regulator_platform_data to the tps68470-regulator MFD-cell
platform/x86: int3472: Pass tps68470_clk_platform_data to the tps68470-regulator MFD-cell
platform/x86: int3472: Add get_sensor_adev_and_name() helper
platform/x86: int3472: Split into 2 drivers
platform_data: Add linux/platform_data/tps68470.h file
i2c: acpi: Add i2c_acpi_new_device_by_fwnode() function
i2c: acpi: Use acpi_dev_ready_for_enumeration() helper
ACPI: delay enumeration of devices with a _DEP pointing to an INT3472 device
* clk-stm:
clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell
* clk-amlogic:
clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB
* clk-allwinner:
clk: sunxi-ng: Add support for the D1 SoC clocks
clk: sunxi-ng: gate: Add macros for gates with fixed dividers
clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hw
clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw
clk: sunxi-ng: div: Add macros using clk_parent_data and clk_hw
dt-bindings: clk: Add compatibles for D1 CCUs
clk: sunxi-ng: Allow the CCU core to be built as a module
clk: sunxi-ng: Convert early providers to platform drivers
clk: sunxi-ng: Allow drivers to be built as modules
clk: sunxi-ng: Export symbols used by CCU drivers
This adds support for the StarFive JH7100, including the necessary
device drivers and DT files for the BeagleV Starlight prototype
board, with additional boards to be added later. This SoC promises
to be the first usable low-cost platform for RISC-V.
I've taken this through the SoC tree in the anticipation of adding
a few other Arm based SoCs as well, but those did not pass the
review in time, so it's only this one.
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Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull RISC-V SoC updates from Arnd Bergmann:
"Add support for StarFive JH7100 RISC-V SoC
This adds support for the StarFive JH7100, including the necessary
device drivers and DT files for the BeagleV Starlight prototype board,
with additional boards to be added later. This SoC promises to be the
first usable low-cost platform for RISC-V.
I've taken this through the SoC tree in the anticipation of adding a
few other Arm based SoCs as well, but those did not pass the review in
time, so it's only this one"
* tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
reset: starfive-jh7100: Fix 32bit compilation
RISC-V: Add BeagleV Starlight Beta device tree
RISC-V: Add initial StarFive JH7100 device tree
serial: 8250_dw: Add StarFive JH7100 quirk
dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts
pinctrl: starfive: Add pinctrl driver for StarFive SoCs
dt-bindings: pinctrl: Add StarFive JH7100 bindings
dt-bindings: pinctrl: Add StarFive pinctrl definitions
reset: starfive-jh7100: Add StarFive JH7100 reset driver
dt-bindings: reset: Add Starfive JH7100 reset bindings
dt-bindings: reset: Add StarFive JH7100 reset definitions
clk: starfive: Add JH7100 clock generator driver
dt-bindings: clock: starfive: Add JH7100 bindings
dt-bindings: clock: starfive: Add JH7100 clock definitions
dt-bindings: interrupt-controller: Add StarFive JH7100 plic
dt-bindings: timer: Add StarFive JH7100 clint
RISC-V: Add StarFive SoC Kconfig option
Add MT7986 clock dt-bindings, include topckgen, apmixedsys,
infracfg, and ethernet subsystem clocks.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211217121148.6753-3-sam.shih@mediatek.com
Reviewed-by: Ryder Lee <ryder.lee@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The Ingenic JZ4760 and JZ4770 both have an extra DMA core named BDMA
dedicated to the NAND and BCH controller, but which can also do
memory-to-memory transfers. The JZ4760 additionally has a DMA core named
MDMA dedicated to memory-to-memory transfers. The programming manual for
the JZ4770 does have a bit for a MDMA clock, but does not seem to have
the hardware wired in.
Add macros for the MDMA and BDMA clocks to the dt-bindings include
files, so that they can be used within Device Tree files.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20211220193319.114974-2-paul@crapouillou.net
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This introduces initial support for the brand new Snapdragon 8 Gen 1,
aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses,
TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and
USB currently supported.
SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo
Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are
described as thermal zones. OnePlus devices gains msm-id and board-id,
to facilitate a single firmware image for the multiple devices.
On SM8350 the Sony Xperia 1 III and 5 III, as well as initial
description of Microsoft's Surface Duo 2 are introduced. On the
platform side, LLCC, QUP nodes, redistributor stride and all the
low-speed QUPs are added
MSM8996 gained various regulator fixes, and adsp firmware name to
faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained
touchkey controller definition.
On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and
regulator definitions, USB, eMMC and SD-card and a simple-framebuffer
description.
MSM8916 has the mmc aliases corrected, to stop the storage devices to
move around and the RPM sleep stats memory is described. Support for the
Samsung J5 2015 smartphone is introduced.
SM6350 validation errors are fixed and and description of the audio,
compute and modem remoteprocs are added.
A couple new revisions of the SC7180 based Google devices are added.
The SC7280 platform gains venus and a few fixes. The CRD development
device is introduced, with the EC, touchscreen and touchpad.
On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based
on CPU frequency, are added. As is TX, RX macros and SoundWire blocks
and used to enable audio on the SM8350 MTP.
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Merge tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DeviceTree updates for v5.17
This introduces initial support for the brand new Snapdragon 8 Gen 1,
aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses,
TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and
USB currently supported.
SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo
Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are
described as thermal zones. OnePlus devices gains msm-id and board-id,
to facilitate a single firmware image for the multiple devices.
On SM8350 the Sony Xperia 1 III and 5 III, as well as initial
description of Microsoft's Surface Duo 2 are introduced. On the
platform side, LLCC, QUP nodes, redistributor stride and all the
low-speed QUPs are added
MSM8996 gained various regulator fixes, and adsp firmware name to
faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained
touchkey controller definition.
On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and
regulator definitions, USB, eMMC and SD-card and a simple-framebuffer
description.
MSM8916 has the mmc aliases corrected, to stop the storage devices to
move around and the RPM sleep stats memory is described. Support for the
Samsung J5 2015 smartphone is introduced.
SM6350 validation errors are fixed and and description of the audio,
compute and modem remoteprocs are added.
A couple new revisions of the SC7180 based Google devices are added.
The SC7280 platform gains venus and a few fixes. The CRD development
device is introduced, with the EC, touchscreen and touchpad.
On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based
on CPU frequency, are added. As is TX, RX macros and SoundWire blocks
and used to enable audio on the SM8350 MTP.
* tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (92 commits)
arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
arm64: dts: qcom: sm8450-qrd: Enable USB nodes
arm64: dts: qcom: sm8450: Add usb nodes
arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes
arm64: dts: qcom: sm8450: add cpufreq support
arm64: dts: qcom: sm8450: Add rpmhpd node
arm64: dts: qcom: sm8450-qrd: enable ufs nodes
arm64: dts: qcom: sm8450: add ufs nodes
arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodes
arm64: dts: qcom: Add base SM8450 QRD DTS
arm64: dts: qcom: sm8450: add smmu nodes
arm64: dts: qcom: sm8450: Add reserved memory nodes
arm64: dts: qcom: sm8450: Add tlmm nodes
arm64: dts: qcom: Add base SM8450 DTSI
arm64: dts: qcom: ipq6018: Fix gpio-ranges property
arm64: dts: qcom: sdm845: add QFPROM chipset specific compatible
arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones
arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node
arm64: qcom: dts: drop legacy property #stream-id-cells
Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer"
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
I accidentally added some dra7 clock defines to the legacy section that
we want to stop using. Let's move the defines to the right location.
Note that this is just a cosmetic fix.
Cc: linux-clk@vger.kernel.org
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe
endpoint controller, as well as enables these for the FN960 device.
The SDX65 5G platform is introduced, currently with definitions
necessary to boot to a shell.
The undocumented property "input-name" is dropped throughout the dts
files, dwc3 nodes throughout gains more specific compatibles and lastly
building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to
its normal operation in 64-bit mode.
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Merge tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm DeviceTree updates for v5.17
To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe
endpoint controller, as well as enables these for the FN960 device.
The SDX65 5G platform is introduced, currently with definitions
necessary to boot to a shell.
The undocumented property "input-name" is dropped throughout the dts
files, dwc3 nodes throughout gains more specific compatibles and lastly
building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to
its normal operation in 64-bit mode.
* tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: Drop input-name property
ARM: dts: qcom: sdx65: Add pincontrol node
ARM: dts: qcom: Add SDX65 platform and MTP board support
dt-bindings: arm: qcom: Document SDX65 platform and boards
dt-bindings: clock: Add SDX65 GCC clock bindings
ARM: dts: qcom: Build apq8016-sbc/DragonBoard 410c DTB on ARM32
ARM: dts: qcom: sdx55-t55: Enable IPA
ARM: dts: qcom: sdx55-fn980: Enable IPA
ARM: dts: qcom: sdx55-fn980: Enable PCIe EP
ARM: dts: qcom: sdx55: Add support for PCIe EP
ARM: dts: qcom: sdx55-fn980: Enable PCIE0 PHY
ARM: dts: qcom: sdx55: Add support for PCIe PHY
ARM: dts: qcom: update USB nodes with new platform specific compatible
Link: https://lore.kernel.org/r/20211221042154.3621955-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Just like on Exynos850, the clock controller driver is designed to have
separate instances for each particular CMU, so clock IDs start from 1
for each CMU in this bindings header too.
Signed-off-by: David Virag <virag.david003@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211206153124.427102-2-virag.david003@gmail.com
System Register is used to configure system behavior, like USI protocol,
etc. SYSREG clocks should be provided to corresponding syscon nodes, to
make it possible to modify SYSREG registers.
While at it, add also missing PMU and GPIO clocks, which looks necessary
and might be needed for corresponding Exynos850 features soon.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211217161549.24836-2-semen.protsenko@linaro.org
- Initial support for the R-Car S4-8 SoC on the Spider CPU and
BreakOut boards,
- MIPI DSI display support for the R-Car V3u SoC and the Falcon board
stack,
- Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK
development board,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.17 (take two)
- Initial support for the R-Car S4-8 SoC on the Spider CPU and
BreakOut boards,
- MIPI DSI display support for the R-Car V3u SoC and the Falcon board
stack,
- Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK
development board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Fix pin controller node names
arm64: dts: renesas: rzg2l-smarc-som: Add vdd core regulator
arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU node
arm64: dts: renesas: r9a07g044: Create thermal zone to support IPA
arm64: dts: renesas: r9a07g044: Add TSU node
arm64: dts: renesas: falcon-cpu: Add DSI display output
arm64: dts: renesas: r8a779a0: Add DSI encoders
arm64: dts: renesas: Add Renesas Spider boards support
arm64: dts: renesas: Add Renesas R8A779F0 SoC support
dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
dt-bindings: power: Add r8a779f0 SYSC power domain definitions
arm64: dts: renesas: Fix thermal bindings
Link: https://lore.kernel.org/r/cover.1639736718.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Document the required properties and firmware clocks for gcc-msm8976 to
operate nominally, and add header definitions for referencing the clocks
from firmware.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211208091036.132334-2-marijn.suijten@somainline.org
v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org
The immutable branch contains the DT binding and clock defines as need
for the Qualcomm SM8450 global clock controller driver.
Add all clock outputs for the StarFive JH7100 clock generator.
Based on work by Ahmad Fatoum for Barebox, with "JH7100_" prefixes added
to all definitions.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Document the variant of the memory controller and external memory
controllers found on Tegra234 and add some memory client and SMMU
stream ID definitions for use in device tree files.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a few more clocks that will be used in follow-up patches to enable
more functionality on Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device tree bindings for global clock controller on SM8450 SoCs.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211207114003.100693-2-vkoul@kernel.org
On lan966x it is allow to control the clock to some peripherals like
USB. So extend the include file with these clocks.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103085102.1656081-4-horatiu.vultur@microchip.com
LAN966X supports 14 clock outputs for its peripherals.
This include file is introduced to use identifiers for clocks.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103061935.25677-2-kavyasree.kotagiri@microchip.com
The MBUS node needs to reference the CLK_DRAM clock, as the MBUS
hardware implements memory dynamic frequency scaling using this clock.
Export this clock for SoCs which will be getting a devfreq driver.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211118031841.42315-2-samuel@sholland.org
The D1 has a CCU and a R_CCU (PRCM CCU) like most other sunxi SoCs, with
3 and 4 clock inputs, respectively. Add the compatibles and bindings.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-2-samuel@sholland.org
Since the commit b24e288d50 ("clk: imx: Remove the audio ipg clock
from imx8mp") removes the non-existing IPG_AUDIO_ROOT from the
clk-imx8mp.c, and this definition is not used by anywhere, let us
removed it in the imx8mp-clock.h as well.
Signed-off-by: Hui Wang <hui.wang@canonical.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20211109125657.63485-1-hui.wang@canonical.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
CMU_CMGP generates USI and ADC clocks for BLK_ALIVE. In particular USI
clocks are needed for HSI2C_3 and HSI2C_4 instances.
Add clock indices and bindings documentation for CMU_CMGP domain.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-4-semen.protsenko@linaro.org
CMU_APM generates clocks for APM IP-core (Active Power Management). In
particular it generates RTC clocks, which are needed to enable rtc-s3c
driver on Exynos850 SoC.
Add clock indices and binding documentation for CMU_APM.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-2-semen.protsenko@linaro.org
Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net
- Remove support for TI TPS80031/TPS80032 PMICs
- New Device Support
- Add support for Magnetic Reader to TI AM335x
- Add support for DA9063_EA to Dialog DA9063
- Add support for SC2730 PMIC to Spreadtrum SC27xx
- Add support for MacBookPro16,2 ICL-N UART Intel LPSS PCI
- Add support for lots of new PMICS in QCom SPMI PMIC
- Add support for ADC to Diolan DLN2
- New Functionality
- Add support for Power Off to Rockchip RK817
- Fix-ups
- Simplify Regmap passing to child devices; hi6421-spmi-pmic
- SPDX licensing updates; ti_am335x_tscadc
- Improve error handling; ti_am335x_tscadc
- Expedite clock search; ti_am335x_tscadc
- Generic simplifications; ti_am335x_tscadc
- Use generic macros/defines; ti_am335x_tscadc
- Remove unused code; ti_am335x_tscadc, cros_ec_dev
- Convert to GPIOD; wcd934x
- Add namespacing; ti_am335x_tscadc
- Restrict compilation to relevant arches; intel_pmt
- Provide better description/documentation; exynos_lpass
- Add SPI device ID table; altera-a10sr, motorola-cpcap, sprd-sc27xx-spi
- Change IRQ handling; qcom-pm8xxx
- Split out I2C and SPI code; arizona
- Explicitly include used headers; altera-a10sr
- Convert sysfs show() function to; sysfs_emit
- Standardise *_exit() and *_remove() return values; mc13xxx, stmpe, tps65912
- Trivial (style/spelling/whitespace) fixups; ti_am335x_tscadc, qcom-spmi-pmic,
max77686-private
- Device Tree fix-ups; ti,am3359-tscadc, samsung,s2mps11, samsung,s2mpa01,
samsung,s5m8767, brcm,misc, brcm,cru, syscon, qcom,tcsr,
xylon,logicvc, max77686, x-powers,ac100, x-powers,axp152,
x-powers,axp209-gpio, syscon, qcom,spmi-pmic
- Bug Fixes
- Balance refcounting (get/put); ti_am335x_tscadc, mfd-core
- Fix IRQ trigger type; sec-irq, max77693, max14577
- Repair off-by-one; altera-sysmgr
- Add explicit 'select MFD_CORE' to MFD_SIMPLE_MFD_I2C
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Merge tag 'mfd-next-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"Removed Drivers:
- Remove support for TI TPS80031/TPS80032 PMICs
New Device Support:
- Add support for Magnetic Reader to TI AM335x
- Add support for DA9063_EA to Dialog DA9063
- Add support for SC2730 PMIC to Spreadtrum SC27xx
- Add support for MacBookPro16,2 ICL-N UART Intel LPSS PCI
- Add support for lots of new PMICS in QCom SPMI PMIC
- Add support for ADC to Diolan DLN2
New Functionality:
- Add support for Power Off to Rockchip RK817
Fix-ups:
- Simplify Regmap passing to child devices in hi6421-spmi-pmic
- SPDX licensing updates in ti_am335x_tscadc
- Improve error handling in ti_am335x_tscadc
- Expedite clock search in ti_am335x_tscadc
- Generic simplifications in ti_am335x_tscadc
- Use generic macros/defines in ti_am335x_tscadc
- Remove unused code in ti_am335x_tscadc, cros_ec_dev
- Convert to GPIOD in wcd934x
- Add namespacing in ti_am335x_tscadc
- Restrict compilation to relevant arches in intel_pmt
- Provide better description/documentation in exynos_lpass
- Add SPI device ID table in altera-a10sr, motorola-cpcap,
sprd-sc27xx-spi
- Change IRQ handling in qcom-pm8xxx
- Split out I2C and SPI code in arizona
- Explicitly include used headers in altera-a10sr
- Convert sysfs show() function to in sysfs_emit
- Standardise *_exit() and *_remove() return values in mc13xxx,
stmpe, tps65912
- Trivial (style/spelling/whitespace) fixups in ti_am335x_tscadc,
qcom-spmi-pmic, max77686-private
- Device Tree fix-ups in ti,am3359-tscadc, samsung,s2mps11,
samsung,s2mpa01, samsung,s5m8767, brcm,misc, brcm,cru, syscon,
qcom,tcsr, xylon,logicvc, max77686, x-powers,ac100,
x-powers,axp152, x-powers,axp209-gpio, syscon, qcom,spmi-pmic
Bug Fixes:
- Balance refcounting (get/put) in ti_am335x_tscadc, mfd-core
- Fix IRQ trigger type in sec-irq, max77693, max14577
- Repair off-by-one in altera-sysmgr
- Add explicit 'select MFD_CORE' to MFD_SIMPLE_MFD_I2C"
* tag 'mfd-next-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (95 commits)
mfd: simple-mfd-i2c: Select MFD_CORE to fix build error
mfd: tps80031: Remove driver
mfd: max77686: Correct tab-based alignment of register addresses
mfd: wcd934x: Replace legacy gpio interface for gpiod
dt-bindings: mfd: qcom: pm8xxx: Add pm8018 compatible
mfd: dln2: Add cell for initializing DLN2 ADC
mfd: qcom-spmi-pmic: Add missing PMICs supported by socinfo
mfd: qcom-spmi-pmic: Document ten more PMICs in the binding
mfd: qcom-spmi-pmic: Sort compatibles in the driver
mfd: qcom-spmi-pmic: Sort the compatibles in the binding
mfd: janz-cmoio: Replace snprintf in show functions with sysfs_emit
mfd: altera-a10sr: Include linux/module.h
mfd: tps65912: Make tps65912_device_exit() return void
mfd: stmpe: Make stmpe_remove() return void
mfd: mc13xxx: Make mc13xxx_common_exit() return void
dt-bindings: mfd: syscon: Add samsung,exynosautov9-sysreg compatible
mfd: altera-sysmgr: Fix a mistake caused by resource_size conversion
dt-bindings: gpio: Convert X-Powers AXP209 GPIO binding to a schema
dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
mfd: arizona: Split of_match table into I2C and SPI versions
...
* clk-composite-determine-fix:
clk: composite: Use rate_ops.determine_rate when also a mux is available
clk: composite: Also consider .determine_rate for rate + mux composites
* clk-allwinner:
clk: sunxi: sun8i-apb0: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi: sun6i-ar100: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi: sun6i-apb0-gates: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi: sun6i-apb0: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi-ng: ccu-sun9i-a80-usb: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi-ng: ccu-sun9i-a80-de: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi-ng: ccu-sun9i-a80: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi-ng: ccu-sun8i-r40: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi-ng: ccu-sun8i-de2: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi-ng: ccu-sun8i-a83t: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi-ng: ccu-sun50i-h6: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi-ng: ccu-sun50i-a64: Make use of the helper function devm_platform_ioremap_resource()
clk: sunxi: clk-mod0: Make use of the helper function devm_platform_ioremap_resource()
dt-bindings: clocks: Fix typo in the H6 compatible
clk: sunxi-ng: Use a separate lock for each CCU instance
clk: sunxi-ng: Prevent unbinding CCUs via sysfs
clk: sunxi-ng: Unregister clocks/resets when unbinding
clk: sunxi-ng: Add machine dependency to A83T CCU
clk: sunxi-ng: mux: Remove unused 'reg' field
* clk-amlogic:
clk: meson: meson8b: Make the video clock trees mutable
clk: meson: meson8b: Initialize the HDMI PLL registers
clk: meson: meson8b: Add the HDMI PLL M/N parameters
clk: meson: meson8b: Add the vid_pll_lvds_en gate clock
clk: meson: meson8b: Use CLK_SET_RATE_NO_REPARENT for vclk{,2}_in_sel
clk: meson: meson8b: Export the video clocks
* clk-samsung:
clk: samsung: describe drivers in Kconfig
clk: samsung: exynos5433: update apollo and atlas clock probing
clk: samsung: add support for CPU clocks
clk: samsung: Introduce Exynos850 clock driver
dt-bindings: clock: Document Exynos850 CMU bindings
dt-bindings: clock: Add bindings definitions for Exynos850 CMU
clk: samsung: clk-pll: Implement pll0831x PLL type
clk: samsung: clk-pll: Implement pll0822x PLL type
clk: samsung: s5pv210-audss: Make use of devm_platform_ioremap_resource()
clk: samsung: exynos5433: Make use of devm_platform_ioremap_resource()
clk: samsung: exynos4412-isp: Make use of devm_platform_ioremap_resource()
clk: samsung: exynos-audss: Make use of devm_platform_ioremap_resource()
* clk-imx: (21 commits)
clk: imx: Make CLK_IMX8ULP select MXC_CLK
clk: imx: imx6ul: Fix csi clk gate register
clk: imx: imx6ul: Move csi_sel mux to correct base register
clk: imx: Fix the build break when clk-imx8ulp build as module
clk: imx: Add the pcc reset controller support on imx8ulp
clk: imx: Add clock driver for imx8ulp
clk: imx: Update the pfdv2 for 8ulp specific support
clk: imx: disable the pfd when set pfdv2 clock rate
clk: imx: Add 'CLK_SET_RATE_NO_REPARENT' for composite-7ulp
clk: imx: disable i.mx7ulp composite clock during initialization
clk: imx: Update the compsite driver to support imx8ulp
clk: imx: Update the pllv4 to support imx8ulp
dt-bindings: clock: Add imx8ulp clock support
clk: imx: Rework imx_clk_hw_pll14xx wrapper
clk: imx: Rework all imx_clk_hw_composite wrappers
clk: imx: Rework all clk_hw_register_divider wrappers
clk: imx: Rework all clk_hw_register_mux wrappers
clk: imx: Rework all clk_hw_register_gate2 wrappers
clk: imx: Rework all clk_hw_register_gate wrappers
clk: imx: Make mux/mux2 clk based helpers use clk_hw based ones
...
* clk-ux500:
clk: ux500: Add driver for the reset portions of PRCC
dt-bindings: clock: u8500: Rewrite in YAML and extend
* clk-debugfs:
clk: use clk_core_get_rate_recalc() in clk_rate_get()
Declare ADC1 clkctrl which feeds the magnetic-reader/ADC1 hardware
module.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20211015081506.933180-2-miquel.raynal@bootlin.com
The camera clock controller clock provider have a bunch of generic
properties that are needed in a device tree. Add the CAMCC clock IDs for
camera client to request for the clocks.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1633567425-11953-1-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Add the LPASS clock IDs for
LPASS PIL client to request for the clocks.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1633484416-27852-2-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This should be the last "add missing clocks" commit, as to
my knowledge there are no more clocks registered within gcc.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-5-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add support for RPM-managed clocks on the QCM2290 platform.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210917030434.19859-4-shawn.guo@linaro.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add Global Clock Controller (GCC) driver for QCM2290. This is a porting
of gcc-scuba driver from CAF msm-4.19, with GDSC support added on top.
Because the alpha_pll on the platform has a different register
layout (offsets), its own clk_alpha_pll_regs_offset[] is used in the
driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210919023308.24498-3-shawn.guo@linaro.org
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Drop duplicate includes, clk.h include, module alias]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Clock controller driver is designed to have separate instances for each
particular CMU. So clock IDs in this bindings header also start from 1
for each CMU.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211008154352.19519-4-semen.protsenko@linaro.org
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Add the clock dt-binding file for i.MX8ULP.
For pcc node, it will also be used as a reset controller,
so add the '#reset-cells' property description and add the
pcc reset IDs.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20210914065208.3582128-2-ping.bai@nxp.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Setting the video clocks requires fine-tuned adjustments of various
video clocks. Export the required ones to allow changing the video clock
for the CVBS and HDMI outputs at runtime.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20210713232510.3057750-7-martin.blumenstingl@googlemail.com
some updates to the basic clk types to use determine_rate for the
divider type and add a power of two fractional divider flag though.
Otherwise, this is a collection of clk driver updates. More than half
the diffstat is in the Qualcomm clk driver where we add a bunch of data
to describe clks on various SoCs and fix bugs. The other big new thing
in here is the Mediatek MT8192 clk driver. That's been under review for
a while and it's nice to see that it's finally upstream.
Beyond that it's the usual set of minor fixes and tweaks to clk drivers.
There are some non-clk driver bits in here which have all been acked by
the respective maintainers.
New Drivers:
- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
- Multimedia clks (MMCC) on qcom MSM8994/MSM8992
- RPMh clks on qcom SM6350 SoCs
- Support for Mediatek MT8192 SoCs
- Add display (DU and DSI) clocks on Renesas R-Car V3U
- Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
resets on Renesas RZ/G2L
Updates:
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
- Add power of two flag to fractional divider clk type
- Migrate some clk drivers to clk_divider_ops.determine_rate
- Migrate to clk_parent_data in gcc-sdm660
- Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
- Switch from .round_rate to .determine_rate in clk-divider-gate
- Fix clock tree update for TF-A controlled clocks for all i.MX8M
- Add missing M7 core clock for i.MX8MN
- YAML conversion of rk3399 clock controller binding
- Removal of GRF dependency for the rk3328/rk3036 pll types
- Drop CLK_IS_CRITICAL flag from Tegra fuse clk
- Make CLK_R9A06G032 Kconfig symbol invisible
- Convert various DT bindings to YAML
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Nothing changed in the clk framework core this time around. We did get
some updates to the basic clk types to use determine_rate for the
divider type and add a power of two fractional divider flag though.
Otherwise, this is a collection of clk driver updates. More than half
the diffstat is in the Qualcomm clk driver where we add a bunch of
data to describe clks on various SoCs and fix bugs. The other big new
thing in here is the Mediatek MT8192 clk driver. That's been under
review for a while and it's nice to see that it's finally upstream.
Beyond that it's the usual set of minor fixes and tweaks to clk
drivers. There are some non-clk driver bits in here which have all
been acked by the respective maintainers.
New Drivers:
- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
- Multimedia clks (MMCC) on qcom MSM8994/MSM8992
- RPMh clks on qcom SM6350 SoCs
- Support for Mediatek MT8192 SoCs
- Add display (DU and DSI) clocks on Renesas R-Car V3U
- Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
resets on Renesas RZ/G2L
Updates:
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
- Add power of two flag to fractional divider clk type
- Migrate some clk drivers to clk_divider_ops.determine_rate
- Migrate to clk_parent_data in gcc-sdm660
- Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
- Switch from .round_rate to .determine_rate in clk-divider-gate
- Fix clock tree update for TF-A controlled clocks for all i.MX8M
- Add missing M7 core clock for i.MX8MN
- YAML conversion of rk3399 clock controller binding
- Removal of GRF dependency for the rk3328/rk3036 pll types
- Drop CLK_IS_CRITICAL flag from Tegra fuse clk
- Make CLK_R9A06G032 Kconfig symbol invisible
- Convert various DT bindings to YAML"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
dt-bindings: clock: samsung: fix header path in example
clk: tegra: fix old-style declaration
clk: qcom: Add SM6350 GCC driver
MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos4 to dtschema
dt-bindings: clock: samsung: convert Exynos3250 to dtschema
dt-bindings: clock: samsung: convert Exynos542x to dtschema
dt-bindings: clock: samsung: add bindings for Exynos external clock
dt-bindings: clock: samsung: convert Exynos5250 to dtschema
clk: vc5: Add properties for configuring SD/OE behavior
clk: vc5: Use dev_err_probe
dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
clk: zynqmp: Fix kernel-doc format
clk: at91: clk-generated: Limit the requested rate to our range
clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
clk: zynqmp: Fix a memory leak
clk: zynqmp: Check the return type
...
As usual, the bulk of work in the SoC tree goes into DT files,
this time with a roughly even split between 32-bit and 64-bit
SoCs rather than the usual mostly 64-bit changes.
New SoCs:
- Microchip SAMA7 SoC family based on Cortex-A7, a new
32-bit platform based on the older SAMA5 series.
- Qualcomm Snapdragon SDM636 and SM8150, variations of the
existing phone SoCs.
- Renesas R-Car H3e-2G and M3e-2G SoCs, variations of
older Renesas SoCs.
New boards:
- Marvell CN913x reference boards
- ASpeed AST2600 BMC implementations for Facebook Cloudripper,
Elbert and Fuji server boards.
- Snapdragon 665 based Sony Xperia 10II
- Snapdragon MSM8916 based Xiaomi Redmi 2
- Snapdragon MSM8226 based Samsung Galaxy S3 Neo
- NXP i.MX based 32-bit boards:
- DHCOM based PicoITX
- DHSOM based DRC0ỉ
- SolidRun SolidSense
- SKOV i.MX6 boards.
- NXP i.MX based 64-bit boards:
- Nitrogen8 SoM and MNT Reform2
- LS1088A based Traverse Ten64
- i.MX8M based GW7902.
- NVIDIA Jetson TX2 NX Developer Kit
- 4KOpen STiH418-b2264 development board
- ux500 based Samsung phones: Gavini, Codina and Kyle
- TI AM335x based Sancloud BBE Lite
- ixp4xx dts files to replace all old board files
Other changes:
- Treewide fixes for dtc warnings
- Rockchips i/o domain support
- TI OMAP/AM3 CPSW switch driver support
- Improved device support for allwinner, aspeed, qualcomm, NXP,
nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
OMAP and actions.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC DT updates from Arnd Bergmann:
"As usual, the bulk of work in the SoC tree goes into DT files, this
time with a roughly even split between 32-bit and 64-bit SoCs rather
than the usual mostly 64-bit changes.
New SoCs:
- Microchip SAMA7 SoC family based on Cortex-A7, a new 32-bit
platform based on the older SAMA5 series.
- Qualcomm Snapdragon SDM636 and SM8150, variations of the existing
phone SoCs.
- Renesas R-Car H3e-2G and M3e-2G SoCs, variations of older Renesas
SoCs.
New boards:
- Marvell CN913x reference boards
- ASpeed AST2600 BMC implementations for Facebook Cloudripper, Elbert
and Fuji server boards.
- Snapdragon 665 based Sony Xperia 10II
- Snapdragon MSM8916 based Xiaomi Redmi 2
- Snapdragon MSM8226 based Samsung Galaxy S3 Neo
- NXP i.MX based 32-bit boards:
- DHCOM based PicoITX
- DHSOM based DRC0ỉ
- SolidRun SolidSense
- SKOV i.MX6 boards.
- NXP i.MX based 64-bit boards:
- Nitrogen8 SoM and MNT Reform2
- LS1088A based Traverse Ten64
- i.MX8M based GW7902.
- NVIDIA Jetson TX2 NX Developer Kit
- 4KOpen STiH418-b2264 development board
- ux500 based Samsung phones: Gavini, Codina and Kyle
- TI AM335x based Sancloud BBE Lite
- ixp4xx dts files to replace all old board files
Other changes:
- Treewide fixes for dtc warnings
- Rockchips i/o domain support
- TI OMAP/AM3 CPSW switch driver support
- Improved device support for allwinner, aspeed, qualcomm, NXP,
nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
OMAP and actions"
* tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (412 commits)
arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
ARM: dts: rockchip: Add SFC to RV1108
arm64: dts: marvell: armada-37xx: Extend PCIe MEM space
ARM: dts: aspeed: p10bmc: Add power control pins
ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
ARM: dts: aspeed: minipack: Update flash partition table
dt-bindings: arm: fsl: Add Traverse Ten64 (LS1088A) board
dt-bindings: vendor-prefixes: add Traverse Technologies
arm64: dts: add device tree for Traverse Ten64 (LS1088A)
arm64: dts: ls1088a: add missing PMU node
arm64: dts: ls1088a: add internal PCS for DPMAC1 node
ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
ARM: dts: add SKOV imx6q and imx6dl based boards
dt-bindings: arm: fsl: add SKOV imx6q and imx6dl based boards
dt-bindings: vendor-prefixes: Add an entry for SKOV A/S
arm64: dts: imx8mq-reform2: add sound support
arm64: dts: imx8m: drop interrupt-affinity for pmu
arm64: dts: imx8qxp: update pmu compatible
arm64: dts: imx8mm: update pmu compatible
...
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
* clk-nvidia:
clk: tegra: fix old-style declaration
clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clock
soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
soc/tegra: fuse: Add runtime PM support
soc/tegra: fuse: Clear fuse->clk on driver probe failure
soc/tegra: pmc: Prevent racing with cpuilde driver
soc/tegra: bpmp: Remove unused including <linux/version.h>
* clk-rockchip:
clk: rockchip: make rk3308 ddrphy4x clock critical
clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types
dt-bindings: clk: Convert rockchip,rk3399-cru to DT schema
clk: rockchip: Add support for hclk_sfc on rk3036
clk: rockchip: rk3036: fix up the sclk_sfc parent error
clk: rockchip: add dt-binding clkid for hclk_sfc on rk3036
* clk-at91:
clk: at91: clk-generated: Limit the requested rate to our range
* clk-vc5:
clk: vc5: Add properties for configuring SD/OE behavior
clk: vc5: Use dev_err_probe
dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
Add support for RPMH clocks on SM6350 SoCs.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203243.230157-3-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add device tree bindings for global clock controller on SM6115 and
SM4250 SoCs (pin and software compatible).
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210805161107.1194521-2-iskren.chernev@gmail.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add a driver for managing MultiMedia SubSystem clocks on msm8994
and its derivatives.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210618111435.595689-2-konrad.dybcio@somainline.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add missing M7 core clock entry to the iMX8MN clock driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Cc: Abel Vesa <abel.vesa@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Link: https://lore.kernel.org/r/20210819202036.2084782-1-marex@denx.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
The zx296718-clkc driver had been removed in commit bcbe6005eb ("clk:
remove zte zx driver"), so this header is no longer needed.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20210821030924.192-1-yuzenghui@huawei.com
Signed-off-by: Rob Herring <robh@kernel.org>
Zong Li