Commit Graph

591138 Commits

Author SHA1 Message Date
Maxime Ripard cf5c9e6dc7 drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS
Add support for the Olimex LCD-OLinuXino-4.3TS panel to the DRM simple
panel driver.

It is a 480x272 panel connected through a 24-bits RGB interface.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-05-12 11:32:14 +02:00
Eric Anholt e8b6f561b2 drm/panel: simple: Add the 7" DPI panel from Adafruit
This is a basic TFT panel with a 40-pin FPC connector on it.  The
specification doesn't define timings, but the Adafruit instructions
were setting up 800x480 CVT.

v2: Add .bus_format and vsync/hsync flags.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
[treding@nvidia.com: keep entries properly sorted]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-05-12 11:32:14 +02:00
Eric Anholt 686cfbd186 of: Add vendor prefix for On Tat Industrial Company.
This is the vendor for a 7" DPI panel sold by Adafruit which I'd like
to describe in DT.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-05-12 11:32:14 +02:00
Dave Airlie 7d02067261 Merge branch 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux into drm-next
More amdgpu fixes for 4.7.  Highlights:
- enable async pageflips
- UVD fixes for polaris
- lots of GPUVM fixes
- whitespace and code cleanups
- misc bug fixes

* 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux: (32 commits)
  drm/amd/powerplay: rewrite pp_sw_init to make code readable
  drm/amdgpu/dce11: fix audio offset for asics with >7 audio pins
  drm/amdgpu: fix and cleanup user fence handling v2
  drm/amdgpu: move VM fields into job
  drm/amdgpu: move the context from the IBs into the job
  drm/amdgpu: move context switch handling into common code v2
  drm/amdgpu: move preamble IB handling into common code
  drm/amdgpu/gfx7: fix pipeline sync
  amdgpu/uvd: separate context buffer from DPB
  drm/amdgpu: use fence_context to judge ctx switch v2
  drm/amd/amdgpu:  Added more named DRM info messages for debugging
  drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)
  drm/amdgpu: Support DRM_MODE_PAGE_FLIP_ASYNC (v2)
  drm/amdgpu/dce11: don't share PLLs on Polaris
  drm/amdgpu: Drop unused parameter for *get_sleep_divider_id_from_clock
  drm/amdgpu: Simplify calculation in *get_sleep_divider_id_from_clock
  drm/amdgpu: Use max macro in *get_sleep_divider_id_from_clock
  drm/amd/powerplay: Use defined constants for minium engine clock
  drm/amdgpu: add missing licenses on a couple of files
  drm/amdgpu: fetch cu_info once at init
  ...
2016-05-12 11:16:55 +10:00
Dave Airlie 95306975e9 drm/tegra: Changes for v4.7-rc1
Two small changes, one getting rid of the bogus gamma table size and
 another removing Terje from the MAINTAINERS file since he no longer does
 any work on host1x or display.
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Merge tag 'drm/tegra/for-4.7-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v4.7-rc1

Two small changes, one getting rid of the bogus gamma table size and
another removing Terje from the MAINTAINERS file since he no longer does
any work on host1x or display.

* tag 'drm/tegra/for-4.7-rc1' of git://anongit.freedesktop.org/tegra/linux:
  MAINTAINERS: Remove Terje Bergström as Tegra DRM maintainer
  drm/tegra: Don't set a gamma table size
2016-05-12 11:15:18 +10:00
Dave Airlie 93f517c4a7 Merge branch 'drm-hisilicon-next' of github.com:xin3liang/linux into drm-next
misc hisilicon cleanups.

* 'drm-hisilicon-next' of github.com:xin3liang/linux:
  drm/hisilicon: Fix DRM_INFO printed issue
  drm/hisilicon: Make kirin_drm_unbind sufficient
  drm/hisilicon: Use drm_connector_register_all
2016-05-12 11:11:03 +10:00
Dave Airlie 6d23abf58a Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next
Summary:
   - expose HDMI-PHY clock to other drivers.
     . this patch was included in below patch series but I missed.
             http://www.spinics.net/lists/dri-devel/msg103097.html
   - some fixups about DECON5433 driver
     . this patch corrects vblank handling and fixes up trigger
       configuration.
   - use generic functions - gem_prime_mmap and dma_buf_mmap.
   - use DMA-Mapping API instead of specific one.
   - some code cleanups and fixeups.

* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
  drm/exynos/decon5433: fix trigger configuration
  drm/exynos/dsi: use of_graph_get_endpoint_by_regs helper
  drm/exynos/dpi: use of_graph_get_endpoint_by_regs helper
  drm/exynos: Nuke dummy fb->dirty callback
  drm/exynos: use directly DMA mapping APIs on g2d
  drm/exynos/hdmi: Don't print error on deferral due to regulators
  drm/exynos: fix imported dma-buf to be mapped
  drm/exynos: support gem_prime_mmap
  drm/exynos: fimd: harden fimd_calc_clkdiv()
  drm/exynos: fix cancel page flip code
  drm/exynos/decon5433: do not use unnecessary software trigger
  drm/exynos/decon5433: handle vblank in vblank interrupt
  drm/exynos/hdmi: expose HDMI-PHY clock as pipeline clock
2016-05-12 10:10:53 +10:00
Huang Rui b4eeed590d drm/amd/powerplay: rewrite pp_sw_init to make code readable
Actually, pp_sw_init executes pptable_init and backend_init orderly if
they are initialized successfully. So rewrite it to make code more
readable.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:33 -04:00
Alex Deucher 67b1fcc9ac drm/amdgpu/dce11: fix audio offset for asics with >7 audio pins
Missing offset in the audio offset array.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:33 -04:00
Christian König 758ac17f96 drm/amdgpu: fix and cleanup user fence handling v2
We leaked the BO in the error pass, additional to that we only have
one user fence for all IBs in a job.

v2: remove white space changes

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:32 -04:00
Christian König d88bf583bd drm/amdgpu: move VM fields into job
They are the same for all IBs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:31 -04:00
Christian König 92f250989b drm/amdgpu: move the context from the IBs into the job
We only have one context for all IBs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:31 -04:00
Christian König f153d2867b drm/amdgpu: move context switch handling into common code v2
It was a source of bugs to repeat that in each IP version.

v2: rename parameter

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:30 -04:00
Christian König 9f8fb5a2b3 drm/amdgpu: move preamble IB handling into common code
This fixes the handling which was completely broken when you
ad more than one preamble IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:30 -04:00
Chunming Zhou 914f9e18c8 drm/amdgpu/gfx7: fix pipeline sync
Need to wait on the fence as well.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:29 -04:00
Sonny Jiang 8e008dd70e amdgpu/uvd: separate context buffer from DPB
Updated to handle latest UVD ucode.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:12 -04:00
Noralf Trønnes 9ecb549867 drm/atomic: Add drm_atomic_helper_best_encoder()
Add (struct drm_connector_helper_funcs *)->best_encoder callback helper
for connectors that support exactly 1 encoder, statically determined at
driver init time.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462982962-10530-6-git-send-email-noralf@tronnes.org
2016-05-11 18:55:16 +02:00
Noralf Trønnes 2827635e39 drm/atomic: Don't skip drm_bridge_*() calls if !drm_encoder_helper_funcs
Don't skip drm_bridge_*() calls if encoder->helper_private is NULL.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462982962-10530-5-git-send-email-noralf@tronnes.org
2016-05-11 18:53:15 +02:00
Noralf Trønnes 02da16d0fb drm/fb-cma-helper: Hook up to DocBook and fix some docs
Hook up fb_cma_helper to DocBook. Remove mention of
CONFIG_FB_DEFERRED_IO in the docs, which was forgotten in the latest
version of the deferred_io patch.
Use & when referencing drm_mode_config_funcs in docs.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462982962-10530-3-git-send-email-noralf@tronnes.org
2016-05-11 18:48:10 +02:00
Noralf Trønnes 2dad551cfb drm/fb-helper: Remove mention of CONFIG_FB_DEFERRED_IO in docs
This was forgotten to fixup in the latest version of the deferred_io
patch which made FB_DEFERRED_IO mandatory.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462982962-10530-2-git-send-email-noralf@tronnes.org
2016-05-11 18:47:51 +02:00
Christian König aa3b73f67b drm/amdgpu: use fence_context to judge ctx switch v2
Use of the ctx pointer is not safe, because they are likely already
be assigned to another ctx when doing comparing.

v2: recreate from scratch, avoid all unnecessary changes.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:27 -04:00
Tom St Denis 822b2cef4d drm/amd/amdgpu: Added more named DRM info messages for debugging
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:26 -04:00
Tom St Denis 88a907d67c drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)
Add name that we can print out in kernel messages
to aid in debugging.

v2: drop DAL changes for upstream

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:26 -04:00
Alex Deucher cb9e59d7e9 drm/amdgpu: Support DRM_MODE_PAGE_FLIP_ASYNC (v2)
When this flag is set, we program the hardware to execute the flip
during horizontal blank (i.e. for the next scanline) instead of during
vertical blank (i.e. for the next frame).

Ported from radeon commit:
drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC

v2: drop DAL change for upstream

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:25 -04:00
Alex Deucher a71dd89759 drm/amdgpu/dce11: don't share PLLs on Polaris
They are part of the phy so you can't share them.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:25 -04:00
Nils Wallménius 438498a862 drm/amdgpu: Drop unused parameter for *get_sleep_divider_id_from_clock
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:24 -04:00
Nils Wallménius 354ef928a0 drm/amdgpu: Simplify calculation in *get_sleep_divider_id_from_clock
a / (1 << b) is equivalent to a >> b for unsigned values

Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:23 -04:00
Nils Wallménius 9887e425f9 drm/amdgpu: Use max macro in *get_sleep_divider_id_from_clock
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:23 -04:00
Nils Wallménius 859b8b6a27 drm/amd/powerplay: Use defined constants for minium engine clock
Replacing magic numbers in calculation of sleep divider id for fiji
and polaris.

Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:22 -04:00
Alex Deucher f9fbac64eb drm/amdgpu: add missing licenses on a couple of files
Noticed by n1s on IRC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:22 -04:00
Alex Deucher 7dae69a290 drm/amdgpu: fetch cu_info once at init
Fetch this info once at init and just store the results
for future requests.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:21 -04:00
Christian König edf600dac6 drm/amd: cleanup remaining spaces and tabs v2
This is the result of running the following commands:
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \;

v2: drop changes to DAL and internal headers

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:20 -04:00
Christian König b1c8a81fdd drm/amdgpu: remove define for reserved client ID
Just set it to zero instead.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:20 -04:00
Christian König 79aa03893d drm/amdgpu: remove owner cleanup v2
The client ID is now unique, so no need to resert the owner fields any more.

v2: remove unused variables as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:19 -04:00
Christian König 0ea54b9b6c drm/amdgpu: make the VMID owner always 64bit
Otherwise we could (in theory) run into problems on 32bit systems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:18 -04:00
Christian König 4d9c514d8c drm/amdgpu: two minor 80 char fixes
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:18 -04:00
Monk Liu 794ff5710e drm/amdgpu: hdp flush&inval should always do
This fixes Tonga vm-fault issue when running disaster
(a multiple context GL heavy tests),
We should always flush & invalidate hdp no matter vm
used or not.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-05-11 12:31:17 -04:00
Tom St Denis f0f3a8fbdb drm/amd/amdgpu: Enable CG for UVD6 on Carrizo
Tested via vdpau/mpv.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:17 -04:00
Chunming Zhou fe70766487 drm/amdgpu: add pipeline sync for compute job
hardware ring is async processed, the job is executed in parallel.
In some case, this will result vm fault, like jobs with different vmids.

This works around a CPC hw issue which will eventually be fixed in fw.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:16 -04:00
Monk Liu c5637837ba drm/amdgpu: keep vm in job instead of ib (v2)
ib.vm is a legacy way to get vm, after scheduler
implemented vm should be get from job, and all ibs
from one job share the same vm, no need to keep ib.vm
just move vm field to job.

this patch as well add job as paramter to ib_schedule
so it can get vm from job->vm.

v2: agd: sqaush in:
drm/amdgpu: check if ring emit_vm_flush exists in vm flush

No vm flush on engines that don't support VM.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=95195

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:16 -04:00
Chunming Zhou 1f207f81e3 drm/amdgpu: make vmid owner be client_id
Using the pointer is not adequate.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:15 -04:00
Chunming Zhou 031e2983e8 drm/amdgpu: add client id for every vm
This adds a unique id for each vm client so we can
properly track them.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:14 -04:00
Chunming Zhou 444066b915 drm/amdgpu: fix wrong release of vmid owner
The release of the vmid owner was not handled
correctly.  We need to take the lock and walk
the lru list.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:14 -04:00
Tvrtko Ursulin ac657f6461 drm/i915: Introduce IS_GEN macro
To be used for more efficient Gen range checking.

v2: Remove spurious chunk. (Chris Wilson)
v3: Rebase.
v4: Renamed from INTEL_GEN_RANGE and added GEN_FOREVER.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v3)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462874228-6601-1-git-send-email-tvrtko.ursulin@linux.intel.com
2016-05-11 12:27:28 +01:00
Tvrtko Ursulin ac208a8b9a drm/i915: Do not use a bitfield for INTEL_INFO->num_pipes
It just makes more work for the compiler and generates more code.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-05-11 12:27:28 +01:00
Tvrtko Ursulin 7e22dbbbae drm/i915: Replace "INTEL_INFO->gen == x" checks with IS_GENx
This way optimization from a previous patch works even better.

v2: Rebase.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2016-05-11 12:27:27 +01:00
Tvrtko Ursulin ab0d24ac38 drm/i915: Promote IS_BROADWELL to a simple macro
If we allow it a dedicated flag in dev_priv we enable the
compiler to nicely optimize conditions like IS_HASSWELL ||
IS_BROADWELL.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-05-11 12:27:27 +01:00
Tvrtko Ursulin ae5702d245 drm/i915: Make IS_GENx macros work on a mask
If instead of numerical comparison me make these test a
bitmask, we enable the compiler to optimize all instances
of IS_GENx || IS_GENy.

v2: Make bit zero of gen mask mean gen 1.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-05-11 12:27:27 +01:00
Xinliang Liu 165cccc843 drm/hisilicon: Fix DRM_INFO printed issue
This patch fixed the bellow no DRM_INFO is printed issue:

if (!delay_count)
	DRM_INFO("phylock and phystopstateclklane is not ready.\n");

There will some printed issues with above info, under certain
circumstances:

If ((BIT(0) | BIT(2)) & val) is never true, break will not happen and
delay_count will be max u32 value (?), and no DRM_INFO is printed.

Also if ((BIT(0) | BIT(2)) & val) is true at the last possible
loop round, break happens, but now delay_count is already zero
( because of earlier delay_count-- ) and DRM_INFO is erroneously
printed.

Thanks to Juha Leppänen, he reports to me this issue.

Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
Reported-by: Juha Leppänen <juha_efku@dnainternet.net>
2016-05-11 19:05:36 +08:00
Xinliang Liu 12cb4c87aa drm/hisilicon: Make kirin_drm_unbind sufficient
Remove deprecated drm_put_dev.
Clean up everything needed in unbind.
Thanks to Daniel Vetter, this issue is reported by him.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reported-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
2016-05-11 19:05:36 +08:00