- Chris provides documentation and DTS fixes for the bcm11351 CPU enable-method in preparation
for adding support for the BCM23550 SoC and its corresponding documentation, SoC dtsi
and the Sparrow board DTS file
- Jon adds MSI support to the PCI nodes, updates the secondary cores boot address for the B0
production revision of the Northstar Plus SoC, adds a DTS for the BCM958625HR board, another
one for the BCM958525XMC board, and finally adds the PL330 DMA controller to the NSP DTS
- Rafal enables the SPI NOR flash on dual flash systems (NAND + SPI) on the BCM5301x SoCs
and devices
- Florian adds support for the BCM5301x built-in Ethernet switch by adding nodes for the
Gigabit MAC controllers and the Switch Register Access block, and finally updates the
SmartRG SR-400AC board with its switch port layout
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXY1hBAAoJEIfQlpxEBwcEY6gQAKRAF/CK920lh6BeW0JKgzix
L1J2TBirqYv/yRB0hiBY9myh61yV31SgCksgJbJrOREWTJMxx8lLve3jnCqVdzd+
ODfgb2QLGgQJZfLFaK2JHxY8NkgrrABkNEb7kIv+MCes3FrtBJHtH02y661w5goB
t5zJyvz9FeIQJULFv9jNyVpa+A7Hy8jg1Wvin62mF7uXewFEr9kcddbeXsmRw/EB
j491pFNDw4lkYecyMWyb5c4QqJEtVWIFWxCFRDf4OvG3JhzvMWfyNfhSm9t4nPUU
pxadZsnVrPPYBQq5QC0zC5bSBCZHRgTt+JsXAl557rAGePuPSKTennri3ubxwQbi
9w8PevstBXKq0J6Ynl0lrqLAUrLbnt57bq49hxMM7ur0CXGL5CdzRKRkiUme4ZsB
G5shPXsYlfpCwjAvthshb1npreUxTyxQkO6D6y3Zojb/tlNrwBvV3QmqC8Lpe4wm
7J/hznwOUyhgm+IR92tSL+nyFd8gqOBAHOipUNDTQGix2BuYveAngh0I7lysVvQt
E47UAc6+y6IHt7iNbubZVfJ6HQnu5EZPoPwoev0/2Xbr0Bd7wBYshAYnVynkj0lf
9v47CYKNvaYDzXSacpxodA+iZMVgkGrRzoyMskaqzPgcBCnMiQeVLuivrUerx1in
yYxPjRCv+QMd1qbv3K4+
=0GWx
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.8/devicetree' of http://github.com/Broadcom/stblinux into next/dt
This pull request contains Device Tree changes for Broadcom ARM-based SoCs:
- Chris provides documentation and DTS fixes for the bcm11351 CPU enable-method in preparation
for adding support for the BCM23550 SoC and its corresponding documentation, SoC dtsi
and the Sparrow board DTS file
- Jon adds MSI support to the PCI nodes, updates the secondary cores boot address for the B0
production revision of the Northstar Plus SoC, adds a DTS for the BCM958625HR board, another
one for the BCM958525XMC board, and finally adds the PL330 DMA controller to the NSP DTS
- Rafal enables the SPI NOR flash on dual flash systems (NAND + SPI) on the BCM5301x SoCs
and devices
- Florian adds support for the BCM5301x built-in Ethernet switch by adding nodes for the
Gigabit MAC controllers and the Switch Register Access block, and finally updates the
SmartRG SR-400AC board with its switch port layout
* tag 'arm-soc/for-4.8/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: BCM5310x: Enable switch ports on SmartRG SR400AC
ARM: dts: BCM5301X: Add SRAB interrupts
ARM: dts: Enable SRAB switch and GMACs on 5301x DTS
ARM: dts: NSP: Add PL330 support
ARM: dts: NSP: Add XMC board support
ARM: dts: bcm23550: Add device tree files
Documentation: devicetree: Document BCM23550 bindings
ARM: BCM5301X: Enable SPI-NOR on dual flash devices
ARM: dts: NSP: Add new DT file for bcm958625hr
ARM: dts: NSP: modify second CPU address
ARM: dts: NSP: Add MSI support on PCI
ARM: BCM: modify Broadcom CPU enable method
ARM: dts: fix use of bcm11351 enable method
Documentation: Binding docs for bcm11351 enable method
Signed-off-by: Olof Johansson <olof@lixom.net>
be6e3f3160
