c39b06951f
Loading cursors to the LCD controller's SRAM can be corrupted when the configured pixel clock is relatively slow. This seems to be caused when we write back-to-back to the SRAM registers. There doesn't appear to be any status register we can read to check when an access has completed. Inserting a dummy read between the writes appears to fix the problem. Cc: <stable@vger.kernel.org> # 3.13 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Dave Airlie <airlied@redhat.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| armada_510.c | ||
| armada_crtc.c | ||
| armada_crtc.h | ||
| armada_debugfs.c | ||
| armada_drm.h | ||
| armada_drv.c | ||
| armada_fb.c | ||
| armada_fb.h | ||
| armada_fbdev.c | ||
| armada_gem.c | ||
| armada_gem.h | ||
| armada_hw.h | ||
| armada_ioctlP.h | ||
| armada_output.c | ||
| armada_output.h | ||
| armada_overlay.c | ||
| armada_slave.c | ||
| armada_slave.h | ||