[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
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#
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# SPI driver configuration
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#
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# NOTE: the reason this doesn't show SPI slave support is mostly that
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# nobody's needed a slave side API yet. The master-role API is not
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# fully appropriate there, so it'd need some thought to do well.
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#
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2008-04-28 17:14:16 +08:00
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menuconfig SPI
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
|
|
|
bool "SPI support"
|
2008-04-28 17:14:16 +08:00
|
|
|
depends on HAS_IOMEM
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
|
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help
|
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|
The "Serial Peripheral Interface" is a low level synchronous
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protocol. Chips that support SPI can have data transfer rates
|
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|
up to several tens of Mbit/sec. Chips are addressed with a
|
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controller and a chipselect. Most SPI slaves don't support
|
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|
dynamic device discovery; some are even write-only or read-only.
|
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|
2006-11-30 12:22:59 +08:00
|
|
|
SPI is widely used by microcontrollers to talk with sensors,
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
|
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|
eeprom and flash memory, codecs and various other controller
|
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|
chips, analog to digital (and d-to-a) converters, and more.
|
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|
MMC and SD cards can be accessed using SPI protocol; and for
|
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DataFlash cards used in MMC sockets, SPI must always be used.
|
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|
SPI is one of a family of similar protocols using a four wire
|
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interface (select, clock, data in, data out) including Microwire
|
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(half duplex), SSP, SSI, and PSP. This driver framework should
|
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work with most such devices and controllers.
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|
2008-04-28 17:14:16 +08:00
|
|
|
if SPI
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|
|
|
|
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
|
|
|
config SPI_DEBUG
|
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|
|
boolean "Debug support for SPI drivers"
|
2008-04-28 17:14:16 +08:00
|
|
|
depends on DEBUG_KERNEL
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
|
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help
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Say "yes" to enable debug messaging (like dev_dbg and pr_debug),
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sysfs, and debugfs support in SPI controller and protocol drivers.
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#
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# MASTER side ... talking to discrete SPI slave chips including microcontrollers
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#
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config SPI_MASTER
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# boolean "SPI Master Support"
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boolean
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default SPI
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help
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If your system has an master-capable SPI controller (which
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provides the clock and chipselect), you can enable that
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controller and the protocol drivers for the SPI slave chips
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that are connected.
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|
2008-07-24 12:29:53 +08:00
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if SPI_MASTER
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|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
|
|
|
comment "SPI Master Controller Drivers"
|
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|
2011-02-14 10:10:43 +08:00
|
|
|
config SPI_ALTERA
|
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|
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tristate "Altera SPI Controller"
|
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|
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select SPI_BITBANG
|
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help
|
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|
|
This is the driver for the Altera SPI Controller.
|
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|
2011-01-05 04:28:22 +08:00
|
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|
config SPI_ATH79
|
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tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
|
2013-03-28 19:34:56 +08:00
|
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|
depends on ATH79 && GPIOLIB
|
2011-01-05 04:28:22 +08:00
|
|
|
select SPI_BITBANG
|
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help
|
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|
|
This enables support for the SPI controller present on the
|
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Atheros AR71XX/AR724X/AR913X SoCs.
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|
2007-02-14 16:33:09 +08:00
|
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config SPI_ATMEL
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tristate "Atmel SPI Controller"
|
2014-08-30 00:10:31 +08:00
|
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depends on HAS_DMA
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on (ARCH_AT91 || AVR32 || COMPILE_TEST)
|
2007-02-14 16:33:09 +08:00
|
|
|
help
|
|
|
|
|
This selects a driver for the Atmel SPI Controller, present on
|
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|
|
many AT32 (AVR32) and AT91 (ARM) chips.
|
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2013-03-12 11:38:24 +08:00
|
|
|
config SPI_BCM2835
|
|
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|
|
tristate "BCM2835 SPI controller"
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on ARCH_BCM2835 || COMPILE_TEST
|
2013-03-12 11:38:24 +08:00
|
|
|
help
|
|
|
|
|
This selects a driver for the Broadcom BCM2835 SPI master.
|
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The BCM2835 contains two types of SPI master controller; the
|
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|
"universal SPI master", and the regular SPI controller. This driver
|
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is for the regular SPI controller. Slave mode operation is not also
|
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|
not supported.
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|
2012-04-24 06:18:08 +08:00
|
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|
config SPI_BFIN5XX
|
2007-05-07 05:50:34 +08:00
|
|
|
tristate "SPI controller driver for ADI Blackfin5xx"
|
2013-06-27 06:07:40 +08:00
|
|
|
depends on BLACKFIN && !BF60x
|
2007-05-07 05:50:34 +08:00
|
|
|
help
|
|
|
|
|
This is the SPI controller master driver for Blackfin 5xx processor.
|
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|
2014-04-04 16:27:17 +08:00
|
|
|
config SPI_ADI_V3
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|
|
tristate "SPI controller v3 for ADI"
|
2013-06-27 06:07:40 +08:00
|
|
|
depends on BF60x
|
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|
help
|
|
|
|
|
This is the SPI controller v3 master driver
|
|
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|
|
found on Blackfin 60x processor.
|
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|
2011-03-28 16:57:11 +08:00
|
|
|
config SPI_BFIN_SPORT
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|
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|
|
tristate "SPI bus via Blackfin SPORT"
|
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|
|
depends on BLACKFIN
|
|
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|
|
help
|
|
|
|
|
Enable support for a SPI bus via the Blackfin SPORT peripheral.
|
|
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|
|
2007-05-08 15:32:25 +08:00
|
|
|
config SPI_AU1550
|
2011-11-02 03:03:30 +08:00
|
|
|
tristate "Au1550/Au1200/Au1300 SPI Controller"
|
2013-01-17 10:53:55 +08:00
|
|
|
depends on MIPS_ALCHEMY
|
2007-05-08 15:32:25 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
If you say yes to this option, support will be included for the
|
2011-11-02 03:03:30 +08:00
|
|
|
PSC SPI controller found on Au1550, Au1200 and Au1300 series.
|
2007-05-08 15:32:25 +08:00
|
|
|
|
2014-08-18 00:33:38 +08:00
|
|
|
config SPI_BCM53XX
|
|
|
|
|
tristate "Broadcom BCM53xx SPI controller"
|
|
|
|
|
depends on ARCH_BCM_5301X
|
2014-09-26 14:18:31 +08:00
|
|
|
depends on BCMA_POSSIBLE
|
|
|
|
|
select BCMA
|
2014-08-18 00:33:38 +08:00
|
|
|
help
|
|
|
|
|
Enable support for the SPI controller on Broadcom BCM53xx ARM SoCs.
|
|
|
|
|
|
2012-02-01 18:14:09 +08:00
|
|
|
config SPI_BCM63XX
|
|
|
|
|
tristate "Broadcom BCM63xx SPI controller"
|
|
|
|
|
depends on BCM63XX
|
|
|
|
|
help
|
|
|
|
|
Enable support for the SPI controller on the Broadcom BCM63xx SoCs.
|
|
|
|
|
|
2013-11-30 19:42:06 +08:00
|
|
|
config SPI_BCM63XX_HSSPI
|
|
|
|
|
tristate "Broadcom BCM63XX HS SPI controller driver"
|
|
|
|
|
depends on BCM63XX || COMPILE_TEST
|
|
|
|
|
help
|
|
|
|
|
This enables support for the High Speed SPI controller present on
|
|
|
|
|
newer Broadcom BCM63XX SoCs.
|
|
|
|
|
|
2006-01-09 05:34:26 +08:00
|
|
|
config SPI_BITBANG
|
2009-01-07 06:41:41 +08:00
|
|
|
tristate "Utilities for Bitbanging SPI masters"
|
2006-01-09 05:34:26 +08:00
|
|
|
help
|
|
|
|
|
With a few GPIO pins, your system can bitbang the SPI protocol.
|
|
|
|
|
Select this to get SPI support through I/O pins (GPIO, parallel
|
|
|
|
|
port, etc). Or, some systems' SPI master controller drivers use
|
|
|
|
|
this code to manage the per-word or per-transfer accesses to the
|
|
|
|
|
hardware shift registers.
|
|
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|
|
|
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|
|
|
This is library code, and is automatically selected by drivers that
|
|
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|
|
need it. You only need to select this explicitly to support driver
|
|
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|
|
modules that aren't part of this kernel tree.
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
|
|
|
|
2006-01-09 05:34:29 +08:00
|
|
|
config SPI_BUTTERFLY
|
|
|
|
|
tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)"
|
2008-07-24 12:29:53 +08:00
|
|
|
depends on PARPORT
|
2006-01-09 05:34:29 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This uses a custom parallel port cable to connect to an AVR
|
|
|
|
|
Butterfly <http://www.atmel.com/products/avr/butterfly>, an
|
|
|
|
|
inexpensive battery powered microcontroller evaluation board.
|
|
|
|
|
This same cable can be used to flash new firmware.
|
|
|
|
|
|
2014-04-14 17:06:53 +08:00
|
|
|
config SPI_CADENCE
|
|
|
|
|
tristate "Cadence SPI controller"
|
2014-04-15 19:12:09 +08:00
|
|
|
depends on ARM
|
2014-04-14 17:06:53 +08:00
|
|
|
help
|
|
|
|
|
This selects the Cadence SPI controller master driver
|
|
|
|
|
used by Xilinx Zynq.
|
|
|
|
|
|
2012-11-08 01:30:29 +08:00
|
|
|
config SPI_CLPS711X
|
|
|
|
|
tristate "CLPS711X host SPI controller"
|
2014-03-26 16:53:18 +08:00
|
|
|
depends on ARCH_CLPS711X || COMPILE_TEST
|
2012-11-08 01:30:29 +08:00
|
|
|
help
|
|
|
|
|
This enables dedicated general purpose SPI/Microwire1-compatible
|
|
|
|
|
master mode interface (SSI1) for CLPS711X-based CPUs.
|
|
|
|
|
|
2010-01-21 04:49:44 +08:00
|
|
|
config SPI_COLDFIRE_QSPI
|
|
|
|
|
tristate "Freescale Coldfire QSPI controller"
|
2012-06-06 00:24:59 +08:00
|
|
|
depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x)
|
2010-01-21 04:49:44 +08:00
|
|
|
help
|
|
|
|
|
This enables support for the Coldfire QSPI controller in master
|
|
|
|
|
mode.
|
|
|
|
|
|
2009-12-17 06:02:18 +08:00
|
|
|
config SPI_DAVINCI
|
2010-10-12 14:28:02 +08:00
|
|
|
tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"
|
2013-07-25 08:31:37 +08:00
|
|
|
depends on ARCH_DAVINCI || ARCH_KEYSTONE
|
2009-12-17 06:02:18 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
2010-10-12 14:28:02 +08:00
|
|
|
SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
|
|
|
|
|
|
2013-08-08 22:09:50 +08:00
|
|
|
config SPI_EFM32
|
|
|
|
|
tristate "EFM32 SPI controller"
|
|
|
|
|
depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
|
|
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
Driver for the spi controller found on Energy Micro's EFM32 SoCs.
|
|
|
|
|
|
2010-05-06 12:47:04 +08:00
|
|
|
config SPI_EP93XX
|
|
|
|
|
tristate "Cirrus Logic EP93xx SPI controller"
|
2014-08-30 00:10:31 +08:00
|
|
|
depends on HAS_DMA
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on ARCH_EP93XX || COMPILE_TEST
|
2010-05-06 12:47:04 +08:00
|
|
|
help
|
|
|
|
|
This enables using the Cirrus EP93xx SPI controller in master
|
|
|
|
|
mode.
|
|
|
|
|
|
2012-05-20 21:46:19 +08:00
|
|
|
config SPI_FALCON
|
|
|
|
|
tristate "Falcon SPI controller support"
|
|
|
|
|
depends on SOC_FALCON
|
|
|
|
|
help
|
|
|
|
|
The external bus unit (EBU) found on the FALC-ON SoC has SPI
|
|
|
|
|
emulation that is designed for serial flash access. This driver
|
|
|
|
|
has only been tested with m25p80 type chips. The hardware has no
|
|
|
|
|
support for other types of SPI peripherals.
|
|
|
|
|
|
2009-01-07 06:41:41 +08:00
|
|
|
config SPI_GPIO
|
|
|
|
|
tristate "GPIO-based bitbanging SPI Master"
|
2013-03-28 19:34:56 +08:00
|
|
|
depends on GPIOLIB
|
2009-01-07 06:41:41 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This simple GPIO bitbanging SPI master uses the arch-neutral GPIO
|
|
|
|
|
interface to manage MOSI, MISO, SCK, and chipselect signals. SPI
|
|
|
|
|
slaves connected to a bus using this driver are configured as usual,
|
|
|
|
|
except that the spi_board_info.controller_data holds the GPIO number
|
|
|
|
|
for the chipselect used by this controller driver.
|
|
|
|
|
|
|
|
|
|
Note that this driver often won't achieve even 1 Mbit/sec speeds,
|
|
|
|
|
making it unusually slow for SPI. If your platform can inline
|
|
|
|
|
GPIO operations, you should be able to leverage that for better
|
|
|
|
|
speed with a custom version of this driver; see the source code.
|
|
|
|
|
|
2009-09-23 07:46:02 +08:00
|
|
|
config SPI_IMX
|
|
|
|
|
tristate "Freescale i.MX SPI controllers"
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on ARCH_MXC || COMPILE_TEST
|
2009-09-23 07:46:02 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This enables using the Freescale i.MX SPI controllers in master
|
|
|
|
|
mode.
|
|
|
|
|
|
2007-07-17 19:04:05 +08:00
|
|
|
config SPI_LM70_LLP
|
|
|
|
|
tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)"
|
2013-01-17 10:53:55 +08:00
|
|
|
depends on PARPORT
|
2007-07-17 19:04:05 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This driver supports the NS LM70 LLP Evaluation Board,
|
|
|
|
|
which interfaces to an LM70 temperature sensor using
|
|
|
|
|
a parallel port.
|
|
|
|
|
|
2009-11-05 06:34:18 +08:00
|
|
|
config SPI_MPC52xx
|
|
|
|
|
tristate "Freescale MPC52xx SPI (non-PSC) controller support"
|
2011-11-14 05:52:40 +08:00
|
|
|
depends on PPC_MPC52xx
|
2009-11-05 06:34:18 +08:00
|
|
|
help
|
|
|
|
|
This drivers supports the MPC52xx SPI controller in master SPI
|
|
|
|
|
mode.
|
|
|
|
|
|
2007-05-11 13:22:52 +08:00
|
|
|
config SPI_MPC52xx_PSC
|
|
|
|
|
tristate "Freescale MPC52xx PSC SPI controller"
|
2013-01-17 10:53:55 +08:00
|
|
|
depends on PPC_MPC52xx
|
2007-05-11 13:22:52 +08:00
|
|
|
help
|
|
|
|
|
This enables using the Freescale MPC52xx Programmable Serial
|
|
|
|
|
Controller in master SPI mode.
|
|
|
|
|
|
2010-04-30 21:21:27 +08:00
|
|
|
config SPI_MPC512x_PSC
|
|
|
|
|
tristate "Freescale MPC512x PSC SPI controller"
|
2012-02-23 17:37:55 +08:00
|
|
|
depends on PPC_MPC512x
|
2010-04-30 21:21:27 +08:00
|
|
|
help
|
|
|
|
|
This enables using the Freescale MPC5121 Programmable Serial
|
|
|
|
|
Controller in SPI master mode.
|
|
|
|
|
|
2010-10-12 18:18:31 +08:00
|
|
|
config SPI_FSL_LIB
|
2013-02-15 23:52:21 +08:00
|
|
|
tristate
|
|
|
|
|
depends on OF
|
|
|
|
|
|
|
|
|
|
config SPI_FSL_CPM
|
2010-10-12 18:18:31 +08:00
|
|
|
tristate
|
|
|
|
|
depends on FSL_SOC
|
|
|
|
|
|
2010-10-12 18:18:30 +08:00
|
|
|
config SPI_FSL_SPI
|
2013-02-15 23:52:26 +08:00
|
|
|
bool "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller"
|
2013-02-15 23:52:21 +08:00
|
|
|
depends on OF
|
2010-10-12 18:18:31 +08:00
|
|
|
select SPI_FSL_LIB
|
2013-02-15 23:52:21 +08:00
|
|
|
select SPI_FSL_CPM if FSL_SOC
|
2006-05-21 06:00:15 +08:00
|
|
|
help
|
2010-10-12 18:18:30 +08:00
|
|
|
This enables using the Freescale SPI controllers in master mode.
|
|
|
|
|
MPC83xx platform uses the controller in cpu mode or CPM/QE mode.
|
|
|
|
|
MPC8569 uses the controller in QE mode, MPC8610 in cpu mode.
|
2013-02-15 23:52:26 +08:00
|
|
|
This also enables using the Aeroflex Gaisler GRLIB SPI controller in
|
|
|
|
|
master mode.
|
2006-05-21 06:00:15 +08:00
|
|
|
|
2013-08-16 11:08:55 +08:00
|
|
|
config SPI_FSL_DSPI
|
|
|
|
|
tristate "Freescale DSPI controller"
|
|
|
|
|
select SPI_BITBANG
|
2014-02-12 15:29:05 +08:00
|
|
|
select REGMAP_MMIO
|
2013-09-10 16:46:33 +08:00
|
|
|
depends on SOC_VF610 || COMPILE_TEST
|
2013-08-16 11:08:55 +08:00
|
|
|
help
|
|
|
|
|
This enables support for the Freescale DSPI controller in master
|
|
|
|
|
mode. VF610 platform uses the controller.
|
|
|
|
|
|
spi/fsl_spi: add eSPI controller support
Add eSPI controller support based on the library code spi_fsl_lib.c.
The eSPI controller is newer controller 85xx/Pxxx devices supported.
There're some differences comparing to the SPI controller:
1. Has different register map and different bit definition
So leave the code operated the register to the driver code, not
the common code.
2. Support 4 dedicated chip selects
The software can't controll the chip selects directly, The SPCOM[CS]
field is used to select which chip selects is used, and the
SPCOM[TRANLEN] field is set to tell the controller how long the CS
signal need to be asserted. So the driver doesn't need the chipselect
related function when transfering data, just set corresponding register
fields to controll the chipseclect.
3. Different Transmit/Receive FIFO access register behavior
For SPI controller, the Tx/Rx FIFO access register can hold only
one character regardless of the character length, but for eSPI
controller, the register can hold 4 or 2 characters according to
the character lengths. Access the Tx/Rx FIFO access register of the
eSPI controller will shift out/in 4/2 characters one time. For SPI
subsystem, the command and data are put into different transfers, so
we need to combine all the transfers to one transfer in order to pass
the transfer to eSPI controller.
4. The max transaction length limitation
The max transaction length one time is limitted by the SPCOM[TRANSLEN]
field which is 0xFFFF. When used mkfs.ext2 command to create ext2
filesystem on the flash, the read length will exceed the max value of
the SPCOM[TRANSLEN] field.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12 18:18:32 +08:00
|
|
|
config SPI_FSL_ESPI
|
2011-12-08 04:18:16 +08:00
|
|
|
bool "Freescale eSPI controller"
|
spi/fsl_spi: add eSPI controller support
Add eSPI controller support based on the library code spi_fsl_lib.c.
The eSPI controller is newer controller 85xx/Pxxx devices supported.
There're some differences comparing to the SPI controller:
1. Has different register map and different bit definition
So leave the code operated the register to the driver code, not
the common code.
2. Support 4 dedicated chip selects
The software can't controll the chip selects directly, The SPCOM[CS]
field is used to select which chip selects is used, and the
SPCOM[TRANLEN] field is set to tell the controller how long the CS
signal need to be asserted. So the driver doesn't need the chipselect
related function when transfering data, just set corresponding register
fields to controll the chipseclect.
3. Different Transmit/Receive FIFO access register behavior
For SPI controller, the Tx/Rx FIFO access register can hold only
one character regardless of the character length, but for eSPI
controller, the register can hold 4 or 2 characters according to
the character lengths. Access the Tx/Rx FIFO access register of the
eSPI controller will shift out/in 4/2 characters one time. For SPI
subsystem, the command and data are put into different transfers, so
we need to combine all the transfers to one transfer in order to pass
the transfer to eSPI controller.
4. The max transaction length limitation
The max transaction length one time is limitted by the SPCOM[TRANSLEN]
field which is 0xFFFF. When used mkfs.ext2 command to create ext2
filesystem on the flash, the read length will exceed the max value of
the SPCOM[TRANSLEN] field.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12 18:18:32 +08:00
|
|
|
depends on FSL_SOC
|
|
|
|
|
select SPI_FSL_LIB
|
|
|
|
|
help
|
|
|
|
|
This enables using the Freescale eSPI controllers in master mode.
|
|
|
|
|
From MPC8536, 85xx platform uses the controller, and all P10xx,
|
|
|
|
|
P20xx, P30xx,P40xx, P50xx uses this controller.
|
|
|
|
|
|
2011-02-14 10:20:39 +08:00
|
|
|
config SPI_OC_TINY
|
|
|
|
|
tristate "OpenCores tiny SPI"
|
2013-03-28 19:34:56 +08:00
|
|
|
depends on GPIOLIB
|
2011-02-14 10:20:39 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This is the driver for OpenCores tiny SPI master controller.
|
|
|
|
|
|
2012-08-23 03:25:07 +08:00
|
|
|
config SPI_OCTEON
|
|
|
|
|
tristate "Cavium OCTEON SPI controller"
|
2013-05-22 23:10:46 +08:00
|
|
|
depends on CAVIUM_OCTEON_SOC
|
2012-08-23 03:25:07 +08:00
|
|
|
help
|
|
|
|
|
SPI host driver for the hardware found on some Cavium OCTEON
|
|
|
|
|
SOCs.
|
|
|
|
|
|
2007-02-12 16:52:37 +08:00
|
|
|
config SPI_OMAP_UWIRE
|
|
|
|
|
tristate "OMAP1 MicroWire"
|
2008-07-24 12:29:53 +08:00
|
|
|
depends on ARCH_OMAP1
|
2007-02-12 16:52:37 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This hooks up to the MicroWire controller on OMAP1 chips.
|
|
|
|
|
|
2007-07-17 19:04:13 +08:00
|
|
|
config SPI_OMAP24XX
|
2010-05-15 03:05:25 +08:00
|
|
|
tristate "McSPI driver for OMAP"
|
2014-08-30 00:10:31 +08:00
|
|
|
depends on HAS_DMA
|
2014-02-09 05:01:21 +08:00
|
|
|
depends on ARM || ARM64 || AVR32 || HEXAGON || MIPS || SUPERH
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on ARCH_OMAP2PLUS || COMPILE_TEST
|
2007-07-17 19:04:13 +08:00
|
|
|
help
|
2010-05-15 03:05:25 +08:00
|
|
|
SPI master controller for OMAP24XX and later Multichannel SPI
|
2007-07-17 19:04:13 +08:00
|
|
|
(McSPI) modules.
|
2007-02-12 16:52:39 +08:00
|
|
|
|
2013-08-20 21:25:48 +08:00
|
|
|
config SPI_TI_QSPI
|
|
|
|
|
tristate "DRA7xxx QSPI controller support"
|
|
|
|
|
depends on ARCH_OMAP2PLUS || COMPILE_TEST
|
|
|
|
|
help
|
|
|
|
|
QSPI master controller for DRA7xxx used for flash devices.
|
|
|
|
|
This device supports single, dual and quad read support, while
|
|
|
|
|
it only supports single write mode.
|
|
|
|
|
|
2009-12-13 16:02:11 +08:00
|
|
|
config SPI_OMAP_100K
|
|
|
|
|
tristate "OMAP SPI 100K"
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST
|
2009-12-13 16:02:11 +08:00
|
|
|
help
|
|
|
|
|
OMAP SPI 100K master controller for omap7xx boards.
|
|
|
|
|
|
2008-08-06 04:01:09 +08:00
|
|
|
config SPI_ORION
|
2013-01-17 10:53:55 +08:00
|
|
|
tristate "Orion SPI master"
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on PLAT_ORION || COMPILE_TEST
|
2008-08-06 04:01:09 +08:00
|
|
|
help
|
|
|
|
|
This enables using the SPI master controller on the Orion chips.
|
|
|
|
|
|
2009-06-09 15:11:42 +08:00
|
|
|
config SPI_PL022
|
2011-05-19 20:13:19 +08:00
|
|
|
tristate "ARM AMBA PL022 SSP controller"
|
|
|
|
|
depends on ARM_AMBA
|
2009-06-09 15:11:42 +08:00
|
|
|
default y if MACH_U300
|
2009-09-23 07:46:01 +08:00
|
|
|
default y if ARCH_REALVIEW
|
|
|
|
|
default y if INTEGRATOR_IMPD1
|
|
|
|
|
default y if ARCH_VERSATILE
|
2009-06-09 15:11:42 +08:00
|
|
|
help
|
|
|
|
|
This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP
|
|
|
|
|
controller. If you have an embedded system with an AMBA(R)
|
|
|
|
|
bus and a PL022 controller, say Y or M here.
|
|
|
|
|
|
2009-09-23 07:45:58 +08:00
|
|
|
config SPI_PPC4xx
|
|
|
|
|
tristate "PPC4xx SPI Controller"
|
2012-02-23 17:37:55 +08:00
|
|
|
depends on PPC32 && 4xx
|
2009-09-23 07:45:58 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This selects a driver for the PPC4xx SPI Controller.
|
|
|
|
|
|
2013-01-22 18:26:28 +08:00
|
|
|
config SPI_PXA2XX_PXADMA
|
|
|
|
|
bool "PXA2xx SSP legacy PXA DMA API support"
|
|
|
|
|
depends on SPI_PXA2XX && ARCH_PXA
|
|
|
|
|
help
|
2013-01-22 18:26:29 +08:00
|
|
|
Enable PXA private legacy DMA API support. Note that this is
|
|
|
|
|
deprecated in favor of generic DMA engine API.
|
|
|
|
|
|
|
|
|
|
config SPI_PXA2XX_DMA
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on SPI_PXA2XX && !SPI_PXA2XX_PXADMA
|
2013-01-22 18:26:28 +08:00
|
|
|
|
2006-03-08 15:53:24 +08:00
|
|
|
config SPI_PXA2XX
|
|
|
|
|
tristate "PXA2xx SSP SPI master"
|
2013-08-30 15:39:53 +08:00
|
|
|
depends on (ARCH_PXA || PCI || ACPI)
|
2010-11-24 17:17:14 +08:00
|
|
|
select PXA_SSP if ARCH_PXA
|
2006-03-08 15:53:24 +08:00
|
|
|
help
|
2010-11-24 17:17:14 +08:00
|
|
|
This enables using a PXA2xx or Sodaville SSP port as a SPI master
|
|
|
|
|
controller. The driver can be configured to use any SSP port and
|
|
|
|
|
additional documentation can be found a Documentation/spi/pxa2xx.
|
|
|
|
|
|
|
|
|
|
config SPI_PXA2XX_PCI
|
2014-07-25 01:10:54 +08:00
|
|
|
def_tristate SPI_PXA2XX && PCI && COMMON_CLK
|
2006-03-08 15:53:24 +08:00
|
|
|
|
2014-07-01 09:03:59 +08:00
|
|
|
config SPI_ROCKCHIP
|
|
|
|
|
tristate "Rockchip SPI controller driver"
|
2014-07-05 19:49:30 +08:00
|
|
|
depends on ARM || ARM64 || AVR32 || HEXAGON || MIPS || SUPERH
|
2014-07-01 09:03:59 +08:00
|
|
|
help
|
|
|
|
|
This selects a driver for Rockchip SPI controller.
|
|
|
|
|
|
|
|
|
|
If you say yes to this option, support will be included for
|
|
|
|
|
RK3066, RK3188 and RK3288 families of SPI controller.
|
|
|
|
|
Rockchip SPI controller support DMA transport and PIO mode.
|
|
|
|
|
The main usecase of this controller is to use spi flash as boot
|
|
|
|
|
device.
|
|
|
|
|
|
2012-03-07 13:46:25 +08:00
|
|
|
config SPI_RSPI
|
2014-01-21 23:10:09 +08:00
|
|
|
tristate "Renesas RSPI/QSPI controller"
|
2014-07-10 05:27:07 +08:00
|
|
|
depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST
|
2012-03-07 13:46:25 +08:00
|
|
|
help
|
2014-01-21 23:10:09 +08:00
|
|
|
SPI driver for Renesas RSPI and QSPI blocks.
|
2012-03-07 13:46:25 +08:00
|
|
|
|
2014-02-14 00:21:38 +08:00
|
|
|
config SPI_QUP
|
|
|
|
|
tristate "Qualcomm SPI controller with QUP interface"
|
2014-04-07 22:15:45 +08:00
|
|
|
depends on ARCH_QCOM || (ARM && COMPILE_TEST)
|
2014-02-14 00:21:38 +08:00
|
|
|
help
|
|
|
|
|
Qualcomm Universal Peripheral (QUP) core is an AHB slave that
|
|
|
|
|
provides a common data path (an output FIFO and an input FIFO)
|
|
|
|
|
for serial peripheral interface (SPI) mini-core. SPI in master
|
|
|
|
|
mode supports up to 50MHz, up to four chip selects, programmable
|
|
|
|
|
data path from 4 bits to 32 bits and numerous protocol variants.
|
|
|
|
|
|
|
|
|
|
This driver can also be built as a module. If so, the module
|
|
|
|
|
will be called spi_qup.
|
2012-03-07 13:46:25 +08:00
|
|
|
|
2007-02-12 16:52:36 +08:00
|
|
|
config SPI_S3C24XX
|
|
|
|
|
tristate "Samsung S3C24XX series SPI"
|
2013-01-17 10:53:55 +08:00
|
|
|
depends on ARCH_S3C24XX
|
2007-07-17 19:04:09 +08:00
|
|
|
select SPI_BITBANG
|
2007-02-12 16:52:36 +08:00
|
|
|
help
|
|
|
|
|
SPI driver for Samsung S3C24XX series ARM SoCs
|
|
|
|
|
|
2009-12-15 14:20:24 +08:00
|
|
|
config SPI_S3C24XX_FIQ
|
|
|
|
|
bool "S3C24XX driver with FIQ pseudo-DMA"
|
|
|
|
|
depends on SPI_S3C24XX
|
|
|
|
|
select FIQ
|
|
|
|
|
help
|
|
|
|
|
Enable FIQ support for the S3C24XX SPI driver to provide pseudo
|
|
|
|
|
DMA by using the fast-interrupt request framework, This allows
|
|
|
|
|
the driver to get DMA-like performance when there are either
|
|
|
|
|
no free DMA channels, or when doing transfers that required both
|
|
|
|
|
TX and RX data paths.
|
|
|
|
|
|
2009-11-30 15:39:42 +08:00
|
|
|
config SPI_S3C64XX
|
|
|
|
|
tristate "Samsung S3C64XX series type SPI"
|
2013-09-25 00:07:46 +08:00
|
|
|
depends on PLAT_SAMSUNG
|
2013-10-17 03:10:58 +08:00
|
|
|
select S3C64XX_PL080 if ARCH_S3C64XX
|
2009-11-30 15:39:42 +08:00
|
|
|
help
|
|
|
|
|
SPI driver for Samsung S3C64XX and newer SoCs.
|
|
|
|
|
|
2012-08-19 00:06:27 +08:00
|
|
|
config SPI_SC18IS602
|
|
|
|
|
tristate "NXP SC18IS602/602B/603 I2C to SPI bridge"
|
|
|
|
|
depends on I2C
|
|
|
|
|
help
|
|
|
|
|
SPI driver for NXP SC18IS602/602B/603 I2C to SPI bridge.
|
|
|
|
|
|
2009-11-26 19:10:05 +08:00
|
|
|
config SPI_SH_MSIOF
|
|
|
|
|
tristate "SuperH MSIOF SPI controller"
|
2014-07-10 05:27:08 +08:00
|
|
|
depends on HAVE_CLK && HAS_DMA
|
2013-11-27 09:18:36 +08:00
|
|
|
depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST
|
2009-11-26 19:10:05 +08:00
|
|
|
help
|
2012-11-07 19:40:05 +08:00
|
|
|
SPI driver for SuperH and SH Mobile MSIOF blocks.
|
2009-11-26 19:10:05 +08:00
|
|
|
|
2011-02-15 09:30:32 +08:00
|
|
|
config SPI_SH
|
|
|
|
|
tristate "SuperH SPI controller"
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on SUPERH || COMPILE_TEST
|
2011-02-15 09:30:32 +08:00
|
|
|
help
|
|
|
|
|
SPI driver for SuperH SPI blocks.
|
|
|
|
|
|
2008-02-06 17:38:15 +08:00
|
|
|
config SPI_SH_SCI
|
|
|
|
|
tristate "SuperH SCI SPI controller"
|
2008-07-24 12:29:53 +08:00
|
|
|
depends on SUPERH
|
2008-02-06 17:38:15 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
SPI driver for SuperH SCI blocks.
|
|
|
|
|
|
2012-03-02 09:10:17 +08:00
|
|
|
config SPI_SH_HSPI
|
|
|
|
|
tristate "SuperH HSPI controller"
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on ARCH_SHMOBILE || COMPILE_TEST
|
2012-03-02 09:10:17 +08:00
|
|
|
help
|
|
|
|
|
SPI driver for SuperH HSPI blocks.
|
|
|
|
|
|
2012-02-13 17:45:38 +08:00
|
|
|
config SPI_SIRF
|
|
|
|
|
tristate "CSR SiRFprimaII SPI controller"
|
2013-08-06 18:37:32 +08:00
|
|
|
depends on SIRF_DMA
|
2012-02-13 17:45:38 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
SPI driver for CSR SiRFprimaII SoCs
|
|
|
|
|
|
spi: sunxi: Add Allwinner A10 SPI controller driver
The older Allwinner SoCs (A10, A13, A10s and A20) all have the same SPI
controller.
Unfortunately, this SPI controller, even though quite similar, is significantly
different from the recently supported A31 SPI controller (different registers
offset, split/merged registers, etc.). Supporting both controllers in a single
driver would be unreasonable, hence the addition of a new driver.
Like its more recent counterpart, it supports DMA, but the driver only does PIO
until we have a dmaengine driver for this platform.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 05:35:53 +08:00
|
|
|
config SPI_SUN4I
|
|
|
|
|
tristate "Allwinner A10 SoCs SPI controller"
|
|
|
|
|
depends on ARCH_SUNXI || COMPILE_TEST
|
|
|
|
|
help
|
|
|
|
|
SPI driver for Allwinner sun4i, sun5i and sun7i SoCs
|
|
|
|
|
|
2014-02-05 21:05:05 +08:00
|
|
|
config SPI_SUN6I
|
|
|
|
|
tristate "Allwinner A31 SPI controller"
|
|
|
|
|
depends on ARCH_SUNXI || COMPILE_TEST
|
2014-02-06 18:53:51 +08:00
|
|
|
depends on RESET_CONTROLLER
|
2014-02-05 21:05:05 +08:00
|
|
|
help
|
|
|
|
|
This enables using the SPI controller on the Allwinner A31 SoCs.
|
|
|
|
|
|
2012-08-03 23:26:11 +08:00
|
|
|
config SPI_MXS
|
|
|
|
|
tristate "Freescale MXS SPI controller"
|
|
|
|
|
depends on ARCH_MXS
|
|
|
|
|
select STMP_DEVICE
|
|
|
|
|
help
|
|
|
|
|
SPI driver for Freescale MXS devices.
|
|
|
|
|
|
2013-02-22 20:37:39 +08:00
|
|
|
config SPI_TEGRA114
|
|
|
|
|
tristate "NVIDIA Tegra114 SPI Controller"
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
|
2014-08-30 00:10:31 +08:00
|
|
|
depends on RESET_CONTROLLER && HAS_DMA
|
2013-02-22 20:37:39 +08:00
|
|
|
help
|
|
|
|
|
SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller
|
|
|
|
|
is different than the older SoCs SPI controller and also register interface
|
|
|
|
|
get changed with this controller.
|
|
|
|
|
|
2012-11-14 08:24:47 +08:00
|
|
|
config SPI_TEGRA20_SFLASH
|
|
|
|
|
tristate "Nvidia Tegra20 Serial flash Controller"
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on ARCH_TEGRA || COMPILE_TEST
|
2013-11-07 07:31:24 +08:00
|
|
|
depends on RESET_CONTROLLER
|
2012-11-14 08:24:47 +08:00
|
|
|
help
|
|
|
|
|
SPI driver for Nvidia Tegra20 Serial flash Controller interface.
|
|
|
|
|
The main usecase of this controller is to use spi flash as boot
|
|
|
|
|
device.
|
|
|
|
|
|
2012-10-30 15:04:05 +08:00
|
|
|
config SPI_TEGRA20_SLINK
|
|
|
|
|
tristate "Nvidia Tegra20/Tegra30 SLINK Controller"
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
|
2014-08-30 00:10:31 +08:00
|
|
|
depends on RESET_CONTROLLER && HAS_DMA
|
2012-10-30 15:04:05 +08:00
|
|
|
help
|
|
|
|
|
SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface.
|
|
|
|
|
|
2010-10-09 02:44:49 +08:00
|
|
|
config SPI_TOPCLIFF_PCH
|
2011-10-28 08:35:21 +08:00
|
|
|
tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI"
|
2014-05-16 22:47:18 +08:00
|
|
|
depends on PCI && (X86_32 || COMPILE_TEST)
|
2010-10-09 02:44:49 +08:00
|
|
|
help
|
2010-10-09 02:56:13 +08:00
|
|
|
SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus
|
|
|
|
|
used in some x86 embedded processors.
|
2010-10-09 02:44:49 +08:00
|
|
|
|
2011-10-28 08:35:21 +08:00
|
|
|
This driver also supports the ML7213/ML7223/ML7831, a companion chip
|
|
|
|
|
for the Atom E6xx series and compatible with the Intel EG20T PCH.
|
2011-06-07 13:50:10 +08:00
|
|
|
|
2007-07-17 19:04:15 +08:00
|
|
|
config SPI_TXX9
|
|
|
|
|
tristate "Toshiba TXx9 SPI controller"
|
2013-07-06 02:42:58 +08:00
|
|
|
depends on GPIOLIB && (CPU_TX49XX || COMPILE_TEST)
|
2007-07-17 19:04:15 +08:00
|
|
|
help
|
|
|
|
|
SPI driver for Toshiba TXx9 MIPS SoCs
|
|
|
|
|
|
2012-07-20 00:44:07 +08:00
|
|
|
config SPI_XCOMM
|
|
|
|
|
tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver"
|
|
|
|
|
depends on I2C
|
|
|
|
|
help
|
|
|
|
|
Support for the SPI-I2C bridge found on the Analog Devices
|
|
|
|
|
AD-FMCOMMS1-EBZ board.
|
|
|
|
|
|
2007-07-17 19:04:11 +08:00
|
|
|
config SPI_XILINX
|
2009-11-13 19:28:55 +08:00
|
|
|
tristate "Xilinx SPI controller common module"
|
2013-01-17 10:53:55 +08:00
|
|
|
depends on HAS_IOMEM
|
2007-07-17 19:04:11 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This exposes the SPI controller IP from the Xilinx EDK.
|
|
|
|
|
|
|
|
|
|
See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
|
|
|
|
|
Product Specification document (DS464) for hardware details.
|
|
|
|
|
|
2009-11-13 19:28:55 +08:00
|
|
|
Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)"
|
|
|
|
|
|
2014-03-13 01:55:24 +08:00
|
|
|
config SPI_XTENSA_XTFPGA
|
|
|
|
|
tristate "Xtensa SPI controller for xtfpga"
|
2014-03-20 18:08:04 +08:00
|
|
|
depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST
|
2014-03-13 01:55:24 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
SPI driver for xtfpga SPI master controller.
|
|
|
|
|
|
|
|
|
|
This simple SPI master controller is built into xtfpga bitstreams
|
|
|
|
|
and is used to control daughterboard audio codec. It always transfers
|
|
|
|
|
16 bit words in SPI mode 0, automatically asserting CS on transfer
|
|
|
|
|
start and deasserting on end.
|
|
|
|
|
|
|
|
|
|
|
2009-12-01 22:29:20 +08:00
|
|
|
config SPI_NUC900
|
|
|
|
|
tristate "Nuvoton NUC900 series SPI"
|
2013-01-17 10:53:55 +08:00
|
|
|
depends on ARCH_W90X900
|
2009-12-01 22:29:20 +08:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
SPI driver for Nuvoton NUC900 series ARM SoCs
|
|
|
|
|
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
|
|
|
#
|
|
|
|
|
# Add new SPI master controllers in alphabetical order above this line
|
|
|
|
|
#
|
|
|
|
|
|
2009-12-15 06:20:22 +08:00
|
|
|
config SPI_DESIGNWARE
|
2010-01-22 00:55:54 +08:00
|
|
|
tristate "DesignWare SPI controller core support"
|
2009-12-15 06:20:22 +08:00
|
|
|
help
|
|
|
|
|
general driver for SPI controller core from DesignWare
|
|
|
|
|
|
|
|
|
|
config SPI_DW_PCI
|
|
|
|
|
tristate "PCI interface driver for DW SPI core"
|
|
|
|
|
depends on SPI_DESIGNWARE && PCI
|
|
|
|
|
|
2010-12-24 13:59:11 +08:00
|
|
|
config SPI_DW_MID_DMA
|
2014-09-12 20:11:59 +08:00
|
|
|
bool "DMA support for DW SPI controller on Intel MID platform"
|
2010-12-24 13:59:11 +08:00
|
|
|
depends on SPI_DW_PCI && INTEL_MID_DMAC
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2010-01-21 22:46:42 +08:00
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config SPI_DW_MMIO
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tristate "Memory-mapped io interface driver for DW SPI core"
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2014-01-31 18:07:48 +08:00
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depends on SPI_DESIGNWARE
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2010-01-21 22:46:42 +08:00
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[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
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#
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|
# There are lots of SPI device types, with sensors and memory
|
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# being probably the most widely used ones.
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#
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|
comment "SPI Protocol Masters"
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|
2007-05-08 15:32:15 +08:00
|
|
|
config SPI_SPIDEV
|
|
|
|
|
tristate "User mode SPI device driver support"
|
|
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|
|
help
|
|
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|
|
This supports user mode SPI protocol drivers.
|
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Note that this application programming interface is EXPERIMENTAL
|
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and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes.
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|
2007-07-17 19:04:10 +08:00
|
|
|
config SPI_TLE62X0
|
|
|
|
|
tristate "Infineon TLE62X0 (for power switching)"
|
2008-07-24 12:29:53 +08:00
|
|
|
depends on SYSFS
|
2007-07-17 19:04:10 +08:00
|
|
|
help
|
|
|
|
|
SPI driver for Infineon TLE62X0 series line driver chips,
|
|
|
|
|
such as the TLE6220, TLE6230 and TLE6240. This provides a
|
|
|
|
|
sysfs interface, with each line presented as a kind of GPIO
|
|
|
|
|
exposing both switch control and diagnostic feedback.
|
|
|
|
|
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
|
|
|
#
|
|
|
|
|
# Add new SPI protocol masters in alphabetical order above this line
|
|
|
|
|
#
|
|
|
|
|
|
2008-07-24 12:29:53 +08:00
|
|
|
endif # SPI_MASTER
|
|
|
|
|
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 05:34:19 +08:00
|
|
|
# (slave support would go here)
|
|
|
|
|
|
2008-04-28 17:14:16 +08:00
|
|
|
endif # SPI
|