Add the Atmel Pulse Density Modulation Interface Controller (PDMIC) driver
as a module. It's used by sama5d2 SoC for instance.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add both Atmel watchdog timers to the multi_v7_defconfig. They are added
as part of the kernel because it's a core piece of the system.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add the HLCDC drivers to multi_v7_defconfig.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add Pulse Density Modulation Interface Controller (PDMIC) driver compilation
for sama5 default configuration. Is used by sama5d2 SoC for instance.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add the LCD DRM driver with all its dependencies:
- the MFD driver
- the backlight PWM
- the simple panel driver
Remove the CONFIG_FB as it is not needed on any sama5 device.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Selection of the HDMAC option is now needed to allow some sama5 devices
to have the DMA driver compiled and available.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
This flag is a no-op now (see commit 47b0eeb3dc "clk: Deprecate
CLK_IS_ROOT", 2016-02-02) so remove it.
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This flag is a no-op now (see commit 47b0eeb3dc "clk: Deprecate
CLK_IS_ROOT", 2016-02-02) so remove it.
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This flag is a no-op now (see commit 47b0eeb3dc "clk: Deprecate
CLK_IS_ROOT", 2016-02-02) so remove it.
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The da850 family of processors has an async3 clock domain that can be
muxed to either pll0_sysclk2 or pll1_sysclk2. Now that the davinci clocks
have a set_parent callback, we can use this to control the async3 mux
instead of a stand-alone function.
This adds a new async3_clk and sets the appropriate child clocks. The
default is use to pll1_sysclk2 since it is not affected by processor
frequency scaling.
Signed-off-by: David Lechner <david@lechnology.com>
[nsekhar@ti.com: drop unnecessary comment]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Some clocks (such as the USB PHY clocks in DA8xx) will need to use iomem.
The davinci_common_init() function must be called before the ioremap, so
the clock init is now split out as separate function.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
power domain, if there was no turn off before. Usually all power domains
are on, so the first action is to turn off but some older bootloaders
might behave differently.
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Merge tag 'samsung-fixes-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into fixes
Fix for more theoretical than practical OOPS on first turn on of a exynos
power domain, if there was no turn off before. Usually all power domains
are on, so the first action is to turn off but some older bootloaders
might behave differently.
* tag 'samsung-fixes-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: EXYNOS: Properly skip unitialized parent clock in power domain on
There is no external dependency for Security SubSystem (SSS) block so
the nodes for Pseudo Random Number Generator and AES hardware
acceleration can be enabled always for all Exynos4 devices.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch changes the compatible of Exynos5420 fimd
to "exynos5420-fimd". To support MIC bypass from display
path, the new compatible is introduced for Exynos5420.
Cc: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The bindings like s2mps11,buck6-ramp-enable or s2mps11,buck2-ramp-delay
were ignored. They were never parsed by s2mps11 regulator driver. Also
the values used in these bindings were equal to default reset values of
S2MPS11 device. It is safe to remove them.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up the Cortex-A7 CPU cores and the Cortex-A7 L2 cache/SCU to their
respective PM Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up the Cortex-A15 CPU cores and the Cortex-A15 L2 cache/SCU to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up the Cortex-A15 and Cortex-A7 CPU cores and L2 caches/SCUs to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up ARM CPU cores 1-3 to their respective PM Domains.
Note that ARM CPU core 0 cannot be shut off.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Using "IMX6QDL_CLK_CKO" for the clock is easier to read instead of
the hardcoded clock number.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Embest MarS Board [1] is a multi-core platform based on Freescale i.MX6
Cortex-A9 Dual Core, running up to 1GHz with 1 GB of RAM, 4GB of eMMC
and with a 4MB SPI flash.
[1] http://www.embest-tech.com/shop/star/marsboard.html
Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Introduce a DT-based driver for the R-Car System Controller, as found on
Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.
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Merge tag 'renesas-rcar-sysc2-for-v4.7' into dt-pm-domain-for-v4.7
Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.7
Introduce a DT-based driver for the R-Car System Controller, as found on
Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.
recent regressions. Changes are across several platforms, so
I'm listing every change separately here.
Regressions since 4.5:
- A correction of the psci firmware DT binding, to prevent
users from relying on unintended semantics
- Actually getting the newly merged clock driver for some OMAP
platforms to work
- A revert of patches for the Qualcomm BAM, these need to be
reworked for 4.7 to avoid breaking boards other than the one
they were intended for
- A correction for the I2C device nodes on the Socionext Uniphier
platform
- i.MX SDHCI was broken for non-DT platforms due to a change
with the setting of the DMA mask
- A revert of a patch that accidentally added a nonexisting
clock on the Rensas "Porter" board
- A couple of OMAP fixes that are all related to suspend after
the power domain changes for dra7
- On Mediatek, revert part of the power domain initialization
changes that broke mt8173-evb
Fixes for older bugs:
- Workaround for an "external abort" in the omap34xx
suspend/resume code.
- The USB1/eSATA should not be listed as an excon device on
am57xx-beagle-x15 (broken since v4.0)
- A v4.5 regression in the TI AM33xx and AM43XX DT specifying
incorrect DMA request lines for the GPMC
- The jiffies calibration on Renesas platforms was incorrect
for some modern CPU cores.
- A hardware errata woraround for clockdomains on TI DRA7
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Here are the latest bug fixes for ARM SoCs, mostly addressing recent
regressions. Changes are across several platforms, so I'm listing
every change separately here.
Regressions since 4.5:
- A correction of the psci firmware DT binding, to prevent users from
relying on unintended semantics
- Actually getting the newly merged clock driver for some OMAP
platforms to work
- A revert of patches for the Qualcomm BAM, these need to be reworked
for 4.7 to avoid breaking boards other than the one they were
intended for
- A correction for the I2C device nodes on the Socionext Uniphier
platform
- i.MX SDHCI was broken for non-DT platforms due to a change with the
setting of the DMA mask
- A revert of a patch that accidentally added a nonexisting clock on
the Rensas "Porter" board
- A couple of OMAP fixes that are all related to suspend after the
power domain changes for dra7
- On Mediatek, revert part of the power domain initialization changes
that broke mt8173-evb
Fixes for older bugs:
- Workaround for an "external abort" in the omap34xx suspend/resume
code.
- The USB1/eSATA should not be listed as an excon device on
am57xx-beagle-x15 (broken since v4.0)
- A v4.5 regression in the TI AM33xx and AM43XX DT specifying
incorrect DMA request lines for the GPMC
- The jiffies calibration on Renesas platforms was incorrect for some
modern CPU cores.
- A hardware errata woraround for clockdomains on TI DRA7"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
drivers: firmware: psci: unify enable-method binding on ARM {64,32}-bit systems
arm64: dts: uniphier: fix I2C nodes of PH1-LD20
ARM: shmobile: timer: Fix preset_lpj leading to too short delays
Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
ARM: dts: r8a7791: Don't disable referenced optional clocks
Revert "ARM: OMAP: Catch callers of revision information prior to it being populated"
ARM: OMAP3: Fix external abort on 36xx waking from off mode idle
ARM: dts: am57xx-beagle-x15: remove extcon_usb1
ARM: dts: am437x: Fix GPMC dma properties
ARM: dts: am33xx: Fix GPMC dma properties
Revert "soc: mediatek: SCPSYS: Fix double enabling of regulators"
ARM: mach-imx: sdhci-esdhc-imx: initialize DMA mask
ARM: DRA7: clockdomain: Implement timer workaround for errata i874
ARM: OMAP: Catch callers of revision information prior to it being populated
ARM: dts: dra7: Correct clock tree for sys_32k_ck
ARM: OMAP: DRA7: Provide proper class to omap2_set_globals_tap
ARM: OMAP: DRA7: wakeupgen: Skip SAR save for wakeupgen
Revert "dts: msm8974: Add dma channels for blsp2_i2c1 node"
Revert "dts: msm8974: Add blsp2_bam dma node"
ARM: dts: Add clocks for dm814x ADPLL
Introduce am335x-baltos.dtsi, that provides common configuration
for the whole device family based on the same SODIMM module.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
throughput.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 family of processors from Texas Instruments, have a hardware module
called IODELAYCONFIG Module which is expected to be configured. This
block allows very specific custom fine tuning for electrical
characteristics of IO pins that are necessary for functionality and
device lifetime requirements. IODelay module has it's own register space
with registers to configure various pins.
According to AM572x TRM SPRUHZ6E October 2014–Revised January 2016[1]
section 18.4.6.1 Pad Configuration, in addition to pinmuxing(MUXMODE),
when operating a pad in certain mode, Virtual/Manual IO Timing Mode must
also be configured to ensure that IO timings are met (DELAYMODE and
MODESELECT fields of pad's IODELAYCONFIG module register). According to
section 18.4.6.1.7 Isolation Requirements of above TRM, when
reprogramming MUXMODE, DELAYMODE, and MODESELECT fields, there is a
potential for a significant glitch on the corresponding IO. It is hence
recommended to do this with I/O isolation (which can only be done in
initial stages of bootloader). QSPI is one such module that requires
IODELAY configuration. So, this patch removes the pinmux for
QSPI for DRA74/DRA72 EVM as it needs to be done in bootloader (U-Boot)
and cannot be done in kernel.
Users should migrate to U-Boot v2016.05-rc1 or higher.
[1] http://www.ti.com/lit/ug/spruhz6e/spruhz6e.pdf
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 648af7fca1 ("rxrpc: Absorb the rxkad security module") changed
the RXKAD Kconfig symbol from tristate to boolean but the commit didn't
update the omap2plus_defconfig that was enabling CONFIG_RXKAD as module.
This leads to the following warning when using the omap2plus_defconfig:
arch/arm/configs/omap2plus_defconfig:112:warning: symbol value 'm' invalid for RXKAD
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Without that, regulators are left in the mode last set by the bootloader or
by the kernel the device was rebooted from. This leads to various problems,
like non-working peripherals.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Reviewed-By: Sebastian Reichel <sre@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Reviewed-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The boards use a TI variant of the PCF8575 so specify that
in the compatible string.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per the data sheet starting from SPRUHQ0H (Nov 2015 - Latest[1]),
VDD_CORE can vary from 0.85v to 1.15v for AVS class0. VDD GPU/DSP
et.al. can range from 0.85v to 1.25V with AVS class0
Since dynamic voltage scaling is disabled for DRA7/AM57xx SoCs for
all SoC rails other than MPU, the bootloader is responsible for
setting up the AVS class0 voltage, however, with wrong voltage machine
constraints in dtb, regulator framework will lower the voltage below
the required voltage levels for certain samples in production flow.
This can cause catastrophic failures which can be pretty hard to
identify.
Update board files which don't match required specification.
[1] http://www.ti.com/product/AM5728/datasheet/specifications#SPRT637-7340
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ldo4_reg is connected to DSS, and should always be 1.8V. However the The
dts defines a range of 1.5V-1.8V, which requires somethings to set the
actual voltage at runtime. Currently we set the voltage in omapdss
driver.
As the voltage must always be 1.8V, let's just define the range to 1.8V
so that the driver doesn't need to deal with the voltage. In fact, the
driver should not touch the voltage, except in the cases where the
voltage needs to be changed at runtime.
I presume the situation is the same for ldo1_reg, used for CSI, although
I think it is not currently used in the mainline.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ldo4_reg is connected to DSS, and should always be 1.8V. However the
The dts defines a range of 1.5V-1.8V, which requires somethings to set
the actual voltage at runtime. Currently we set the voltage in omapdss
driver.
As the voltage must always be 1.8V, let's just define the range to 1.8V
so that the driver doesn't need to deal with the voltage. In fact, the
driver should not touch the voltage, except in the cases where the
voltage needs to be changed at runtime.
I presume the situation is the same for ldo1_reg, used for CSI, although
I think it is not currently used in the mainline.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Doing so saves quite a bit of code in the driver.
For more information on the 'reserved-memory' bindings see:
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
Suggested-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch supplies the Mailbox Controller nodes. In order to
request channels, these nodes will be referenced by Mailbox
Client nodes.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
You'll notice that the voltage cell is populated with 0's. Voltage
information is very platform specific, even depends on 'cut' and
'substrate' versions. Thus it is left blank for a generic (safe)
implementation. If other nodes/properties are provided by the
bootloader, the ST CPUFreq driver will over-ride these generic
values.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
When compiled with "W=1", dtc complains: e.g.
"Warning (unit_address_vs_reg):
Node /soc/ipu@02800000/port@2/endpoint@0
has a unit name, but no reg property"
Endpoint nodes don't have a reg property, and the addresses
in their node names are ordinals without any special meaning
so remove them and swap them for semantic node names.
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015):
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf
states the following:
"LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation
up to 396 MHz."
So fix the entry by adding the 25mV margin value as done in the other
entries of the table, which results in 1.15V for 396MHz operation.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
198MHz is a valid operating point for mx6sx.
Add entries for VDD_ARM_CAP and VDD_SOC_CAP voltages for 198MHz according
to the imx6sx datahseet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SXIEC.pdf
(a 25mV offset is added to the minimum allowed values for safety).
These values also match the ones from the NXP kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adjust the VDD_ARM_CAP and VDD_SOC_CAP voltages according to
Table-11 from MX6UL datasheet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf
(a 25mV offset is added to the minimum allowed values for safety).
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Merge tag 'ox810se-arm-v4.6-rc3' of https://github.com/superna9999/linux into next/soc
Merge "ARM: Add OXNAS Platform Support" from Neil Armstrong
This is for the ARM926 based ox810 chip used in some older
NAS appliances. There is another related ox820 chip based on
ARM11 that might get added here later.
* tag 'ox810se-arm-v4.6-rc3' of https://github.com/superna9999/linux:
MAINTAINERS: add maintainer entry for ARM/OXNAS platform
ARM: Add new mach-oxnas
irqchip: versatile-fpga: add new compatible for OX810SE SoC
* Remove Gen2 designation from Kconfig for R-Car PCIE driver
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Merge tag 'renesas-pci-defconfig-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/defconfig
Merge "Renesas ARM Based SoC Pci Defconfig Updates for v4.7" from Simon Horman:
* Remove Gen2 designation from Kconfig for R-Car PCIE driver
* tag 'renesas-pci-defconfig-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
PCI: rcar-pcie: Remove Gen2 designation from Kconfig
DEBUG_HI3716_UART was supposed to be renamed to DEBUG_HIX5HD2_UART, but
accidentally both got left in place, which results in a build error when
CONFIG_DEBUG_UART_PHYS is not set as it should be.
This removes the old symbol.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 12aae30974 ("ARM: debug: Rename Hi3716 to HIX5HD2")
Acked-by: Wei Xu <xuwei5@hisilicon.com>
This patch adds a new config for MPS2 platform.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Application Notes 399 and 400 shares the same memory map and
features. Both are shipped with Cortex-M7 and have the same peripheral
as AN385/AN386, but with different location of PSRAM and Ethernet
controller.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Application Notes 385 and 386 shares the same memory map and features
except the CPU is used. AN385 is supplied with Cortex-M3 CPU and AN386
is supplied with Cortex-M4.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The Cortex-M Prototyping System (or V2M-MPS2) is designed for
prototyping and evaluation Cortex-M family of processors including the
latest Cortex-M7
It comes with a range of useful peripherals including 8MB single cycle
SRAM, 16MB PSRAM, Ethernet, QSVGA touch screen panel, 4bit RGB VGA
connector, Audio, SPI and GPIO.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
* Correct preset_lpj calculation which may lead to too short delays
* Correct handling of optional clocks on r8a7791 to restore
access to the serial port the porter board
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Merge tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC Fixes for v4.6
* Correct preset_lpj calculation which may lead to too short delays
* Correct handling of optional clocks on r8a7791 to restore
access to the serial port the porter board
This is a backmerge of v4.6 fixes, to avoid a merge conflict between 4.6
and our next/dt branch.
* tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: timer: Fix preset_lpj leading to too short delays
Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
ARM: dts: r8a7791: Don't disable referenced optional clocks
Fix a typo on PIN_PD24 for UTXD2 and FLEXCOM4_IO3 which were
wrongly linked to PIN_PD23).
Signed-off-by: Florian Vallee <fvallee@eukrea.fr>
Fixes: 7f16cb676c ("ARM: at91/dt: add sama5d2 pinmux")
Cc: stable@vger.kernel.org # v4.4+
[nicolas.ferre@atmel.com: add commit message, changed subject]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Introduce a DT-based driver for the R-Car System Controller, as found on
Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.
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Merge tag 'renesas-rcar-sysc2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.7" from Simon Horman:
Introduce a DT-based driver for the R-Car System Controller, as found on
Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.
* tag 'renesas-rcar-sysc2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (30 commits)
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
soc: renesas: rcar-sysc: Add support for R-Car H1 power areas
soc: renesas: rcar-sysc: Enable Clock Domain for I/O devices
soc: renesas: rcar-sysc: Make rcar_sysc_power_is_off() static
soc: renesas: rcar-sysc: Add DT support for SYSC PM domains
soc: renesas: rcar-sysc: Improve rcar_sysc_power() debug info
soc: renesas: Move pm-rcar to drivers/soc/renesas/rcar-sysc
clk: renesas: cpg-mssr: Export cpg_mssr_{at,de}tach_dev()
clk: renesas: mstp: Provide dummy attach/detach_dev callbacks
clk: renesas: Provide Kconfig symbols for CPG/MSSR and CPG/MSTP support
soc: renesas: Add r8a7795 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7794 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7793 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7791 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7790 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7779 SYSC PM Domain Binding Definitions
...
Add Western Digital My Book World Edition device tree based on
Oxford Semiconductor OX810SE SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The BA16 module has a PMIC that uses the WDOG_B output from iMX6 to
reset the system on a watchdog timeout. Configure the watchdog to assert
the external reset signal (WDOG_B) using fsl,ext-reset-output property.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Previously the LDB_DIx clocks could be specified in the ldb node. With
the ERR009219 errata fix applied, the ldb_di clocks now needs to be
specified in the clks node to ensure the clocks are setup early in the
boot process.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The default monitor that ships with B850v3 requires a 65MHz pixel clock.
65MHz can not be achieved using PLL3 (480MHz/7=68.5MHz). Hence set the
LDB_DIx clock source to PLL5. Since PLL5 is already in use by IPU1_DIx,
set the clock source for IPU1_DIx to PLL2_PFD2 to allow simultaneous
display on both LVDS and HDMI interface.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove ldb panel entry for the following reasons:
- The b850v3 has an onboard LVDS to DisplayPort converter (STDP4028). So
we should not limit the monitors that can be connected by hardcoding the
auo,b133htn01 1080p panel.
- The default resolution on the LVDS interface needs to be WXGA or less.
Otherwise when a 1080p monitor is connected to the HDMI port there is no
output on both the LVDS and HDMI ports since a single IPU on i.MX6 can
not handle two 1080p displays. With the panel entry removed from the
devicetree, drm driver defaults the resolution on LVDS interface to XGA.
Once in userspace, applications can set the desired resolution on LVDS
interface over IPU2 CRTC.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pull ARM cpuidle changes for v4.7 from Daniel Lezcano.
* 'cpuidle/4.7' of http://git.linaro.org/people/daniel.lezcano/linux:
drivers: firmware: psci: use const and __initconst for psci_cpuidle_ops
soc: qcom: spm: Use const and __initconst for qcom_cpuidle_ops
ARM: cpuidle: constify return value of arm_cpuidle_get_ops()
ARM: cpuidle: add const qualifier to cpuidle_ops member in structures
to the clk-ti branch from the Linux clk tree for the ADPLL clock driver.
Otherwise things won't keep booting properly when we flip over to use
the clock driver instead of fixed clocks set up by the bootloader.
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Merge tag 'omap-for-v4.6/dt-ti81xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Enable dm814x and dra62x clock driver. This branch has a dependency
to the clk-ti branch from the Linux clk tree for the ADPLL clock driver.
Otherwise things won't keep booting properly when we flip over to use
the clock driver instead of fixed clocks set up by the bootloader.
* tag 'omap-for-v4.6/dt-ti81xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add clocks for dm814x ADPLL
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Put nodes after of_address_to_resource() in case the nodes might be
released while parsing in them.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Drop support for Cortex A8 in timer code
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Merge tag 'renesas-soc-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Renesas ARM Based SoC Updates for v4.7" from Simon Horman:
Drop support for Cortex A8 in timer code
* tag 'renesas-soc-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: timer: Drop support for Cortex A8
ARM: shmobile: timer: Fix preset_lpj leading to too short delays
Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
ARM: dts: r8a7791: Don't disable referenced optional clocks
preparatory patches to support a USB PHY
driver for USB on DA850 SoC. This should
eventually lead to USB working again on
this device.
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Merge tag 'davinci-for-v4.7/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Merge "DaVinci SoC updates for v4.7" from Sekhar Nori:
These are preparatory patches to support a USB PHY driver for USB on DA850
SoC. This should eventually lead to USB working again on this device.
* tag 'davinci-for-v4.7/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: clk: add set_parent callback for mux clocks
ARM: davinci: da8xx: move usb code to new file
ARM: davinci: use IRQCHIP_DECLARE for cp_intc
ARM: davinci: remove unused DA8XX_NUM_UARTS
ARM: davinci: simplify call to of populate
ARM: DaVinci USB: removed deprecated properties from MUSB config
removal of some unused macros and data-
-structures and use of helper macros to
reduce code.
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Merge tag 'davinci-for-v4.7/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/cleanup
Merge "DaVinci cleanups for v4.7" from Sekhar Nori:
It includes removal of some unused macros and data- -structures and use
of helper macros to reduce code.
* tag 'davinci-for-v4.7/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: use IRQCHIP_DECLARE for cp_intc
ARM: davinci: remove unused DA8XX_NUM_UARTS
ARM: davinci: simplify call to of populate
ARM: DaVinci USB: removed deprecated properties from MUSB config
- Justin adds a soc_dev driver to properly report to user-space the Broadcom
STB SoC family, product and revision
- Florian reworks how the brcmstb_gisb driver dependency is done to enable it
on Broadcom STB MIPS-based SoCs and remove a select in
arch/arm/mach-bcm/Kconfig
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Merge tag 'arm-soc/for-4.7/drivers' of http://github.com/Broadcom/stblinux into next/drivers
Merge "Broadcom ARM-based SoCs drivers changes" from Florian Fainelli:
- Justin adds a soc_dev driver to properly report to user-space the Broadcom
STB SoC family, product and revision
- Florian reworks how the brcmstb_gisb driver dependency is done to enable it
on Broadcom STB MIPS-based SoCs and remove a select in
arch/arm/mach-bcm/Kconfig
* tag 'arm-soc/for-4.7/drivers' of http://github.com/Broadcom/stblinux:
bus: brcmstb_gisb: Rework dependencies
soc: brcmstb: add SoC driver to brcmstb
This contains a bunch of preparatory patches to the PMC driver which are
a prerequisite to moving the driver to generic power domains.
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Merge tag 'tegra-for-4.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "soc/tegra: Changes for v4.7-rc1" from Thierry Reding:
This contains a bunch of preparatory patches to the PMC driver which are
a prerequisite to moving the driver to generic power domains.
* tag 'tegra-for-4.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: Update NVIDIA PMC for Tegra
soc/tegra: pmc: Wait for powergate state to change
soc/tegra: pmc: Ensure GPU partition can be toggled on/off by PMC
soc/tegra: pmc: Remove additional check for a valid partition
soc/tegra: pmc: Fix verification of valid partitions
soc/tegra: pmc: Fix testing of powergate state
soc/tegra: pmc: Change powergate and rail IDs to be an unsigned type
soc/tegra: pmc: Protect public functions from potential race conditions
soc/tegra: pmc: Restore base address on probe failure
soc/tegra: pmc: Remove non-existing L2 partition for Tegra124
soc/tegra: pmc: Remove non-existing power partitions for Tegra210
soc/tegra: pmc: Remove debugfs entry on probe failure
soc/tegra: pmc: Fix sparse warning for tegra_pmc_init_tsense_reset()
soc/tegra: pmc: Add missing structure members to kernel-doc
for Versatile flash handling and instead moving it over
to the device tree and a special add-on file.
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Merge tag 'versatile-flash-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/drivers
Merge "move Versatile flash protection to the device tree" from Linus Walleij:
This is a set of patches removing the board file code
for Versatile flash handling and instead moving it over
to the device tree and a special add-on file.
* tag 'versatile-flash-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: move flash registration to device tree
ARM: versatile: move flash registration to the device tree
mtd: augment the "arm,versatile-flash" bindings
mtd: physmap_of: add a hook for Versatile write protection
Acked-by: Brian Norris <computersforpeace@gmail.com>
1. Support for external expansion bus useful for additional hardware
e.g. LogicTile Express daughterboards (Brian Starkey)
2. Fix for device node name unit-address presence/absence warnings
enabled in recently update DTC (Sudeep Holla)
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Merge tag 'vexpress-for-v4.7/updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt
Merge "ARMv7 Vexpress updates/fixes for v4.7" from Sudeep Holla:
1. Support for external expansion bus useful for additional hardware
e.g. LogicTile Express daughterboards (Brian Starkey)
2. Fix for device node name unit-address presence/absence warnings
enabled in recently update DTC (Sudeep Holla)
* tag 'vexpress-for-v4.7/updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
ARM: dts: vexpress: Add external expansion bus to DT
ARM: dts: vexpress: fix node name unit-address presence warnings
* Configure NMI key as wakeup source in DT of kzm9g board
* Add SDHI support to DT of gose board
* Add support of UHS-I SDR-50 for SDHI to DT of r8a7790 SoC
* Correct interrupt type for ARM TWD in DT of r8a7779 and sh73a0 SoCs
* Add IIC support to DT of r8a7794 SoC
* Add CAN support to DT of r8a7793 and r8a7794 SoCs
* Add SCIF2 support to r8a7790 device tree
* Use CAN, JPU and USB3.0 fallback compatibility string
in DT of r8a7791 and r8a7790 SoCs
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Merge tag 'renesas-dt-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v4.7" from Simon Horman:
* Configure NMI key as wakeup source in DT of kzm9g board
* Add SDHI support to DT of gose board
* Add support of UHS-I SDR-50 for SDHI to DT of r8a7790 SoC
* Correct interrupt type for ARM TWD in DT of r8a7779 and sh73a0 SoCs
* Add IIC support to DT of r8a7794 SoC
* Add CAN support to DT of r8a7793 and r8a7794 SoCs
* Add SCIF2 support to r8a7790 device tree
* Use CAN, JPU and USB3.0 fallback compatibility string
in DT of r8a7791 and r8a7790 SoCs
* tag 'renesas-dt-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
ARM: dts: gose: Enable SDHI controllers
ARM: dts: r8a7793: Add SDHI controllers
ARM: dts: r8a7790: fix max-frequency for SDHI
ARM: dts: kzm9g: Configure NMI key as wake-up source
ARM: dts: r8a7790: lager: Enable UHS-I SDR-50
ARM: dts: r8a7790: Set maximum frequencies for SDHI clocks
ARM: dts: r8a7791: Use USB3.0 fallback compatibility string
ARM: dts: r8a7790: Use USB3.0 fallback compatibility string
ARM: dts: r8a7779: Correct interrupt type for ARM TWD
ARM: dts: sh73a0: Correct interrupt type for ARM TWD
ARM: dts: r8a7794: Add IIC nodes
ARM: dts: r8a7794: add IIC clocks
ARM: dts: r8a7793: add CAN nodes to device tree
ARM: dts: r8a7793: add CAN clocks to device tree
ARM: dts: r8a7794: add CAN nodes to device tree
ARM: dts: r8a7794: add CAN clocks to device tree
ARM: dts: r8a7790: use fallback can compatibility string
ARM: dts: r8a7791: use fallback can compatibility string
ARM: dts: r8a7790: Add SCIF2 device node
ARM: dts: r8a7790: Add SCIF2 clock
...
- Eric enables more BCM2835 peripherals in multi_v7_defconfig: watchdog, I2S,
switches from the sdhci-bcm2835 to the sdhci-iproc driver, DWC2 USB controller
- Eric also enables more BCM2835 peripherals in bcm2835_defconfig: VC4, NFS root
Power Management support, switching sdhci-bcm2835 for sdhci-iproc
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Merge tag 'arm-soc/for-4.7/defconfig' of http://github.com/Broadcom/stblinux into next/defconfig
Merge "This pull request contains defconfig changes for Broadcom ARM-based SoCs"
from Florian Fainelli:
- Eric enables more BCM2835 peripherals in multi_v7_defconfig: watchdog, I2S,
switches from the sdhci-bcm2835 to the sdhci-iproc driver, DWC2 USB controller
- Eric also enables more BCM2835 peripherals in bcm2835_defconfig: VC4, NFS root
Power Management support, switching sdhci-bcm2835 for sdhci-iproc
* tag 'arm-soc/for-4.7/defconfig' of http://github.com/Broadcom/stblinux:
ARM: bcm2835: Enable NFS root support.
ARM: bcm2835: Enable the VC4 graphics driver in the defconfig
ARM: bcm2835: Enable CONFIG_PM.
ARM: bcm2835: Switch BCM2835 to sdhci-iproc.c for MMC
ARM: multi_v7_defconfig: Build in DWC2 USB support
ARM: multi_v7_defconfig: Switch BCM2835 to sdhci-iproc.c for MMC
ARM: multi_v7_defconfig: Add more BCM2835 support
- Use the new cryto engine(mv_cesa) in the mvebu and multi-arm
defcongig files
- Attach mvebu_*_defconfig to the mvebu maintainers
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Merge tag 'mvebu-defconfig-4.7-1' of git://git.infradead.org/linux-mvebu into next/defconfig
Merge "mvebu defconfig for 4.7 (part 1)" from Gregory CLEMENT
- Use the new cryto engine(mv_cesa) in the mvebu and multi-arm
defcongig files
- Attach mvebu_*_defconfig to the mvebu maintainers
* tag 'mvebu-defconfig-4.7-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu_v5_defconfig: Switching to the new Marvell's cryptographic engine driver
ARM: multi_v7_defconfig: Enabling the new Marvell's cryptographic engine driver
MAINTAINERS: attach arch/arm/configs/mvebu_*_defconfig to relevant maintainers
ARM: mvebu_v7_defconfig: Enabling the new Marvell's cryptographic engine driver
This NAND controller device is used on UniPhier SoCs (and I know
it is also used on SoC FPGA).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
to the clk-ti branch from the Linux clk tree for the ADPLL clock driver.
Otherwise things won't keep booting properly when we flip over to use
the clock driver instead of fixed clocks set up by the bootloader.
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Merge tag 'omap-for-v4.6/dt-ti81xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Enable dm814x and dra62x clock driver. This branch has a dependency
to the clk-ti branch from the Linux clk tree for the ADPLL clock driver.
Otherwise things won't keep booting properly when we flip over to use
the clock driver instead of fixed clocks set up by the bootloader.
* tag 'omap-for-v4.6/dt-ti81xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add clocks for dm814x ADPLL
The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
device now, reuse that and remove similar code from platform code.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
device now, reuse that and remove similar code from platform code.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
device now, reuse that and remove similar code from platform code.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This patch add rockchip's compatible string to the compat list and
remove similar code from platform code for supporting generic platdev
driver.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
device now, reuse that and remove similar code from platform code.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
device now, reuse that and remove similar code from platform code.
Note that the complete routine imx27_dt_init() is removed as
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
has same effect as a NULL .init_machine machine callback pointer.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
device now, reuse that and remove similar code from platform code.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Fix off by one error in da850 device tree in
the number of INTC interrupts.
Signed-off-by: David Lechner <david@lechnology.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[nsekhar@ti.com: commit message update]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Disable mdio and eth0 in da850.dtsi file. All other
devices are disabled by default and not all boards
will use these devices, so these should be disabled too.
da850-evm.dtb already had status = "okay" for these devices.
da850-enbw-cmc.dts did not, so they were added.
Signed-off-by: David Lechner <david@lechnology.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[nsekhar@ti.com: commit description updates]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add AUXDATA needed to match the device-tree node for spi0 to the
non-device-tree clock.
Signed-off-by: David Lechner <david@lechnology.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[nsekhar@ti.com: commit description updates]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Enable SPI driver and SPI NOR flash support as modules.
Tested with SPI NOR flash on DA850-EVM. Basic boot test only to confirm
NOR flash device detection.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
CONFIG_FHANDLE is required by systemd[1], which is the
default init system in more and more distributions.
So lets enable it for DaVinci platforms as well.
While at it, remove stale entry CONFIG_INOTIFY=y
[1] https://github.com/systemd/systemd/blob/master/README#L37
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The VExpress development platform has an external expansion bus which
can be used for additional hardware (e.g. LogicTile Express daughter
boards).
Add this bus to the VExpress CoreTile device-trees.The bus is described
for a CoreTile occupying site 1.
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Brian Starkey <brian.starkey@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Commit b993734718 ("scripts/dtc: Update to upstream version 53bf130b1cdd")
added warnings on node name unit-address presence/absence mismatch in
the device trees.
This patch fixes those warning on all the vexpress platforms where
unit-address is present in node name while the reg/ranges property is
not present.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
We want to skip reparenting a clock on turning on power domain, if we
do not have the parent yet. The parent is obtained when turning the
domain off. However due to a typo, the loop is continued on IS_ERR() of
clock being reparented, not on the IS_ERR() of the parent.
Theoretically this could lead to OOPS on first turn on of a power
domain, if there was no turn off before. Practically that should never
happen because all power domains are turned on by default (reset value,
bootloader does not turn off them usually) so the first action will be
always turn off.
Fixes: 29e5eea06b ("ARM: EXYNOS: Get current parent clock for power domain on/off")
Reported-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Enable the S/PDIF transmitter present on the Cubietruck.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to be standard to manage for rockchip SoCs, move the thermal
data into rk3288 dtsi, we needn't to add a new file for thermal.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Includes regulator and pin assignments.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The wrong values come from an old datasheet (H2 v0.6). Anything later
has the fixed value of 195MHz (H2 v0.7 up to Gen2-common V2.0).
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a GPIO key with wake-up capability for the NMI button.
This allows to wake up the system from s2ram without relying on the
buttons on the optional switch board.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,2}.
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock binding for the main clock controller was changed to an
indexed controller style binding on request of the clk
maintainers. This updates the dtsi to use the new bindings.
Signed-off-by: Lars Persson <larper@axis.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Add DB600C support
* Add IPQ4019 support
* Add additional nodes for APQ8064
* Fix APQ8064 pinctrls for i2c/spi
* Add MSM8974 nodes for smp2p and smd
* Modify MSM8974 memory reserve for rfsa and rmtfs
* Add support for BQ27541 on Nexus7
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Merge tag 'qcom-dt-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Merge "Qualcomm Device Tree Changes for v4.7" from Andy Gross:
* Add DB600C support
* Add IPQ4019 support
* Add additional nodes for APQ8064
* Fix APQ8064 pinctrls for i2c/spi
* Add MSM8974 nodes for smp2p and smd
* Modify MSM8974 memory reserve for rfsa and rmtfs
* Add support for BQ27541 on Nexus7
* tag 'qcom-dt-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (30 commits)
device-tree: nexus7: Add bq27541 battery interface to dts
ARM: dts: db600c: add support to magnetometer
ARM: dts: db600c: add spi support
ARM: dts: db600c: add i2c support
ARM: dts: db600c: Add on board leds support
ARM: dts: db600c: add on board sata support.
ARM: dts: db600c: add pcie support
ARM: dts: db600c: add usb support
ARM: dts: db600c: Add eMMC and SD card support
ARM: dts: db600c: add pmic regulator supplies
ARM: dts: db600c: add board support with serial
ARM: dts: apq8064: add gsbi7 i2c support
ARM: dts: apq8064: add support to gsbi1 uart
ARM: dts: apq8064: fix the pinctrls for i2c and spi
ARM: dts: qcom: apq8064: Add smd node and all edges
ARM: dts: qcom: apq8064: Add complete smsm node
ARM: dts: qcom: apq8064: Add syscon for sic-non-secure
ARM: dts: msm8974: Add modem smp2p and smd nodes
ARM: dts: msm8974: Add node for second i2c from blsp1
ARM: dts: msm8974: Split efs in rfsa and rmtfs
...
- Rafal adds proper VCC GPIO to be fed to the USB host controllers for known
BCM5301x devices needing that, he also enables earlycon, and enables the
SPI-NOR flashes on relevant devices
- Eric adds the VideoCore 4 Device Tree nodes to the BCM283x Device Tree and
provides a DRM patch to kick out the simplefb framebuffer to avoid conflicts
- Stephan adds proper CPU nodes for the ARM processor on the BCM2835 SoC Device
Tree
- Martin provides a binding fix for the DMA channel interrupt numbers and
description
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Merge tag 'arm-soc/for-4.7/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Merge "Broadcom ARM-based SoC Device Tree changes" from Florian Fainelli:
- Rafal adds proper VCC GPIO to be fed to the USB host controllers for known
BCM5301x devices needing that, he also enables earlycon, and enables the
SPI-NOR flashes on relevant devices
- Eric adds the VideoCore 4 Device Tree nodes to the BCM283x Device Tree and
provides a DRM patch to kick out the simplefb framebuffer to avoid conflicts
- Stephan adds proper CPU nodes for the ARM processor on the BCM2835 SoC Device
Tree
- Martin provides a binding fix for the DMA channel interrupt numbers and
description
* tag 'arm-soc/for-4.7/devicetree' of http://github.com/Broadcom/stblinux:
ARM: BCM5301X: Add DT entry for SPI controller and NOR flash
dt/bindings: bcm2835: correct description for DMA-int
ARM: bcm2835: add CPU node for ARM core
ARM: bcm2835: Add VC4 to the device tree.
drm/vc4: Kick out the simplefb framebuffer before we set up KMS.
ARM: BCM5301X: Enable earlycon on tested devices
ARM: BCM5301X: Set vcc-gpio for USB controllers of few devices
- Two sets of name and unit address check fixes for dts files.
- DMA, McASP, and timer and regulator related dts changes for dra7
- Add more devices for Nokia N9/N950
- Initial support for am335x ICEv2
- Initial support for am572x-IDK
- Pinctrl changes for am335x-baltos-ir5221
- Initial support for Amazon Kindle Fire (first generation)
- A series of changes to add GPIO controller support for the
GPMC driver. The driver changes will be merged separately.
- Support for am43xx clkout1
- Pinctrl and RTC changes for am335x-chili
- Add support for dra72-evm rev C (SR2.0)
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Merge tag 'omap-for-v4.7/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "First set of device tree changes for omaps for v4.7 merge window" from Tony Lindgren:
- Two sets of name and unit address check fixes for dts files.
- DMA, McASP, and timer and regulator related dts changes for dra7
- Add more devices for Nokia N9/N950
- Initial support for am335x ICEv2
- Initial support for am572x-IDK
- Pinctrl changes for am335x-baltos-ir5221
- Initial support for Amazon Kindle Fire (first generation)
- A series of changes to add GPIO controller support for the
GPMC driver. The driver changes will be merged separately.
- Support for am43xx clkout1
- Pinctrl and RTC changes for am335x-chili
- Add support for dra72-evm rev C (SR2.0)
* tag 'omap-for-v4.7/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (61 commits)
ARM: dts: Add support for dra72-evm rev C (SR2.0)
ARM: dts: am335x-chilisom: Enable poweroff PMIC sequence using RTC signal
ARM: dts: am335x-chili*: Move Ethernet MAC description from SOM to board
ARM: dts: am335x-chili*: Move uart0 description from SOM to board
ARM: dts: am43xx: add support for clkout1 clock
ARM: dts: omap3-beagle: Provide NAND ready pin
ARM: dts: am335x: Provide NAND ready pin
ARM: dts: am437x: Provide NAND ready pin
ARM: dts: dra7x-evm: Provide NAND ready pin
ARM: dts: dm816x: Enable gpio controller for GPMC
ARM: dts: dm814x: Enable gpio controller for GPMC
ARM: dts: omap3: Enable gpio controller for GPMC
ARM: dts: am4372: Enable gpio controller for GPMC
ARM: dts: am335x: Enable gpio controller for GPMC
ARM: dts: dra7: Enable gpio controller for GPMC
ARM: dts: omap5: Enable gpio and interrupt controller for GPMC
ARM: dts: omap4: Enable gpio and interrupt controller for GPMC
ARM: dts: omap24xx: Enable gpio and interrupt controller for GPMC
ARM: dts: omap4-kc1: Power off support
ARM: dts: omap4-kc1: LEDs support
...
This commit adds pin-mux nodes for the NAND controller.
Some SoCs support 2 chip selects and the others only support
1 chip select.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- More i.MX6 System-on-Module board support from Ka-Ro electronics:
tx6s-8xxx, tx6u-8xxx, tx6q-1xxx, tx6ul-00xx.
- Nitrogen6_MAX QP and Nitrogen6_SoloX board support from Boundary
Devices.
- VF610 based ZII development board support.
- Add SAI interface audio support for i.MX6SX SDB board.
- A number of random updates on LS1021A and VF610 dts files.
- A couple of pinumx updates on i.MX25 and i.MX28.
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Merge tag 'imx-dt-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Merge "The i.MX device tree updates for 4.7" from Shawn Guo:
- More i.MX6 System-on-Module board support from Ka-Ro electronics:
tx6s-8xxx, tx6u-8xxx, tx6q-1xxx, tx6ul-00xx.
- Nitrogen6_MAX QP and Nitrogen6_SoloX board support from Boundary
Devices.
- VF610 based ZII development board support.
- Add SAI interface audio support for i.MX6SX SDB board.
- A number of random updates on LS1021A and VF610 dts files.
- A couple of pinumx updates on i.MX25 and i.MX28.
* tag 'imx-dt-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (36 commits)
ARM: dts: imx6qdl-udoo: add 7 inch LCD touchscreen panel support
ARM: dts: i.MX3x: add keypad port devicetree nodes
ARM: dts: ls1021a: add pix clock to DCU dts node
ARM: dts: ls1021a: DSPI has 6 chip-selects
ARM: dts: ls1021a: Add gpio support for ls1021a platform
ARM: dts: imx6q-ba16: Remove unused vqmmc-supply
ARM: dts: ls1021a: add SCFG MSI dts node
ARM: dts: imx28: add alternative pinmuxing for mac0
ARM: dts: imx6q-tbs2910: fix fec reset polarity
ARM: dts: vf610-zii-dev: Add ZII development board.
ARM: dts: vfxxx: add missing reg properties
ARM: dts: vf-colibri: increase NAND clock speed
ARM: dts: vf-colibri: alias the primary FEC as ethernet0
ARM: dts: imx6sx-sdb: Add SAI support
bindings: fsl-imx-sdma: Document 'fsl,sdma-event-remap' property
ARM: dts: imx6sx: Remove unused property
ARM: dts: imx6sx: Fix SAI DMA index
ARM: dts: imx6q-ba16: Disable pwm2 by default
ARM: dts: imx: add Boundary Devices Nitrogen6_SoloX board
ARM: dts: imx6qdl-sabresd: Pass the hannstar panel compatible string
...
A couple of patches that cleanup some Kconfig, enable various features,
use stdout-path to define the debug serial port (so that it doesn't have
to be manually specified on the kernel command-line) and cleanup and fix
some minor device trees bugs.
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Merge tag 'tegra-for-4.7-arm' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Changes for v4.7-rc1" from Thierry Reding:
A couple of patches that cleanup some Kconfig, enable various features,
use stdout-path to define the debug serial port (so that it doesn't have
to be manually specified on the kernel command-line) and cleanup and fix
some minor device trees bugs.
* tag 'tegra-for-4.7-arm' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Correct interrupt type for ARM TWD
ARM: tegra: Add stdout-path for various boards
ARM: tegra: Replace legacy *,wakeup property with wakeup-source
ARM: tegra: Enable watchdog support for Tegra114 and Tegra124
ARM: tegra: Add high speed UARTs to Jetson TK1 device tree
ARM: tegra: Fix copy/paste typo in several DTS includes
ARM: tegra: Remove redundant ARM_L1_CACHE_SHIFT_6 select
contains some clean-up and fixes of
device-tree data and addition of i2c1
node for DA850.
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Merge tag 'davinci-for-v4.7/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Merge "Device-Tree updates for DaVinci" from Sekhar Nori:
This contains some clean-up and fixes of device-tree data and addition
of i2c1 node for DA850.
* tag 'davinci-for-v4.7/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for i2c1
ARM: DTS: da850: add node for i2c1
ARM: dts: davinci: use proper address after @
ARM: DTS: da850: fix missing #gpio-cells in gpio node
- add hardware monitor support in the NSA320 device tree
- update makefile with kirkwood-ds112.dtb and kirkwood-nsa320.dtb
- fix GPIO config on the Linksys boards
- various Kirkwood DT warning fixup from the newer DT compiler
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Merge tag 'mvebu-dt-4.7-1' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt for 4.7 (part 1)" from Gregory CLEMENT:
- add hardware monitor support in the NSA320 device tree
- update makefile with kirkwood-ds112.dtb and kirkwood-nsa320.dtb
- fix GPIO config on the Linksys boards
- various Kirkwood DT warning fixup from the newer DT compiler
* tag 'mvebu-dt-4.7-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: kirkwood: Add DTS for Linksys EA4200v2/EA4500
ARM: dts: orion5x: add device tree for kurobox-pro
ARM: dts: kirkwood: Add address go regulator unit name
ARM: dts: kirkwood: Add address to mbus unit name
ARM: dts: kirkwood: Remove address from gpio-i2c unit name
ARM: dts: kirkwood: Fixup pcie DT warnings
ARM: dts: kirkwood: Add address to ethernet-phy unit name
ARM: dts: kirkwood: Remove address from dsa unit name
ARM: dts: kirkwood: Remove node address from leds
ARM: dts: kirkwood: Remove button address and fixup names
ARM: dts: kirkwood: add kirkwood-nsa320.dtb to Makefile
ARM: dts: kirkwood: add kirkwood-ds112.dtb to Makefile
ARM: mvebu: fix GPIO config on the Linksys boards
ARM: dts: kirkwood: Add the hardware monitor to the NSA320 device tree
1. Enable accelerated AES (Security SubSystem) on Exynos4412-based boards.
2. Enable HDMI CEC on Exynos4412-based Odroid.
3. Add regulator supplies for eMMC/SD on Odroid XU3/XU4.
4. Fix DTC unit name warnings.
5. Merge topic branch of new Artik5 board.
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Merge tag 'samsung-dt-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "Samsung Device Tree updates and improvements for v4.7" from Krzysztof Kozlowski:
1. Enable accelerated AES (Security SubSystem) on Exynos4412-based boards.
2. Enable HDMI CEC on Exynos4412-based Odroid.
3. Add regulator supplies for eMMC/SD on Odroid XU3/XU4.
4. Fix DTC unit name warnings.
5. Merge topic branch of new Artik5 board.
* tag 'samsung-dt-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s5p: Fix DTC unit name warnings in SMDKv210 board
ARM: dts: exynos: Fix DTC unit name warnings in Exynos5440
ARM: dts: exynos: Fix DTC unit name warnings in SMDK5420
ARM: dts: exynos: Fix DTC unit name warnings in Peach Pit
ARM: dts: exynos: Fix DTC unit name warnings in Exynos542x
ARM: dts: exynos: Fix DTC unit name warnings in Exynos5250
ARM: dts: exynos: Fix DTC unit name warnings in Exynos4x12
ARM: dts: exynos: Fix DTC unit name warnings in Trats2 board
ARM: dts: exynos: Fix DTC unit name warnings in Exynos4
ARM: dts: exynos: Fix DTC unit name warnings in Exynos3250
ARM: dts: exynos: Fix DTC unit name warnings in cros-adc-thermistors
ARM: dts: exynos: Add eMMC and SD regulator supplies to Odroid XU3/XU4
ARM: dts: exynos: Enable the HDMI CEC device on Exynos4412 Odroid boards
ARM: dts: exynos: Add node for the HDMI CEC device to exynos4
ARM: dts: exynos: Add HDMI CEC pin definition to exynos4 pinctrl
ARM: dts: exynos: Enable SSS on Odroid X/X2/U3 family
ARM: dts: exynos: Enable SSS on Trats2
ARM: dts: exynos: Add Security SubSystem node to Exynos4
Merge necessary new clocks from Sylwester (used by new board) and add support
for Exynos3250-based Artik5 board.
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Merge tag 'samsung-dt-exynos3250-artik5-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "Topic branch for Device Tree changes for Exynos 3250 for v4.7" from Krzysztof Kozlowski:
Merge necessary new clocks from Sylwester (used by new board) and add support
for Exynos3250-based Artik5 board.
* tag 'samsung-dt-exynos3250-artik5-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add MSHC2 DT node for SD card for exynos3250-artik5-eval board
ARM: dts: exynos: Add exynos3250-artik5 dtsi file for ARTIK5 module
ARM: dts: exynos: Add MSHC2 DT node for Exynos3250 SoC
ARM: dts: exynos: Add UART2 DT node for Exynos3250 SoC
ARM: dts: exynos: Add initial gpio setting of MMC2 device for exynos3250-monk
ARM: dts: exynos: Add initial pin configuration for exynos3250-rinato
clk: samsung: exynos3250: Add MMC2 clock
clk: samsung: exynos3250: Add UART2 clock
dt-bindings: Add the clock id of UART2 and MMC2 for Exynos3250
The MiQi is a rk3288-based devboard from Shenzen based mqmaker, with a
footprint the size of a credit card.
Main available outside connections are 4 usb ports, hdmi, gigabit
ethernet and two expansion headers.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Initialize ECC for Arria10 On-Chip RAM on machine startup. The OCRAM
memory must be initialized before data is stored in memory otherwise the
ECC will fail on reads. The previous check-in
2364d423a7 ("ARM: socfpga: Enable Arria10 OCRAM ECC on startup")
added the OCRAM enable and initialization code but was not called on
startup.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1460394094-23326-1-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
- The sdhci-esdhc-imx DMA support is broken due to commit 7b91369b46
("mmc: sdhci: Set DMA mask when adding host"). It requires device's
dma_mask be set up properly to get DMA work. The fixing patch
initializes the DMA mask to enable the access again.
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Merge tag 'imx-fixes-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: i.MX fixes for 4.6" from Shawn Guo:
The i.MX fixes for 4.6:
- The sdhci-esdhc-imx DMA support is broken due to commit 7b91369b46
("mmc: sdhci: Set DMA mask when adding host"). It requires device's
dma_mask be set up properly to get DMA work. The fixing patch
initializes the DMA mask to enable the access again.
* tag 'imx-fixes-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: mach-imx: sdhci-esdhc-imx: initialize DMA mask
- Clockdomain fix for dra7 timer interrupts
- Two fixes for GPMC EDMA binding, I missed the need for a merge with
GPMC changes and EDMA changes
- Fix beagle-x15 eSATA by dropping misconfigured extcon_usb1
- Fix occasional external aborts on 36xx with PM that we've been
chasing for past few months. It turned out to be duplicate restore
of INTC registers that can in some cases cause us to hit erratum 1.106.
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Merge tag 'omap-for-v4.6/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap fixes for v4.6-rc cycle" from Tony Lindgren:
Fixes for omaps for v4.6-rc cycle:
- Clockdomain fix for dra7 timer interrupts
- Two fixes for GPMC EDMA binding, I missed the need for a merge with
GPMC changes and EDMA changes
- Fix beagle-x15 eSATA by dropping misconfigured extcon_usb1
- Fix occasional external aborts on 36xx with PM that we've been
chasing for past few months. It turned out to be duplicate restore
of INTC registers that can in some cases cause us to hit erratum 1.106.
* tag 'omap-for-v4.6/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3: Fix external abort on 36xx waking from off mode idle
ARM: dts: am57xx-beagle-x15: remove extcon_usb1
ARM: dts: am437x: Fix GPMC dma properties
ARM: dts: am33xx: Fix GPMC dma properties
ARM: DRA7: clockdomain: Implement timer workaround for errata i874
For the DRA7xx platform, add IP block data for the McASP, PWMSS,
and GPTimer12 IP blocks. Add lock and unlock functions for the
RTC IP blocks on the DRA7xx, AM33xx, and AM43xx devices. And add
a fix for the hwmod core for device driver unbind operations for
IP blocks with hardreset lines.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.7/20160410132119/
Note that the testbed here does not have the DRA7xx board included yet.
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Merge tag 'for-v4.7/omap-hwmod-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.7/soc
ARM: OMAP2+: first set of hwmod changes for v4.7
For the DRA7xx platform, add IP block data for the McASP, PWMSS,
and GPTimer12 IP blocks. Add lock and unlock functions for the
RTC IP blocks on the DRA7xx, AM33xx, and AM43xx devices. And add
a fix for the hwmod core for device driver unbind operations for
IP blocks with hardreset lines.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.7/20160410132119/
Note that the testbed here does not have the DRA7xx board included yet.
DT changes for 4.7.
Also included is a DRM patch necessary to prevent regressions when
simplefb and vc4 drivers are both present. The patch was suggested by
the simplefb maintainer as the solution agreed upon at ELCE 2014, and
was acked by the DRM maintainer for merging through this tree.
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Merge tag 'bcm2835-dt-next-2016-04-20' into devicetree/next
This pull request brings in VC4 devicetree support and the other minor
DT changes for 4.7.
Also included is a DRM patch necessary to prevent regressions when
simplefb and vc4 drivers are both present. The patch was suggested by
the simplefb maintainer as the solution agreed upon at ELCE 2014, and
was acked by the DRM maintainer for merging through this tree.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Controller is present on every BCM4708* board but only few devices have
serial flash attached so mark it as disabled by default.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* Correct preset_lpj calculation which may lead to too short delays
* Correct handling of optional clocks on r8a7791 to restore
access to the serial port the porter board
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Merge tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Merge "Renesas ARM Based SoC Fixes for v4.6" from Simon Horman:
Renesas ARM Based SoC Fixes for v4.6
* Correct preset_lpj calculation which may lead to too short delays
* Correct handling of optional clocks on r8a7791 to restore
access to the serial port the porter board
* tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: timer: Fix preset_lpj leading to too short delays
Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
ARM: dts: r8a7791: Don't disable referenced optional clocks
that broke when we added runtime based SoC revision detection earlier.
It seems suspend worked earlier as things were only partially initialized,
while now we initialize things properly for dra7.
Note that the "ARM: OMAP: Catch callers of revision information prior
to it being populated" had to be reverted as it caused bogus warnings
for other SoCs because omap initcalls bail out based on revision being
set to 0 for other SoCs. These initcalls will mostly just disappear
when we drop support for omap3 legacy booting.
Also included is a fix for dra7 sys_32k_ck clock source that is not
enabled on boot making system fall back to using emulated clock.
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Merge tag 'omap-for-v4.6/fixes-rc2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap fixes against v4.6-rc2" from Tony Lindgren
Fixes for omaps against v4.6-rc2, mostly to fix suspend for beagle-x15
that broke when we added runtime based SoC revision detection earlier.
It seems suspend worked earlier as things were only partially initialized,
while now we initialize things properly for dra7.
Note that the "ARM: OMAP: Catch callers of revision information prior
to it being populated" had to be reverted as it caused bogus warnings
for other SoCs because omap initcalls bail out based on revision being
set to 0 for other SoCs. These initcalls will mostly just disappear
when we drop support for omap3 legacy booting.
Also included is a fix for dra7 sys_32k_ck clock source that is not
enabled on boot making system fall back to using emulated clock.
* tag 'omap-for-v4.6/fixes-rc2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (198 commits)
Revert "ARM: OMAP: Catch callers of revision information prior to it being populated"
ARM: OMAP: Catch callers of revision information prior to it being populated
ARM: dts: dra7: Correct clock tree for sys_32k_ck
ARM: OMAP: DRA7: Provide proper class to omap2_set_globals_tap
ARM: OMAP: DRA7: wakeupgen: Skip SAR save for wakeupgen
Linux 4.6-rc2
v4l2-mc: avoid warning about unused variable
Convert straggling drivers to new six-argument get_user_pages()
.mailmap: add Christophe Ricard
Make CONFIG_FHANDLE default y
mm/page_isolation.c: fix the function comments
oom, oom_reaper: do not enqueue task if it is on the oom_reaper_list head
mm/page_isolation: fix tracepoint to mirror check function behavior
mm/rmap: batched invalidations should use existing api
x86/mm: TLB_REMOTE_SEND_IPI should count pages
mm: fix invalid node in alloc_migrate_target()
include/linux/huge_mm.h: return NULL instead of false for pmd_trans_huge_lock()
mm, kasan: fix compilation for CONFIG_SLAB
MAINTAINERS: orangefs mailing list is subscribers-only
net: mvneta: fix changing MTU when using per-cpu processing
...
Add support for board based on the popular Altera Cyclone V SoC.
This board has the following properties:
- 1 GiB of DRAM
- 1 Gigabit ethernet
- 1 USB gadget port
- 1 USB host port with an on-board hub
- 2 QSPI NORs connected to the Cadence QSPI core
- Multiple I2C EEPROMs and one I2C temperature sensor
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Move the pm-rcar driver from arch/arm/mach-shmobile/ to
drivers/soc/renesas/, and its header file to include/linux/soc/renesas/,
so it can be shared between arm32 (R-Car H1 and Gen2) and arm64 (R-Car
Gen3). Rename it to rcar-sysc as it's really a driver for the R-Car
System Controller (SYSC).
Kill the intermediate PM_RCAR config symbol, as it's not user
configurable anymore, and to prepare for SoC-specific make rules.
Add the missing #include <linux/types.h> to rcar-sysc.h, which was
exposed by different include order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
It appears that Gen2 is a misnomer for the R-Car PCIE driver
which also supports Gen 1 and Gen 3 SoCs. Accordingly, drop Gen 2
from the help text and Kconfig symbol.
Also, re-arange the Kconfig symbol name to use PCIE as the prefix.
This appears to be in keeping with other PCIE Kconfig symbols.
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
The SSP0/SPI1 and SSP1/SPI2 shared pinout and should be disable by
default.
Board specific dts should enable them, as needed.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Preparatory change prior to disabling SSPx controllers
by default in the shared LPC32xx DTSI file.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change adds clock properties to spi peripheral devices,
clock ids are taken from dt-bindings/clock/lpc32xx-clock.h
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change enables build of ARM PrimeCell PL17x driver for LPC32xx
platform, the memory controller is commonly used to interface NOR
flash drives.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change is a result of "make lpc32xx_defconfig; make savedefconfig"
run, a number of config options are removed:
CONFIG_BINFMT_AOUT=y -- not needed, legacy
CONFIG_FPE_NWFPE=y -- not needed, AEABI build
CONFIG_IPV6_PRIVACY=y -- removed build option
CONFIG_IPV6=y -- selected by default
CONFIG_MII=y -- not needed, board phys don't select library
CONFIG_MTD_CHAR=y -- removed build option
CONFIG_MTD_M25P80=y -- not needed, AT25 EEPROM driver is in use
CONFIG_USB_PHY=y -- selected by default
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Pull ARM fixes from Russell King:
"Three further fixes for ARM.
Alexandre Courbot was having problems with DMA allocations with the
GFP flags affecting where the tracking data was being allocated from.
Vladimir Murzin noticed that the CPU feature code was not entirely
correct, which can cause some features to be misreported"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8564/1: fix cpu feature extracting helper
ARM: 8563/1: fix demoting HWCAP_SWP
ARM: 8551/2: DMA: Fix kzalloc flags in __dma_alloc
Now that we don't have any fake page table levels for arm64,
cleanup the common code to get rid of the dead code.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Now that we have switched to explicit page table routines,
get rid of the obsolete kvm_* wrappers.
Also, kvm_tlb_flush_vmid_by_ipa is now called only on stage2
page tables, hence get rid of the redundant check.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Now that the hyp page table is handled by different set of
routines, rename the original shared routines to stage2 handlers.
Also make explicit use of the stage2 page table helpers.
unmap_range has been merged to existing unmap_stage2_range.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
We have common routines to modify hyp and stage2 page tables
based on the 'kvm' parameter. For a smoother transition to
using separate routines for each, duplicate the routines
and modify the copy to work on hyp.
Marks the forked routines with _hyp_ and gets rid of the
kvm parameter which is no longer needed and is NULL for hyp.
Also, gets rid of calls to kvm_tlb_flush_by_vmid_ipa() calls
from the hyp versions. Uses explicit host page table accessors
instead of the kvm_* page table helpers.
Suggested-by: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
We have stage2 page table helpers for both arm and arm64. Switch to
the stage2 helpers for routines that only deal with stage2 page table.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Introduce hyp_pxx_table_empty helpers for checking whether
a given table entry is empty. This will be used explicitly
once we switch to explicit routines for hyp page table walk.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Define the page table helpers for walking the stage2 pagetable
for arm. Since both hyp and stage2 have the same number of levels,
as that of the host we reuse the host helpers.
The exceptions are the p.d_addr_end routines which have to deal
with IPA > 32bit, hence we use the open coded version of their host helpers
which supports 64bit.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Get rid of kvm_pud_huge() which falls back to pud_huge. Use
pud_huge instead.
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Both arm and arm64 now provides a helper, pmd_thp_or_huge()
to check if the given pmd represents a huge page. Use that
instead of our own custom check.
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Rearrange the code for fake pgd handling, which is applicable
only for arm64. This will later be removed once we introduce
the stage2 page table walker macros.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Taken from the datasheet.
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for battery level reading on the Nexus7 by
enabling the bq27541 driver in the nexus7 dts
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Arnd Bergmann <arnd.bergmann@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Andy Gross <agross@codeaurora.org>
Cc: Vinay Simha BN <simhavcs@gmail.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Stephen Boyd <stephen.boyd@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to on board LIS3MDLTR magnetometer.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds spi nodes required to provide spi bus support on LS
expansion.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds nodes required to enable 4 i2c buses on the board which
are connected to various sensors and eeprom.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to 4 user leds, wlan and bt led on board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch enables sata and regulators required to get on board sata
working.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds pcie and regulators required to get on board ATL1C
ethernet working.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds usb host and otg support on board with required
regulators.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds eMMC and SD card support with card detect and adding
required regulators.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds pmic regulator supplies connected on the board.
Rest of the invidual regulators would be added as and when required by
the devices.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to DB600c with basic serial ports.
DB600c is based on APQ8064.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to gsbi7 i2c which is used in some of the new
boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to gsbi1 uart and its pinctrls nodes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch fixes pinctrls for spi and i2c nodes whose default and sleep
states are together, which is incorrect.
Without this patch i2c/spi would not be functional.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
GPT6 needs to be enabled on MT7623 for the arch timer to work.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
"PHONY += FORCE" is already cared by scripts/Makefile.build,
which these files are included from.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Marek <mmarek@suse.com>
Since commit 2aedcd098a ('kbuild: suppress annoying "... is up to
date." message'), $(call if_changed,...) is evaluated to "@:"
when there is nothing to do.
We no longer need to add "@:" after $(call if_changed,...) to
suppress "... is up to date." message.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Marek <mmarek@suse.com>
These targets are marked as PHONY. No need to add FORCE to their
dependency.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Marek <mmarek@suse.com>
This series wires up the generic memremap() function for ARM in a way
that allows it to be used as intended, i.e., without regard for whether
the region being mapped is covered by a struct page and/or the linear
mapping (lowmem)
arm_cpuidle_read_ops() just copies '*ops' to cpuidle_ops[cpu], so the
structure '*ops' is not modified at all.
The comment is also updated accordingly.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The core code does not modify smp_operations structures. To clarify it,
this patch adds 'const' qualifier to the 'ops' member of struct
of_cpuidle_method.
This change allows each arm cpuidle code to add 'const' qualifier to
its cpuidle_ops structure.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
One part of the efs memory region is used specifically for sharing file system
buffers between the apps and modem cpus (aka rmtfs), so better reflect this
split.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the blsp_dma node to the device tree and the required
properties for using DMA with serial
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the crypto nodes to the ipq4019 device tree, it also adds the
BAM node used by crypto as well which the driver currently requires to
operate properly
The crypto driver itself depends on some other patches to qcom_bam_dma
to function properly:
https://lkml.org/lkml/2015/12/1/113
CC: Stanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds some operating points for cpu frequeny scaling
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This will allow boards to enable the I2C bus
CC: Sricharan R <srichara@qti.qualcomm.com>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This will allow boards to enable the SPI bus
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This will allow these types of boards to be rebooted.
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This will allow boards to enable watchdog support
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the required device tree nodes to bring up the
secondary cores on the ipq4019 SoC.
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Initial board support dts files for DK01 board.
Signed-off-by: Senthilkumar N L <snlakshm@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add initial dts files and SoC support for IPQ4019
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Adding reset-gpio-active-high boolean DT binding property, which we need to
make PCIe working on Apalis SoMs and not break old DTBs. While at it, I've
fixed comment and GPIO polarity.
On Apalis SoMs the GPIO1_IO28 used to PCIe reset is not connected directly
to PERST# PCIe signal, but it's ORed with RESETBMCU coming off the PMIC,
and thus is inverted, active-high.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This patch adds the CPU node of the BCM2835 into the DT.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
The ARM TWD interrupt is a private peripheral interrupt (PPI), and per
the ARM GIC documentation, whether the type for PPIs can be set is
IMPLEMENTATION DEFINED.
For R-Car H1 devices the PPI type cannot be set, and so when we attempt
to set the type for the ARM TWD interrupt it fails. This has gone
unnoticed because it fails silently, and because we cannot re-configure
the type it has had no impact. Nevertheless fix the type for the TWD
interrupt so that it matches the hardware configuration.
Based on patches by Jon Hunter for Tegra20/30 and OMAP4.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The ARM TWD interrupt is a private peripheral interrupt (PPI), and per
the ARM GIC documentation, whether the type for PPIs can be set is
IMPLEMENTATION DEFINED.
For SH-Mobile AG5 devices the PPI type cannot be set, and so when we
attempt to set the type for the ARM TWD interrupt it fails. This has
gone unnoticed because it fails silently, and because we cannot
re-configure the type it has had no impact. Nevertheless fix the type
for the TWD interrupt so that it matches the hardware configuration.
Based on patches by Jon Hunter for Tegra20/30 and OMAP4.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add IIC nodes to r8a7794 device tree.
Based on similar work for the r8a7793 by Laurent Pinchart.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add IIC clocks to r8a7794 device tree.
Based on similar work for the r8a7790 by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
The R-Car CAN controllers can derive the CAN bus clock not only from their
peripheral clock input (clkp1) but also from the other internal clock
(clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in
the device tree along with the USB_EXTAL clock from which clkp2 is
derived.
Based on work by Sergei Shtylyov for the r8a7791 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add CAN nodes to r8a7794 device tree.
Based on work by Sergei Shtylyov for the r8a7791 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Add CAN nodes to r8a7794 device tree.
Based on work by Sergei Shtylyov for the r8a7791 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Based on Rev. 2.00 of the R-Car Gen2 datasheet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit edf4100906 ("ARM: shmobile: sh7372 dtsi: Remove Legacy
file") removed the DTS for the last shmobile SoC with a Cortex A8 CPU
core (sh7372 aka SH-Mobile AP4), hence drop support for it in the
loops-per-jiffy preset code.
As "div" is always 1 for supported contemporary ARM processors, we can
simplify the code:
- Absorb shmobile_setup_delay_hz(), which was always called with
mult = div = 1,
- Return earlier if the Cortex A7/A15 arch timer exists and support is
enabled.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On all shmobile ARM SoCs, loop-based delays may complete early, which
can be after only 1/3 (Cortex A9) or 1/2 (Cortex A7 or A15) of the
minimum required time.
This is caused by calculating preset_lpj based on incorrect assumptions
about the number of clock cycles per loop:
- All of Cortex A7, A9, and A15 run __loop_delay() at 1 loop per
CPU clock cycle,
- As of commit 11d4bb1bd0 ("ARM: 7907/1: lib: delay-loop: Add
align directive to fix BogoMIPS calculation"), Cortex A8 runs
__loop_delay() at 1 loop per 2 instead of 3 CPU clock cycles.
On SoCs with Cortex A7 and/or A15 CPU cores, this went unnoticed, as
delays use the ARM arch timer if available. R-Car Gen2 doesn't work if
the arch timer is disabled. However, APE6 can be used without the arch
timer.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This reverts commit 19417bd9c5 ("ARM: dts: porter: Enable SCIF_CLK
frequency and pins") as according to
http://elinux.org/File:R-CarM2-KOELSCH_PORTER-B_PORTER_C_Comparison.pdf
the external oscillator for SCIF_CLK is not mounted on the porter boards.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
clk_get on a disabled clock node will return EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their clocks property.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them to prevent this.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Obviously, these are PHONY targets.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
For incremental build, "include/generated/mach-types.h is up to date"
is every time displayed like follows:
$ make ARCH=arm
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
make[1]: `include/generated/mach-types.h' is up to date.
CHK include/generated/bounds.h
CHK include/generated/timeconst.h
CHK include/generated/asm-offsets.h
This commit avoids such a clumsy log and introduces Kbuild standard
log style:
GEN include/generated/mach-types.h
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit b8c9592 "ARM: 8318/1: treat CPU feature register fields as signed
quantities" introduced helper to extract signed quantities of 4-bit
blocks. However, with a current code feature with value 0b1000 isn't
rejected as negative. So fix the "if" condition.
Reported-by: Jonathan Brawn <Jon.Brawn@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit b8c9592 "ARM: 8318/1: treat CPU feature register fields as signed
quantities" accidentally altered cpuid register used to demote
HWCAP_SWP.
ARM ARM says that SyncPrim_instrs bits in ID_ISAR3 should be used with
SynchPrim_instrs_frac from ID_ISAR4. So, follow this rule.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add interrupt-names properties to dt and apply the correct
mapping between irq and dma channels.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The DRAM gates control whether the image / display devices on the SoC have
access to the DRAM clock or not.
Enable it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
It turns out that the A13 / R8 also have a tve encoder block, and a gate
for it.
Add it to the DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the pll3 and pll7 clocks in the DT that are used to drive the
display-related clocks.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Do not have the machine Kconfig entry point need to select
BRCMSTB_GISB_ARB, instead, just let it be default ARCH_BRCMSTB which is
a better way to deal with this. While at it, also make it default
BMIPS_GENERIC so the legacy MIPS-based STB platforms can benefit from
the same thing.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Value of soc_dev_attributes:
* family = chip family id
* soc_id = product id
* revision = product revision
Signed-off-by: Justin Chen <justin.chen@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Implement handling properties in subnodes and adding child devices to the
system. Child devices will not be added if configuration fails.
Since the driver now does more than suspend-resume support, dependency on
CONFIG_PM is removed.
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
As now we have dedicated driver for SROM controller, it will take care
of saving register banks during S2R so we can safely remove these
settings from mach-exynos.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
[k.kozlowski: Need to select also SAMSUNG_MC]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch changes SROM nodes compatible from generic to model specific
to match with binding documentation. Also updating property
"samsung,srom-page-mode" as it is not defined as bool instead of int
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The official UDOO board kit has 7 and 15.6 inch touchscreen LCD panels
as options.
This patch adds support for 7 inch panel only, but the 15.6 inch one
should be easy to add using the same regulator, backlight device and
LVDS channel.
Since this panel is an option for UDOO board it is disabled by default
and can be enabled (for example) by the following U-Boot commands:
fdt set backlight status okay
fdt set panelchan status okay
fdt set panel7 status okay
fdt set touchscreenp7 status okay
The LVDS channels is also disabled by default to avoid warning from its
driver.
Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the Keypad Port (KPP) devicetree nodes for IMX31 and IMX35 SOC.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Probably most of NXP LPC32xx boards have 13MHz main oscillator and
therefore for HCLK PLL and ARM core clock rate default hardware
setting is 16 * 13MHz = 208MHz, however a user may vary HCLK PLL/ARM
core rate from 156MHz to about 266MHz for 13MHz clock source.
The change explicitly defines HCLK PLL output rate to default 208MHz
to overwrite any settings done by a bootloader, if needed it can be
redefined in a board DTS file.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The edp-phy control is a part of the General Register Files and
with a recent patch in 4.6 the phy driver can now also handle this
correctly, so move the dts node under the GRF as well.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Similar to the pmu, the general register files contain a lot of different
setting bits grouped into general registers, but also some somewhat special
entities like the controls for some phy-blocks or the io-voltage control.
To be able to move these blocks under the grf node where they actually
belong, make it a simple-mfd.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the Security Controller (SCC) module to the dtsi.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Move NAND specific device tree parsing to NAND driver.
The NAND controller node must have a compatible id, register space
resource and interrupt resource.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Deprecate nand register passing via platform data and use
gpmc_omap_get_nand_ops() instead.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Commit 19e6e5e539 ("ARM: 8547/1: dma-mapping: store buffer
information") allocates a structure meant for internal buffer management
with the GFP flags of the buffer itself. This can trigger the following
safeguard in the slab/slub allocator:
if (unlikely(flags & GFP_SLAB_BUG_MASK)) {
pr_emerg("gfp: %un", flags & GFP_SLAB_BUG_MASK);
BUG();
}
Fix this by filtering the flags that make the slab allocator unhappy.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
DRA72-EVM now has an upgrade to Rev C with SR2.0 silicon. As part of
this change, a few updates were factored in that were software
incompatible with previous board in few areas:
- We now use DP83867 ethernet phy instead of older DP838865 which fails
in certain use cases.
- Two Ethernet ports now instead of the single one in rev B.
- polarities changed for certain pcf gpios
- Due to SoC phy current requirements, VDDA supplies are split between
ldo3 and ldo2 (ldo2 was previously unused). NOTE: DSS (VDDA_VIDEO) is
still supplied by ldo5, HDMI is now supplied by LDO2 instead of using
LDO3.
NOTE: It does not make much sense to spin off a new board compatible
flag since there is no real benefit for the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ChiliSOM has TPS65217's PWR_EN pin connected to AM335x PMIC_POWER_EN
pin. Processor's PMIC_POWER_EN is controlled by it's internal RTC, hence
RTC subsystem is responsible for proper board poweroff sequence.
This change enables complete poweroff sequence for ChiliBoard, switching
PMIC's state from ACTIVE to SLEEP.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ChiliSOM has 2 Ethernet subsystems with different types of possibly used
PHY interfaces (i.e. MII, RMII, GMII, RGMII). Current code configured
pinmux for RMII on 1st Ethernet subsystem and enabled Ethernet MAC with
1 slave for all boards which use ChiliSOM.
This change moves pinmux configuration of 1st Ethernet subsystem to
ChiliBoard description, as this is board-specific.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
uart0 configuration code has been in SOM. However, it is possible to
use all (or none) of 6 uart's of AM335x processor present on ChiliSOM.
This fix moves declaration of uart0 from ChiliSOM to ChiliBoard, because
use of uart is strictly board-specific.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds the DMA engine to the Nomadik and assigns the UART
DMA channels. Both slave DMA for UARTs and the memcpy engine
works fine, tested on the Nomadik NHK15.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The LIS3LV02DL accelerometer on the Nomadik NHK15 can generate
IRQs by the DRDY line. Map this in the DTS file and set up the
pin as input to the SoC.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This platform is based on a Marvell 88E6282 SoC and 88E6171 switch.
[gregory.clement@free-electrons.com: fix block comment style]
Signed-off-by: Bert Vermeulen <bert@biot.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add dts file to support Buffalo/Revogear Kurobox-Pro, which is marvell
orion5x based 3.5" HDD NAS.
It's a quite old product and already discontinued. So there's no
official website for it. But it was an early product which used marvell
orion5x 88F5182 chipset, it's popular in the community.
Some unofficial site:
- http://buffalo.nas-central.org/wiki/Category:KuroboxPro
- http://nice.kaze.com/KUROPRO_ProductSpecifications.pdf
This device tree is based on the board file:
arch/arm/mach-orion5x/kurobox_pro-setup.c
However, the probing order of NAND and JEDEC-Flash are different from
the original board file, this results in incompatible minor number
for a few /dev/mtdX and /dev/mtdblockX devices.
So I still want to keep the board file for the time being.
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The regulator has a reg property so include it in the unit name.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
gpio-i2c does not have a reg property, just a list of gpios.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
PCIe has a range property, so the unit name should contain an address.
Make use of the label to enable individual PCIe busses. Also, fixup
the synology dtsi file which added a label pcie2 rather than using the
existing pcie1 label.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
PHYs have an address on the mdio bus. So the unit name should contain
an address. This is complicated in that some .dtsi files contain the
node, but the reg is set in the .dts file. In this case, use the
abstract address X.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The dsa node does not have a reg property, so remove the address from
the unit name.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
leds don't have a reg property, so remove the address from the unit name.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The DT compiler is now warning about unit names with addresses but not
reg property. Fix all the gpio-key buttons which causes warnings.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This enables the new driver for Marvell CESA crypto engines on all mvebu v5.
The old driver is no longer used, but it is still in the tree for fallback.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This enables the new driver for Marvell CESA crypto engines on all ARMv7.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This enables the new driver for Marvell CESA crypto engines on all mvebu v7.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Depending on timing during the resume path from off mode on 36xx, we may
see external aborts. These seem to be caused by the following:
- OMAP3 Advisory 1.62 "MPU Cannot Exit from Standby" says we need to
disable intc autoidle before WFI
- DM3730 Advisory 1.106 "MPU Leaves MSTANDBY State Before IDLEREQ of
Interrupt Controller is Released" says we need to wait before
accessing intc
omap3_intc_resume_idle restores the intc autoidle for all resume paths,
however in the resume path from off mode only it is also being restored
by omap_intc_restore_context before this call to omap3_intc_resume_idle
happens. The second restore of the intc autoidle in this path is what
appears to be causing the external abort so for the off mode resume path
let's rely on omap_intc_restore_context to restore intc autoidle, and
for all other paths let omap3_intc_resume_idle handle it as it is now.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Introduce a set_parent callback that will be used for mux clocks, such as
the USB PHY muxes and the async3 clock domain mux.
Signed-off-by: David Lechner <david@lechnology.com>
[nsekhar@ti.com: checkpatch fixes]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We will be adding more da8xx-specific code for phy and clocks, so it will
be better to have this in a separate file. This way we don't have a bunch
of #ifdefs for all of the da8xx stuff.
While at it, fix some checkpatch warnings coming from existing code.
Signed-off-by: David Lechner <david@lechnology.com>
[nsekhar@ti.com: typo and checkpatch fixes]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Remove boilerplate code by using IRQCHIP_DECLARE macro.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
DA8X_NUM_UARTS not used in the code anywhere and should be determined
by DT anyway.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Take advantage of of_platoform_default_populate convience function.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The following properties of the musb_hdrc_config structure
are deprecated and no longer required/used by the MUSB driver:
.dyn_fifo
.soft_con
.dma
.dma_channels
.eps_bits
Signed-off-by: Petr Kulhavy <petr@barix.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add OF_DEV_AUXDATA entry for second i2c on the da850 DT board driver
to use i2c clock.
Signed-off-by: Petr Kulhavy <petr@barix.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
da850 has two I2C controllers, but the node for i2c1 was missing.
Add node for i2c1 controller and i2c1 pinmux pins.
Signed-off-by: Petr Kulhavy <petr@barix.com>
[nsekhar@ti.com: fix indentation]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
TI has been using the physical address in DT after the @ in device nodes.
The device tree convention is to use the same address that is used for
the reg property. This updates all davinci DT files to use the proper
convention.
Signed-off-by: David Lechner <david@lechnology.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The gpio node is missing the mandatory property #gpio-cells, which is
causing runtime errors when using GPIOs e.g. with gpio-leds or gpio-keys:
"could not get #gpio-cells for /soc/gpio@1e26000"
This fixes the problem and adds the missing parameter.
The value is 2 according to the gpio-davinci.txt binding.
Signed-off-by: Petr Kulhavy <petr@barix.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
-----------
- Add CPUFreq and RProc drivers to STI maintainers file list
- Improve STi's menuconfig help entry
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Merge tag 'sti-soc-for-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/soc
Highlights:
-----------
- Add CPUFreq and RProc drivers to STI maintainers file list
- Improve STi's menuconfig help entry
* tag 'sti-soc-for-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: STi: Update platform level menuconfig 'help'
MAINTAINERS: Add ST's Remote Processor Driver to ARM/STI ARCHITECTURE
MAINTAINERS: Add ST's CPUFreq driver to the STI file list
Signed-off-by: Olof Johansson <olof@lixom.net>
-----------
- Enable ST's HW Random number generator in multi_v7 defconfig
- Enable PWM regulator support in multi_v7 defconfig
- Enable ST's Power and Reset driver in multi_v7 defconfig
- Enable ST's PWM in multi_v7 defconfig
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Merge tag 'sti-defconfig-for-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/defconfig
Highlights:
-----------
- Enable ST's HW Random number generator in multi_v7 defconfig
- Enable PWM regulator support in multi_v7 defconfig
- Enable ST's Power and Reset driver in multi_v7 defconfig
- Enable ST's PWM in multi_v7 defconfig
* tag 'sti-defconfig-for-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: multi_v7_defconfig: Enable ST's HW Random Number Generator
ARM: multi_v7_defconfig: Enable support for PWM Regulators
ARM: multi_v7_defconfig: Enable ST's Power Reset driver
ARM: multi_v7_defconfig: Enable ST's PWM driver
Signed-off-by: Olof Johansson <olof@lixom.net>
as well as general display+hdmi support on rk3036. With the Analogix
DP support, Veyron Chromeboks can now finally use their internal
display.
Other than this big improvement we have thermal support on the rk3228,
a long time missing binding document for the General Register Files
block, better operating points for Veyron devices and a bunch of fixes
with parts stemming from warnings that new dtc version can generate.
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Merge tag 'v4.7-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
A lot display-controller nodes for DSI and the Analogix DP on rk3288
as well as general display+hdmi support on rk3036. With the Analogix
DP support, Veyron Chromeboks can now finally use their internal
display.
Other than this big improvement we have thermal support on the rk3228,
a long time missing binding document for the General Register Files
block, better operating points for Veyron devices and a bunch of fixes
with parts stemming from warnings that new dtc version can generate.
* tag 'v4.7-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (27 commits)
ARM: dts: rockchip: move rk3036 memory definition to board files
ARM: dts: rockchip: enable the eDP on rk3288 veyron devices
ARM: dts: rockchip: simple panel and backlight supplies on veyron boards
ARM: dts: rockchip: override edp hpd handling on veyron-pinky and speedy
ARM: dts: rockchip: add rk3288-veyron-minnie backlight and panel settings
ARM: dts: rockchip: add rk3288-veyron-jaq backlight and panel overrides
ARM: dts: rockchip: add core rk3288-veyron backlight and panel nodes
ARM: dts: rockchip: add startup delay to rk3288-veyron panel-regulators
ARM: dts: rockchip: move edp-hpd pin definition into common location
ARM: dts: rockchip: add rk3288 displayport controller node
ARM: dts: rockchip: add rk3288 edp-phy node
ARM: dts: rockchip: add missing unitname to cpu_leakage efuse
ARM: dts: rockchip: drop unneeded properties from mipi node
ARM: dts: rockchip: clean up gpio-keys nodes
ARM: dts: rockchip: fix missing usbphy unit-names
ARM: dts: rockchip: fix rk3288 power-domain unit names
ARM: dts: rockchip: update rk3288-veyron cpu operating points
ARM: dts: rockchip: remove broken-cd from emmc and sdio
ARM: dts: rockchip: enable the tsadc for rk3228 evb
ARM: dts: rockchip: add the thermal main info found on rk3228
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'v4.7-rockchip-soc32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/cleanup
Fix for a sparse build warning in the smp code.
* tag 'v4.7-rockchip-soc32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: Fix use of plain integer as NULL pointer
Signed-off-by: Olof Johansson <olof@lixom.net>
Three types of display controller-drivers where added recently. The
Analogix Displayport variant and Designware MIPI DSI used for example
on the rk3288 as well as the Innosilicon HDMI controller used on the
rk3036.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
The displayport phy controls the output of the Analogix displayport
controller on Rockchip SoCs and is therefore one component to enable
veyron devices to use their internal display.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Update SD/MMC node for Arria10
- Update Arria10 with clock and interrupt fields for DMA
- Remove 'phy-addr' from stmmac node
- Remove ethernet node from Cyclone5 DTSI
- Add LEDs/KEYs/SWs support on Sockit
- Add L2 and OCRAM EDAC dts entries
- Add reset control for USB
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Merge tag 'socfpga_dts_for_v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.7
- Update SD/MMC node for Arria10
- Update Arria10 with clock and interrupt fields for DMA
- Remove 'phy-addr' from stmmac node
- Remove ethernet node from Cyclone5 DTSI
- Add LEDs/KEYs/SWs support on Sockit
- Add L2 and OCRAM EDAC dts entries
- Add reset control for USB
* tag 'socfpga_dts_for_v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: add reset control for USB
ARM: dts: socfpga: Add Altera Arria10 OCRAM EDAC devicetree entry
ARM: dts: socfpga: Add Altera Arria10 L2 Cache EDAC devicetree entry
ARM: dts: socfpga: Add support for HPS KEYs/SWs on SoCKit
ARM: dts: socfpga: Add support for HPS LEDs on SoCKit
ARM: dts: socfpga: Drop gmac0 from CV dtsi
ARM: dts: socfpga: Drop phy-addr OF property from CV dtsi
ARM: dts: socfpga: Add missing clock and interrupt fields for Arria10 DMA
ARM: dts: socfpga: add the clk-phase property for sd/mmc clock
ARM: dts: socfpga: add cap-sd-highspeed for SD/MMC node
Signed-off-by: Olof Johansson <olof@lixom.net>
MDIO Bus/PHY emulation with fixed speed/link PHYs will be used in
Baltos iR5221 devices to connect to ICPlus IP175D switch IC.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable DP83867 Ethernet phy for supporting networking on DRA72-EVM rev C
(SR2.0).
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the TI TPIC2810 8-Bit LED Driver with I2C Interface. This is used
in AM335x ICEv2 Boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
FROZEN hotplug notifiers are not handled and do not have to be. Insert
a comment to remember that the lack of the FROZEN transitions is no
accident.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: linux-omap@vger.kernel.org
Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Open Switch Retention(OSWR) is a retention state which is unsupported
in DRA7 SoC. This state is achieved when power state is set to
retention and logic power state is set to OFF.
Even though DRA7 architecture is a OMAP derivative, none of the
powerdomains are actually implemented to achieve OSWR in the SoC.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When the power domain is in "ON" state, the memories should be always
in "ON", even though the hardware register allows other states to be
written, wrong states may confuse certain hardware blocks.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Erratum i892 as will be documented in the upcoming G or later revision
of DRA7xx/ AM57xx errata documentation (SPRZ398F) states that L3 clock
needs to be kept active all the time to ensure that asymmetric aging
degradation is minimal and within the design allowed margin.
By allowing core domain to transition to INA and allowing L3 clock to be
turned off for extended periods of time, there is a risk of functional
issues and device failure as a result.
Ref: http://www.ti.com/lit/er/sprz429h/sprz429h.pdf
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- CREG clock controller
- Real Time Clock (RTC)
- Analog peripherals (ADC/DAC)
- Warning fixes for the new dtc compiler
With the CREG clock controller in place it is now possible
to enable the internal RTC on LPC18xx/43xx platforms. The
analog peripherals (ADC/DAC) has also been added here and
enabled on both the EA4357 dev kit and Hitex eval board.
In addition to the new entries there are a fixes for the
DT warnings generated by the new dtc.
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Merge tag 'lpc18xx_dts_for_4.7' of https://github.com/manabian/linux-lpc into next/dt
Device Tree additions for LPC18xx platform
- CREG clock controller
- Real Time Clock (RTC)
- Analog peripherals (ADC/DAC)
- Warning fixes for the new dtc compiler
With the CREG clock controller in place it is now possible
to enable the internal RTC on LPC18xx/43xx platforms. The
analog peripherals (ADC/DAC) has also been added here and
enabled on both the EA4357 dev kit and Hitex eval board.
In addition to the new entries there are a fixes for the
DT warnings generated by the new dtc.
* tag 'lpc18xx_dts_for_4.7' of https://github.com/manabian/linux-lpc:
dt-bindings: phy-lpc18xx-usb-otg: remove unit address from binding
ARM: dts: lpc4350-hitex-eval: fix unit name warnings from dtc
ARM: dts: lpc4357-ea4357: fix unit name warnings from dtc
ARM: dts: lpc18xx: remove unit addresses from creg childs
ARM: dts: armv7-m: add unit name to interrupt-controller
ARM: dts: lpc4350-hitex-eval: add adc1
ARM: dts: lpc4357-ea4357: add dac
ARM: dts: lpc4357-ea4357: add adc0
ARM: dts: lpc18xx: add dac node
ARM: dts: lpc18xx: add adc nodes
ARM: dts: lpc18xx: add rtc node
ARM: dts: lpc18xx: add creg-clk node
Signed-off-by: Olof Johansson <olof@lixom.net>
Nicolas Ferre