Add support for the PCI host controller found on Tegra210 SoCs. It is very
similar to the variant found on Tegra124, with a couple of small
differences regarding the power supplies.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
The cyclecounter mult and shift values can be calculated based on the
CPTS rfclk frequency and timekeepnig framework provides required algos
and API's.
Hence, calc mult and shift basing on CPTS rfclk frequency if both
cpts_clock_shift and cpts_clock_mult properties are not provided in DT (the
basis of calculation algorithm is borrowed from
__clocksource_update_freq_scale() commit 7d2f944a2b ("clocksource:
Provide a generic mult/shift factor calculation")). After this change
cpts_clock_shift and cpts_clock_mult DT properties will become optional.
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Device-tree bindings for TI DA850/OMAP-L138/AM18XX pullup/pulldown
pinconf controller.
Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
GPIO7 is configured in POWERHOLD mode which has higher priority
over DEV_ON bit and keeps the PMIC supplies on even after the DEV_ON
bit is turned off. This property enables driver to over ride the
POWERHOLD value to GPIO7 so as to turn off the PMIC in power off
scenarios.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pull rockchip clk driver updates from Heiko Stuebner:
A new clock controller for the rk1108 soc (single-core Cortex-A7+DSP),
a fix making sure the cpuclk rate is actually valid, before trying to
set it and a copy-paste fix for the rk3399's testclk.
* tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: add clock controller for rk1108
dt-bindings: add documentation for rk1108 cru
clk: rockchip: add dt-binding header for rk1108
clk: rockchip: fix copy-paste error in rk3399 testclk
clk: rockchip: validity should be checked prior to cpu clock rate change
Re-using idle state definition provided by arm,idle-state for domain
idle states creates a lot of confusion and limits further evolution of
the domain idle definition. To keep things clear and simple, define a
idle states for domain using a new compatible "domain-idle-state".
Fix existing PM domains code to look for the newly defined compatible.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This adds support for the AU Optronics G185HAN01 18.5" LVDS FullHD TFT
LCD panel, which can be supported by the simple panel driver.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds support for the AU Optronics G133HAN01 13.3" LVDS FullHD TFT
LCD panel, which can be supported by the simple panel driver.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Chunghwa CLAA070WP03XG is a 7" 1280x800 panel, which can be
supported by the simple panel driver.
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add three reset control signals, "mac_core_rst", "mac_ifc_rst" and
"phy_rst".
The following diagram explained how the reset signals work.
SoC
|-----------------------------------------------------
| ------ |
| | cpu | |
| ------ |
| | |
| ------------ AMBA bus |
| GMAC | |
| ---------------------- |
| ------------- mac_core_rst | -------------- | |
| |clock and |-------------->| mac core | | |
| |reset | | -------------- | |
| |generator |---- | | | |
| ------------- | | ---------------- | |
| | ---------->| mac interface | | |
| | mac_ifc_rst | ---------------- | |
| | | | | |
| | | ------------------ | |
| |phy_rst | | RGMII interface | | |
| | | ------------------ | |
| | ---------------------- |
|----------|------------------------------------------|
| |
| ----------
|--------------------- |PHY chip |
----------
The "mac_core_rst" represents "mac core reset signal", it resets
the mac core including packet processing unit, descriptor processing unit,
tx engine, rx engine, control unit.
The "mac_ifc_rst" represents "mac interface reset signal", it resets
the mac interface. The mac interface unit connects mac core and
data interface like MII/RMII/RGMII. After we set a new value of
interface mode, we must reset mac interface to reload the new mode value.
The "mac_core_rst" and "mac_ifc_rst" are both optional to be
backward compatible with the hix5hd2 SoC.
The "phy_rst" represents "phy reset signal", it does a hardware reset
on the PHY chip. This reset signal is optional if the PHY can work well
without the hardware reset.
Add one more clock signal, the existing is MAC core clock,
and the new one is MAC interface clock.
The MAC interface clock is optional to be backward compatible with
the hix5hd2 SoC.
Signed-off-by: Dongpo Li <lidongpo@hisilicon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The "hix5hd2" is SoC name, add the generic ethernet driver name.
The "hisi-gemac-v1" is the basic version and "hisi-gemac-v2" adds
the SG/TXCSUM/TSO/UFO features.
Signed-off-by: Dongpo Li <lidongpo@hisilicon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add new DT bindings for new MXSFB driver that is using the
OF graph to parse the video output structure instead of
hard-coding the display properties into the MXSFB node.
The old MXSFB fbdev driver bindings are preserved in the
same file in the "Old bindings" section.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Clean up the ad-hoc indentation in the documentation, no functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
On certain platforms (like TI), DVFS for a single device (CPU) requires
configuring multiple power supplies.
The OPP bindings already contains binding and example to explain this
case, but it isn't sufficient.
- There is no way for the code parsing these bindings to know which
voltage values belong to which power supply.
- It is not possible to know the order in which the supplies need to be
configured while switching OPPs.
This patch clarifies on those details by mentioning that such
information is left for the implementation specific bindings to explain.
They may want to hardcode such details or implement their own properties
to get such information. All implementations using multiple regulators
for their devices must provide a binding document explaining their
implementation.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The regulator bindings allow the "<name>-supply" property to define a
single parent supply and not a list of parents.
Fix the wrong example code present in OPP bindings.
While at it also change the compatible string as Rob pointed out earlier
that none of A7 implementation have multiple supplies for the CPU core.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJYRIGyAAoJEHm+PkMAQRiG2ksH/jwMUT9j6glbwESxbn1YTqTM
QcBT5AMc7D0wNuidQe0hWZMtG4RbC+4ZhxzZl2wPgA2gueJ+rBnyX7bgtA7ka8ka
Fdc3u/Q1v38HPzf8iBnxcdCs40VgsoMLjFYCXrpOxuGDNKYzRd+Q8aI2TeGvzbyi
X8+6oAWifBwo2oA06jfcuUncEWbyDDyK9aQksmfKOpjHdb26yELPEhsPOlds1g7E
jYLnvUVnU2CoFaumta+rZQ0kzLdc4Ntu0wEao6WzJuQKsgoID+tS/6iudi8cUhDp
YowGAVoOfr6rAJB0mwrDVfugpamaT3386XKyocdNsK0/jR60UIJ8x+WzvvSU+lY=
=JTBj
-----END PGP SIGNATURE-----
Backmerge tag 'v4.9-rc8' into drm-next
Linux 4.9-rc8
Daniel requested this so we could apply some follow on fixes cleanly to -next.
The label property can be used to specify a name of the edge, for
consistent naming purposes.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
MYIR Tech Limited offers a range of ARM powered development boards and SoMs,
for details reference a list on http://elinux.org/Development_Platforms#ARM
or company's website http://myirtech.com
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Rob Herring <robh@kernel.org>
-----BEGIN PGP SIGNATURE-----
iQFHBAABCgAxFiEES2FAuYbJvAGobdVQPTuqJaypJWoFAlhAJY0THG1rbEBwZW5n
dXRyb25peC5kZQAKCRA9O6olrKklam88B/0dgD2R9D8udVyHnp1CGVrWm+REER49
g6V2ZqIqfxaAFEiQFIhySJJtWYt4vHAC2A3Mwx6yyv9qugYb26LCiSt3XQPlPNY4
yVFpVzOMsFjmSu9PQ7u47b7/IKmqmSuuuQQWm3rDxDQC+KLKmH1TfULXzqDQ/yR/
+gNTvi6Zwfi6rFU7B33I6cT0VhfnWXhbAbBdg4jNmW5WAyz+WT6c9J9oXQMRw5VW
ESTYrU2c+IVK3Z3e0BOmnCytaPrxE6j1OmT0LNsVR5aoXDmK3jDNln/7cPEOCkD3
3t9ub+gqfeaMIjyDI3yBcy75Gjk3mFQMXs/3LVTivwZySgGldOak/iyL
=vXN1
-----END PGP SIGNATURE-----
Merge tag 'linux-can-next-for-4.10-20161201' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next
Marc Kleine-Budde says:
====================
pull-request: can-next 2016-12-01
this is a pull request of 4 patches for net-next/master.
There are two patches by Chris Paterson for the rcar_can and rcar_canfd
device tree binding documentation. And a patch by Geert Uytterhoeven
that corrects the order of interrupt specifiers.
The fourth patch by Colin Ian King fixes a spelling error in the
kvaser_usb driver.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Couple conflicts resolved here:
1) In the MACB driver, a bug fix to properly initialize the
RX tail pointer properly overlapped with some changes
to support variable sized rings.
2) In XGBE we had a "CONFIG_PM" --> "CONFIG_PM_SLEEP" fix
overlapping with a reorganization of the driver to support
ACPI, OF, as well as PCI variants of the chip.
3) In 'net' we had several probe error path bug fixes to the
stmmac driver, meanwhile a lot of this code was cleaned up
and reorganized in 'net-next'.
4) The cls_flower classifier obtained a helper function in
'net-next' called __fl_delete() and this overlapped with
Daniel Borkamann's bug fix to use RCU for object destruction
in 'net'. It also overlapped with Jiri's change to guard
the rhashtable_remove_fast() call with a check against
tc_skip_sw().
5) In mlx4, a revert bug fix in 'net' overlapped with some
unrelated changes in 'net-next'.
6) In geneve, a stale header pointer after pskb_expand_head()
bug fix in 'net' overlapped with a large reorganization of
the same code in 'net-next'. Since the 'net-next' code no
longer had the bug in question, there was nothing to do
other than to simply take the 'net-next' hunks.
Signed-off-by: David S. Miller <davem@davemloft.net>
Document the devicetree bindings for the Microchip MCP3021/3221.
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Add support for the tc654 and tc655 fan controllers from Microchip.
http://ww1.microchip.com/downloads/en/DeviceDoc/20001734C.pdf
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
[groeck: Fixed continuation line alignments]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Armada 3700 is a new ARMv8 SoC from Marvell using same network controller
as older Armada 370/38x/XP. There are however some differences that
needed taking into account when adding support for it:
* open default MBUS window to 4GB of DRAM - Armada 3700 SoC's Mbus
configuration for network controller has to be done on two levels:
global and per-port. The first one is inherited from the
bootloader. The latter can be opened in a default way, leaving
arbitration to the bus controller. Hence filled mbus_dram_target_info
structure is not needed
* make per-CPU operation optional - Recent patches adding RSS and XPS
support for Armada 38x/XP enabled per-CPU operation of the controller
by default. Contrary to older SoC's Armada 3700 SoC's network
controller is not capable of per-CPU processing due to interrupt lines'
connectivity. This patch restores non-per-CPU operation, which is now
optional and depends on neta_armada3700 flag value in mvneta_port
structure. In order not to complicate the code, separate interrupt
subroutine is implemented.
For now, on the Armada 3700, RSS is disabled as the current
implementation depend on the per cpu interrupts.
[gregory.clement@free-electrons.com: extract from a larger patch, replace
some ifdef and port to net-next for v4.10]
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit documents the compatible string to have the compatibility for
the I2C unit found in the Armada 3700.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This patch adds DT binding documentation for Exnos5433 based TM2
and TM2E boards sound subsystem.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
The BUCK regulators 3, 4, and 5 also have a 10mV step mode,
adjust the tables and logic to reflect the data-sheet for
these regulators.
fixes: d2a2e729a6 ("regulator: tps65086: Add regulator driver for the TPS65086 PMIC")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
According to both DTS (example and actual files), and Linux driver code,
the first interrupt specifier should be the Channel interrupt, while the
second interrupt specifier should be the Global interrupt.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYPsQiAAoJEJA2s1DX1hlBHgIP/1EqQo2xYsShSRcnuCx5nahc
xruBS+J0ApA0QpB6bzzxWoChuSVkF3IaCmkwQG5ZUS9HljGWcEy4ljNA0zpCFZMj
UmMWOkbu4Z8aZ/IjvCS9JgRnS98faem2KapLWOLM+TGj8li/Xj1y/CvS8FdsFhZQ
6YmnF6XPKYi/0TZd3ATZs9EwruBOqPH2XUYluJazDlbpmQMa4N6sBO5bgd3x57mu
CAXidAFTtfIi92UEtHjKQJLWXwrQIUDWr/qcDychFOBIJgxpjjFJeEhi9GsMBNFP
/LZsSq7Kv8EJSBvORBkre04jggU5W7yrF44y57JA7F5sQo2oS8TCkht0Qj/+ZuUO
HChjUqOLbsVezzwxj107Jgf+R/U1xtt5Rkku3s/UwQUqwf3qRjZ2Ff2JtxoaR2TQ
ClDu+Nmh2pLMe7HkBnHw0QQ2wVV2bwMHRbqJZGHjzC/k0GrdO8gEBi64TvAfVM4s
3s2qssTRcu8s50Wnw9RkRCJLuISn7T4oCaGghBVfZ+adjZQAyqUrzIcoeMYSER7F
K62eaFzW1/DIsvBX+HzW4J00Vg7+f1tQz3eihZ8Z84w139YK9z5e8+Dml1RnYy8v
28fLHZm1/0pUKz8G/KnBGHt9v+EK61v/EfaNyOwf3lchIkWQmXYNoGGklcRlMpA8
OizdeF20vJ2LiE0tsZ4P
=7Fpy
-----END PGP SIGNATURE-----
Merge tag 'tilcdc-4.10' of https://github.com/jsarha/linux into drm-next
tilcdc changes for v4.10
* tag 'tilcdc-4.10' of https://github.com/jsarha/linux: (23 commits)
drm/tilcdc: fix parsing of some DT properties
drm/tilcdc: Enable frame done irq and functionality for LCDC rev 1
drm/tilcdc: Configure video mode to HW in enable() not in mode_set_nofb()
drm/tilcdc: Load palette at the end of mode_set_nofb()
drm/tilcdc: Add timeout wait for palette loading to complete
drm/tilcdc: Enable palette loading for revision 2 LCDC too
drm/tilcdc: Fix load mode bit-field setting in tilcdc_crtc_enable()
drm/tilcdc: Add tilcdc_write_mask() to tilcdc_regs.h
drm/tilcdc: Fix tilcdc_crtc_create() return value handling
drm/tilcdc: implement palette loading for rev1
drm/tilcdc: Enable sync lost error and recovery handling for rev 1 LCDC
drm/tilcdc: Add drm bridge support for attaching drm bridge drivers
drm/bridge: Add ti-tfp410 DVI transmitter driver
dt-bindings: Move "ti,tfp410.txt" from display/ti to display/bridge
drm/tilcdc: Recover from sync lost error flood by resetting the LCDC
drm/tilcdc: Fix race from forced shutdown of crtc in unload
drm/tilcdc: Use unload to handle initialization failures
drm/tilcdc: Stop using struct drm_driver load() callback
drm/tilcdc: Remove obsolete drm_connector_register() calls
drm/tilcdc: Correct misspelling in error message
...
- Fix up new instances of gpio-key,wakeup to use wakeup-source
- Add beaglebone LCDC blue-and-red-wiring property to make use
of the new driver features
- Add bindings for IIO support for am335x and am437x
- Add palmas PMIC overide powerhold property for am57xx
- Update am335x-baltos to use phy-handle property
- Add initial support for am571x-idk
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYOavYERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6VzBnMP
/RiAG/5+xdlXPQp4ZuqUS9RipL3vl+9NNiRnU7z0srw2pD3gMTkQxJLUl0C0kc53
8pJB16qxviSjeW/WHOo7wAYjC9HZRflQJzNFnV5WdKn4uhtOcfnDqhmhTpyBN7ns
1qWISupzhgOwe/UAxZFPUdGfhr6tpJHkqjJ4rFENxKzZMtGu3bx0jkKMJENO2/98
CvMBQ4S6IDtUQJJ5cTAmyiR8TSpDIx8pVZPL+V/e1a2LsniG5+GYS7ICMG3gY6xQ
xcsLIX29ry/j0iSDSfsaGP1JoQ3Gxxy83JFN1rkhkEguX0S71xx8GBuTEDV7Tn++
okWcQJmaSnnHlkz4c+sLv7ZTphZsCIOiwNnzkylUit80GLqLWvJEpR6YR2O+Sv+0
IJ5LalOBCmdaO6CcyZUsd+lSJIKCtpKGcCAKlo+zcnh7+N1AzS32KCm/+s204Iu0
8NLwJCCnhwZXPCLeJ9TFWAOuwIAcq47S7tdLyHtHQmJwXhGz//B3vwyW5UMmqICF
CS9sxxf9R5gO4ai3oeW0qWjEW87y4GdjzwUNmbtcZkvRp+HTSD9rNaAQWCl108Bx
Bx/MbFwkJqAFDn4pt4ESoUiEsbdf0qMaryAOojwchLBx7xx0K/4VN0G0sPup2UJo
x91K6JfBK0gfkA9NWcyAfO4m8CyB9grmR3gcFlJ9PYYo
=Mk8K
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/dt-late-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "omap dts changes for v4.10, part 2" from Tony Lindgren:
Second set of device tree changes for omaps for v4.10 merge window:
- Fix up new instances of gpio-key,wakeup to use wakeup-source
- Add beaglebone LCDC blue-and-red-wiring property to make use
of the new driver features
- Add bindings for IIO support for am335x and am437x
- Add palmas PMIC overide powerhold property for am57xx
- Update am335x-baltos to use phy-handle property
- Add initial support for am571x-idk
* tag 'omap-for-v4.10/dt-late-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: AM571x-IDK Initial Support
ARM: dts: am335x-baltos: use phy-phandle declarations
ARM: dts: am57xx-idk-common: Add overide powerhold property
ARM: dts: am57xx-beagle-x15-common: Add overide powerhold property
ARM: dts: am57xx-idk: Add Industrial output support
ARM: dts: am57xx-idk: Add Industrial input support
ARM: dts: am437x-idk: Add Industrial output support
ARM: dts: am437x-idk: Add Industrial input support
ARM: dts: am335x-icev2: Add ADC support
ARM: dts: am335x-icev2: Disable Industrial I/O LEDs and fix naming
ARM: dts: am335x-icev2: Add Industrial input support
ARM: dts: am335x-boneblack: Add blue-and-red-wiring -property to LCDC node
ARM: dts: omap5: replace gpio-key,wakeup with wakeup-source property
Add Turris Omnia support, an open hardware router Armada 385 based
-----BEGIN PGP SIGNATURE-----
iGoEABECACoFAlg5WBkjHGdyZWdvcnkuY2xlbWVudEBmcmVlLWVsZWN0cm9ucy5j
b20ACgkQCwYYjhRyO9V4SwCeI0Ts8X8KIm6RWQgpwls8NJMM8sQAnRajp/psJgWF
5Rvn8aOROyyKIAkY
=N1hs
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.10-2' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt for 4.10 (part 1)" from Gregory CLEMENT:
Add Turris Omnia support, an open hardware router Armada 385 based
* tag 'mvebu-dt-4.10-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: add support for Turris Omnia
devicetree: Add vendor prefix for CZ.NIC
as well as enabling the dma for uart and mmc controllers.
And one new soc, the rk1108 combining a single-core Cortex-A7
with a separate DSP core.
-----BEGIN PGP SIGNATURE-----
iQEtBAABCAAXBQJYNj8LEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYE3oggA
j0b99/r3uGOavo9nun2yJTqq/bKhjAAupNhrEJtjKP9gdbR/1HOkjzRX/1g9ID36
b5cMpOePpRN9xCg0IyK4/+0jgXJ1r41Fp1yEI51Z57jlo0WMzP10/E8hGwNQgW7Q
QSAPrTZbwLcrDjq7cOHrF8WvuMnA+6ye77IcDFJ0ZjtU7PYwfO63VTIJ/37Ph3FE
wlDb0YH57nrn13qUlK8UDJJysl1v2H8NP48/5qEfgF/swbyt6VKkaL2Q+Ua2aDys
AaH2oTRUPBSPqqXj78OKrWfHB8U5WWfn7PvDYxyjYcnOnasvE7kEBlmw4P955QDM
XzEEXkiEcQFMLoEiWim5Xw==
=2VYn
-----END PGP SIGNATURE-----
Merge tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 changes for 4.10" from Heiko Stübner:
A bit of attention for the rk3066, fixed tsadc reset node
as well as enabling the dma for uart and mmc controllers.
And one new soc, the rk1108 combining a single-core Cortex-A7
with a separate DSP core.
* tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add the sdmmc pinctrl for rk1108
ARM: dts: rockchip: add rockchip RK1108 Evaluation board
ARM: dts: rockchip: add basic support for RK1108 SOC
clk: rockchip: add dt-binding header for rk1108
dt-bindings: rockchip-dw-mshc: add RK1108 dw-mshc description
ARM: dts: rockchip: enable dma for uart and mmc on rk3066a
ARM: dts: rockchip: fix TSADC reset node for rk3066a
- new SoC support: S912/GXM series (8x A53)
- new boards: Nexbox A1 (S912), Nexbox A95X (S905X)
- resets for 2nd USB PHY
- update SCPI compatible for pre-v1.0 devices
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJYPI60AAoJEFk3GJrT+8ZlaaQQAJPdYxPKy00y6tM/adzqMsUY
/+HPHM6JgmMKkntHDMB0YRTtejYEhrgdWSHMlRnVhpPHeY/EU7a0+XAy6KIqnYzv
hWqHQFC4LVshh7/EwfN81iPYW8GXpZxXogREvYSWxJrxf7ISH4plEN4aq8JyWpmZ
ojAZOzc3nV9MvCdElfPqzo+tyCW8SDw5LDL8YdhF4huL/x3BC8wnqDV51yZvx1Re
CW3s8waEv94/DsoQhNc8ALZVwu2g94ygLWYUIZSNvPc3JpW73QO26qhf04FVLWO+
clBsjsejtJcPICTmeMeiBq7+awyigoPZOc+cP4LUhtRjPLUBlecPlb53jHukTrT7
0ahSAVH3NxBfXbeafkHHlXoy96SFdXsv6tl61XPBjrF/yn8z8BV0et0zI9mfrqq5
GjbZZegrfLodPYfI4VLbgGiBtYJQFU+i54e3jjYT1X1/bLVaYB4U9Dr4yMq53h5J
FL003w9jBO4BB/KsxGMyF3gGmBXrrR1UycOflzGwdiIkgpcx9zLxdUn4xDnkEmWD
peW+Qd3NeYRMW+8Xi8RzOOaXMkAubHr2lh2LPTUpGZ+RYmZ3qGACM5D7szIGgPWA
7vzuzcEeEzD8QVo5pnvlLIkSRmNV7b4YQMAv39fXrG34RGmN/oFLR/SFoYiPKLMI
jm+/R1hO7SUa0FNzoFry
=kgDs
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt64-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64
Pull "Amlogic 64-bit DT updates for v4.10, round 2" from Kevin Hilman:
- new SoC support: S912/GXM series (8x A53)
- new boards: Nexbox A1 (S912), Nexbox A95X (S905X)
- resets for 2nd USB PHY
- update SCPI compatible for pre-v1.0 devices
* tag 'amlogic-dt64-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible
ARM64: dts: meson-gxl: Add support for Nexbox A95X
ARM64: dts: meson-gxm: Add support for the Nexbox A1
ARM64: dts: Add support for Meson GXM
ARM64: dts: meson-gxbb: add the USB reset also to the second USB PHY
as the binding doc for the 32bit rk1108 eval board to prevent it
from conflicting with the recently added 64bit px5 board.
-----BEGIN PGP SIGNATURE-----
iQEtBAABCAAXBQJYNj30EBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYEoJQf/
WaANx7eR9cLkinPv6H123jeHAtMdvLFHmwb9kr2DwwNs6C9UxIsp9VddpG7XMSpI
bQLES0o0MALAAzIJH1oBb2wOWfDRWB/oXa/bSWXScbRXML+fH9ew1i1FaQQRDPHP
0/nm6GMbRZfMEraZHzTEY9duobLhbBH2va9GBv7M453D65B26c+ECvgbjULkI6My
qAdy5nN4Fb2YhxlZJz+WQQt59MNBT6nw8ObNPgKmSI18vB8BnQxqIEfo1gCuW+Iz
Sz+367EhVDtSW8cMWLttK6wB2iiiYGD0TOYfEeZS1zWavQlqDpFxFgZ66AKXdTxA
OYuAB8AKkTfa8NmejAUR2Q==
=PZ7U
-----END PGP SIGNATURE-----
Merge tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Pull "Rockchip dts64 changes for 4.10" from Heiko Stübner:
Some more powerdomains and usb2-otg support for the rk3399 as well
as the binding doc for the 32bit rk1108 eval board to prevent it
from conflicting with the recently added 64bit px5 board.
* tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: add rockchip RK1108 Evaluation board
arm64: dts: rockchip: add usb2-phy otg-port support for rk3399
arm64: dts: rockchip: add pd_sd power-domain node for rk3399
arm64: dts: rockchip: add eMMC's power domain support for rk3399
arm64: dts: rockchip: add backlight support for rk3399 evb board
arm64: dts: rockchip: add gmac needed pclk for rk3399 pd
* Fixup QCOM SCM to support MSM8996
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYNcx2AAoJEFKiBbHx2RXVnLAP/RgEunECmYqMfjJhWE/4o24p
4Yktz9ACNEjAQ/e71t9guyoFjiyHwEXYnrSrCiNFHfFRYQNJKV3du94umEggIQ0p
inL3gDR2JdyCqPqDPSHEsbHrM+q/eY6im2DBO52cI3WifvbMomKSTsE3Nj9VnZm4
ZTusDjHML8rns2yxZJ9d86Go5FanmXNXxGH2XS8dtToVxE7+NLDuEfJEbS528Qil
ddMVTQo8pO/LkEU14z5yyplQh0VaYKxFADq8srM47cksXdmB5T5rwdwAApZuyGOt
a6vSNAsYDTEKAyNtUnGqvrOSUJFlALbLR09edklK6wQW0+irYvzGNFITBnnM0sZf
bm9UxcVl2OLlH6oC4mvMfTdgVWM0191afD7y+HWY/RpS5cn0fFF1WzAI+u3z1VYP
SUbtIc5v6HniJ5GAb4JCka9kLvZfLVImJC6wHu9nWZOFwTYg0UvZ1V84T1JT3Fda
TnDBMwJ7dVeaIjdYVAxbIrXI0ZkiqZMky/3rAc/vbPR4+aKrsfVYTrzHSFqOnHve
TeVf1MJzoGxf3qXXySGfVBY10l+1XfIUDFDjCPE64sOQx8SWVD7lxOfUS+sNQzx5
UMcE/OL/QJBluUMJsct9sbBi4LrWjNe7cHyPwnMFg03DXwUyaBlc0sxSP/ZXAfpH
QjnT+Og+ZQym+4M3wm8O
=6hbH
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Pull "Qualcomm ARM Based Driver Updates for v4.10 - Part 2" from Andy Gross:
* Fixup QCOM SCM to support MSM8996
* tag 'qcom-drivers-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
firmware: qcom: scm: Remove core, iface and bus clocks dependency
dt-bindings: firmware: scm: Add MSM8996 DT bindings
Till now we used clockevent from generic ARC driver.
This was enough as long as we worked with simple multicore SoC.
When we are working with multithread SoC each HW thread can be
scheduled to receive timer interrupt using timer mask register.
This patch will provide a way to control clock events per HW thread.
The design idea is that for each core there is dedicated register
(TSI) serving all 16 HW threads.
The register is a bitmask with one bit for each HW thread.
When HW thread wants that next expiration of timer interrupt will
hit it then the proper bit should be set in this dedicated register.
When timer expires all HW threads within this core which their bit
is set at the TSI register will be interrupted.
Driver can be used from device tree by:
compatible = "ezchip,nps400-timer0" <-- for clocksource
compatible = "ezchip,nps400-timer1" <-- for clockevent
Note that name convention for timer0/timer1 was taken from legacy
ARC design. This design is our base before adding HW threads.
For backward compatibility we keep "ezchip,nps400-timer" for clocksource
Signed-off-by: Noam Camus <noamca@mellanox.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
The codec on the H3 is similar to the one found on the A31. One key
difference is the analog path controls are routed through the PRCM
block. This is supported by the sun8i-codec-analog driver, and tied
into this codec driver with the audio card's aux_dev.
In addition, the H3 has no HP (headphone) and HBIAS support, and no
MIC3 input. The FIFO related registers are slightly rearranged.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The codec in the A23 is similar to the one found on the A31. One key
difference is the analog path controls are routed through the PRCM
block. This is supported by the sun8i-codec-analog driver, and tied
into this codec driver with the audio card's aux_dev.
In addition, the A23 does not have LINEOUT, and it does not support
headset jack detection or buttons.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
4.10, please pull the following:
- Robin updates the Northstart 2 DTS to use the generic IOMMU binding
- Scott renames the Broadcom Northstar 2 binding document to use a standard name
including the brcm vendor prefix
- Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the
Northstar 2 SVK reference board DTS file with it enabled.
- Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the
Northstar 2 SoC
- Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the
Northstar 2 SoC
- Ray adds required properties NAND controller properties to make NAND work on
the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included
here to resolve DTS file merges
- Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS
- Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3)
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also uses the proper DTSI file to define the USB host mode
for the USB Device Tree nodes
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYM9SvAAoJEIfQlpxEBwcE80YQAOfjCKEXNSWJEAMpgsCo1oEf
6peBNi+y6AZCkNa+B1L9G2RY1B63OJKb+0HzAzj07cqbfu6r9UGhJEncnvuTnt6Q
iLZqoxDAKINNDT4tQBvPfdI8mF7ChNQ1RaJEKRh5/eaz9feKbp0QP216oNyzdOTX
4fUCBfgAxl6q1aNv4f4tcTdy30NllQddulLumYq5W7ElAP3CYeUGszoJ6npDqX6Z
p2p42OMczOoU0xDH/a5BJBQW/ZbylCgFOSnGtQp6RnzOB6iBxKYDOCkMRfVLIPSg
uC+7XSEpYAxNPRAHE5JxtADEdDKZ4zdKne8SpadixBPY8vAWguEhiOAFRqTKYpXr
UY8itk9NMx8BnI6Fl4hU6tFs3Yx9+6PdHX0nWeR1OE2gzYpnVKOdeeS3+nWHctWm
Z2wyglSvEpzMpaCzr2/rgDXW30BUTGtRCD7rYJ7MhwItkXm4yIN8pkLw83Zxss4d
3J30QQoQ5s9Fye0Or4Z/PQiw3AtUJnH1u59BAE2GmrHVgs4pUaxuU4lt+LYBZtoM
hA+pzFDeNmK/fOumjFhmvZwrCG1AON2cJRExMG6l3x9sxV2FDw1Awr4sina7ZFcO
pbkvHmTXcGHNh7kqHeEU51r4tkkA97ZHeKGrntRSfsMNyu74xzOSsjEEf5MKMm5s
2xX2RhehADTDa5xPDJwG
=a4fP
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.10/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom devicetree-arm64 changes for 4.10" from Florian Fainelli:
This pull request contains Broadcom ARM64 based SoC Device Tree changes for
4.10, please pull the following:
- Robin updates the Northstart 2 DTS to use the generic IOMMU binding
- Scott renames the Broadcom Northstar 2 binding document to use a standard name
including the brcm vendor prefix
- Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the
Northstar 2 SVK reference board DTS file with it enabled.
- Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the
Northstar 2 SoC
- Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the
Northstar 2 SoC
- Ray adds required properties NAND controller properties to make NAND work on
the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included
here to resolve DTS file merges
- Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS
- Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3)
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also uses the proper DTSI file to define the USB host mode
for the USB Device Tree nodes
* tag 'arm-soc/for-4.10/devicetree-arm64' of http://github.com/Broadcom/stblinux: (23 commits)
arm64: dts: NS2: Add PCI PHYs
arm64: dts: NS2: enable sdio1
ARM64: dts: bcm2837-rpi-3-b: remove incorrect pwr LED
ARM64: bcm2835: dts: add thermal node to device-tree of bcm2837
ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
dt: bindings: add thermal device driver for bcm2835
arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver.
ARM: dts: bcm283x: fix typo in mailbox address
DT: binding: bcm2835-mbox: fix address typo in example
ARM64: dts: bcm2835: Fix bcm2837 compatible string
arm64: dts: Update Broadcom NS2 to generic IOMMU binding
arm64: dts: Updated NAND DT properties for NS2 SVK
arm64: dts: rename ns2.txt to brcm,ns2.txt
ARM64: dts: Add QSPI Device Tree node for NS2
ARM64: dts: bcm283x: Use dtsi for USB host mode
ARM: dts: bcm283x: drop alt3 from &gpio
ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
...
please pull the following:
- Rafal adds support for the Netgear R8500 routers, adds basic support
for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
A7). He also enables the UART on the Netgear R8000 and restructures the
include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
support for the TP-LINK Archer C9 V1 router.
- Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
the bcm958625k reference board to have it enabled
- Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
a BCM47094)
- Scott fixes the pinctrl names in the Cygnus DTS files
- Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
the node for the OTP controller found on Cygnus SoCs
- Dhananjay enables the GPIO B controller on Norstarh Plus SoCs
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
adds names for the Raspberry Zero GPIO lines
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYM9VyAAoJEIfQlpxEBwcEK48QAKj7Z2kedtsVvlMm86SIrI+U
g6diaTaeEnH2v+ClUShRg65wtTrwHaBEQFnimTtfPIK+8jOZnAOIWBcO0vdZBEkb
2cibGKN9SWXubUBjr5BdAhWXjzLvuryldi19Qr2Q3XYXSUOKI+ba+PL0rfFBiL8o
5CzkqJucr6xUCRI2sbVxmEOBrJDMs2iygSQvhDiUWTg/2aZWckLQ+e0W7wX5++sM
t0wVkTi0ba7X+pUshQa2qiBVYess6RTdsLYwjdPqIZ4O5zMBFC8kMqjVP4uZuqUz
ytg+MWOUU3/+vTUH+UOB75iV6NFfLMpxn0GGucivwBjKhaIefUEHfjpqHipCgarC
MJ899MQsA97srBWmW56td9yQvB7/ce3NgzqqV6sUM7fvkxL00c6LiWE2Uuuo3x18
L24u6hiZA0qsnX5aLqw0hcibZVlKDY3p5IE+Y85fBsR0y5OCx9a39rPWA/RRQ3pA
U86gnt1jyjqNcjk6Z839Y0PutLb9wt48C+hDrRvBEjM5uWCCJbO6AZkoD0IT5H50
fHZBir3V5+UHu+6MpUrym4AKvAoYJ6wc6Rpx7b3a5uS3Z/n4hugBFOguRMLrAvEc
/Td6/aiLJq9uruaQR7mehlRDvSsMr1vr7ji8FHOIs5cX17d03A5qTLQWUFO+St7b
sgb9D1Orm2nXN0RsebKq
=4GFQ
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.10/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.10" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.10,
please pull the following:
- Rafal adds support for the Netgear R8500 routers, adds basic support
for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
A7). He also enables the UART on the Netgear R8000 and restructures the
include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
support for the TP-LINK Archer C9 V1 router.
- Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
the bcm958625k reference board to have it enabled
- Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
a BCM47094)
- Scott fixes the pinctrl names in the Cygnus DTS files
- Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
the node for the OTP controller found on Cygnus SoCs
- Dhananjay enables the GPIO B controller on Norstarh Plus SoCs
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
adds names for the Raspberry Zero GPIO lines
* tag 'arm-soc/for-4.10/devicetree' of http://github.com/Broadcom/stblinux: (29 commits)
ARM: bcm2835: Add names for the RPi Zero GPIO lines
ARM: bcm2835: Fix names for the Raspberry Pi GPIO lines
ARM: dts: enable GPIO-b for Broadcom NSP
ARM: BCM5301X: Add DT for TP-LINK Archer C9 V1
ARM: dts: Add node for Broadcom OTP controller driver
ARM: dts: Enable interrupt support for cygnus crmu gpio driver
ARM: dts: Enable Broadcom iProc mailbox controller
ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
dt: bindings: add thermal device driver for bcm2835
ARM: dts: bcm283x: fix typo in mailbox address
DT: binding: bcm2835-mbox: fix address typo in example
ARM: dts: cygnus: fix naming of pinctrl node
ARM: BCM53573: Specify PMU and its ILP clock in the DT
ARM: BCM5301X: Add DT for Luxul XWR-3100
ARM: BCM5301X: Add DT for Luxul XAP-1510
ARM: BCM5301X: Specify USB 3.0 PHY in DT
ARM: BCM5301X: Enable UART on Netgear R8000
ARM: BCM5301X: Add separated DTS include file for BCM47094
ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes
...
Merge "ARM: keystone: add TI SCI protocol support for v4.10" from
Tero Kristo:
[description taken from http://processors.wiki.ti.com/index.php/TISCI
Texas Instruments' Keystone generation System on Chips (SoC) starting
with 66AK2G02, now include a dedicated SoC System Control entity called
PMMC(Power Management Micro Controller) in line with ARM architecture
recommendations. The function of this module is to integrate all system
operations in a centralized location. Communication with the SoC System
Control entity from various processing units like ARM/DSP occurs over
Message Manager hardware block.
...
Texas Instruments' System Control Interface defines the communication
protocol between various processing entities to the System Control Entity
on TI SoCs. This is a set of message formats and sequence of operations
required to communicate and get system services processed from System
Control entity in the SoC.]
* 'for-4.10-ti-sci-base' of https://github.com/t-kristo/linux-pm:
firmware: ti_sci: Add support for reboot core service
firmware: ti_sci: Add support for Clock control
firmware: ti_sci: Add support for Device control
firmware: Add basic support for TI System Control Interface (TI-SCI) protocol
Documentation: Add support for TI System Control Interface (TI-SCI) protocol
1. Adds support for pre-v1.0 SCPI protocol versions
2. Adds support for SCPI used on Amlogic GXBB SoC platforms using the
newly added pre-v1.0 SCPI protocol
3. Decouples some platform specific details from generic SCPI binding
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJYLe2FAAoJEABBurwxfuKYdgEP/1cRf/i5cBZ6oi1UI6Ycelse
R+FTI/tzAWks6mfxhd5YWTe1NuEhI0QMtUyOK1I6lEGdH2IIMBOOVJj6inM/bR+X
ydleMTB7oKr8bzgqBogb5OOVeMVgNmFUfMojH2RBY7bQpWthvywWSEShila8mmUB
FXFP2yy6rSpo6gncU4kJa0yFO8SFFKraEhyFZrXgYs4IgI277wPw22uFnPqUBC9s
I2BOqHZB6K7J3kwCbl0qvljrjjk36/He1McgCfB+XzUWaz0Mr4uTBSh/iAhb/IV6
JmHE/E2WEznpeM9JtqTZugiODGbsbGtwXPVq/jhu8u9viSCdqfpziR8HB+ChZM/O
HZtbUFowtGH3LeT79tv+tf1bPU9QXLSmI/+E0xvTHL3PaITCANB216FJTwJz90PY
Ull1sJqXgVuaWDCzD10Vyg8AssaLdSj+c5yYcvFIy8xVLl43GC3TLfLWZOqLONmY
LxATk7splSD7ZIPdW0wDO25UoNzFopDfBjTW2slvgwph9ccV5Z5PtIl8p6jmRcPV
MUQSZS8P4RkkWJuELiUPcKuwIj3Cp0syXql832w5EO8UY1DeumaRjaz9LYjiS3tS
ENiSCi2HhthPpgkkpUKxLTziQ8KtFdp80JMXUTHLOxqJWK/+eX2cH9saWhTrc6QO
Mk+o9CdLKIwDEaJTImzR
=CgDX
-----END PGP SIGNATURE-----
Merge tag 'scpi-updates-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers
Pull "SCPI updates for v4.10" from Sudeep Holla:
1. Adds support for pre-v1.0 SCPI protocol versions
2. Adds support for SCPI used on Amlogic GXBB SoC platforms using the
newly added pre-v1.0 SCPI protocol
3. Decouples some platform specific details from generic SCPI binding
* tag 'scpi-updates-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
Documentation: bindings: Add support for Amlogic GXBB SCPI protocol
Documentation: bindings: add compatible specific to pre v1.0 SCPI protocols
Documentation: bindings: decouple juno specific details from generic binding
firmware: arm_scpi: allow firmware with get_capabilities not implemented
firmware: arm_scpi: add alternative legacy structures, functions and macros
firmware: arm_scpi: increase MAX_DVFS_OPPS to 16 entries
firmware: arm_scpi: add command indirection to support legacy commands
* Identify SoC and register with the SoC bus
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYNeyaAAoJENfPZGlqN0++1WsQAJ6Yq6mB9+TlmKQSDmspMd1X
cuswMJowQZSFWjiXT/3v6lUNBG7wJmXbJOWIu/V9HIAx3HXS860DRtEC0+CosZ1g
yP/+i8g5qHtYNtOG06RaP62gJql+nMizfvtTVNlFBz5/r6Pt6Cw2VKZm/J5eIenv
zjWwkCOH2JAcAfVu1JfqXNoNwkrPp/tbTXmodQsqm7WYNiwfk2gXNqKhROirWR0s
n2oHVhEts1Q82i116p1mx3m7CYvned5jqph06KyHWutbxNbGGi9ikIOmS0B6ayyw
TSU1lAsF2xIff1JDJpGkZoIZAt0NKAfSYzumz1s98Yj+8cXMVZ/IL/C4orkqV8fk
20K3ZYyBD3fDl38OtqGDOCTX7uOLumPCmoCLdKwmEYX2ig4PbK5pNbwQNMTFH4iE
iqGXaicbs94izsDg0hUMALfAI4oG7TwTEDGnmLfXbOx58FJPtw+VcxArt0QiaLaf
TdrNfVyl+wMu1cvOxqI3ftmzhlzpdoLoFNrZxPORAurEGN45SzDZylnLvfxByQy4
WixQPdS/pHofdKmvIVXIdVzxnO0xRmxAp1tZ8nYw4rkseSGvLnK9Z4d43kzvoTsr
IW+rJBBgLIcyor6HWrSgjWK9T15FEDBbrk5U1d06IViBdYwi1c6U8y80LCaAB+8j
y3IwB4GFFkiTUU6j3H75
=DnnT
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc-match-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Renesas ARM Based SoC Match Updates for v4.10" from Simon Horman:
* Identify SoC and register with the SoC bus
* tag 'renesas-soc-match-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: Identify SoC and register with the SoC bus
ARM: shmobile: Document DT bindings for Product Register
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Add support for the r8a7745 SoC to rcar-sysc
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYNfAfAAoJENfPZGlqN0++t14P/RukycPu2VgJ+F3G+OJoD2WS
ltEYrhhZxIL9cjyLmiA7Mj7Ig9dMtzmiBC0W3HY5zvZN2OiOrzmNykfFdu9UN8rX
iMZ6lDrq7o+Qsm1Q4Ab2miatqOqM7JPSacJPixLZFpvs6T79CCRMYaEeIB8AYD3O
ij/tRDtxdvfY97iy5la9XvtA/63EmP6DZ2SxfqPXd6W0GaBg+QKBOLlcCR0yDrKh
NosHdbiAbMapBSPbsnbhKLebpnPw159iu7VA73JbsrsFZ9IDRkwoA+wcgEEWnF8C
b9S31TAglhL04AysUowlHjhEOU2hWPcF8rm3lisDghoUC6Rb/3gCPII+KnU6d5Z4
QNCbY6IlWqya9wR3kavHmJHOowGt/LqrmLCnJSoTTbKgo6xPxN3kis6oRo2sY9w1
KUJWgt9vfQ/H6ik2epkMg7sQbkBcsONUDUgVhFyaAqTKEgeIz5OggfNsYkQYYT37
qlQkLgKweKYJmmr/ilCeVdmkdhPegII8aiYWdwb8N2cUY4I0nyUwnE+v9cdPRhxr
LpONUZV+GtCz8O/Y2XtjxwhYoYUtHbUzSax+aw4qtBBmdyKcaQ1VIyn27gfofmht
Q3itzk/eGp0GgnsadknYK9eOvWWjPf07/jvYgSVfL6rWGR+4/vcEht/kU+O9dnpP
HMZ6/PrbmYoxWkY49sH7
=pOb+
-----END PGP SIGNATURE-----
Merge tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Pull "Renesas ARM Based SoC r8a7745 SYSC Driver Updates for v4.10" from Simon Horman:
* Add support for the r8a7745 SoC to rcar-sysc
* tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: add R8A7745 support
ARM: shmobile: r8a7745: add power domain index macros
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add very basic ti-tfp410 DVI transmitter driver. The only feature
separating this from a completely dummy bridge is the EDID read
support trough DDC I2C. Even that functionality should be in a
separate generic connector driver. However, because of missing DRM
infrastructure support the connector is implemented within the bridge
driver. Some tfp410 HW specific features may be added later if needed,
because there is a set of registers behind i2c if it is connected.
This implementation is tested against my new tilcdc bridge support
and it works with BeagleBone DVI-D Cape Rev A3. A DT binding document
is also updated.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Move "ti,tfp410.txt" from display/ti to display/bridge before adding
generic (non omapdrm/dss specific) implementation and new features.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Exynos5433 SoC has MFC v8 hardware module, but it has more
complex clock hierarchy, so a new compatible is added.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Big thing is that drm-misc is now officially a group maintainer/committer
model thing, with MAINTAINERS suitably updated. Otherwise just the usual
pile of misc things all over, nothing that stands out this time around.
* tag 'drm-misc-next-2016-11-29' of git://anongit.freedesktop.org/git/drm-misc: (33 commits)
drm: Introduce drm_framebuffer_assign()
drm/bridge: adv7511: Enable the audio data and clock pads on adv7533
drm/bridge: adv7511: Add Audio support
drm/edid: Consider alternate cea timings to be the same VIC
drm/atomic: Constify drm_atomic_crtc_needs_modeset()
drm: bridge: dw-hdmi: add ASoC dependency
drm: Fix shift operations for drm_fb_helper::drm_target_preferred()
drm: Avoid NULL dereference for DRM_LEGACY debug message
drm: Use u64_to_user_ptr() helper for blob ioctls
drm: Fix conflicting macro parameter in drm_mm_for_each_node_in_range()
drm: Fixup kernel doc for driver->gem_create_object
drm/hisilicon/hibmc: mark PM functions __maybe_unused
drm/hisilicon/hibmc: Checking for NULL instead of IS_ERR()
drm: bridge: add DesignWare HDMI I2S audio support
drm: Check against color expansion in drm_mm_reserve_node()
drm: Define drm_mm_for_each_node_in_range()
drm/doc: Fix links in drm_property.c
MAINTAINERS: Add link to drm-misc documentation
vgaarb: use valid dev pointer in vgaarb_info()
drm/atomic: Unconfuse the old_state mess in commmit_tail
...
drm/qxl: various bugfixes and cleanups,
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJYMzLfAAoJEEy22O7T6HE41rIQANAEl/o8cYUoyYTJlhmmnl2U
K+QBdr7PACdbr8RZrGpwA5ad9ZJGijpZRd2gThrzNS0JBdZI48gPEzU7V206xlyD
AriBeAu6IkoBTEl+GGx2DfvOdLR6+7KlIrDYIpl2vILgkqlHhneXdHR3R03byRHG
2Jrxv2YQxCs8swtAb8FRkVNaUgrfkKOKFFlx1LoLFApYeP02oSxZp0Ve4nuRNj7x
9DCivIw4NyQ9tY1fORapmrEPTerqZnzYdb9RFSv4xilx4Stq1UWdXfTSpwXZHZaG
VroXZb1I0fZEk1aapIxuzLZFGNSM7wLET/nK02sSvzxJJv2PiyVAabIo70nUqsQK
H/iGT2g4MZC1Yvz6evENtckbiA1p3F9jnd+Po9ivDY/RrTpND3hVC2WbcOXWxZkb
m69muvXfrnZwoF9xWPG8aTrCATim++1Ty8/8LoKdVq1d0Dp/Gzk8KnklBPY2vRFt
dpxqH3jLgED/QcO5W/yQdf0kPRsrNwKFNLqP9bCF2hMIw1VHHddZtnBBXDGATXYq
hdFA8EEg3gh/kY7V8b+GyxjRKRbveG208hu+H4EirxHmRn5xJN1VoTLk9va+AJL1
I30l4USLDkTgf1AjYmk7yFIUTemCtwjfa0lsuu4l3rRJ3k1eBrtZe2cpWv2BoQDU
by0sNnDelzJTQ9/v1i3J
=OYiT
-----END PGP SIGNATURE-----
Merge tag 'drm-qemu-20161121' of git://git.kraxel.org/linux into drm-next
drm/virtio: fix busid in a different way, allocate more vbufs.
drm/qxl: various bugfixes and cleanups,
* tag 'drm-qemu-20161121' of git://git.kraxel.org/linux: (224 commits)
drm/virtio: allocate some extra bufs
qxl: Allow resolution which are not multiple of 8
qxl: Don't notify userspace when monitors config is unchanged
qxl: Remove qxl_bo_init() return value
qxl: Call qxl_gem_{init, fini}
qxl: Add missing '\n' to qxl_io_log() call
qxl: Remove unused prototype
qxl: Mark some internal functions as static
Revert "drm: virtio: reinstate drm_virtio_set_busid()"
drm/virtio: fix busid regression
drm: re-export drm_dev_set_unique
Linux 4.9-rc5
gp8psk: Fix DVB frontend attach
gp8psk: fix gp8psk_usb_in_op() logic
dvb-usb: move data_mutex to struct dvb_usb_device
iio: maxim_thermocouple: detect invalid storage size in read()
aoe: fix crash in page count manipulation
lightnvm: invalid offset calculation for lba_shift
Kbuild: enable -Wmaybe-uninitialized warnings by default
pcmcia: fix return value of soc_pcmcia_regulator_set
...
Several versions of DW DMAC have multi block transfers hardware
support. Hardware support of multi block transfers is disabled
by default if we use DT to configure DMAC and software emulation
of multi block transfers used instead.
Add multi-block property, so it is possible to enable hardware
multi block transfers (if present) via DT.
Switch from per device is_nollp variable to multi_block array
to be able enable/disable multi block transfers separately per
channel.
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
- new tango NAND controller driver
- new ox820 NAND controller driver
- addition of a new full-ID entry in the nand_ids table
- rework of the s3c240 driver to support DT
- extension of the nand_sdr_timings to expose tCCS, tPROG and tR
- addition of a new flag to ask the core to wait for tCCS when sending
a RNDIN/RNDOUT command
- addition of a new flag to ask the core to let the controller driver
send the READ/PROGPAGE command
This pull request also contains minor fixes/cleanup/cosmetic changes:
- properly support 512 ECC step size in the sunxi driver
- improve the error messages in the pxa probe path
- fix module autoload in the omap2 driver
- cleanup of several nand drivers to return nand_scan{_tail}() error
code instead of returning -EIO
- various cleanups in the denali driver
- cleanups in the ooblayout handling (MTD core)
- fix an error check in nandsim
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYOu/YAAoJEGXtNgF+CLcAVZ4P/0Vi50SSLZ2EUOQqAbiQcUPV
iO/20OPkTAXz6+Mi/csKZEnPGqpy2srn8MOgJx0gVO7b7hrhli6aBQJDxHLhGHVl
N1hpTkZewZisLC1ewc9SA2SF/6zs93Bfk9cw0i4YxgE2gKPvZWT89Y9aZ/m/OWyW
su0kis5YhMcAz2Oqq6oaCfRmbcMR62KkcjfB4U17FgXK56C5ziO7MoLjeAyYpi+f
vHGzWFoDKHLfo4ISFq5inqB8pk6nQtkaERhx+y4WCwOcvMoOjOU9gWN1yyLyLsdp
jimqdJegRlC63RkLoO5KNJqa3AlSTIpccIJaL2p8yHf/dtJQmhHXOl/gKgiO217n
LMmeVJhMqUA652BJeXnyqg4VScTQFhwITccUFFauMEiRCzJWM6W1uzJZiGoWsrLG
aKBYlWv+Z1dPGILf5AQobz16FuEsdVc60Fc4M02sL4QiH9TO2mg103licgiYdPIw
0YcJ23t7KDf66uyGKvZwcDJSkJEKPkf5YEDi7VOFZF4CuaYKMqMo7oCb8PTKNMBP
tMQpQ9cjaVBGv/vXHneBsyin/1wsKN0tAnbuh/cUT1sGa+JiEjGdeCm9o30G3334
9YUZrPCwcN6mw5rOrD7Ts33OYONDAqCHJoP5IZovD8pbguEYAYZ2KFyHgu2KRQa3
kMVq7QE0jvn956SVw1uD
=og/Y
-----END PGP SIGNATURE-----
Merge tag 'nand/for-4.10' of github.com:linux-nand/linux
From Boris Brezillon:
"""
This pull request contains the following notable changes:
- new tango NAND controller driver
- new ox820 NAND controller driver
- addition of a new full-ID entry in the nand_ids table
- rework of the s3c240 driver to support DT
- extension of the nand_sdr_timings to expose tCCS, tPROG and tR
- addition of a new flag to ask the core to wait for tCCS when sending
a RNDIN/RNDOUT command
- addition of a new flag to ask the core to let the controller driver
send the READ/PROGPAGE command
This pull request also contains minor fixes/cleanup/cosmetic changes:
- properly support 512 ECC step size in the sunxi driver
- improve the error messages in the pxa probe path
- fix module autoload in the omap2 driver
- cleanup of several nand drivers to return nand_scan{_tail}() error
code instead of returning -EIO
- various cleanups in the denali driver
- cleanups in the ooblayout handling (MTD core)
- fix an error check in nandsim
"""
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Due to some potential tweaks for the da850 LCDC (for example: the
required memory bandwith settings) we need a separate compatible
for the IP present on the da850 boards.
Suggested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Adds the device tree bindings description for Samsung S3C2410 and
compatible USB OHCI controller.
Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This patch documents the device tree bindings required for
the ohci controller found in TI da8xx family of SoC's
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add PWM driver for the PWM controller found on HiSilicon BVT SoCs such
as Hi3519V100, Hi3516CV300, etc. The PWM controller is primarily in
charge of controlling the P-Iris lens.
Reviewed-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Signed-off-by: Jian Yuan <yuanjian12@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This patch adds support to PM8821 PMIC and interrupt support.
PM8821 is companion device that supplements primary PMIC PM8921 IC.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The Ricoh RN5T567 is from the same family as the Ricoh RN5T618 is,
the differences are:
+ DCDC4/DCDC5
+ LDO7-10
+ Slightly different output voltage/currents
+ 32kHz Output
+ RTC
+ USB Charger detection
Signed-off-by: Pierre-Hugues Husson <phh@phh.me>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The Altera Arria10 Devkit System Resource chip is a Multi-Function
Device with a GPIO expander.
This patch adds documentation for the Altera A10-SR DT bindings.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
since it's used by not only PowerPC but also ARM. And add a specification
for 'little-endian' property.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Scott Wood <oss@buserror.net>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Simply document new compatibility strings as the driver is already
activated using a fallback compatibility string.
These compat strings are in keeping with those for all other
Renesas ARM based SoCs with sh_mmcif enabled in mainline.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Remove documentation of support for the SH7372 (SH-Mobile AP4) from the MMC
driver. The driver itself appears to have no SH7372 specific code.
Commit edf4100906 ("ARM: shmobile: sh7372 dtsi: Remove Legacy file")
removes this SoC from the kernel in v4.1.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add "xo" value which is tcxo clock to sdhci-msm
DT binding properties.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
"support-highspeed" was the obsoleted property.
And "broken-cd" is not synopsys specific property.
It can be referred to mmc.txt binding Documentation.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The "clock-freq-min-max" property was deprecated.
There is "max-frequency" property in drivers/mmc/core/host.c
"max-frequency" can be replaced with "clock-freq-min-max".
Minimum clock value might be set to 100K by default.
Then MMC core should try to find the correct value from 400K to 100K.
So it just needs to set Maximum clock value.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add support for r7s72100 SoC.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
On some systems the sdhci capabilty register is incorrect for one
reason or another.
The sdhci-caps-mask property specifies which bits in the register
are incorrect and should be turned off before using sdhci-caps to turn
on bits.
The sdhci-caps property specifies which bits should be turned on.
Signed-off-by: Zach Brown <zach.brown@ni.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The Nexbox A95X exists with a Meson GXBB (S905) Soc or a Meson GXL SoC (S905X).
Add the S905X variant which uses the internal PHY instead of an external PHY.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add support for the Nexbox A1 board based on the Amlogic S912 SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: replace '_' in node-names with '-']
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
RGMII requires special RX and/or TX delays depending on the actual
hardware circuit/wiring. These delays can be added by the MAC, the PHY
or the designer of the circuit (the latter means that no delay has to
be added by PHY or MAC).
There are 4 RGMII phy-modes used describe where a delay should be
applied:
- rgmii: the RX and TX delays are either added by the MAC (where the
exact delay is typically configurable, and can be turned off when no
extra delay is needed) or not needed at all (because the hardware
wiring adds the delay already). The PHY should neither add the RX nor
TX delay in this case.
- rgmii-rxid: configures the PHY to enable the RX delay. The MAC should
not add the RX delay in this case.
- rgmii-txid: configures the PHY to enable the TX delay. The MAC should
not add the TX delay in this case.
- rgmii-id: combines rgmii-rxid and rgmii-txid and thus configures the
PHY to enable the RX and TX delays. The MAC should neither add the RX
nor TX delay in this case.
Document these cases in the ethernet.txt documentation to make it clear
when to use each mode.
If applied incorrectly one might end up with MAC and PHY both enabling
for example the TX delay, which breaks ethernet TX traffic on 1000Mbit/s
links.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Detailed description for this pull request:
- The extcon-usb-gpio driver supports the VBUS detection with USB ID and VBUS pin.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYM9sEAAoJEJzN3yze689TCacP/0bLWyQBWgpTrcK42Yi8UeQs
oCBaR60yGjpemwPlpSMq9GhY+6OvKMyCXHNdaK/l4UOV4u9uCKmx50I44Udr8qcf
8hHqONBWb0gEZJ4bK/gYNV+zb2bqFZ/tWECimmAerugWKzqX3xRBj227rgayijNM
JKlx8Tqhcy+QY7W5pmawg+D4YR1fQ+KWB3XHqOIVH8a4n+ir5A0MYZXh4hfsgyEo
dEwhALldgCRZx5NirIdJnUyBKSQYPGczARCsPTYDFVLTElLs1arxS1MYDwFmDyYi
FzuUc8PR8xVNkS9vp8ElPS/kw5Mgc8ERj/4ReqK1WGsrM4UXvgCr6r1gPH6oD27i
6eYEBNRs+WClu7rvcoThG1VtMwJibufk6GA54tkrLvhM1U7NR3oZlrzGFm0j8oLQ
OHHaqBN5OZFVE6sxwJpCstfPHkjC0VMd1xS/kqAOeZTS9nb9f8k9x0Bm8rfQeISQ
5pU+7HV9cQU3ywF5Ur5dNlGu2/hi5S08uZ7ytKjdNt2HDjnyEb0KH9Ksoe7nghO8
MLk5+MOYCOjf23HLe7LZA4/a/OL55PVa2blTJV3Vnq/BfBDpW/6blajBwTwZmYyW
bz2TCM7Ku+J63LUueMT6lzbBqAP39J5TN3Fm4rQOZZG8dInMkNxaC+w52eMz6uzw
bS7fuDw0H+NbIrUv2nqG
=28kq
-----END PGP SIGNATURE-----
Merge tag 'extcon-next-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into usb-nextx
Chanwoo writes:
Update extcon for 4.10
Detailed description for this pull request:
- The extcon-usb-gpio driver supports the VBUS detection with USB ID and VBUS pin.
Merge contains:
*) Add new usb2 phy driver for Meson8b and GXBB
*) Remove phy drivers added for miphy365 and STiH415/6 (as support for
these SoCs are removed from the kernel)
*) Add a sysfs entry to facilitate usb role swap in rcar SoC
*) Add support for otg port in rk3399
*) misc fixes in various phy drivers and cleanups
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJYLv5WAAoJEA5ceFyATYLZaiIQAJsYakJyg1yBks/z32eDPOBW
KQVjh8OUsRr+ThKgV3eYaKcT9rSf1DvgYmzRtrLYtmzSXT39ttEg8Bg1GpfhzvzE
zBUUOqmihc6idsnOseodviR5xzyT4LBhB0uTKpLN7WWA/GuIhT2uQlAiFqynLSrc
TNF36K2PzespNss3/qBuOV+DVYzNpknctK7QmmbnaR46i+ZJUQv0HnzmXp/O0fzW
WG98RY2Dd/udcq4CbFkkKScFu0JmF3Ec9wfF6/7JB8x4vrvg9WpG3R4WqDtc+Dsz
o3htpDGUavafyzWnjvPCHhmnPdxRqM+7P+iyxonz/hOPIn6QN4dG1/5NqrMgc2oi
Q4tIOKFPOhmCDvc7d+5AVLjfQhNZX4pfU8eZuOdWwgj3vZ2uwgyo2RGsLBqvqSXe
dFLvQSEBZY71pMPC4CEKgwvwTh3Vu6GTVq5/FvqXYT127gWzfFynwLFNd2SjEFJ4
urgRh+0Ankb0G5syZq6zerZC0SbWJnH56Lv+cgYwqndLZRHlFw/OsmyUBQi6iEhB
mfCCrholxhJdsrVpSnXuRqiDG175MICNvYafT/Srcs3ozTmLDISn1HpjazFzDsY1
Z357Nbv6pC2HahdvugmNaNtkoJrricxtDDF6B5CaARloRtSAUbjWA5BoClSaRa3c
HfnXmFJnUbE69aDUspMj
=jfKK
-----END PGP SIGNATURE-----
Merge tag 'phy-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes:
phy: for 4.10
Merge contains:
*) Add new usb2 phy driver for Meson8b and GXBB
*) Remove phy drivers added for miphy365 and STiH415/6 (as support for
these SoCs are removed from the kernel)
*) Add a sysfs entry to facilitate usb role swap in rcar SoC
*) Add support for otg port in rk3399
*) misc fixes in various phy drivers and cleanups
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
The i.MX6UL internal touchscreen controller contains an option to
average upon samples. This feature reduces noise from the produced
touch locations.
This patch adds sample averaging support to the imx6ul_tsc device
driver.
Signed-off-by: Guy Shapiro <guy.shapiro@mobi-wize.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Major changes:
iwlwifi
* finalize and enable dynamic queue allocation
* use dev_coredumpmsg() to prevent locking the driver
* small fix to pass the AID to the FW
* use FW PS decisions with multi-queue
ath9k
* add device tree bindings
* switch to use mac80211 intermediate software queues to reduce
latency and fix bufferbloat
wl18xx
* allow scanning in AP mode
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJYOAC4AAoJEG4XJFUm622bUYkH/3SSYp6moSdKpVnVPx7ST7yK
t9WHR9IMZFIhD6vq8AK6+8OQr1TgGjHfPu+WZj7CIl8nu53kcgPRi51gg1mndbNg
9N3RbVp06nGbM2VnW8ZIpg3OLIXatZ4c9g3LFvvtyobYvWGJ6W4D79JdlmTG1ELr
XAjInbxFsgon+CwqCMOaAJx8xYp42rBnPRZZvhOq9O33kRw8Umo9UQw0s1U2Vfgx
prxQ6d0GxNAPEe8QiDw/vtBcXWFMOhQeDl8sK70ZcojSn1FY730NsIh/Y86PcQTK
6TsvOL5gg+rd0ln8TZRAslnDrZBAhTEDqUzLQMRJ9VjEj5RFd8eLCSIzHfaroI8=
=4qCH
-----END PGP SIGNATURE-----
Merge tag 'wireless-drivers-next-for-davem-2016-11-25' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next
Kalle Valo says:
====================
wireless-drivers-next patches for 4.10
Major changes:
iwlwifi
* finalize and enable dynamic queue allocation
* use dev_coredumpmsg() to prevent locking the driver
* small fix to pass the AID to the FW
* use FW PS decisions with multi-queue
ath9k
* add device tree bindings
* switch to use mac80211 intermediate software queues to reduce
latency and fix bufferbloat
wl18xx
* allow scanning in AP mode
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This provides an open firwmare driver binding for tpm_tis. OF
is useful on arches where ACPI/PNP is not used.
The tcg,tpm-tis-mmio register map interface is specified by the TCG.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Newly added support of TPM 2.0 eventlog securityfs pseudo files in tpm
device driver consumes device tree bindings representing I2C based
Physical TPM. This patch adds the documentation for corresponding device
tree bindings of I2C based Physical TPM. These bindings are similar to
vtpm device tree bindings being used on IBM Power7+ and Power8 Systems
running PowerVM.
Suggested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Nayna Jain <nayna@linux.vnet.ibm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Virtual TPM, which is being used on IBM POWER7+ and POWER8 systems running
POWERVM, is currently supported by tpm device driver but lacks the
documentation. This patch adds the missing documentation for the existing
support.
Suggested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Nayna Jain <nayna@linux.vnet.ibm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Add support for the MSM8996/APQ8096 PCIe controller. MSM8996 supports Gen
1/2, one lane, 3 PCIe root complexes with support for MSI and legacy
interrupts, and it conforms to PCI Express Base 2.1 specification.
Add a post_init callback to qcom_pcie_ops, as the PCIe pipe clocks are only
setup after the phy is powered on. It also adds an ltssm_enable callback
as it is very much different from other supported SoCs in the driver.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Add new compatible string 'brcm,iproc-pcie-paxb-v2', for the next
generation of the iProc PAXB PCIe host controller.
Signed-off-by: Oza Oza <oza.oza@broadcom.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
The AM571x-IDK board is a board based on TI's AM5718 SOC
which has a single core 1.5GHz A15 processor. This board is a
development platform for the Industrial market with:
- 1GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI,
- PRU-ICSS
- uSD
- 16GB eMMC
- CAN
- RS-485
- PCIe
- USB3.0
- Video Input Port
- Industrial IO port and expansion connector
The link to the data sheet and TRM can be found here:
http://www.ti.com/product/AM5718
Initial support is only for basic peripherals.
Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Adding documentation for maxim,power-ok-control dts property
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Following the Amlogic Linux kernel, it seem the only differences
between the GXL and GXM SoCs are the CPU Clusters.
This commit renames the gxl-s905d-p23x DTSI in a common file for
S905D p23x and S912 q20x boards.
Then adds a meson-gxm dtsi and reproduce the P23x to Q20x boards
dts files since the S905D and S912 SoCs shares the same pinout
and the P23x and Q20x boards are identical.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add device tree binding documentation for the Product Register (PRR),
which provides product and revision information on most Renesas ARM
SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for RZ/G1E (R8A7745) SoC power areas to the R-Car SYSC driver.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ath.git patches for 4.10. Major changes:
ath9k
* add device tree bindings
* switch to use mac80211 intermediate software queues to reduce
latency and fix bufferbloat
"rockchip,hw-tshut-temp", "rockchip,hw-tshut-mode" and
"rockchip,hw-tshut-polarity" are not a required properties
actually as the code could also work by loading the default
settings there. So it is apprently misleading, although we
prefer to get these from DT. And it seems we miss the 'rockchip,grf'
here which should also be an optional property.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
All conflicts were simple overlapping changes except perhaps
for the Thunder driver.
That driver has a change_mtu method explicitly for sending
a message to the hardware. If that fails it returns an
error.
Normally a driver doesn't need an ndo_change_mtu method becuase those
are usually just range changes, which are now handled generically.
But since this extra operation is needed in the Thunder driver, it has
to stay.
However, if the message send fails we have to restore the original
MTU before the change because the entire call chain expects that if
an error is thrown by ndo_change_mtu then the MTU did not change.
Therefore code is added to nicvf_change_mtu to remember the original
MTU, and to restore it upon nicvf_update_hw_max_frs() failue.
Signed-off-by: David S. Miller <davem@davemloft.net>
The clock of IR can be provided by the clock provider and controlled
by common clock framework APIs.
Signed-off-by: Ruqiang Ju <juruqiang@huawei.com>
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
The internal codec on A23/A33/H3 is split into 2 parts. The
analog path controls are routed through an embedded custom register
bus accessed through the PRCM block.
The SoCs share a common set of inputs, outputs, and audio paths.
The following table lists the differences.
----------------------------------------
| Feature \ SoC | A23 | A33 | H3 |
----------------------------------------
| Headphone | v | v | |
----------------------------------------
| Line Out | | | v |
----------------------------------------
| Phone In/Out | v | v | |
----------------------------------------
Add a binding for this hardware.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
With the devices added to the tables, the probe will recognize the
switch. This however is not sufficient to make it work properly, other
changes are needed because of incompatibilities.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
PCA9632TK part seems to incorrectly blink at ~1.3x of the programmed
rate. This patchset add a nxp,period-scale devicetree property to
adjust for this misconfiguration.
Signed-off-by: Matt Ranostay <matt@ranostay.consulting>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJYMhsfAAoJEHm+PkMAQRiGbZMH/AnSgpvWgJQGr/NsovAJsDM9
aJZPNQnjVD+6dBZLudCJOeKoZ8hd0vI/FNPxDrAJxt0L4PCX6Hxnmt+qsLAhodiU
uGOpLK7dwgE5OH3xEKzbEHJBitEZ5nmKBG1oEZNurL9kTFxyL78j7YnlMz/DpjsH
RwDfV4tD5vyVv8vcmHzo6OBWja+78Njo6+OVaMq/fw8+LqS2uq1ajsLWlkUMGo4b
3CDziy6lMLjHy5LlrWkxYvIK2ldB8o+3EDnp/KOwrQ/L9qNaBillUxwDI8qodqHV
NTUjBi51oqG06YwplJa7Qr9SVFD28SlNjVIv/PRgHm6kPfzNUvlp97WnWUn8R/8=
=SoWG
-----END PGP SIGNATURE-----
Merge tag 'v4.9-rc6' into patchwork
Linux 4.9-rc6
* tag 'v4.9-rc6': (305 commits)
Linux 4.9-rc6
ext4: sanity check the block and cluster size at mount time
fscrypto: don't use on-stack buffer for key derivation
fscrypto: don't use on-stack buffer for filename encryption
i2c: i2c-mux-pca954x: fix deselect enabling for device-tree
kvm: x86: merge kvm_arch_set_irq and kvm_arch_set_irq_inatomic
KVM: x86: fix missed SRCU usage in kvm_lapic_set_vapic_addr
KVM: async_pf: avoid recursive flushing of work items
kvm: kvmclock: let KVM_GET_CLOCK return whether the master clock is in use
KVM: Disable irq while unregistering user notifier
KVM: x86: do not go through vcpu in __get_kvmclock_ns
MAINTAINERS: Add LED subsystem co-maintainer
crypto: algif_hash - Fix NULL hash crash with shash
powerpc/mm: Fix missing update of HID register on secondary CPUs
KVM: arm64: Fix the issues when guest PMCCFILTR is configured
arm64: KVM: pmu: Fix AArch32 cycle counter access
powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1
i2c: digicolor: use clk_disable_unprepare instead of clk_unprepare
ipmi/bt-bmc: change compatible node to 'aspeed, ast2400-ibt-bmc'
Revert "drm/mediatek: set vblank_disable_allowed to true"
...
other fixes.
In order to get the thermal node that we're adjusting the compatible
string on, we have to merge in the bcm2835-dt-next branch.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCgAGBQJYL0q9AAoJELXWKTbR/J7o+wwQAKaYPlaBJPDTkPkKbvg7C2Xl
1EzOP2oDgHp7r7Ntk5u2NOJD7GVIpKL8LVYQu94pCCUMGz36kiES4kNL+h6VlxPn
dsla8GcasDFDzaXSVM7G68vH3p0WLmnQ2RVO6bD3O71twJeGuHfmLF4kmtj4ba7+
m+jP9AlG9nt3K3LKblGyv0grklTP8Kuxg4CEEwpSw5kNQUdrobItkbTmK1RE/hgm
u8mx6J4mZmTJBhZD+nRLN53YJig/ZYMvVpygxoTZb+hr9T/yb+sOJ144ajyiLDUO
tOAvPutJbNHOFQobNb8FQftLJ1awojJFOlRAF2xpjMOvesICO4YTxB6t1zsxTFI9
qJFXiX/962qpbkLDALQnoOQDuIz7Kkk8JdD/8/54XudcYUvutM/sc1WSR43T9gzu
n1MJUD169p24XzACUs1hEe/kiZ64Z4mD2BSkelxk3EfWd9/vxzIkDw/8084cm+zh
RNHcXpf2vHgIqlPcj5+Kcq8jNhi7c2nwVR1cdDnF+tcJjAuRWn4LR702mIXzdNRR
EG74X9PbNuQ+HzAW7u+1rgQGOqblTGYpviN8We6jwVQO5BICQwEGfqjVbXrByxdq
+gwR0xlSsMqae1J5Bg8X22pSAQicGiAJxsGrGHE+xZ9iJmrSyXebt604idvEvkc8
Nbkh07jgaxneG+nrU2ww
=zVOm
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYM9MLAAoJEIfQlpxEBwcEMo0QAKPVSHV/0zsWBg2MDaFG0MWM
tUm9G4U3iVR/isTyLTogTQ1JrxR+lb4psgUsri/DkfvMdlDL3V+640BS/nA2M7Mj
ZclG3vTjUg9sUUelw1zbKv8Ow53y1xaSJFA5XlWL9zMTxoIq0J8B8zjxZp+nYaTe
Yo/OJKbM8NNLTw9tbE3gZhQ371iQ/nxEyu7ZIWvrWtsmgSeaZ2g0BUhiKLkUx3ta
zQPqEHA5yVveSxK/9iTxrsNndnqWEqsN+/qkTGTH0yJDqdQwd3AAjVmlVsDKLllW
eWX10KC2hoHPY438hP1zVa0Pwss2/HRSBKF/UatRf4mVqsdy8q5WMtROT/+Vn4qx
SEazhRnMAPPBI+FpnbZKFycdzvlOf4tFXQdpn7fwk1jhy2gbQFnGRFwdUeoVDrSN
AsPAhtqgSGcRvy8eLtutzOpXwkRfHlkuYOm1hxeD/7tADW17rNjGrXvqUhudcJkl
1cCAHABS7lAV/f22anx9Y+mOSL+Zp7yZ4vZ1FHFLS52XvyWbyibxYn+/goMD/Pv9
pJeYFSopCOHb4Cid94Jbs2qh5/lfdr4EOf+6Qq9ZcPDKXfkinFOC+JCRy20T+iXZ
bQvpNWKk0T8y0vg7kyFjW772od06Yd+OBNKXculdstjRTJY2G8Nd0LJ4iOCF/mFX
e39X2qPoEEQh/M1RiOZv
=GHAx
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-dt-64-next-2016-11-18' into devicetree-arm64/next
This pull request brings thermal support to the BCM2837 DT, and a few
other fixes.
In order to get the thermal node that we're adjusting the compatible
string on, we have to merge in the bcm2835-dt-next branch.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
- addition of missing documentation and DT properties for the CMU_AUD
block source clocks,
- correction of CMU_FSYS parent clock definition,
- marking as critical clocks which have to be enabled in order
to access control registers of child CMUs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJYL0BDAAoJEE1bIKeAnHqLS7oQAIPQ6BjlwrtXKl8sDoZFKl4b
MqlsKsY9EoeABfReNtzoR1JjJzYh8eS3MhKhLhpQNQ0HN8KcHB812DQ5+/glBZko
2Be10390E41mjnVhOQ3fxww/sPo+s90V6p+0L1HAvl9nn1iB2i3vM/Yq9Z8OaLRx
bX6eMmtguwyts0ynOzM09Gh8gJ6wqFIg5AG/9zGjDDLqwYOapybE9+1s3KZiTXHm
MrQKJ6AcMOBvR4b0YbCGW46JWtoSO/XMyYuNSlehxsSNyhO9Ar3/lybc17bhig+J
j4SrtR2JXWybVAiygcEDxhyM0b8EAp1V1QUy/vrDdYwtryYXn/7bPi15mppTXuEb
AR9RKXXytTW6VVyIPeUjTJ3NXjRacSXd9eGvdHQb/5u/0d3Sr3njeifuJAfmK5oX
ZXjb3UVYQN5YsIujzVLDEGUkMzp7Patunlc25Ig51Sw1HtTvFkrnrDXebipTGTww
N76zc5uAUueDbj1l5ns2n28A9kfVj9BCF8jWgcAb1Mb6Z8r7F4OiLUGxFcCVrlvl
B9K+bcKyLcQLmeTMiu8vFKtYSKuiykUwj05/X9BwW49euhn/yiiepESXM/rtgJzC
AM/ZsK24AtuIQhazIeggC8gvkAFLsKGwwWlmAOAdpaxXcOiUpOcyfXNDT4e65N0N
C6yNIQMssDglFSKX/I4K
=oQKk
-----END PGP SIGNATURE-----
Merge tag 'clk-v4.10-exynos5433' of git://linuxtv.org/snawrocki/samsung into clk-next
Pull Exynos5433 SoC updates from Sylwester Nawrocki:
- addition of missing documentation and DT properties for the CMU_AUD
block source clocks,
- correction of CMU_FSYS parent clock definition,
- marking as critical clocks which have to be enabled in order
to access control registers of child CMUs.
* tag 'clk-v4.10-exynos5433' of git://linuxtv.org/snawrocki/samsung:
clk: exynos5433: Mark some clocks as critical
clk: exynos5433: Add documentation for the audio block parent clocks
clk: exynos5433: Fix parent clocks for FSYS block
RK1108 EVB is designed by Rockchip for CVR field.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
[split off from dts patch and to prevent conflicts with px5 addition]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
MSIOF in R-Car M3-W (r8a7796) is handled fine by the existing driver.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
DT binding for the TI DA8xx/OMAP-L1x/AM17xx/AM18xx MUSB driver.
Signed-off-by: Petr Kulhavy <petr@barix.com>
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The ARM specifies that the system counter "must be implemented in an
always-on power domain," and so we try to use the counter as a source of
timekeeping across suspend/resume. Unfortunately, some SoCs (e.g.,
Rockchip's RK3399) do not keep the counter ticking properly when
switched from their high-power clock to the lower-power clock used in
system suspend. Support this quirk by adding a new device tree property.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Add M3ULCB Device tree bindings Documentation, listing it as a supported
board.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This updates H3ULCB Device tree bindings Documentation with
official board name
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Driver can now work with both ID and VBUS pins or either one of
them.
There can be the following 3 cases
1) Both ID and VBUS GPIOs are available:
ID = LOW -> USB_HOST active, USB inactive
ID = HIGH -> USB_HOST inactive, USB state is same as VBUS.
2) Only ID GPIO is available:
ID = LOW -> USB_HOST active, USB inactive
ID = HIGH -> USB_HOST inactive, USB active
3) Only VBUS GPIO is available:
VBUS = LOW -> USB_HOST inactive, USB inactive
VBUS = HIGH -> USB_HOST inactive, USB active
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
This patch adds documentation of device tree bindings for the STM32 ADC.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This patch derives device tree node from pcie bus layer framework.
Device tree bindings file has been renamed(marvell-sd8xxx.txt ->
marvell-8xxx.txt) to accommodate PCIe changes.
Signed-off-by: Xinming Hu <huxm@marvell.com>
Signed-off-by: Rajat Jain <rajatja@google.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Contains two small patches, one fixing a typo and the other adding the
compatible string for the Denver CPUs found on the new Tegra186 SoCs.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYLybdExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6Fy
ZA//Xp2wIQphbAm1t1VddEBX+qY+f+/VkY5/PBLP9vg22hUBpyx0QM/EyLHO9a4R
3hyqe+6NsuGq44jzh4z+On7zfSmVMX2Tpji8CRnTqRvmt20i9Ac5Z3SusrNcd3tu
Y8QDEeKRh5jvQ3LjzumNQYr14fz++Zo7qjBQYWPa7Jtv1A/YKqdbIV3DENDzEvc/
aH1G2msScM9CxwBEaK4D4rmRmRXtYvs9ZtCC+45xRXQukQDWarlAa/ys3H9iHuEw
mn/s8zcYfS9evRc1LUA+nF+8LdgVj1qVWJLan8joiXNBRXZM2dt5wogPS0fZPyv9
XYIgbR6vZ8E07ucZIKNBvxNoz8V7bf8vNOLg14mZ7TpWZE2tAxB+RGtLqAOuod8Q
y7jo7wApm6fuk/yLiG4w0GAR0Wnx+zc4/wXXr+s64PFwVMs/7opeEXv9bR1uV7SV
Qtu5Vr4CcVgeEnZ2Zz8VIfcehP2NnW4/4us3+qRZ5fm3HVVcLTw6JpFJCRWYVOT4
XSr0Dr5vaInOZKW5Hu+DoRkJY16Zc42YZigPK83tPWcOh5ai0eMvrqXZ19UiwKxb
uN+I/wzzDnwJOBnOnNOR52dJjUagDL2sc0aOvNFV+ZU5CwahBqFaZnFavcF9uHs/
ei4L9SSUeRlmb9b0LPPiLCFr6kIody7oiBO6NgjV29CCSfk=
=QQY8
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
dt-bindings: Cleanups and additions for v4.10-rc1
Contains two small patches, one fixing a typo and the other adding the
compatible string for the Denver CPUs found on the new Tegra186 SoCs.
* tag 'tegra-for-4.10-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: Add documentation for Tegra186 Denver
serial: tegra20-hsuart: Fix typo in dmas DT binding description
Signed-off-by: Olof Johansson <olof@lixom.net>
This provides a driver to enable the use of the Generic Memory Interface
found on Tegra SoCs that can host various types of high-speed devices.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYLyYMExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6Eg
8Q//Zz6c5myh362f3h0RAV+L1VlZHzN+G//kIonNVoZEaaIWJgb2VyfxDXCy9ngC
+crwgKc0Y1/3uzOmbCllLFcqM7qpyUcT8/g8HzpWqq2w9oQwBfr1MQscEZa9C5zI
Ql4LVXIK/RvACzrdgGqlPxu4LMGLrmIwSUbBd2VMImW1MMryT/7HV3DAd2F5d/zt
9S/W74+HvdjYT+zsuz4vo6qOB2eN1mQHjL4WwAgOieF3QRVgLuTzZ8W6lTndG4LW
mbAq5DQnfUcf8/eO2nroltaxUq+r2SM/XkgOKI94xFfYUnpZJOzb7kQruv9n6FTK
lZXmX/webUMgKXtnqA66O/w0ms3Xg4CCMbZ/LU/E7AjbwN2DGyfc/CQdlIUtUlV5
qA/9w39GJaGcfFjFwcI7PCwrpgkgGZRFSnUhCaiwgUgLyCYqUJs0YvcHZG/bpKh0
FIVburEnhSt5huHzeTwY/OByATPsAYPSwJmQ2K1G+zahuCO5fmAgn9lOV7NzKcni
fOTHWhIxELWdYJZHFUfvUE0x4o0QvgamtK/ytFUASdc9JHC8R66dQk6g+mfYOaig
VQD4j4Yx2EZhbcHKUmIXAT6NO1qiSoctagvx/S9pyUG/nj7H3UmKEvqSZdD0ir4I
togqp/z9bUp2C1NzanHJsD6ik3PYAo1R/VFwMTDBRrvv4VA=
=xCcZ
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
bus: Add Tegra GMI support
This provides a driver to enable the use of the Generic Memory Interface
found on Tegra SoCs that can host various types of high-speed devices.
* tag 'tegra-for-4.10-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
bus: Add support for Tegra Generic Memory Interface
dt/bindings: Add bindings for Tegra GMI controller
Signed-off-by: Olof Johansson <olof@lixom.net>
IVC is an inter-processor communication protocol that uses shared memory
to exchange data between processors. The BPMP driver makes use of this
to communicate with the Boot and Power Management Processor (BPMP) and
uses an additional hardware synchronization primitive from the HSP block
to signal availability of new data (doorbell).
Firmware running on the BPMP implements a number of services such as the
control of clocks and resets within the system, or the ability to ungate
or gate power partitions.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYLyVYExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6F0
bw//aunzLT9M38+PMRBYDhgY/ype3juarSMmDWT/25EpfJ6Eg862UYwFxpRwOi/z
t5pTXfA6Ndwao6HhQp5UmqRAdZd2V0UcxJoJ+9vooAUutyJTkk4cd9tW1JBcTsyw
LvqMplF6GXtDM/Qa2GGV+4N3zlastQGuv62ir9xHOBHs4MJAwcbr80N18k+WzuSE
3OGRIjdsAReWVgcj+SL6XPKrF6PlKCWAe+nODmnnY8QkCb/icI1ryJtYEgT0PSkY
Xw90udqaIuR80ZVRtgN3f3fQ6QBi7GTohFtDl05snBjPETF1aKFUX6w2JgUEXXdf
+/eewfSy468SrkbppX2MbPxqDtEPLIjbjvNL/q/DdOXxjEnLnavn1BcFTvyiJ5Uo
1u4B6uX+gW+xq8546XNNuCwmZ6zkDsRw3ksSWz3sMdpOtC72NAQ/YtAYu0+QUyUU
vptXGK9LMoVzYtreayO37ql+MP8EFDYqsAIPLZzQ4PPCiZote0HN35IlVWZt+Koq
jcMnU6EDZMA2mHINOLIzSbf39hw5zV6Skr0DW3PtPosf4vU488LHsRF5Fr11JBGi
YAh/T8ZiEnv0qeBNk4irr3JEUuXCVDgxqwQB/FkGL/mKPV08djji3tMTl6fNetMk
pH3fQB8yclKn3DRAIWSMrDDOGspOKSSmeu2/K4abIB6Po/o=
=9jQK
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
firmware: Add Tegra IVC and BPMP support
IVC is an inter-processor communication protocol that uses shared memory
to exchange data between processors. The BPMP driver makes use of this
to communicate with the Boot and Power Management Processor (BPMP) and
uses an additional hardware synchronization primitive from the HSP block
to signal availability of new data (doorbell).
Firmware running on the BPMP implements a number of services such as the
control of clocks and resets within the system, or the ability to ungate
or gate power partitions.
* tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
dt-bindings: Add power domains to Tegra BPMP firmware
firmware: tegra: Add BPMP support
firmware: tegra: Add IVC library
dt-bindings: firmware: Add bindings for Tegra BPMP
Signed-off-by: Olof Johansson <olof@lixom.net>
This contains the device tree bindings and a driver for the Tegra HSP, a
hardware block that provides hardware synchronization primitives and is
the foundation for inter-processor communication between CPU and BPMP.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYLyMbExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6El
gw/9FfJG4Ze7thnBHHVhDDuZaVF6U9gIKkEHfTKkUlU8fkOtF+xnTBCK3LRkHEsk
X0zyQlKKa/lzUGB52Fsi9jpVjt1WXvyuVOgCaQ+Zg9GXCmfXxOrNquAIH9sLhHSk
SpBsVHDsCk5UT4pINJrmdpGN2nSdQ4PvsRZM8wRkRs39C7+nf6wSHMrjURCt/DLT
Cub94gLcFiLddmO+c1OUShUjnOcy7yBIWn/EycxrKOqMDxzY9JK2Q0n8Cc3f1UVN
P5WYgjvLss5pGWZOBvPwefMVXru7BFBh1jOceabueD3DjNEP8nWb2/WQbXMUDVzq
QQ/q/4MIEmQMc8B8Z0brEmpIMn870Y3IPDaUmG4F6soW9yRL1gyA9PiF4YlcTe53
b0l0Y4/aehgHqCz1c9FulZW+qBe746fND/CNzTER7QfUe5CNotAtRUWG99v/8gGF
gtVmwTVnC5jn4ytUbLHEM4JtghKUuoIHqAWhY7KdwTDOm70TLmdHmOTVKN0+Ej3V
IgFCo+WIzleoHyK8GiUifOZSnLIJuctDznIUMnw2OmBlslvcdE90XbSQ00hlYC3N
Z9N2X6747OhGZF6viHWdWOtFfH+LpRj4S0LIaoRkvU5GRUi0fOjuTIXfBhlPe+11
wZ/AZAav1CHfaJk66H7Vq2rmRxdwe56t9fzy/xJM7ja+9m0=
=Gojp
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
mailbox: Add Tegra HSP driver
This contains the device tree bindings and a driver for the Tegra HSP, a
hardware block that provides hardware synchronization primitives and is
the foundation for inter-processor communication between CPU and BPMP.
* tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
mailbox: Add Tegra HSP driver
dt-bindings: mailbox: Add Tegra HSP binding
soc/tegra: Add Tegra186 support
Signed-off-by: Olof Johansson <olof@lixom.net>
* Basic support for r8a7745 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYLajWAAoJENfPZGlqN0++fhMQAIcaavnq8O1sHtkgtyzwyEc4
lw89CFPhJC2asRXUleOocwH94RI5U+kSUCzwChlXdG+jKwrxeELUI91xAxuDyRFN
ejVner0ewIZzbM39fcRrzUn1B8RYzkb2mawzpm4BQvX650dxEMiNzUmYS4I1taAH
ibGuWUlOSuTZs103XFN00KbOcfHegeiBqlQPZJVLjX/c+tFXFkqOWPhPrMqyqhek
GxKKvyrvWUjVX7PsOXHRxxU+TevIiy0rnABo2pZI1WaDrRMaBfYVLqYilyWy91P/
GmtV2YyajIIzUIkJFAz77TBiuT6DyUd9NT+3Cu2X1JJndT9i52oFTIuDEy+TCkmw
z/G+3w8WWh+YPayPyK7S84t0S1DIBhjngq4/v8gR5UOjiSaGQW/zAQXPt9Bsf5r+
CWP81wIizon2adluwW5LB/Hqa1T+RBo1EEub96jkbl51lFZFO9zhUorfRS6qCVQm
5rko2nZvigAoQjnX5WWaJbvOaUtITZfUEdKGU5c6UCyecsXtmBNIH2FKVmCvYy4w
M103I4gEubBcyK1sqYhUC65Xm2Emin/oPNpGasqeSKuXWnSTGT6Hwp2adTFqgL95
6PC123hPLlmn2YSN9kSrWRhlc17RrSozdo14tV88T/Mh+ViZNsLTcZDAU8cMe444
kBO7E/qXUMMGrIs6qSF3
=tBnV
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Second Round of Renesas ARM Based SoC Updates for v4.10
* Basic support for r8a7745 SoC
* tag 'renesas-soc2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: document SK-RZG1E board
ARM: shmobile: r8a7745: basic SoC support
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add hwmod interconnect target wrapper module data for crypto
accelerators for am3xxx, am43xx and dra7
- Add support for dra71x family of SoCs
- PM fixes for omap4/5 needed for omap5 cpuidle
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYK1fbERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6VzjuQP
/iul0s0YHTgcm9XlWLriEMpq3YDuzeY50eCBI6EjjiiP6rqJBew7GG/6/x2RFo+7
X+X/crnI42fzLDvo7WI5tbN5e4aFtIR3rqn3+2oVEnAfXqtWsqRmDEaQ2u4OUQ39
jucL1sCjoNUyBNYS43JOG+XV6zJViIxMFL9yy9ZTGUHMFMergtTolBThp/wpgf4u
pdkauLgabtZkiD/lLmNcLVaTl2lyKkf/hMtbL1xO5zHWgD2Bz8dQeS1k4tY2NzF4
SuiAcpRwlPaChnm4gPdnoSHFtjWtFmjgLRo5PAsHaubKVi6xcRrWYqq9Y3E6POu7
0uYxU05faSkxc3WMYCuM9bwjsU9EXzh7A22WgECckhIDgJej+xLw0yZOBGbEufSN
0JO20HVFTa+OR0KtnjKhs0x8nuFciSIzgmVExJn2lceqxHzZnWKo8tR1yr2iwk2n
jWU4NrMy+CzGAKV1lH0cgkph5cAnDSMR1J99tZqES7tHNMGeEgzd3RaIR1ENyiTU
JfROO654zJx6N6yLzOEUxtbXy1DcwOrs9SV+mBkiJV3nuj74E9jGqDnifjJuukXp
JNdoqOvU2ccA8vuKCTd2HRY2RHAx2N1oLJb8L4mKwxQTYofON6fKJ9Fig6muW3nP
7rd3jy0CQ/WbNYlZFUmuyYqfrGR6IMO72N9dvqYGrptO
=hUTI
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC changes for omaps for v4.10 merge window:
- Add hwmod interconnect target wrapper module data for crypto
accelerators for am3xxx, am43xx and dra7
- Add support for dra71x family of SoCs
- PM fixes for omap4/5 needed for omap5 cpuidle
* tag 'omap-for-v4.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: DRA7: hwmod: Do not register RTC on DRA71
ARM: OMAP2+: board-generic: add support for DRA71x family
ARM: AMx3xx: hwmod: Add data for RNG
ARM: AM43xx: hwmod: Add data for DES
ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only
ARM: DRA7: hwmod: Add data for RNG IP
ARM: DRA7: hwmod: Add data for SHA IP
ARM: DRA7: hwmod: Add data for AES IP
ARM: DRA7: hwmod: Add data for DES IP
ARM: OMAP5: Add basic cpuidle MPU CSWR support
ARM: OMAP4+: Fix bad fallthrough for cpuidle
ARM: OMAP5: Fix mpuss_early_init
ARM: OMAP5: Fix build for PM code
Signed-off-by: Olof Johansson <olof@lixom.net>
Support for the Allwinner A64, their first armv8 SoC.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYK3ohAAoJEBx+YmzsjxAgQ0cP/AtC7KSWnQ2afcEeIRxii9X+
QbiyQqPvmRF/mBtZN/49wKwRdh1qtsGk29UxMf06hrk2oA/Kc9KoPed+5Q0qG2ac
2m1KWN6G+qNk8bbd26A4sXRBsWUH7Gp7kCUjIBoRRUup6YQFySxIEjSU7dfmPHzi
Rxbq5fo9JMpar8bjVr1mVeIL/0p4Uz2LYt4miqARlztGJaUEZtBTrWDncLM0TqTV
hzeP1lKwelwkVDcrrSgZ5nBCcdmXFvIK6S3pNHcy11NCt7Qnf4pEn2heFs0Xh0/3
3nTcr7TEEeEc1oVc6UyM6GCgV3SrBlLTXIhvULQoU0sdhjTQxUo1zpDCO81p0UfQ
Qu7KxjhvXOjRYZLBQfXWN4VwOURrP9Bw2VwxN4vACUpQpQX/9eovIT8XVH9Jd8kO
bnbmzWLJq+arnE81CVrL7oqTK0r6O1/D+6kOLbvP9o6+Pt/2oJ8kHrJQCLXzfOnE
nhuZE489fTLeKtgloR5wez/Vu1JwaIhhHsfWkskljmi7Xx4XUJdu6XtBoS67qJE5
xDg/ujD3S9TT0AhZ5XWn1f6fCPI4N+E8HvHUJNLZSi1iPnW4c2wZ9tBBEOu7hh2X
7ZiZ6k+FOg+ZyY/jdChJ0SWvIzcutIbkP/0pKgLLPozEImv6ARqfyJbWauxbt/Hl
JKw9pE7Uo7ztdAz/52DL
=JkJ+
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt64-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt64
Allwinner arm64 DT changes for 4.10
Support for the Allwinner A64, their first armv8 SoC.
* tag 'sunxi-dt64-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm64: dts: add Pine64 support
Documentation: devicetree: add vendor prefix for Pine64
arm64: dts: add Allwinner A64 SoC .dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
non-modular
- allow shared pulsed resets via reset_control_reset, which
in this case means that the reset must have been triggered
once, but possibly earlier, after the function returns, and
is never triggered again for the lifetime of the reset
control
-----BEGIN PGP SIGNATURE-----
iQJMBAABCAA2FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlgrXr8YHHBoaWxpcHAu
emFiZWxAZ21haWwuY29tAAoJEFDCiBxwnmDrP7UQAIVZfUCBUfc5PF6u/pWrUOtn
Eg7SWvo1TYcJPJKoICwlRwKXmzLVfmivCsxW8my5Ddb66JQ5hMkoqsXALQl0sAZK
U2xXiy76z+EsL9tvvJ2b9Yqx3BIbzPkZyv419RWMVldqUtdbtHe70xLjF7DVfaTs
f9BTh0OAN55yWhYS7HQDQKm2bvUe3jy0XDzXlbPXgdy/roAReBFSFO4r80cbbAfv
DZwhrzmGSAGF0fE/TQA65wkkuZMM/rE3cjOjieVC4ZaeX7OQ+eqIMwph25uHCEnS
61g1J8GcwKvtP1iXAg5VdLAW2TTGTHztBR8UchrxZfySnKWR0rGee3LkQX8LVfih
mVI2jtzpq6fGYSask9B/fGnObfjWF0kHcgy525kdcNbo8HVZ0vdgZI/yoCh3ZViT
RHpuXk5cHYM6t7aNGOBvVvdKOL3wtuFUrJKYEpOL3BB//SLZXxCDCawMt7H2XHX5
3EbLfKikQQbMNs8XzeSfTOQi9ITcdwnLdTqjBunAbf0aMiF+SOtDS/yb6BsG7zjv
muz4LUtcMq5YfXnZbB11ngz+DSN/g7MHIjl9MXG8kMO9JsVb1R9VtmbxNQ87EU92
oKGy4ix0vSIRl7/gmmFZt4iV8RQOvffkB4iIkOXlWXdnsUrqIj3V/YwEr+8leoWk
MHr75XggJOUH9VaMUP/2
=e7kp
-----END PGP SIGNATURE-----
Merge tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux into next/drivers
Reset controller changes for v4.10
- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
non-modular
- allow shared pulsed resets via reset_control_reset, which
in this case means that the reset must have been triggered
once, but possibly earlier, after the function returns, and
is never triggered again for the lifetime of the reset
control
* tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux:
reset: allow using reset_control_reset with shared reset
reset: lpc18xx: make it explicitly non-modular
reset: zynq: make it explicitly non-modular
reset: sunxi: make it explicitly non-modular
reset: socfpga: make it explicitly non-modular
reset: berlin: make it explicitly non-modular
dt-bindings: reset: oxnas: Update for OX820
dt-bindings: reset: oxnas: Add include file with reset indexes
reset: oxnas: Add OX820 support
reset: sti: softreset: Remove obsolete platforms from dt binding doc.
reset: sti: Remove STiH415/6 reset support
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJYHmoCAAoJEHm+PkMAQRiG7RMIAI2i7Y5hpL5yCxK5AFaL4u/G
KxXfp1B1UanUTgjOmd7zGqtDYcFX9t7GTTUFixQ7/9Opr4PD9qbnatoDGSc3xjbT
msDgA1B78F1/Q3kHWfeGq32MihQ4mj5NwUCo+igUcUvvWG7mHgzErj/Nh5RoobQX
p/izdpTbrw3GX6xXB8olbG7XWHaVye/+TT3q6+gmgm8I/QEujcLeGoycE0zlhPN8
FG/JX76At/+ZM2Py7Oxo3k+oKL9CHrtOQYDp/wN0uslV5eYvvkZz0/M1HMOGZt+c
gZU5jzM17K7C4Nzo06WAuBU9wUBGc25m+cPicLlOmljnzfU+f50SKaDjZq3p7QI=
=2KUF
-----END PGP SIGNATURE-----
Merge tag 'v4.9-rc4' into sound
Bring in -rc4 patches so I can successfully merge the sound doc changes.
- Correct the hardware pin number of the usb node on the Hip06
- Add the Hisilicon Hip07 D05 board dts binding
- Add the initial dts for the Hip07 D05 board
- Fix the warning for the node without reg propery on the Hip06
- Fix the sas am max transmissions quirk property on the Hip06
- Disable the sas0 and sas2 on D03 board
- Add refclk node for SAS on the Hip06
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYKvD8AAoJEAvIV27ZiWZcIdgP/RXYCWB8yztd3K74qSJ8xydr
SBKY77zXwQBHzmDEbB881pJOaaBKzO9uTHo6nbkWRoE/cMYONohc+cO7WkkY4Lav
gMEJ9Ss7ckwCAjQAkzh4hHV4V8EMA1+aMDNbNR/slw+neQnzBuTMd4EERmve3Wzg
d4exeYgXVWGZLWhfFxp9xwyDt8fn03LoYYgqkM6wFKKpCXFx6dDVvjZw/V7W5vn0
GVBSxgam2BW4ug4/Q6ZlnBrNU1db8DzhGUfqXOd8569v8QUxBq19Gy1DP1eTEtCl
5WvnOIUSDQ+1MEFIaybq9CIWcM792XoQEpV9OI1EouAOYN4JeAiutGPQY0seyEIF
X1jIPBteetqLtXSf3uQdYf8hVmTMNZp+/f/jRWK6K/BPgeVts0N9t1jqhcSMzOaH
cneUkCuXsN4crBzBszhSsSPNMg7vvuprJNJCepESdiA4lBpn/KKFRj3aDNOw+ev3
dpC6Rn0htzeg4wWWez9MptlXnMhRoL01FR+0nNy4R3FB4OEphzzMZuTWEAe7EyKA
wwPG0u2WqR8nqFgk7iphHcoI1/NevSr0HbxRl0dWZ2UDZtESvSseZl0AEQRTU2ES
/rg9S6ShNQvQI9bHhITIXixZ07gpyM/TPbJlAUp6PHtxwiVpLoDsCQEzCYnktFl+
S/4pvu6yetne9bIPz59s
=MVHS
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi into next/dt64
ARM64: DT: Hisilicon SoC DT updates for 4.10
- Correct the hardware pin number of the usb node on the Hip06
- Add the Hisilicon Hip07 D05 board dts binding
- Add the initial dts for the Hip07 D05 board
- Fix the warning for the node without reg propery on the Hip06
- Fix the sas am max transmissions quirk property on the Hip06
- Disable the sas0 and sas2 on D03 board
- Add refclk node for SAS on the Hip06
* tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisi: add refclk node to hip06 dts files for SAS
arm64: dts: hisi: disable sas0 and sas2 for d03
arm64: dts: hisi: fix hip06 sas am-max-trans quirk
arm64: dts: hip06: Fix no reg property warning
arm64: dts: hisilicon: Add initial dts for Hip07 D05 board
Documentation: arm64: Add Hisilicon Hip07 D05 dts binding
arm64: dts: hip06: Correct hardware pin number of usb node
Signed-off-by: Olof Johansson <olof@lixom.net>
- Enable Thermal Monitoring Unit (TMU) for thermal management on
LS1043A and LS2080A.
- Add support for LS1046A SoC, which has similar peripherals as
LS1043A but integrates 4 A72 cores.
- Add two LS1046A based board support: LS1046A-QDS and LS1046A-RDB.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYKrk2AAoJEFBXWFqHsHzOQlwH+wQXK2WABTOjRVchLOzup/cD
UtB7mbmXJrBSePa3OTvF8xMk4VFfjm9oljmLnUEnzWEfjsS2aURT2GJBWv/ddhqw
Mg/fYcZ1LgzJq8VOnenLpF1L2jc/I2hivCkBNmmkMK0HQvURKEAsdqNDc7Zg0meY
64qokll9Uz4DM2yeHkrUs9Q13UPs9/88ikYbE+CVDFaI0TCJjZUTImmjYkt8pJyk
poDtW6yE8ibMNk2DK4e4tthPRcYnhkFOtSJF6Qy6jouV/J9+aaKG5+rj4MBeF8Aj
T2+RFSQ4s2BuI5cH3qQq8Fv7lvF0Ay4wNWZl420R7shjbPWQNdIcbAbKL+51De0=
=jiir
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Freescale arm64 device tree updates for 4.10:
- Enable Thermal Monitoring Unit (TMU) for thermal management on
LS1043A and LS2080A.
- Add support for LS1046A SoC, which has similar peripherals as
LS1043A but integrates 4 A72 cores.
- Add two LS1046A based board support: LS1046A-QDS and LS1046A-RDB.
* tag 'imx-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: Add TMU device tree support for LS2080A
arm64: dts: ls1043a: Add TMU device tree support for LS1043A
arm64: dts: add LS1046A-QDS board support
Documentation: DT: Add entry for QorIQ LS1046A-QDS board
arm64: dts: add LS1046A-RDB board support
Documentation: DT: Add entry for QorIQ LS1046A-RDB board
arm64: dts: add QorIQ LS1046A SoC support
dt-bindings: ahci-fsl-qoriq: updated for SoC ls1046a
dt-bindings: qoriq-clock: add LS1043A/LS1046A/LS2080A compatible for clockgen
dt-bindings: i2c: adds two more nxp devices
dt-bindings: fsl: add LS1043A/LS1046A/LS2080A compatible for SCFG and DCFG
dt-bindings: fsl: Add LS1043A/LS1046A/LS2080A SoC compatible strings
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series from Vladimir to fix broken i.MX31 DT clock initialization.
As i.MX31 DT support is still not quite complete, the changes are
tested on qemu kzm target and mx31lite board with simple written DTS
files.
- A fix for CompuLab's sbc-fx6 baseboard to remove wrong fec pinctrl
setting.
- A DTS correction for i.MX6QP to reflect the change that the gate of
LDB clock has been moved before the divider.
- An imx7d-pinfunc fix for UART pinmux defines
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYKoTwAAoJEFBXWFqHsHzOGyMH/03fFizPHl+LQYilR8hKbFLg
amAhmqVEM0gRv/yvBwi/I0FXUyoBY4rhhAzvjy+1eF23wlipXt+2FozlXLW3jy2w
YP1bTnSy3qN5+eZakfeARFDh7Q1ab/19ZBJYFyQaRB2yY3CRDz3xeY5mOeVHdnUb
jI1+GpDAr37acGlGVOrsYJlpNlzX8HjAfRhPvlEqMH1Xp/1O5EgkzHyICKR9ysaB
f7fDTAhVsxivdCF/XU6TpyOUtWshu0v4ji+JtvRkz0p+9gHgWGKzu9ixQTr1FFxZ
YHPnxpDf4jtygLtrrzT4qBww/84PemAfQ3Rhpl1aG9331VB962UZ3R+JDoSSwnE=
=Xqw0
-----END PGP SIGNATURE-----
Merge tag 'imx-fix-nc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/fixes-non-critical
i.MX non-critical fixes for 4.10:
- A series from Vladimir to fix broken i.MX31 DT clock initialization.
As i.MX31 DT support is still not quite complete, the changes are
tested on qemu kzm target and mx31lite board with simple written DTS
files.
- A fix for CompuLab's sbc-fx6 baseboard to remove wrong fec pinctrl
setting.
- A DTS correction for i.MX6QP to reflect the change that the gate of
LDB clock has been moved before the divider.
- An imx7d-pinfunc fix for UART pinmux defines
* tag 'imx-fix-nc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6q-cm-fx6: fix fec pinctrl
ARM: dts: imx7d-pinfunc: fix UART pinmux defines
ARM: dts: imx6qp: correct LDB clock inputs
ARM: clk: imx31: properly init clocks for machines with DT
clk: imx31: fix rewritten input argument of mx31_clocks_init()
ARM: dts: imx31: move CCM device node to AIPS2 bus devices
ARM: dts: imx31: fix clock control module interrupts description
Signed-off-by: Olof Johansson <olof@lixom.net>
Add bindings document for the Altera Freeze Bridge. A Freeze
Bridge is used to gate traffic to/from a region of a FPGA
such that that region can be reprogrammed. The Freeze Bridge
exist in FPGA fabric that is not currently being reconfigured.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Add a device tree bindings document for the SoCFPGA Arria10
FPGA Manager driver.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-By: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Rob Herring <robh@kernel.org>
us to use generic parser later on. Note that the driver supports
handling the legacy binding also with no #pinctrl-cells so these
changes can be queued separately from the driver changes.
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYKlcwERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6Vz/GQP
/2+QScOal19fL4GL2IQRZA7k6BqNIwig2Rn1Kc1y6ONDeXRcVBFLP7Rbe2LFjygJ
y+XcRcZePtspqQXCxESNxM+IClNHqFf/zY3055GAIkXCmWgKjs12CXU+u23ApUwx
uSTzPGCBp7aSakX+U1h4sBB/2vCyQbUyiyxQ3rEijnZAfNgAOvxj+Tk1YaZQzltA
/FJ06Nko9Os3jWHbEFudjTsYiFJyCa9x6MquupQKT9TF+P28Mb/+SFv05OLLITOV
eUEpuca2ml1KBgyRDnBZdhbfzzsHDwcP26JWEsejeOn5FIXMKdK7Ayo/lcZgHYn9
4hsQoarIrTI9F/7DSZIS4W9tOYCM+5cEensRo6yajaKGmeCGHtFveNftcXSloKSN
SrIc47l+XEXC+BFRrcurm9nf61HbmlozVpiURCtuw8vANLLtenWWzew12QFuBsDU
D2yNVg7e9rHg5cJzS3oq3rkb7/XGg2EnwQvV+xUuLorWtp7Eo5YWy4aBu/9UVVQX
kx3lj2PsGrrKofwyP711vUMqO8uEwZbx3SDW+S7WpSC6JoxObCh0kd+3YP1P2+8+
i7ltGDbI4gm+zAzUcB27CUOuLbx720DTUTbfHhi50KLjkWM/FEKTW+9MeJ9VChD4
t/JZSUYPGHR7DS+9a3qVew04Rjl4GsSthHNidahj4izj
=qXyV
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/pinctrl-cells-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Add #pinctrl-cells for pinctrl-single using dts files. This allows
us to use generic parser later on. Note that the driver supports
handling the legacy binding also with no #pinctrl-cells so these
changes can be queued separately from the driver changes.
* tag 'omap-for-v4.10/pinctrl-cells-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add #pinctrl-cells for pinctrl-single instances
Signed-off-by: Olof Johansson <olof@lixom.net>
- few fixes for the memory drivers
- minimal security module driver
- support for the Secure SRAM
-----BEGIN PGP SIGNATURE-----
iQIcBAABCgAGBQJYKgVyAAoJENiigzvaE+LCklUP/imbZ7nV0IVxiajDDPSNSkho
1Bu+0TV0DZJ0tx055suKS9uC9zWGEdSJhbvKZdjixB2TC4DAVDZO0Xx2Gj+Ux2HP
wiMgtDfvgSyFjp6PGWo/sspgAM/WbA7G7x/f0x7JCE8TpyrqEnN0bbiabH7L6X2g
K8u2KEywQdg/lOgr177fwFSwBlOx0BaHodvrXNqI58VQGNpcqv0l/8TgiPPdY0w9
fhg1JCvkZtDbAYgDmCvenGGF0IskjAWwi9fCXL+hsKurLYrS5udFFZLUvnFieKtN
4zTyzb8LtD9EUuawK6fGe5wHo786A4VCX2fQ7lKYyBT4ysJ7baeTfZGK3XGn0one
BVlyeLVZw4p65esx12fEkB2Nm7YSlKp64Jd/8wYPW5doSd/HaPG9MbWeVlRhmQYr
f5Frn2oiBbkh414LjpARkDY2ZY1fmqVfLZ6A3FUktIsocULDMEa3rzNAG0VQyAlx
9PnW05/HQnVVhtmfv9+wgMVH5ZJmQLZnkmgX35mjoo5cRvpBqxsif/3Ul0lGb4Y3
IZDIVBiZpnBPF9OpJ+cTexOsXT/UVcHpjOT7MT72NprVF0OpfkI5TSa79eQX6bmD
TiabMkE5RmVkaQVuIlErut0gxvGl72N93F3LDDP1ZYWaYmU4u/JirImuhw/e+U5v
00JrVYaM6TDahSl2PMO6
=/UOn
-----END PGP SIGNATURE-----
Merge tag 'at91-ab-4.10-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/drivers
Drivers for 4.10:
- few fixes for the memory drivers
- minimal security module driver
- support for the Secure SRAM
* tag 'at91-ab-4.10-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
misc: sram: add Atmel securam support
misc: sram: document new compatible
ARM: at91: add secumod register definitions
Documentation: dt: atmel-at91: Document secumod bindings
memory: atmel-sdramc: use builtin_platform_driver to simplify the code
memory: atmel-ebi: fix return value check in at91_ebi_dev_disable()
Signed-off-by: Olof Johansson <olof@lixom.net>
* 'clk-qcom-8994' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: qcom: Add support for msm8994 global clock controller
dt-bindings: qcom: clocks: Add msm8994 clock bindings
Fix the no. of gpio cells in pxa gpio binding documentation.
The no. of gpio cells for the pxa gpio is actually 2. But is
incorrectly specified as 1, in the binding documentation. From the
driver code, the second cell specifies the standard flags as described
in gpio.txt.
Signed-off-by: Vijay Kumar B. <vijaykumar@zilogic.com>
[fixed subject line]
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
One big merge this time with a total of 166 non-merge commits.
Most of the work, by far, is on dwc2 this time (68.2%) with dwc3 a far
second (22.5%). The remaining 9.3% are scattered on gadget drivers.
The most important changes for dwc2 are the peripheral side DMA support
implemented by Synopsys folks and support for the new IOT dwc2
compatible core from Synopsys.
In dwc3 land we have support for high-bandwidth, high-speed isochronous
endpoints and some non-critical fixes for large scatter lists.
Apart from these, we have our usual set of cleanups, non-critical fixes,
etc.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCAA7FiEElLzh7wn96CXwjh2IzL64meEamQYFAlgu7+gdHGZlbGlwZS5i
YWxiaUBsaW51eC5pbnRlbC5jb20ACgkQzL64meEamQaDbxAAsgDPAp8QTx8D1d70
hSGyPZ55rmqlzBNbUUOQyk/AeN5xM3XVbjZNOxWn4c386iaDrngcqOrxjCbBRsje
b9yMESMiZsTPVlKXE45yXt//NHg1KUfpHON7rybaiFq0uqjUhnQf95DeYPgJVxit
7F9B+05XcNMyxYRoz6bGkRTU+lcJ6g3/orgKfp4t/hs8WUNXH6+71keMF+IdLYNH
mcPmJ8MXpfLzv8eweRwV0s/3flxCuFx1ksZ8cW6qHR5vX303X2sGTlinBmhfQapr
t0a+OBtLpZdNmjw/yB2odc/1jjLNRHpYU5xGqwouMx9Ca2PocFT2xFbmUWR23xp1
X0rkICRxcLPjZql2Uld5QHO9dPnF/FbX0Njuvxo+2r8ENE5/eG4C/RcYcRDmYPsu
u8k2rKFs0+yCOAU91rD8mayJVBWBJ4trqZFT0TcocCGsMTk8fTYpF1Iskj9Z4FKz
yo+lgyCCtp673ykGZ1ezsL6YWOmdrQv/PurKZqrXAmdhi6+mImLI/nAHtAdOZx0X
zK9MwPnwDxrPiqhrZ46+Bm/EjZI50TM44M1ldmCwKi/6/Nvy54DHMtjPI5/9205R
bjftW3DkVWAC//29RNcGEHtwiJFPEU/kdoRFOPhKGJ7ocCzFVSTFBgo02kDsC6De
Wouv2QTFuZN9s17o29YVD3bGJZM=
=5WN9
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v4.10 merge window
One big merge this time with a total of 166 non-merge commits.
Most of the work, by far, is on dwc2 this time (68.2%) with dwc3 a far
second (22.5%). The remaining 9.3% are scattered on gadget drivers.
The most important changes for dwc2 are the peripheral side DMA support
implemented by Synopsys folks and support for the new IOT dwc2
compatible core from Synopsys.
In dwc3 land we have support for high-bandwidth, high-speed isochronous
endpoints and some non-critical fixes for large scatter lists.
Apart from these, we have our usual set of cleanups, non-critical fixes,
etc.
The BPMP implements some services which must be represented by separate
nodes. For example, it can provide access to certain I2C controllers,
and the I2C bindings represent each I2C controller as a device tree
node. Update the binding to describe how the BPMP supports this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: renamed bpmp-i2c to i2c as per Rob]
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra186 BPMP is also a provider of power domains. Enhance the
device tree binding to describe this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Boot and Power Management Processor (BPMP) is a co-processor found
in Tegra SoCs. It is designed to handle the early stages of the boot
process as well as to offload power management tasks (such as clocks,
resets, powergates, ...).
The binding document defines the resources that are used by the BPMP
firmware, which implements the interprocessor communication (IPC)
between the CPU and the BPMP.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The corresponding driver only supports the USB PHY on Meson8b and GXBB
SoCs. Newer SoC versions are using a different USB PHY implementation,
which will mean that a new driver is required. Thus make sure that our
naming is specific enough so it does not conflict with upcoming drivers.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Update the example so the node name uses a dash (instead of an
underscore) as per convention.
Additionally it updates the example register offset to a real example
(the old value was taken from a draft where there was an additional PHY
bus).
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This patch adds support for the "amcc,usb-otg" device
which is found in the PowerPC Canyonlands' dts.
The device definition was added by:
commit c89b3458d8 ("powerpc/44x: Add USB DWC DTS entry to Canyonlands
board")
but without any driver support as the dwc2 driver wasn't available at
that time.
Note: The system can't use the generic "snps,dwc2" compatible
because of the special ahbcfg configuration. The default
GAHBCFG_HBSTLEN_INCR4 of snps,dwc2 can cause a system hang
when the USB and SATA is used concurrently.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Thierry Reding