The DT compiler is now warning about unit names with addresses but not
reg property. Fix all the gpio-key buttons which causes warnings.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
da850 has two I2C controllers, but the node for i2c1 was missing.
Add node for i2c1 controller and i2c1 pinmux pins.
Signed-off-by: Petr Kulhavy <petr@barix.com>
[nsekhar@ti.com: fix indentation]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
TI has been using the physical address in DT after the @ in device nodes.
The device tree convention is to use the same address that is used for
the reg property. This updates all davinci DT files to use the proper
convention.
Signed-off-by: David Lechner <david@lechnology.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The gpio node is missing the mandatory property #gpio-cells, which is
causing runtime errors when using GPIOs e.g. with gpio-leds or gpio-keys:
"could not get #gpio-cells for /soc/gpio@1e26000"
This fixes the problem and adds the missing parameter.
The value is 2 according to the gpio-davinci.txt binding.
Signed-off-by: Petr Kulhavy <petr@barix.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
as well as general display+hdmi support on rk3036. With the Analogix
DP support, Veyron Chromeboks can now finally use their internal
display.
Other than this big improvement we have thermal support on the rk3228,
a long time missing binding document for the General Register Files
block, better operating points for Veyron devices and a bunch of fixes
with parts stemming from warnings that new dtc version can generate.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJXDI8tAAoJEPOmecmc0R2BwksIAK/l/K03RwWzT20pc9UZIBPL
YevlAXKFa7io9Wju0gfGJOQNo+UAUQh6Rhcuf/J3odiDl2URoHqu1xIR+KOKWZrO
aD72VorCOcrPYck3BTyTLCtfG+zr8Q3t/i5f3ghitK5XdnW2MtE6SIjZ5x8Md+M8
6D4svbgLIh16/kq1XzjcQkf5c7sf7xSABhZEE8Xb7CuPmeBe/j6ORMMuUqIA0rJi
ZbW0+MyAiuAYD7vyQm/IiPk9nw12nnD+zjVg3Nz3YwmXYb4cNQfHdCJbjxezbw80
R96VS4OdAlOZocETi5GljC97fdAtTSBJXOogeK1/pXQfbQFlkWeDYzsF9l/oJYI=
=+WKk
-----END PGP SIGNATURE-----
Merge tag 'v4.7-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
A lot display-controller nodes for DSI and the Analogix DP on rk3288
as well as general display+hdmi support on rk3036. With the Analogix
DP support, Veyron Chromeboks can now finally use their internal
display.
Other than this big improvement we have thermal support on the rk3228,
a long time missing binding document for the General Register Files
block, better operating points for Veyron devices and a bunch of fixes
with parts stemming from warnings that new dtc version can generate.
* tag 'v4.7-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (27 commits)
ARM: dts: rockchip: move rk3036 memory definition to board files
ARM: dts: rockchip: enable the eDP on rk3288 veyron devices
ARM: dts: rockchip: simple panel and backlight supplies on veyron boards
ARM: dts: rockchip: override edp hpd handling on veyron-pinky and speedy
ARM: dts: rockchip: add rk3288-veyron-minnie backlight and panel settings
ARM: dts: rockchip: add rk3288-veyron-jaq backlight and panel overrides
ARM: dts: rockchip: add core rk3288-veyron backlight and panel nodes
ARM: dts: rockchip: add startup delay to rk3288-veyron panel-regulators
ARM: dts: rockchip: move edp-hpd pin definition into common location
ARM: dts: rockchip: add rk3288 displayport controller node
ARM: dts: rockchip: add rk3288 edp-phy node
ARM: dts: rockchip: add missing unitname to cpu_leakage efuse
ARM: dts: rockchip: drop unneeded properties from mipi node
ARM: dts: rockchip: clean up gpio-keys nodes
ARM: dts: rockchip: fix missing usbphy unit-names
ARM: dts: rockchip: fix rk3288 power-domain unit names
ARM: dts: rockchip: update rk3288-veyron cpu operating points
ARM: dts: rockchip: remove broken-cd from emmc and sdio
ARM: dts: rockchip: enable the tsadc for rk3228 evb
ARM: dts: rockchip: add the thermal main info found on rk3228
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Update SD/MMC node for Arria10
- Update Arria10 with clock and interrupt fields for DMA
- Remove 'phy-addr' from stmmac node
- Remove ethernet node from Cyclone5 DTSI
- Add LEDs/KEYs/SWs support on Sockit
- Add L2 and OCRAM EDAC dts entries
- Add reset control for USB
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXC/fUAAoJEBmUBAuBoyj0VsYP/3X4YaZ7zf/meoPi2xwJmzyf
a9PUslTJ1GAs5p+0b20UdwSX0BQHrDKIZvhQ53ThAGbS3mQPEtlDP8bjhAFspjYL
85FEvtLvS4HvMwopiUwHx+INnoL79KUnHMn1Y+A5QLAFq2vJe1frP2KnAiJX9HZr
a3f4Eix7fI8qpa2ixXK9GnUppAhFVDqZ0RuxgXewGvWGyPykLHnl63FvfNgCZx6L
s+8iGDMhsVwah9Kdv/OJielLeQqaQGeSE5+5t+YNszISyGatiwr2e/yx7//tjQwS
f8Y6ck1P2N8ncWwJX0PiJxo0ssrLkfhqJS3YlB0OLCE/IwC8hUFAxEnUonb70owR
jjpBzsPynARCdr3WuAu61FH2xGs4OfBryXUVhTIcB+XeNAcO5p+pBJu8pFA6PlM3
MQsu7AwfpPlUWwaRLagRd/o86rhwf31YkcHt2F9UYwjyYUeqNlZSoPgf8NvIYILo
f+qkV5mywWiZAtilT500byyWbivsEzjbjmpV4l+QMYvIYYbIwmPi2y78A/6l/ZKw
xon/OzcH4Jtu/u4Bc4GL3S1yFPDlf8KrL1So47BZy6/Y7XLxf0lfE/PtDA+k7Eq1
nUL4E6zf5KOAWizye0aDcMt4Sos9+7lxeHzu/CVPpgu4QXfk06fkVD5ePlZ72HBq
Bt2Z9KtLFusBEJTvB5hk
=gT7+
-----END PGP SIGNATURE-----
Merge tag 'socfpga_dts_for_v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.7
- Update SD/MMC node for Arria10
- Update Arria10 with clock and interrupt fields for DMA
- Remove 'phy-addr' from stmmac node
- Remove ethernet node from Cyclone5 DTSI
- Add LEDs/KEYs/SWs support on Sockit
- Add L2 and OCRAM EDAC dts entries
- Add reset control for USB
* tag 'socfpga_dts_for_v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: add reset control for USB
ARM: dts: socfpga: Add Altera Arria10 OCRAM EDAC devicetree entry
ARM: dts: socfpga: Add Altera Arria10 L2 Cache EDAC devicetree entry
ARM: dts: socfpga: Add support for HPS KEYs/SWs on SoCKit
ARM: dts: socfpga: Add support for HPS LEDs on SoCKit
ARM: dts: socfpga: Drop gmac0 from CV dtsi
ARM: dts: socfpga: Drop phy-addr OF property from CV dtsi
ARM: dts: socfpga: Add missing clock and interrupt fields for Arria10 DMA
ARM: dts: socfpga: add the clk-phase property for sd/mmc clock
ARM: dts: socfpga: add cap-sd-highspeed for SD/MMC node
Signed-off-by: Olof Johansson <olof@lixom.net>
- CREG clock controller
- Real Time Clock (RTC)
- Analog peripherals (ADC/DAC)
- Warning fixes for the new dtc compiler
With the CREG clock controller in place it is now possible
to enable the internal RTC on LPC18xx/43xx platforms. The
analog peripherals (ADC/DAC) has also been added here and
enabled on both the EA4357 dev kit and Hitex eval board.
In addition to the new entries there are a fixes for the
DT warnings generated by the new dtc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQEcBAABCAAGBQJXAs9CAAoJEF5zSH4+/j/a6ZoIAKxH1719KAQ7QBAvegmeQxvJ
qV9cp+zcg2mqbB8QtL1Bl0BH1E/BhjtI9lRia5tNe68z/reGePb7CSxC4aK5FfWs
BEIk8Io3VWCjq+ZMc88VHSa2uJo/v4mxV5Lc3LquiJYtBZnnvf0u8f1pAE9lR021
KgdkO0qWPeJUOEOghSZ4jwWTZBBtkxa+5WqOLwvM8lokFIHey0GBTcAIb77gOIqD
27oU0YCo83xCOLUBlUZMHpLiYjQZtSfROJdysEYu1rn5hrL16G3Bj0TkdWMyw5Wf
r5HC+qBBc2qqVK/CRZnYQFAOZlGUjrbMHdrjpzkILWYbsbV29XCymn4p/QDO6bo=
=Y9wO
-----END PGP SIGNATURE-----
Merge tag 'lpc18xx_dts_for_4.7' of https://github.com/manabian/linux-lpc into next/dt
Device Tree additions for LPC18xx platform
- CREG clock controller
- Real Time Clock (RTC)
- Analog peripherals (ADC/DAC)
- Warning fixes for the new dtc compiler
With the CREG clock controller in place it is now possible
to enable the internal RTC on LPC18xx/43xx platforms. The
analog peripherals (ADC/DAC) has also been added here and
enabled on both the EA4357 dev kit and Hitex eval board.
In addition to the new entries there are a fixes for the
DT warnings generated by the new dtc.
* tag 'lpc18xx_dts_for_4.7' of https://github.com/manabian/linux-lpc:
dt-bindings: phy-lpc18xx-usb-otg: remove unit address from binding
ARM: dts: lpc4350-hitex-eval: fix unit name warnings from dtc
ARM: dts: lpc4357-ea4357: fix unit name warnings from dtc
ARM: dts: lpc18xx: remove unit addresses from creg childs
ARM: dts: armv7-m: add unit name to interrupt-controller
ARM: dts: lpc4350-hitex-eval: add adc1
ARM: dts: lpc4357-ea4357: add dac
ARM: dts: lpc4357-ea4357: add adc0
ARM: dts: lpc18xx: add dac node
ARM: dts: lpc18xx: add adc nodes
ARM: dts: lpc18xx: add rtc node
ARM: dts: lpc18xx: add creg-clk node
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add CLCD panel nodes to PB1176 and PB11MPCore
- Add a DT binding blurb for the Versatile IB2 syscon
- Add DTS files for the (QEMU supported) RealView EB
boards in all variants.
- Add DTS files for the (QEMU supported) RealView PBA8
and PBX-A9 board variants.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXAi1uAAoJEEEQszewGV1zrkkP/jdZuJXWIwf4Xa3lVFKtV1kq
oX47F+TJ8eelfE4YGzSV5VG/hWDJHwy74nqI2VTPf/kfbyn6A7ZZyZGa/5lcqIL5
7RkwUS5txxZKLdQmri2HjEBYQTZZGVZW4s6/7do4nHdqjtTrtoRkQd7SRqN9+Mgh
NIwUjg3WecP4u/W4S/iQWnj3UxCOvQrKPEPb+2eeKW98gfmFwD6vZ/ck1CTh3pTe
eSpdrPuipKAlmoSKnG6kpejdlJUyBcCkY4egD9BlFpiG2H7eoS+vK0VfGYwpLr6v
Xi/qZwMOxbbdXnBalIVVN1MFtNjeBJABdmwA5QDvKWfIp/TRORwvxog2j4Dm4oE/
JmsE+0Gab8TV8o2WBR78WS7fz68rnVvBAL35twi9eoveM9sNmKoEL+EybwtNKXj+
7FcnWh6RPoRPh9XroNKuRpQNaH/MYzgJ1VNFafHUA7TxjcqqCVaIsp21CaF6LERu
hiLhY/V3JlLDE7h0i23HwnIY5K2w7QyzBBXVZKkJ5F14vHvfdWX0htj50ykatcCo
ic4EZMgd2gbTMF2K3IYXdDI+dlklhTM9TudkZTnnG4/6nnPhsn9vKfDAfBsFECP6
TGZazkyCM6ExNzIgaRp+SC7/L2pnot7NHyjyqiUfmYvuesxeWV3391569a/2bGil
2dwxNOoQV09pLItGPDUg
=3eW6
-----END PGP SIGNATURE-----
Merge tag 'versatile-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt
Versatile DTS changes, baseline for the v4.7 series:
- Add CLCD panel nodes to PB1176 and PB11MPCore
- Add a DT binding blurb for the Versatile IB2 syscon
- Add DTS files for the (QEMU supported) RealView EB
boards in all variants.
- Add DTS files for the (QEMU supported) RealView PBA8
and PBX-A9 board variants.
* tag 'versatile-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: realview: DT support for the PBA8 and PBX-A9
ARM: dts: realview: support all the RealView EB board variants
ARM: dts: realview: PB1176: define a standard VGA panel
ARM: dts: realview: PB11MPCore: define a standard VGA panel
Documentation/DT: add blurb for IB2 syscon to Versatile
Signed-off-by: Olof Johansson <olof@lixom.net>
USB1 controller is hardwired to be used as Host only port so
we don't need to check ID pin state and can get rid of extcon_usb1.
This also reduces USB1 controller's and so eSATA power's dependency
with EXTCON. This fixes eSATA port with multi_v7_defconfig.
Cc: Franklin S Cooper Jr. <fcooper@ti.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Tested-by: Franklin S Cooper Jr. <fcooper@ti.com>
[tony@atomide.com: updated to describe what it fixes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch updates the GPMC's DT DMA property to reflect the updated eDMA
bindings.
Fixes: cce1ee0001 ("ARM: DTS: am437x: Use the new DT bindings for the eDMA3")
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch updates the GPMC's DT DMA property to reflect the updated eDMA
bindings.
Fixes: b5e5090660 ("ARM: DTS: am33xx: Use the new DT bindings for the eDMA3")
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
clkout1 clock node and its generation tree was missing. Add this based
on the data on TRM and PRCM functional spec.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are few devices that have USB power controlled using GPIO. Linux
USB host driver (bcma-hcd) already supports this by reading vcc-gpio
from DT. Set it properly for all known devices.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit adds definition for cpu_on, cpu_off and cpu_suspend commands.
These definitions must match the corresponding PSCI definitions in
boot monitor.
Having those command and corresponding PSCI support in boot monitor allows
run time CPU hot plugin.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add aliases for SPI nodes, this is required to probe the SPI devices in
U-Boot.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
As reported in [1], rename the k2* dts files to keystone-* files
this will force consistency throughout.
Script for the same (and hand modified for Makefile and MAINTAINERS
files):
for i in arch/arm/boot/dts/k2*
do
b=`basename $i`;
git mv $i arch/arm/boot/dts/keystone-$b;
sed -i -e "s/$b/keystone-$b/g" arch/arm/boot/dts/*[si]
done
NOTE: bootloaders that depend on older dtb names will need to be
updated as well.
[1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2
Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The DCU IP has distinct clock inputs for register access and the
pixel clocks, at least in some implementations. LS1021a seems to
use the same clock, therefore specify the same clock for "dcu"
and "pix".
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Both DSPI have signals SPIn_PCS[0:5] so in summary 6 chip-selects, not 5.
Fix that.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add gpio nodes for ls1021a platform dts file. The gpio
IP block of the ls1021a can be supported by the code
drivers/gpio/gpio-mpc8xxx.c.
The compatible "fsl,qoriq-gpio" is used by gpio driver:
drivers/gpio/gpio-mpc8xxx.c to implement general gpio
functionalities.
The chip-specific compatible "fsl,ls1021a-gpio" may be
used to fix potential gpio IP block errata or other
chip-specific gpio issues.
Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The vqmmc supply is not connected to bio supply on the BA16 module.
Hence remove vqmmc-supply property in usdhc3 node.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add SCFG MSI dts node and add msi-parent property to PCIe dts node
that points to the corresponding MSI node.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Tested-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to Documentation/devicetree/bindings/net/fsl-fec.txt the polarity
of "phy-reset-gpios" is assumed to be active-low unless a separate property
"phy-reset-active-high" is available. So replace the inconsistent polarity
description to make the correct active-low reset behavior more obvious.
Signed-off-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit adds support for Rev. B of a Zodiac Inflight Innovations
development board, mainly intended for DSA and ARINC 429 development
work.
Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add missing reg properties to AIPS bus and Cortex-A5's PMU unit.
This change avoids the following warnings:
Warning (unit_address_vs_reg): Node /soc/aips-bus@40000000 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@40080000 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@40080000/pmu@40089000
has a unit name, but no reg property
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The NAND flash memory populated on Colibri VF61 allows faster NAND
timings than the flash memory on VF50. Additionally, due to divider
limitations, VF61 did clock the flash even slower than VF50. Assign
the NFC clock in the module specific device trees vf500-colibri.dtsi
and vf610-colibri.dtsi respectively.
This increases raw read speed on Colibri VF61 by about 20%.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Vybrid based Colibri modules provide a on-module PHY which is
connected to the second FEC instance FEC1. Since the on-module
Ethernet port is considered as primary ethernet interface, alias
fec1 as ethernet0. This also makes sure that the first MAC address
provided by the boot loader gets assigned to the FEC instance used
for the on-module PHY.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Introduce imx6sx-sdb-sai.dts so that it is possible to use the
SAI interface.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Property 'dma-source' is not used anywhere, nor it is documented, so
let's just get rid of it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to sdma_peripheral_type in include/linux/platform_data/dma-imx.h
IMX_DMATYPE_SAI corresponds to index 24, so fix it accordingly.
Suggested-by: Zidan Wang <zidan.wang@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
pwm2 is provided on the BA16 Q7 module, but is not used on any
of the current configurations. However, future platforms may
utilize this device, so we are simply disabling the node rather
than removing it completely.
Signed-off-by: Justin Waters <justin.waters@timeys.com>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is preferred to use the panel compatible string rather than passing the
LCD timings in the device tree.
So pass the "hannstar,hsd100pxn1" compatible string to describe
the LVDS panel on this board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This baseboard can be used with all TX6 SoMs, but only a certain set
of combinations can be ordered by default. Add support for these
combinations in mainline, so that users can easily adopt their own
combination of SoM and baseboard themselves.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the following i.MX6 based modules from Ka-Ro
electronics GmbH:
TX6S-8034:
Processor Freescale i.MX 6 Solo, 800MHz
RAM 256MiB DDR3 SDRAM
ROM 128MiB NAND Flash
Power supply Single 3.1V to 5.5V
Size 31mm SO-DIMM
Temp. Range industrial grade (-40°C/-25°C to 105°C Tj)
TX6S-8035:
Processor Freescale i.MX 6 Solo, 800MHz
RAM 512MiB DDR3 SDRAM
ROM 4GiB eMMC
Power supply Single 3.1V to 5.5V
Size 31mm SO-DIMM
Temp. Range industrial grade (-40°C/-25°C to 105°C Tj)
TX6U-8033:
Processor Freescale i.MX 6 Dual Lite, 800MHz
RAM 1GiB DDR3 SDRAM
ROM 4GiB eMMC
Power supply Single 3.1V to 5.5V
Size 31mm SO-DIMM
Temp. Range industrial grade (-40°C/-25°C to 105°C Tj)
TX6Q-1036:
Processor Freescale i.MX 6Quad, 1GHz
RAM 1GB DDR3 SDRAM 64-bit
ROM 8GiB eMMC
Power supply Single 3.1V to 5.5V
Size 31mm SO-DIMM
Temp. Range Extended Consumer Grade (-20°C to 105°C Tj)
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add missing pinctrl for the RTS/CTS lines to uart1 and set the
fsl,uart-has-rtscts property on all UARTs to enable support for HW
handshake.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the pinctrl setting for the board LED from the hoggrp node
to a separate node referenced by the LED driver, so that the pin is
free to be used for different purpose when the LED driver is disabled.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
DT maintainers don't like the 'simple-bus' container around the
regulator nodes. So remove it.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Based on i.MX6 Quad Plus with 4GB of RAM.
https://boundarydevices.com/product/nitrogen6max/
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add mdio node and an appropriate PHY configuration to enable use of
the PHY interrupt for link status changes.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove the function node around the pinctrl nodes that was obsoleted
by commit 5fcdf6a7ed ("pinctrl: imx: Allow parsing DT without
function nodes"), we can save this container node.
Also move the iomux node to the bottom of the file to improve
readability of the file.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The spidev driver doesn't like to be instantiated via a naked 'spidev'
compatible, though it is very convenient to invoke it this way without
a dedicated SPI device for basic functional testing.
Disable the spi node by default to silence the WARN_ON() from the
spidev driver, but leave the configuration intact otherwise.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add an empty line between properties and subnode in the clocks node.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
GPLv2-only devicetrees make reuse difficult for software components
licensed under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary
uses, so relicense the imx6*-tx6* files to this combination.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
With SION set the level on such a pin is reported to the UART. So for
example when the CS5 pin is configured for GPIO mode and the level
changes this triggers an RTS interrupt on uart5.
Adding some severity to this issue: The imx uart driver currently
doesn't handle correctly irqs for changes on RI and DCD which are
enabled automatically when the respective UART is driven in DTE mode
(that is, has the fsl,dte-mode property set in the device tree). This
results in a stuck machine because the irq isn't cleared and so stalls
the CPU.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Apart from a few additions this also contains two fixes where the daisy
chain input selection register was missing. Moreover dropped _MUX from
some pins for consistency.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Utilize the new PCIe Tx configuration to properly support the correct
values.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The TXUL-0010/-0011 modules are Computers On Module manufactured by
Ka-Ro electronics GmbH with the following characteristics:
Processor Freescale i.MX 6UltraLite MCIMX6G2, 528 MHz
RAM 256MB 16-bit DDR3 SDRAM
ROM 128MB NAND Flash (TXUL-0010) / 4GB eMMC (TXUL-0011)
Power supply Single 3.3 to 5V
Size 26mm SO-DIMM
Temp. Range -40°C to 85°C
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable dcu node which is used by the DCU DRM driver. Assign the 5.7"
EDT panel with VGA resolution which Toradex sells often with the
evaluation board.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the dcu and tcon nodes to enable the Display Controller Unit
and Timing Controller in Vybrid's SoC level device-tree file.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Based on i.MX7 Dual with 1GB of RAM.
https://boundarydevices.com/product/nitrogen7/
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the device nodes for the i.MX7 FlexCAN buses.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the device node for the i.MX7 eLCDIF interface.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix following DTC warnings in SMDKv210 board:
Warning (unit_address_vs_reg): Node /soc/fimd@f8000000/display-timings/timing@0 has a unit name, but no reg property
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Fix following DTC warnings in Exynos5440 boards:
Warning (unit_address_vs_reg): Node /pinctrl has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /rtc has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Fix following DTC warnings in Exynos5420 SMDK5420:
Warning (unit_address_vs_reg): Node /dp-controller@145B0000/display-timings/timing@0 has a unit name, but no reg property
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Fix following DTC warnings in Exynos5420 Peach Pit:
Warning (unit_address_vs_reg): Node /dp-controller@145B0000/ports/port@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c@12CD0000/lvds-bridge@48/ports/port@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c@12CD0000/lvds-bridge@48/ports/port@1 has a unit name, but no reg property
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Fix following DTC warnings in all Exynos542x/5800 boards:
Warning (unit_address_vs_reg): Node /video-phy@10040728 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /video-phy@10040714 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /usb@12000000 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /usb@12000000/dwc3 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /usb@12400000 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /usb@12400000/dwc3 has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Fix following DTC warnings in all Exynos5250 boards:
Warning (unit_address_vs_reg): Node /dp-controller@145B0000/display-timings/timing@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /usb@12000000 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /usb@12000000/dwc3 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /hdmi has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /mixer has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /video-phy@10040720 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /fixed-regulator@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /fixed-regulator@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /fixed-regulator@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c@12C70000/trackpad has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /i2c@12CD0000/lvds-bridge@20/ports/port@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c@12CD0000/lvds-bridge@20/ports/port@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c-arbitrator/i2c@0/embedded-controller has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /i2c-arbitrator/i2c@0/power-regulator has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /i2c@12CA0000/embedded-controller has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Fix following DTC warnings in Exynos4x12 boards:
Warning (unit_address_vs_reg): Node /camera/fimc-is@12000000/pmu has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Fix following DTC warnings in Trats2 board:
Warning (unit_address_vs_reg): Node /i2c-gpio-1/max77693@66/regulators/ESAFEOUT1@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c-gpio-1/max77693@66/regulators/ESAFEOUT2@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c-gpio-1/max77693@66/regulators/CHARGER@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /thermistor-ap@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /thermistor-battery@1 has a unit name, but no reg property
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Fix following DTC warnings in all Exynos4 boards:
Warning (unit_address_vs_reg): Node /soc/video-phy@10020710 has a unit name, but no reg property
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Fix following DTC warnings in Exynos3250 boards:
Warning (unit_address_vs_reg): Node /soc/video-phy@10020710 has a unit name, but no reg property
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Fix following DTC warnings in cros-adc-thermistors:
Warning (unit_address_vs_reg): Node /adc@12D10000/ncp15wb473@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /adc@12D10000/ncp15wb473@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /adc@12D10000/ncp15wb473@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /adc@12D10000/ncp15wb473@6 has a unit name, but no reg property
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Add vmmc and vqmmc supplies from MF circuit sheets for eMMC and SD on
odroid XU3 and XU4 to avoid warnings:
dwmmc_exynos 12200000.mmc: Looking up vmmc-supply property in node /mmc@12200000 failed
Also remove their always_on properties so the regulators could be
disabled when not used.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Merge necessary new clocks from Sylwester (used by new board) and add support
for Exynos3250-based Artik5 board.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXDgugAAoJEME3ZuaGi4PX8JIP/0UmBC5FLJLgzFRgzVcGvwjS
nzLRcIqwQ7i/ztT3r3kUndjrHLQAqWRynrNdq0w+W+DYGVEYEToBfVbqdVezJ9i+
XgfeXvUU/k+4aZHpsrcl6ZST7MD6UQn9qSLB1R3Y4zHVw68gldNPMtDNpyrQJutu
440+vd5fKZxmcEx8exAIon4AEnPXsDkom2YQTd4NfeKmVHxsfJsv3Irj3DcRrcYV
StCp7n1UhZmEP3pAhOhyGx6XmU/Qrl4iYZtSwpmDC5PwAt8dHQ8b4Z/N+uP8Ghas
jCaNTA+z9mKdTyNNdLAefWeIddhCTp1eAdzoV5znBAIDjpGBqZjWKbq77v1m2NqU
jSmY+m/UpexNnC5b5eYJbjU+l85VhXECog3qjCUjuJtj+nib95icYM536WhTzhRf
ZEZ/NZyU5ReO10bTYr+YTb4O/iz+SMzfghGvs2HXpVk4X89utG7HUqcYg6zCQIWz
4sL8JGAhq1bmzzgnS+8km2ZpRD6gmssB+2tG16nJk0tJFplHzU9Wr46Q/ttMeg9I
d2GK/sE9EFooQH+fqoQmi1aNKb3fEJlUIvqpxfTeFbhnRpOCCfaIq+U9bmg9JxdG
HuZuEO0ClNFyQN8TBUNmzZL5XzYGPUksbVWyVc4VuZ0PNEXLeMsyzCUmgrLEPQEU
EzgObFNrzaouu8QN3rii
=mQfO
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-exynos3250-artik5-4.7' into next/dt
Topic branch for Device Tree changes for Exynos 3250 for v4.7:
Merge necessary new clocks from Sylwester (used by new board) and add support
for Exynos3250-based Artik5 board.
On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.
For NAND we don't use GPMC wait pin monitoring but
get the NAND Ready/Busy# status using GPIOlib.
GPMC driver provides the WAIT0 pin status over GPIOlib.
Read speed increases from 13212 KiB/ to 15753 KiB/s
and write speed was unchanged at 4404 KiB/s.
Measured using mtd_speedtest.ko on omap3-beagle-c4.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.
For NAND we don't use GPMC wait pin monitoring but
get the NAND Ready/Busy# status using GPIOlib.
GPMC driver provides the WAIT0 pin status over GPIOlib.
Read speed increases from 7869 KiB/ to 8875 KiB/s
and write speed was unchanged at 5100 KiB/s.
Measured using mtd_speedtest.ko on am335x-evm.
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.
For NAND we don't use GPMC wait pin monitoring but
get the NAND Ready/Busy# status using GPIOlib.
GPMC driver provides the WAIT0 pin status over GPIOlib.
Read speed increases from 16516 KiB/ to 18813 KiB/s
and write speed was unchanged at 9941 KiB/s.
Measured using mtd_speedtest.ko.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.
Read speed increases from 13768 KiB/ to 17246 KiB/s.
Write speed was unchanged at 7123 KiB/s.
Measured using mtd_speedtest.ko.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPMC driver provides GPI support for the GPMC_WAIT pins.
Mark it gpio controller capable.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPMC driver provides GPI support for the GPMC_WAIT pins.
Mark it gpio controller capable.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPMC driver provides GPI support for the GPMC_WAIT pins.
Mark it gpio controller capable.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPMC driver provides GPI support for the GPMC_WAIT pins.
Mark it gpio controller capable.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPMC driver provides GPI support for the GPMC_WAIT pins.
Mark it gpio controller capable.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPMC driver provides GPI support for the GPMC_WAIT pins.
Mark it gpio controller capable.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPMC driver provides interrupts and gpio for the GPMC_WAIT pins.
Mark it as gpio and interrupt capable.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPMC driver provides interrupts and gpio for the GPMC_WAIT pins.
Mark it as gpio and interrupt capable.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPMC driver provides interrupts and gpio for the GPMC_WAIT pins.
Mark it as gpio and interrupt capable.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds support for turning off the main power supply via the TWL6030 on the
Kindle Fire (first generation).
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds support for the Kindle Fire (first generation) power button LEDs, that
are wired to the TWL6030 PWM outputs.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds support for USB OTG on the Kindle Fire (first generation).
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Amazon Kindle Fire (first generation) codename kc1 is a tablet that was
released by Amazon back in 2011. It is using an OMAP4430 SoC GP version.
This adds devicetree support for the device, with only a few basic features
supported, such as debug uart, i2c and internal emmc.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Before "tty: Add software emulated RS485 support for 8250" patch Baltos devices
relied on MCTRL_GPIO framework to handle both modem signals and RS485 mode.
With emulated RS485 support for 8250 we can now use these pins as dedicated
RTS/CTS signals taking advantage of hardware flow control etc. when operating
in RS232 mode.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The AM572x-IDK board is a board based on TI's AM5728 SOC
which has a dual core 1.5GHz A15 processor. This board is a
development platform for the Industrial market with:
- 2GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI,
- PRU-ICSS
- uSD
- 16GB eMMC
- CAN
- RS-485
- PCIe
- USB3.0
- Video Input Port
- Industrial IO port and expansion connector
The link to the data sheet and TRM can be found here:
http://www.ti.com/product/AM5728
This patch creates a common dtsi file that will provide a common board
dtsi file to define the nodes that are common to AM57xx (including the
upcoming AM5718) IDK boards.
Initial support is only for basic peripherals
Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
TI's Industrial Communication Engine EVM is a low cost hardware mainly
developed for industrial communication type applications using serial
or Ethernet based interfaces. This platform features TI's AM3359 with
800MHz single core Cortex-A8 processor, 256MB DDR3, 64MB SPI flash,
8MB NOR Flash, mmc, usb, can, dual Ethernet ports.
For more information, look at HW user guide[1], Data manual[2].
Just add basic support for the moment.
[1] http://processors.wiki.ti.com/index.php/AM335x_Industrial_Communication_Engine_EVM_Rev2_1_HW_User_Guide
[2] http://www.ti.com/lit/ds/symlink/am3359.pdf
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When possible generic node names should be used. So change the node name
from ehrpwm to pwm.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The binding definition for the PCF857x GPIO expanders doesn't mention
a "ti,pcf8575" compatible string. This is apparently because TI is
only a second source - there is no functional difference between
PCF8575 chips manufactured by TI and NXP, and the same board might be
populated with either depending on availability.
This is not a problem in practice because the I2C core uses
of_modalias_node() before matching drivers and this strips the
manufacturer name.
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Filip Matijević <filip.matijevic.pz@gmail.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Filip Matijević <filip.matijevic.pz@gmail.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Like the Nokia N900, the N950 has leds to show
the state of sys_clkreq and sys_off_mode pins.
A detailed description for the LEDs and
OMAP's sleep states can be found in Tony's
commit for the Nokia N900:
c1be2032f6
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add keypad matrix information based on data from
Nokia N950 Kernel.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add regulator configuration as found in the
board files of Nokia's kernel.
Signed-off-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The switch configuration for NAND is actually the other way round.
Also mention ON/OFF states as that is more natural to understand
(without the help of schematics) when compared to HIGH/LOW.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Few regulators information were missing from DT. Add those
missing regulators.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- fix USB adress register for Linksys Armada 388 based boards
- fix build warning in mvebu-mbus
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlcGmgAACgkQCwYYjhRyO9WmLACgkLHkRxw3Xmp5/g3tSgBzh06A
Qb4An2adegesOnsQzbVwWeaCaJxdEbk/
=sMxU
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.6-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 4.6 (part 1)
- fix USB adress register for Linksys Armada 388 based boards
- fix build warning in mvebu-mbus
* tag 'mvebu-fixes-4.6-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Correct unit address for linksys
bus: mvebu-mbus: use %pa to print phys_addr_t
Signed-off-by: Olof Johansson <olof@lixom.net>
SoCs with few board fixes and a fix for a long time hwmod bug:
- Fix cpsw_emac0 link type for baltos-ir5221
- Fix interrupt type for TWD
- Fix edma memcpy channel allocation for am43x
- Fix am43x-epos sycntimer32k by using the correct assigned clock
- Fix interconnect barrier for dra7
- Fix a long time hwmod bug for updating sysconfig register properly
- Fix flakey booting on dm814x where USB reset needs a delay
And there is one minor change that is not strictly a fix, but is
good to have for proper hardware detection:
- Detect dra7 silicon revision 2.0 properly
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW/pp4AAoJEBvUPslcq6VzqQgP/RjKTIdwRnpjUryPwxwMwQ52
gt9GjqMKvS3IvRyFewsjgTtoB/7l14qz3cVzurYeov+PekbqxnIJG1tVzltGVHQX
WO13hzSV+Nuaf/4yFCCOcWSVtC4+26DvUCljfcUuxKiAsoXHrAIJJClHTtzqkXWK
oJ5vipMKe166s7ULB9yKLoqU0wWBSsTqPK2IVjqdyF+eBcyy0BitJBembzWS6c8C
FqhX3QOkU8PnzmUcJlVzqchA8ES7Cp2cgGnRcdFUV7A8gdBQrDDfAdJwb+CXhSYN
3Csd++gcU/J3N8Rsbdv1mOVaHjQ+SVk22iWGT9z6FDBzg+S3thknCpDpP9qipV+i
vV1LsCydKRVvXJO3SN5Pykhdwmod5zw/FSPe+0xyVsk3zxe8jzF3TKWkIeS43POA
6e6DdhFfxI6u5BQydohOoMwDd/SzRQxA6IxZxpresDWeoE3Ffu4/ZyIhcUsZfcSK
0kVEc+ayQQnLfN5P1jQ5gWvxWXvQ/p7DBfnDL+kfyShjFHJo5ZO51IVr1rNfdIQc
fvtklMI82E4lf3qsRtHxrfPUuigWJcslfoQEJ7B3NVyXP7VXmB2iuKRUEI8QuvU4
AxXwp5qmKVvnUoXNIsX9PGL9FLTokAFJ8YWPvjFOIIHP0JphZ/AEMhgVwbW7Ze6/
VGjsmATRQqXSYqavc4No
=5fhs
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.6/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps against v4.6-rc1. Mostly minor fixes for the newer
SoCs with few board fixes and a fix for a long time hwmod bug:
- Fix cpsw_emac0 link type for baltos-ir5221
- Fix interrupt type for TWD
- Fix edma memcpy channel allocation for am43x
- Fix am43x-epos sycntimer32k by using the correct assigned clock
- Fix interconnect barrier for dra7
- Fix a long time hwmod bug for updating sysconfig register properly
- Fix flakey booting on dm814x where USB reset needs a delay
And there is one minor change that is not strictly a fix, but is
good to have for proper hardware detection:
- Detect dra7 silicon revision 2.0 properly
* tag 'omap-for-v4.6/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-baltos-ir5221: fix cpsw_emac0 link type
ARM: OMAP: Correct interrupt type for ARM TWD
ARM: DRA722: Add ID detect for Silicon Rev 2.0
ARM: dts: am43xx: fix edma memcpy channel allocation
ARM: dts: AM43x-epos: Fix clk parent for synctimer
ARM: OMAP2: Fix up interconnect barrier initialization for DRA7
ARM: OMAP2+: hwmod: Fix updating of sysconfig register
ARM: OMAP2+: Use srst_udelay for USB on dm814x
Signed-off-by: Olof Johansson <olof@lixom.net>
The ARM TWD interrupt is a private peripheral interrupt (PPI) and per
the ARM GIC documentation, whether the type for PPIs can be set is
IMPLEMENTATION DEFINED. For Tegra20/30 devices the PPI type cannot be
set and so when we attempt to set the type for the ARM TWD interrupt it
fails. This has gone unnoticed because it fails silently and because we
cannot re-configure the type it has had no impact. Nevertheless fix the
type for the TWD interrupt so that it matches the hardware configuration.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
For Tegra boards, the device-tree alias serial0 is used for the console
and so add the stdout-path information so that the console no longer
needs to be passed via the kernel boot parameters.
This has been tested on boards, tegra20-trimslice, tegra30-beaver,
tegra114-dalmore and tegra124-jetson-tk1.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Though the keyboard and other driver will continue to support the legacy
"gpio-key,wakeup", "nvidia,wakeup-source" boolean property to enable the
wakeup source, "wakeup-source" is the new standard binding.
This patch replaces all the legacy wakeup properties with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Watchdog support was added to the timer block with Tegra30. Tegra20 did
not have this yet. However, the Tegra114 and Tegra124 DTSI files had an
entry in the compatible string list for "nvidia,tegra20-timer", but not
for "nvidia,tegra30-timer", which is why watchdog support isn't enabled
on them.
Fix this by adding an entry for "nvidia,tegra30-timer" to the compatible
string list of the timer block on Tegra114 and Tegra124.
This allows the watchdog to work on Jetson TK1.
Signed-off-by: Maarten Lankhorst <dev@mblankhorst.nl>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch enables the APB DMA high speed UARTs of the Jetson TK1. So
far, they were only enabled in NVidia's official BSP.
Those additional UARTs are exposed on the expansion connector J3A2:
UART1:
Pin 41: BR_UART1_TXD
Pin 44: BR_UART1_RXD
UART2:
Pin 65: UART2_RXD
Pin 68: UART2_TXD
Pin 71: UART2_CTS_L
Pin 74: UART2_RTS_L
Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The comment about the 8250 vs. APB DMA-enabled UART devices that was
added for Tegra20 and Tegra30 in commit b6551bb933 ("ARM: tegra: dts:
add aliases and DMA requestor for serial controller") introduced a typo
that has since spread to various other DTS include files. Fix all
occurrences of this typo.
Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
[treding@nvidia.com: amend subject, add commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the DT node for Timer12 present on DRA7 family of
SoCs. Timer12 is present in PD_WKUPAON power domain, and
has the same capabilities as the other timers, except for
the fact that it serves as a secure timer on HS devices
and is clocked only from the secure 32K clock.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Timers 13 through 16 have been added previously in
disabled state. These timers are common timers that are
present on all DRA7 family of SoCs, so enable these
devices by default like the rest of the DMTimers.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add nodes to represent all McASP ports in the dra7 family.
For system consistency use the eDMA for audio operations. sDMA would be
fine for 4/5/6/7/8 since their DAT port is not through L3 interconnect.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
rename the mcasp8_ahclk_mux to mcasp8_ahclkx_mux.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[tony@atomide.com: updated for the unit offsets]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since we switched to use eDMA we can now safely enable the FIFO in McASP.
This will reduce the chance of McASP level under/overflow.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The assigned-clock* needs to be in the root of the device's node. If it is
in the sub-node the CCF will ignore it.
Since the clkout2 is used by the codec as MCLK, move the clock parent
selection to that node.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since we switched to use eDMA we can now safely enable the FIFO in McASP.
This will reduce the chance of McASP level under/overflow.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since we switched to use eDMA we can now safely enable the FIFO in McASP.
This will reduce the chance of McASP level under/overflow.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
McASP3 does not support constant addressing mode on the DAT
port, so increment transfers must be used instead. This
restriction is also applicable for McASP1 and McASP2.
This DMA addressing constraint poses a major problem for sDMA
where constant addressing mode is used on the peripheral side.
Unfortunately, using increment transfers in sDMA comes with
important side effects.
The addressing mode used in eDMA is INC, so the silicon limitation
described above has no impact and the McASP3 DAT port can be
safely added by switching to eDMA instead of sDMA.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 family has eDMA available along with the sDMA and in some cases it is
better suited for servicing peripherals.
Add the needed nodes for eDMA to be usable:
edma-tpcc, edma-tptc0/1 and the edma-xbar.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Move the sDMA xbar nodes under the L4 interconnect node.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the device tree entries needed to support the Altera On-Chip
RAM EDAC on the Arria10 chip.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Add the device tree entries needed to support the Altera L2
cache EDAC on the Arria10 chip.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Add support for the keys and flip-switches on the SoCFPGA SoCkit board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Add support for the blue LEDs on the SoCFPGA SoCkit board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The socfpga_cyclone5.dtsi is included by all DTS files which describe boards
using the Cyclone V SoC. The Cyclone V SoC has two ethernet controllers and
different boards use none, one or both of them.
The /soc/ethernet@ff702000/{} node in socfpga_cyclone5.dtsi unconditionaly
enabled gmac0 interface, which is clearly wrong for those boards which use
gmac1 interface instead.
This patch removes the entire /soc/ethernet@ff702000/{} node from the
socfpga_cyclone5.dtsi file. This is correct, since all of the board which
include this file also have correct gmac0 or gmac1 node present in them.
Minor correction had to be done to EBV SoCrates, which didn't define PHY
mode explicitly, but inherited it from the socfpga_cyclone5.dtsi .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The phy-addr property of stmmac is deprecated and the stmmac driver
does not use it either. On the contrary, the driver will warn if
this property is defined. Remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The PL330 DMA driver will not load on Arria10 without devicetree entries
for clocks and clock_names. This patch adds those entries. It also adds
the ninth interrupt, which is required for error detection.
Signed-off-by: Graham Moore <grmoore@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Upcoming change to DT compiler is going to complain about nodes
which have a reg property, but have not defined the address in their
name. This patch fixes following type of warnings for OMAP5 clock nodes:
Warning (unit_address_vs_reg): Node /ocp/cm@48004000/clocks/dpll3_m2_ck
has a reg or ranges property, but no unit name
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Upcoming change to DT compiler is going to complain about nodes
which have a reg property, but have not defined the address in their
name. This patch fixes following type of warnings for DRA7 clock nodes:
Warning (unit_address_vs_reg): Node /ocp/cm@48004000/clocks/dpll3_m2_ck
has a reg or ranges property, but no unit name
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Upcoming change to DT compiler is going to complain about nodes
which have a reg property, but have not defined the address in their
name. This patch fixes following type of warnings for DM81x clock nodes:
Warning (unit_address_vs_reg): Node /ocp/cm@48004000/clocks/dpll3_m2_ck
has a reg or ranges property, but no unit name
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Upcoming change to DT compiler is going to complain about nodes
which have a reg property, but have not defined the address in their
name. This patch fixes following type of warnings for AM43xx clock nodes:
Warning (unit_address_vs_reg): Node /ocp/cm@48004000/clocks/dpll3_m2_ck
has a reg or ranges property, but no unit name
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Upcoming change to DT compiler is going to complain about nodes
which have a reg property, but have not defined the address in their
name. This patch fixes following type of warnings for AM33xx clock nodes:
Warning (unit_address_vs_reg): Node /ocp/cm@48004000/clocks/dpll3_m2_ck
has a reg or ranges property, but no unit name
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Upcoming change to DT compiler is going to complain about nodes
which have a reg property, but have not defined the address in their
name. This patch fixes following type of warnings for OMAP4 clock nodes:
Warning (unit_address_vs_reg): Node /ocp/cm@48004000/clocks/dpll3_m2_ck
has a reg or ranges property, but no unit name
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Upcoming change to DT compiler is going to complain about nodes
which have a reg property, but have not defined the address in their
name. This patch fixes following type of warnings for OMAP2 clock nodes:
Warning (unit_address_vs_reg): Node /ocp/cm@48004000/clocks/dpll3_m2_ck
has a reg or ranges property, but no unit name
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Upcoming change to DT compiler is going to complain about nodes
which have a reg property, but have not defined the address in their
name. This patch fixes following type of warnings for OMAP3 clock nodes:
Warning (unit_address_vs_reg): Node /ocp/cm@48004000/clocks/dpll3_m2_ck
has a reg or ranges property, but no unit name
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"bandgap has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warning:
"sound@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"pmu has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"i2c@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"pbias_regulator has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The CIU clock for the SD/MMC should be the sdmmc_clk and not the
sdmmc_free_clk. Also, add the correct phase shift the sdmmc_clk.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The Orange Pi One SBC, is a stripped down version of the popular
Orange Pi PC. The one is a H3 based SBC, with 512M of RAM,
micro-sd slot, 1 host usb, 1 otg usb, hdmi and 100Mbit ethernet.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source.
Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external
crystal is not enabled at power up. Instead the CPU falls back to using
an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually
20MHz on boards so far (which gives an emulated frequency of 32.786KHz)
Modelling the same in device tree.
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The amount of available memory is clearly a board-specific value, so
the core per-soc dtsi should not define a default of any sort.
Therefore move the memory-nodes to the two board files.
Also fix the amount of memory on Kylin (512MB instead of 1GB).
While in most cases the bootloader will override this with the
actual amount of memory, there is no need to keep known wrong values
in the board-dts.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
After hooking up panel and backlight informations, enable the
edp on veyron chromebooks now.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
Jerry and Speedy don't need any special handling wrt the backlight or
panel, so only need their backlight and panel-regulators hooked up.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
Pinky boards don't have the hotplug pin connected. So remove the
hotplug pinctrl setting and enable the force-hpd option, to allow
them to find the display too.
While on speedy boards, the hotplug pin is connected, judging by comments
in a chromeos change it seems the "panels HPD voltage is too low to be
detected", so it also needs the forced hotplug, as we of course also know
that a display is connected.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
The pwm for Minnie's backlight needs to be above 1%, so adapt the start
of non-zero brightness accordingly. Minnie is also using a different
panel, so re-set the compatible property.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
The panel which jaq uses requires the pwm duty cycle larger than 3%,
when the backlight status from power off to power on, otherwise the
backlight will flush, so we modify the second brightness-level to 8,
and when the backlight from power off to power on the pwm duty cycle
will larger than 3%.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
Many Veyron chromebooks share the same panel type, so define the core
settings for all of them and allow the few runaways to override it later.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
The panels need a bit of time to actually turn on. If this isn't
observed, this results in problems when trying talk to the panels
and thus produces detection errors. 100ms seem to be a safe value
for the time being.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
The edp hotplug pin is fixed on the soc side, anybody wanting to use it
will need the same definition anyway, so move it to a common location.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
Add the rk3288 edp node and its hooks into the display-subsystem.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
Add the core device node of the edp-phy on rk3288 socs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
The cpu_leakage efuse on rk3288 did get it right including the
unitname but on both rk3066a and rk3188 it was missing, fix that.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
The mipi controller node does contain an unused reg property as well as
unnecessary #address-cells and #size-cells properties for subnodes
not using addresses, so remove those to also make dtc happy.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Drop superfluous #address-cells and #size-cells, rename
key-nodes to individual names and also use the key constants
intead of numbers.
Reported-by: Julien Chauveau <chauveau.julien@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
The usbphy subnodes do have a reg property but no unitname, add them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
The power-domain sub-nodes do have reg properties, but so far are
missing the expected unit names. So add the missing ones.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
In Cygnus SOC touch screen controller registers are shared with ADC and
flex timer. Using readl/writel could lead to race condition. So touch
screen driver is enhanced to support register access using syscon framework
API's to take care of mutually exclusive access.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
This pull request want to land the analogix_dp driver into drm/bridge directory,
which reused the Exynos DP code, and add Rockchip DP support. And those
patches have been:
* 'drm-next-analogix-dp-v2' of github.com:yakir-Yang/linux:
drm: bridge: analogix/dp: Fix the possible dead lock in bridge disable time
drm: bridge: analogix/dp: add panel prepare/unprepare in suspend/resume time
drm: bridge: analogix/dp: add edid modes parse in get_modes method
drm: bridge: analogix/dp: move hpd detect to connector detect function
drm: bridge: analogix/dp: try force hpd after plug in lookup failed
drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288
drm: bridge: analogix/dp: add some rk3288 special registers setting
dt-bindings: add document for rockchip variant of analogix_dp
drm: rockchip: dp: add rockchip platform dp driver
ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver
dt-bindings: add document for analogix display port driver
drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range
drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count
drm: bridge: analogix/dp: fix some obvious code style
drm: bridge: analogix/dp: rename register constants
drm/exynos: dp: rename implementation specific driver part
drm: bridge: analogix/dp: split exynos dp driver to bridge directory
After exynos_dp have been split the common IP code into analogix_dp driver,
the analogix_dp driver have deprecated some Samsung platform properties which
could be dynamically parsed from EDID/MODE/DPCD message, so this is an update
for Exynos DTS file for dp-controller.
Beside the backward compatibility is fully preserved, so there are no
bisectability break that make this change in a separate patch.
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Fix the following warnings from dtc by either adding or removing
the unit name from the node.
Warning (unit_address_vs_reg): Node /soc/flash-controller@40003000/flash@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /pca_buttons/button@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /pca_buttons/button@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /pca_buttons/button@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /pca_buttons/button@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /pca_buttons/button@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /pca_buttons/button@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /pca_buttons/button@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /pca_buttons/button@7 has a unit name, but no reg property
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Fix the following warnings from dtc by either adding or removing
the unit name from the node.
Warning (unit_address_vs_reg): Node /soc/flash-controller@40003000/flash@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /gpio_joystick/button@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /gpio_joystick/button@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /gpio_joystick/button@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /gpio_joystick/button@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /gpio_joystick/button@4 has a unit name, but no reg property
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
DT nodes without reg properties should not have a unit address. This
fixes the following warnings from dtc.
Warning (unit_address_vs_reg): Node /soc/syscon@40043000/phy@004 has a
unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/syscon@40043000/dma-mux@11c has
a unit name, but no reg property
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Add unit name to nvic to remove the following warning:
Warning (unit_address_vs_reg): Node /nv-interrupt-controller has a reg or ranges property, but no unit name
Also correct the node name to 'interrupt-controller'
while changing the line.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Stefan Agner <stefan@agner.ch>
This adds a devicetree for the ARM RealView PBA8 platform,
also known as HBI-0178, "RealView Platform Baseboard for
Cortex-A8" and PBX-A9 "RealView Platform Baseboard
Explore for Cortex-A9"
Tested in QEMU with -M realview-pb-a8, as well as with
-M realview-pbx-a9 -smp cpus=2
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Tested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ARM RealView Evaluation Baseboards are basically these:
- The original ARMv5 EB board with an ARM926EJ-S, ARM1136 or
ARM1176 core tile here described in arm-realview-eb.dts
no matter which of these core tiles is being used. This
can be emulated by QEMU "realview-eb" machine, which by
default will have the ARM926EJ-S core tile.
- The same board with one of three MPCore Core tiles:
ARM11MPCore, not to be confused with the similar ARM
PB11MPCore ARM11MPCore test system. This exist in
two revisions:
- Revision A modeled in arm-realview-eb-11mp.dts
- Revision B modeled arm-realview-eb-11mp-revb.dts
Revision B can be emulated by the QEMU
"realview-eb-mpcore" machine, but to match the hardware
also the argument -smp cpus=4 must be passed so that
it has four CPU cores, like the hardware.
There is also evidently from the code in the kernel a
Cortex-A9 core tile for the EB, and this is modeled in
arm-realview-eb-a9mp.dts based on the kernel boardfile.
I have not found a user guide for this EB core tile on
the ARM website and it seems uncommon. It is however
included for completeness.
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This defines the CLCD block in the PB1176 and adds a standard
640x480 VGA panel to the device tree.
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Let's supply a standard VGA panel by default on the PB11MPCore,
this will work with most monitors. If more screen real estate is
desired, users can update the DPI definition.
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The flash on the Integrator was already defined by the device
tree, but VPP control and flash protection was in the
boardfiles. Simply add the compatible string
"arm,versatile-flash" and the special add-on code for flash
programming voltage and protection kicks in in the MTD
layer.
Remove the board file code and augment the device tree in
one go for seamless transition.
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the boardfile definition of the flash memory in the
Versatile board into the device tree. The flash was already
defined with the property "arm,versatile-flash" which was
not handled by the kernel: instead define it as compatible
also with "cfi-flash" so it detects properly, and delete the
corresponding boardfile code so we get a smooth transition.
The old compatible string "arm,versatile-flash" is reused to
indicate to the MTD physmap subsystem that this flash requires
special VPP handling. (See separate patch.)
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Revert this commit to fix regressions on non-dragonboard MSM8974 boards.
This will be put back in after the correct fixes to the bam driver are
accepted that allow remote processor control of the main control registers.
This reverts commit 0a5d0f85bb.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Revert this commit to fix regressions on non-dragonboard MSM8974 boards.
This will be put back in after the correct fixes to the bam driver are
accepted that allow remote processor control of the main control registers.
This reverts commit 62bc817922.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The generic operating points specified in rk3288.dtsi are specified by
Rockchip as conservative and for all cases.
In contrast the Veyron ChromeOS devices are supposed to use a special
chip variant often called rk3288-c and use different operating points
in their kernel also including a higher max frequency.
So override the operating points for veyron devices.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
This patch adds new ports-implemented mask, which is required to get
achi working on the mainline. Without this patch value read from
PORTS_IMPL register which is zero would not enable any ports for
software to use.
Fixes: 566d1827df ("libata: disable forced PORTS_IMPL for >= AHCI 1.3")
Cc: stable@vger.kernel.org # v4.5+
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
This patch adds MSHC (Mobile Storage Host Controller) DT node for
Exynos3250 SoC. MSHC is an interface between the system and the SD card.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the Device Tree source for Samsung ARTIK5 module[1]
based on Exynos3250 SoC. The ARTIK5 module includes the following
devices:
- Application Processor (Samsung Exynos3250)
- WiFi/BT Combo chip (Broadcom4354)
- PMIC (Samsung S2MPS14)
- eMMC (4GB)
- DRAM LPDDR3 (512MB)
- Connectors pin (60 Pins x 3 set)
Also, this patch adds the ARTIK5 evaluation board[2] dts file which includes
the ARTIK5 module[1] and have the devices such as sound codec, sd card port,
ethernet port, uart port and so on.
[1] https://www.artik.io/hardware/artik-5
[2] http://www.digikey.com/product-search/en?FV=ffecca14
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the MSHC2 (Mobile Storage Host Controller) Device Tree node for
Exynos3250 SoC.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch add the UART2 Device Tree node for Exynos3250 SoC.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds initial pin configuration of MMC2 device on exynos3250-monk
board because the MMC2 gpio pin (gpk2[0-6]) are NC (not connected) state.
Suggested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds initial pin configuration using pinctrl subsystem
to reduce leakage power-consumption of gpio pins in normal state.
All pins included in this patch are NC (not connected) pin.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
In Baltos iR5221 cpsw_emac0 is connected directly to the switch IC and
hence needs to be configured as "fixed-link".
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The ARM TWD interrupt is a private peripheral interrupt (PPI) and per
the ARM GIC documentation, whether the type for PPIs can be set is
IMPLEMENTATION DEFINED. For OMAP4 devices the PPI type cannot be set and
so when we attempt to set the type for the ARM TWD interrupt it fails.
This has done unnoticed because it fails silently and because we cannot
re-configure the type it has had no impact. Nevertheless fix the type
for the TWD interrupt so that it matches the hardware configuration.
Reported-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
EDMA was allocating DMA channels 32 and 33 for memcpy usage, out of which
channel 33 is actually used by DES crypto engine. This bad allocation of
the channel causes a crash in the DES crypto engine, as the channel
gets configured for memcpy usage instead of hardware <-> memory DMA.
Fixed by allocating DMA channels 58 and 59 for memcpy usage (I2C0 RX/TX),
which are not used by anybody.
Fixes: cce1ee0001 ("ARM: DTS: am437x: Use the new DT bindings for
the eDMA3")
Cc: stable@vger.kernel.org # v4.4+
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Suggested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
commit 55ee7017ee ("arm: omap2: board-generic: use omap4_local_timer_init
for AM437x") makes synctimer32k as the clocksource on AM43xx. By default
the synctimer32k is clocked by 32K RTC OSC on AM43xx. But this 32K RTC OSC
is not available on epos boards which makes it fail to boot.
Synctimer32k can also be clocked by a peripheral PLL, so making this as
clock parent for synctimer3k on epos boards.
Fixes: 55ee7017ee ("arm: omap2: board-generic: use omap4_local_timer_init for AM437x")
Cc: stable@vger.kernel.org # v4.4+
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The USB2 port for Armada 38x is defined to be at 58000, not at
50000.
Cc: <stable@vger.kernel.org>
Fixes: 2d0a7addbd ("ARM: Kirkwood: Add support for many Synology NAS devices")
Signed-off-by: Patrick Uiterwijk <patrick@puiterwijk.org>
Acked-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Commit be3d7d023b ("ARM: kirkwood: Add DTS file for NSA320")
created the new file kirkwood-nsa320.dts but did not
add it to the Makefile.
Fixes: be3d7d023b ("ARM: kirkwood: Add DTS file for NSA320")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Commit 2d0a7addbd ("ARM: Kirkwood: Add support for many Synology
NAS devices") created the new file kirkwood-ds112.dts but did not
add it to the Makefile.
Fixes: 2d0a7addbd ("ARM: Kirkwood: Add support for many Synology NAS devices")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Some of the GPIO configs were wrong in the submitted DTS files,
this patch fixes all affected boards.
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: <stable@vger.kernel.org> # v4.1 +
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Enable adc1 on LPC4350 Hitex Evalution board. This board has a
10k potensiometer (R26) connected to ADC1 channel 2.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Enable adc0 on EA4357 dev kit. This kit has a 22k
potentiometer (R94) connected on ADC0 channel 3.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Add an entry for the hardware monitoring MCU
[gregory.clement@free-electrons.com: rename the title to use the
"standard" format]
Signed-off-by: Adam Baker <linux@baker-net.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add node for chipid device in order to have access to the CIDR and EXID
values.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This SFR node is looked up by the I2S controller driver to tune the
SFR_I2SCLKSEL register.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Use the <dt-bindings/interrupt-controller/arm-gic.h> header for
generating the flags for the first cell of the interrupt
definitions.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use the <dt-bindings/gpio/gpio.h> header instead of using
hardcoded values for the GPIO flags. Eradicate the totally
bogus "0x4" flag used and set that to GPIO_ACTIVE_HIGH as is
proper, switch the inverted card detect on the Snowball to
flag using GPIO_ACTIVE_LOW instead of using the MMC-specific
inversion flag.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add a dts node entry and enable the HDMI CEC device present in the Exynos4
family of SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
[k.kozlowski: Put the node in alphabetical order]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds HDMI CEC node specific to the Exynos4210/4x12 SoC series.
Signed-off-by: Kamil Debski <kamil@wypas.org>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Add pinctrl nodes for the HDMI CEC device to the Exynos4210 and
Exynos4x12 SoCs. These are required by the HDMI CEC device.
Signed-off-by: Kamil Debski <kamil@wypas.org>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Enable the Security SubSystem (SSS) on Exynos4412-based Odroid boards
to provide hardware acceleration for AES operations.
Suggested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Enable the Security SubSystem (SSS) on Trats2 (Exynos4412) board to
provide hardware acceleration for AES operations.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Add Security SubSystem (SSS) node to Exynos4 which provides hardware
acceleration of AES operations.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
The clock-output-names property is left in place for the zb_clk which is
thus treated as a special case as the MSTP clock driver (clk-mstp.c)
explicitly looks for a clock with node name zb_clk for the r8a73a4 and
sh73a0 SoCs.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
The clock-output-names property is left in place for the zb_clk which is
thus treated as a special case as the MSTP clock driver (clk-mstp.c)
explicitly looks for a clock with node name zb_clk for the r8a73a4 and
sh73a0 SoCs.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e9 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node.
Accordingly, remove the unnecessary clock-output-names properties and
as necessary the nodes.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the kzm9d device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the kzm9g device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the silk device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the alt device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the gose device tree to use the generic
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the porter device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the koelsch device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the marzen device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the bockw device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the armadillo800eva device tree to use the generic
properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the ape6evm device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Since 16ccaf5bb5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the lager device tree to use the generic
rather than renesas-specific properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Seems like dram_gate 5 was forgotten when DRAM gating driver was added.
Add it.
Cc: stable@vger.kernel.org
Fixes: 0b4bf5a520 (ARM: dts: sun7i: Add DRAM gates)
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Seems like dram_gate 5 was forgotten when DRAM gate driver was added.
Enable it.
Cc: stable@vger.kernel.org
Fixes: 82f8582fee (ARM: dts: sun4i: Add DRAM gates)
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the OTG controller on the Olinuxino A13-micro.
Signed-off-by: Jean-Michel Friedt <jmfriedt@femto-st.fr>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Orange Pi Plus really is an Orange Pi 2 extended with:
1) A sata <-> usb bridge connected to ehci3
2) An eMMC on mmc2
3) An external gigabit ethernet phy instead of the integrated 100Mbit phy
This commit changes the dts to reflect this by making it include
the Orange Pi 2 dts and then adding the extra bits.
Note that the difference in ethernet phy is not taken into account
because we do not have an ethernet driver for the H3 yet.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Fix the following issues with the gpio_keys node:
1) Use of undocumented input-name property
2) Use of a unit-address on the sw2 node
3) Having "PL03" in the pinctrl node which does not exist, this should
be "PL3"
And add support for the sw2 button on the board.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Orange Pi PC is an SBC based on the Allwinner H3 SoC with a uSD slot,
3 USB ports directly from the SoC, a 10/100M ethernet port using the
SoC's integrated PHY, USB OTG, HDMI, a TRRS headphone jack for stereo out
and composite out, a microphone, an IR receiver, a CSI connector, 2 LEDs,
a 3 pin UART header, and a 40-pin GPIO header.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Fix sun8i-h3-orangepi-plus.dts:
1) Having 2 pio nodes, by merging these into one
2) Having the pio and r_pio nodes before the mmc nodes, while they
should be sorted by alphabet
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the S/PDIF transmitter that is present on the Itead Ibox.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the S/PDIF transmitter that is present on the A1000.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the SPDIF transceiver controller block to the A20 dtsi.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the SPDIF transceiver controller block to the A10 dtsi.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the SPDIF clock to the A20 dtsi.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the SPDIF clock to the A10 dtsi.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the SPDIF TX pin to the A20 dtsi.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the SPDIF TX pin to the A10 dtsi.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Orangepi Plus has a 16GB eMMC, the vcc, the lack of pull-ups and
the use of the hw-reset pin have all been verified with the board
schematic.
With this dts node for mmc2, the eMMC runs at the following ios settings:
clock: 52000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 8 (mmc DDR52)
signal voltage: 0 (3.30 V)
driver type: 0 (driver type B)
Note the mmcblk1boot0/boot1 partitions are unused as the BROM will load
the SPL from 8k from the start of the main blockdev, just as with a
regular sdcard in mmc0.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Orangepi Plus and Orangepi Plus 2 have a realtek rtl8189etv sdio
wifi chip. This commit adds a device-tree node to power it up, so
that the mmc subsys can scan it, and enables the mmc controller which
is connected to it.
Note that this just makes the wifi controller show up as a sdio device.
In order for it to work a compatible sdio driver is necessary, an out
of tree driver is available here:
https://github.com/jwrdegoede/rtl8189ES_linux/
Binding the driver is not done through device tree, but through sdio
vendor- and device-id, so it can safely be enabled in devicetree
without having a driver upstream yet.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the ir receiver found on the orangepi plus board.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the 2 USB host controllers used on the Orange Pi Plus
and add the necessary regulators.
Signed-off-by: Reinder de Haan <patchesrdh@mveas.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add nodes describing the H3's usbphy and usb host controller nodes.
Signed-off-by: Reinder de Haan <patchesrdh@mveas.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a node describing the usb-clks found on the H3.
Signed-off-by: Reinder de Haan <patchesrdh@mveas.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a pinctrl node for mmc2 in 8 bits mode on H3 SoCs.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Dserve DSRV9703C is a 9.7" A10 tablet with a 1024x768 ips LCD,
1G RAM, 4GB flash, a Focaltech FT5406EE8 touchscreen and rtl8188ctv wifi.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Polaroid MID2809PXE4 is a 9" tablet which is clearly marked
Polaroid MID2809PXE4 on the back. It features a 9" 16:9 800x480 LCD,
A23 Soc, 1GB RAM, 8GB NAND, gsl3670 touchscreen and esp8089 wifi.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Address the FIXME comment in sun8i-a23-gt90h-v4.dts now that we've
proper regulator support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
As the dts file name already implies sun8i-a23-gt90h-v4.dts is for
an a23 equipped tablet. I don't know how the "Quad Core" or a33
comaptible got in there, likely a copy and paste error.
Regardless this commit fixes this, note this is almost
purely a cosmetical fix, for all things that matter at the
machine compatible level the a23 and a33 are compatible.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add nodes for the backlight / pwm found on a23-gt90h-v4 tablets.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add nodes for the axp223 pmic and its regulators as found on
a23-gt90h-v4 tablets.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The colorfly e708 q1 is a 7" tablet which is clearly marked as colorfly
e708 q1 on the back. It features a 9:16 800x1280 IPS LCD, A31s SoC,
1GB RAM, 8G NAND, ilitek 2139qt004 touchscreen on i2c-1 addr 0x41,
stk8313 accelerometer on i2c-2 addr 0x22 and a rtl8188etv wifi chip.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Difrnce dit4350 tablet is a tiny tablet with a 4.3" 16:9 480x272 LCD,
A13 SoC, 512M RAM, 4G NAND, solomon systech ssd2532qn6 touchscreen at
i2c1 address 0x48, Memsic MXC622X accelerometer at i2c1 address 0x15 and
rtl8188etv wifi.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The empire-electronix-d709 does not have an emmc, it uses nand, the
mmc2 node in the dts comes from a copy and paste error from the
inet98fv2 dts, remove it.
While at it also do s/inet98fv2/d709/ to fix some other copy/paste
leftovers.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The sun5i-a13-inet98v-rev2 does not have an emmc, it uses nand, the
mmc2 node in the dts comes from a copy and paste error from the
utoo-p66 dts, remove it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
dc1sw is an on/off only regulator and as such it cannot have constraints.
This is a limitation of the kernel regulator implementation which resolves
supplies on the first regulator_get(), which is done after applying
constraints, and applying the constrains will fail because it calls
_regulator_get_voltage() and _regulator_do_set_voltage() both of which
will fail on a switch regulator when there is no supply (yet).
This causes registering of all axp22x regulators to fail with the
following errors:
[ 1.395249] vcc-lcd: failed to get the current voltage(-22)
[ 1.405131] axp20x-regulator axp20x-regulator: Failed to register dc1sw
[ 1.412436] axp20x-regulator: probe of axp20x-regulator failed with error -22
This commit removes the constrains on dc1sw / vcc-lcd fixing this problem
note that dcdc1 itself is contrained to the exact same values, so this
does not change anything.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Only one of "broken-cd" and "non-removable" should be supplied
according to Documentation/devicetree/bindings/mmc/mmc.txt.
Obviously emmc and sdio-wifi are non-removable devices, while
broken-cd is for removable device whose card detect pin is broken.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch enables the tsadc for rk3228 evb board.
The rk3228 evb board uses the CRU to reset the chip since it hasn't the
PMIC to connect it, and TSHUT is low active on evb board.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the thermal needed main information for rk3228 SoCS.
Basically has the following content:
1) TSADC controller:
Add the needed attributes for rk3036 TSADC controller.
Especially for the TSHUT, in some cases if we are unable to shut it down
in orderly fashion (says: kernel is stuck holding a lock or similar), then
hardware TSHUT will reset it.
If the temperature is over 95C over a period of time the thermal shutdown
of the tsadc is invoked with can either reset the entire chip via the CRU,
or notify the PMIC via a GPIO. This should be set in the specific board.
2) Thermal zones:
Add the needed device mode for thermal generic framework.
Detail in Documentation/devicetree/bindings/thermal/thermal.txt.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The MIPI controllers are part of the VIO power domain so add the
necessary property to indicate this for the controller we support.
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
These must be translated from the values in the TRM by subtracting 32,
which has not been done. The SPDIF interrupt is also off-by-one.
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This isn't currently used by the driver but the correct value is 19
since DSIHOST0 is 51 in the TRM and the GIC offset requires 32 to be
subtracted.
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable the recently added vop and hdmi nodes on the rk3036-kylin board.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rk3036 support two overlay plane and one hwc plane,
it supports IOMMU, and its IOMMU same as rk3288's.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Here are some final updates for ARM SoC specific dts files:
* The i.MX changes were sent relatively late, and had a dependency
on the clk tree, so I delayed that a bit. Support for the new
i.MX6qp SoC and a couple of new boards is added in this branch.
* Uniphier renames a few files to match the final product names
that were decided by the company, kudos to the kernel developer(s)
for getting support upstream before the product release.
Also two boards are added. The patches were posted early enough
and nice overall, but we forgot to apply them and decided to
give it some more time in linux-next
* at91 has two small bug fixes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVvQeGGCrR//JCVInAQLZSw//fuKWje/vigu4a8M8zQ9O3gN/8Elebq8E
OTY73jjpUfsJsRrqLPt9vmhrMsZ4raOIvG47B3ptwzvlV5ToRnlKEyyaYe200oxZ
5x+3i1jg20XRfTXwgusnENI+nqFO32VDaqSpYhUk6b1603RSzjFi+e0SydJaV78a
3GDDe9Y9lB7e5U/0BWBltPgKTQLrjyk7F32I33fcj3RInVi2NrmijXWic1eersyr
U0wHThKVGEHQSid+ZlSYZt0JnzotqCOpA+Pj3SrVCFdA9nOXT1lz1RTqSgNLhjfO
oXBKUWy0Ld1Ayjplg55Z7+QzOnn/JttHtumFYYu2OZcbSGr2AGWmKixR3j9Fvo8Y
X1xdo8eObMhxOrJIejy4NSC+xq/9Z7ur5mRcSMtfkmB1osirZrU9gevu6sBzV1Ha
ea3wFDaoXmmIjA0d5rQirR4XhDV7zs0rfbLPJd6Av6MuTw/hF6VYpEyKVUUzOqld
+jpDKweJhI64wKZ5oQ6AahCPV9LoQrTMk8ElJX07ndLSnYXAXz8B44O4It5b13fH
3UiWPX1tOV1HIed6z8zWUp77N5C5SeyNPtMcdvusf5/hS6gopgxGN3mqKmOUMLeO
iwX2krBpuXWj+3T/FjqSFdUrHAzbmjTIgqv70dreqj4DTkmeYr9BoInjWtzgZ6c0
bUPwJ93kFDc=
=p5al
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull more ARM DT changes from Arnd Bergmann:
"Here are some final updates for ARM SoC specific dts files:
- The i.MX changes were sent relatively late, and had a dependency on
the clk tree, so I delayed that a bit. Support for the new i.MX6qp
SoC and a couple of new boards is added in this branch.
- Uniphier renames a few files to match the final product names that
were decided by the company, kudos to the kernel developer(s) for
getting support upstream before the product release. Also two
boards are added. The patches were posted early enough and nice
overall, but we forgot to apply them and decided to give it some
more time in linux-next
- at91 has two small bug fixes"
* tag 'armsoc-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
ARM: dts: at91: sama5d4 Xplained: don't disable hsmci regulator
ARM: dts: at91: sama5d3 Xplained: don't disable hsmci regulator
ARM: dts: uniphier: add pinmux node for I2C ch4
ARM: dts: uniphier: add @{address} to EEPROM node
ARM: dts: uniphier: add PH1-Pro4 Sanji board support
ARM: dts: uniphier: add PH1-Pro4 Ace board support
ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board
ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board
ARM: dts: uniphier: add reference clock nodes
ARM: dts: uniphier: rework UniPhier System Bus nodes
ARM: dts: uniphier: factor out ranges property of support card
arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20
ARM: dts: imx53-qsb: Fix gpio button polarity
ARM: dts: vfxxx: Add DAC node for Vybrid SoC
ARM: dts: imx6q: add missing links between ipu2 and mipi dsi
ARM: dts: imx: Add support for Advantech/GE B850v3
ARM: dts: imx: Add support for Advantech/GE B650v3
ARM: dts: imx: Add support for Advantech/GE B450v3
ARM: dts: imx: Add support for Advantech/GE Bx50v3
ARM: dts: imx: Add Advantech BA-16 Qseven module
...
- prevent the boards from having glitches when inserting/removing SD card on
sama5d3/d4 Xplained. The regulators should be kept on.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJW8XUWAAoJEAf03oE53VmQ3dwH/i4pujB/pQLub46kAc8fKx6A
59CEPi8EawZB1vJnJrHTQzFJCtHxaoS78Y/moVHC3Bee5lM1P4YDI5u//MU9k4ct
7eoaQfdTAjKVtsDoUsmxHfoJ485wRMCU0/UVs+OGIJliK8Ct+tMgbbEqOvvsRDZs
/FTJPfRPOpMD/B7DpN19sgO49jc+N+koodauBt3PE8lW3ZuxZ+h9P08OwJuagKzN
P9niGmY37oOiOyyJWFvSqnDJipixkmcy67D62ZFDaJ5KLnyWoLU3Vf+IRbxPNEJY
ds+f7FteWWMEAH3jsQC0MOKNxG2gWSrtTLQedYVcTYafnpqLDQU9FfQctFoz704=
=ELt8
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt2
Merge "First fixes batch for AT91 on 4.6 - DT only fixes" from Nicolas Ferre:
- prevent the boards from having glitches when inserting/removing SD card on
sama5d3/d4 Xplained. The regulators should be kept on.
* tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d4 Xplained: don't disable hsmci regulator
ARM: dts: at91: sama5d3 Xplained: don't disable hsmci regulator
ARM: dts: at91: sama5d2 Xplained: add leds node
ARM: dts: at91: sama5d2 Xplained: add user push button
ARM: dts: at91: sama5d2 Xplained: set pin muxing for usb gadget and usb host
ARM: dts: at91: sama5d2: add nand0 and nfc0 nodes
ARM: dts: at91: sama5d2: add dma properties to UART nodes
ARM: dts: at91: sama5d2 Xplained: Correct the macb irq pinctrl node
new device support in terms of LoC, but there has been some cleanup
in the core as well as the usual minor clk additions to various
drivers.
Core:
- parent tracking has been simplified
- CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
- of_clk_init() doesn't consider disabled DT nodes anymore
- clk_unregister() had an error path bug squashed
- of_clk_get_parent_count() has been fixed to only return unsigned ints
- HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone
New Drivers:
- NXP LPC18xx creg
- QCOM IPQ4019 GCC
- TI dm814x ADPLL
- i.MX6QP
Updates:
- Cyngus audio clks found on Broadcom iProc devices
- Non-critical fixes for BCM2385 PLLs
- Samsung exynos5433 updates for clk id errors, HDMI support,
suspend/resume simplifications
- USB, CAN, LVDS, and FCP clks on shmobile devices
- sunxi got support for more clks on new SoCs and went through a minor
refactoring/rewrite to use a simpler factor clk construct
- rockchip added some more clk ids and added suport for fraction dividers
- QCOM GDSCs in msm8996
- A new devm helper to make adding custom actions simpler (acked by Greg)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABCAAGBQJW8fPZAAoJENidgRMleOc9sc0P/2b4k8FiFwjMXiiXI1rcEjiz
ZjeVxzyAcwBiYoL8a2XONd+pihjLNcAbDbjk8SGUzmKDDz7elQbrhby/6o1dPlW/
fQEQFa8Xa8zhZgidO1AFc1DmIcPg/u/Z58wHbjIcqDjvzKA63213Ud34NJsRtF6y
+EJrIUZiTtj5q1pJgDmqlOv6ImmQtgW/AN51vNXCNNCyS9OsSgQm0DK5/f485HNc
2y5NE5hpijso69HFet5chuT3DiDLz/0dxmgCm/w9CRRzkHxYl3lxV/v07B+rZBo5
cWplFfvJqX7PvQtcP0sPPzZUfGT/vOeTboWprQwI4R3RObS18xLqlq6DEvOTmnqW
Jh+9uNBq4+kwSz5GcYjpwvj7+W0FPgIaBVRHrEW9qeXkgDpYloPtnEt8C8GmO6Bt
O0bgIzETq9mnRTA+VesIfjmTa4IYRDDUoDwGTw5CnW3jaZmtYJh8GhgZulMfPfyK
vfWQkY2OesXFwct0rU8tFiswTPeTRgXqL3AsPYjTPAHx1kfBpvfOQTCzzT7eSBr7
jykd9EXsXrYb/rpIxW7j6KjPpaWu+EouK06wc4TIBGrrWVTIV0ZvybzOBgf0FnpS
UDx87OyQb8x9TDMrfKf6bmJyly8y1dXkutFYY4XKIGUydlXIf0kn7AnIXW6SR7mX
fTEdLFMZ03ViCojtah5r
=bZFY
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"The clk changes for this release cycle are mostly dominated by new
device support in terms of LoC, but there has been some cleanup in the
core as well as the usual minor clk additions to various drivers.
Core:
- parent tracking has been simplified
- CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
- of_clk_init() doesn't consider disabled DT nodes anymore
- clk_unregister() had an error path bug squashed
- of_clk_get_parent_count() has been fixed to only return unsigned ints
- HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone
New Drivers:
- NXP LPC18xx creg
- QCOM IPQ4019 GCC
- TI dm814x ADPLL
- i.MX6QP
Updates:
- Cyngus audio clks found on Broadcom iProc devices
- Non-critical fixes for BCM2385 PLLs
- Samsung exynos5433 updates for clk id errors, HDMI support,
suspend/resume simplifications
- USB, CAN, LVDS, and FCP clks on shmobile devices
- sunxi got support for more clks on new SoCs and went through a
minor refactoring/rewrite to use a simpler factor clk construct
- rockchip added some more clk ids and added suport for fraction
dividers
- QCOM GDSCs in msm8996
- A new devm helper to make adding custom actions simpler (acked by Greg)"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (197 commits)
clk: bcm2835: fix check of error code returned by devm_ioremap_resource()
clk: renesas: div6: use RENESAS for #define
clk: renesas: Rename header file renesas.h
clk: max77{686,802}: Remove CLK_IS_ROOT
clk: versatile: Remove CLK_IS_ROOT
clk: sunxi: Remove use of variable length array
clk: fixed-rate: Remove CLK_IS_ROOT
clk: qcom: Remove CLK_IS_ROOT
doc: dt: add documentation for lpc1850-creg-clk driver
clk: add lpc18xx creg clk driver
clk: lpc32xx: fix compilation warning
clk: xgene: Add missing parenthesis when clearing divider value
clk: mb86s7x: Remove CLK_IS_ROOT
clk: x86: Remove clkdev.h and clk.h includes
clk: x86: Remove CLK_IS_ROOT
clk: mvebu: Remove CLK_IS_ROOT
clk: renesas: move drivers to renesas directory
clk: si5{14,351,70}: Remove CLK_IS_ROOT
clk: scpi: Remove CLK_IS_ROOT
clk: s2mps11: Remove CLK_IS_ROOT
...
If enabling the hsmci regulator on card detection, the board can reboot
on sd card insertion. Keeping the regulator always enabled fixes this
issue.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Fixes: 8d545f32bd ("ARM: at91/dt: sama5d4 xplained: add regulators for v(q)mmc1 supplies")
Cc: stable@vger.kernel.org #4.3 and later
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
If enabling the hsmci regulator on card detection, the board can reboot
on sd card insertion. Keeping the regulator always enabled fixes this
issue.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Fixes: 1b53e3416d ("ARM: at91/dt: sama5d3 xplained: add fixed regulator for vmmc0")
Cc: stable@vger.kernel.org #4.3 and later
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
These are all the updates to device tree files for 32-bit platforms,
plus a couple of related 64-bit updates:
New SoC support:
- Allwinner A83T
- Axis Artpec-6 SoC
- Mediatek MT7623 SoC
- TI Keystone K2G SoC
- ST Microelectronics stm32f469
New board or machine support:
- ARM Juno R2
- Buffalo Linkstation LS-QVL and LS-GL
- Cubietruck plus
- D-Link DIR-885L
- DT support for ARM RealView PB1176 and PB11MPCore
- Google Nexus 7
- Homlet v2
- Itead Ibox
- Lamobo R1
- LG Optimus Black
- Logicpd dm3730
- Raspberry Pi Model A
Other changes include
- Lots of updates for Qualcomm APQ8064, MSM8974 and others
- Improved support for Nokia N900 and other OMAP machines
- Common clk support for lpc32xx
- HDLCD display on ARM
- Improved stm32f429 support
- Improved Renesas device support, r8a779x and others
- Lots of Rockchip updates
- Samsung cleanups
- ADC support for Atmel SAMA5D2
- BCM2835 (Raspberry Pi) improvements
- Broadcom Northstar Plus enhancements
- OMAP GPMC rework
- Several improvements for Atmel SAMA5D2 / Xplained
- Global change to remove inofficial "arm,amba-bus" compatible string
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVu67PmCrR//JCVInAQIZlA//UV7DK8tHNvLCuHBX8MnW5xxljUWFCoFp
Zsi9LJj+KDIE+rpY65n75+il+rT1ZcgaITzH+Qvaq75f51ZwW7HY5jHiPYsINa80
oMtbdWlnpNIH48jD5yMKaDTE8md7lZ8tgA//6aw1doDx2LYX4D1QRG6XI1OC6E62
OjlzXkTTe50Aowi6aMQz4PZQM89m09FT0aw/Qsokh0fcW8oXhXcJSlFgLF/tZUYs
VU4oWshUX2/VW3ShXlAJdrItpdDIogwZtDS7xKXmk6AHfapLb7s4HuEOInqbeOa7
QWTjtoVj6ZHyeVptyn6kj5+xOdL4bXAT4Kg2TctF1iv0I6XG8CKflNqOJt2wLR1M
DP0VQXK0TmKCeI+vbRhniLRP7EPYp4N9KFAe6M6aVP3nKYX81EqWdtPjuwp7GxAC
sIGad2ocynKW4Eb4xOD2/5EwzkhwHv7SPQTCyCyQo8ILGN5MOSBZJOC1kXATTtbq
u7LbOLyFMeWPJFYZyPxe79MwiX0dfJekrZYQ1tYL3MEQqQNmbY6+r+6QLMhT+iSj
SE1oBaAReOuZUquiBEt398OvdfQ/n+F5BasKKCojXuhueNO3+rY7mT5X/vmOs2eh
CUpfl766CixaZmF6p8es1Qeu64ASODbPiOw3Dv5Cgwcbfy/C3b3ccty0zazlOaNJ
Sm6VXU3RavA=
=RLUc
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"These are all the updates to device tree files for 32-bit platforms,
plus a couple of related 64-bit updates:
New SoC support:
- Allwinner A83T
- Axis Artpec-6 SoC
- Mediatek MT7623 SoC
- TI Keystone K2G SoC
- ST Microelectronics stm32f469
New board or machine support:
- ARM Juno R2
- Buffalo Linkstation LS-QVL and LS-GL
- Cubietruck plus
- D-Link DIR-885L
- DT support for ARM RealView PB1176 and PB11MPCore
- Google Nexus 7
- Homlet v2
- Itead Ibox
- Lamobo R1
- LG Optimus Black
- Logicpd dm3730
- Raspberry Pi Model A
Other changes include
- Lots of updates for Qualcomm APQ8064, MSM8974 and others
- Improved support for Nokia N900 and other OMAP machines
- Common clk support for lpc32xx
- HDLCD display on ARM
- Improved stm32f429 support
- Improved Renesas device support, r8a779x and others
- Lots of Rockchip updates
- Samsung cleanups
- ADC support for Atmel SAMA5D2
- BCM2835 (Raspberry Pi) improvements
- Broadcom Northstar Plus enhancements
- OMAP GPMC rework
- Several improvements for Atmel SAMA5D2 / Xplained
- Global change to remove inofficial "arm,amba-bus" compatible
string"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (350 commits)
ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus"
ARM: dts: artpec: dual-license on artpec6.dtsi
ARM: dts: ux500: add synaptics RMI4 for Ux500 TVK DT
arm64: dts: juno/vexpress: fix node name unit-address presence warnings
arm64: dts: foundation-v8: add SBSA Generic Watchdog device node
ARM: dts: at91: sama5d2 Xplained: add leds node
ARM: dts: at91: sama5d2 Xplained: add user push button
ARM: dts: at91: sama5d2 Xplained: set pin muxing for usb gadget and usb host
ARM: dts: stm32f429: Enable Ethernet on Eval board
ARM: dts: omap3-sniper: TWL4030 keypad support
Revert "ARM: dts: DRA7: Add dt nodes for PWMSS"
ARM: dts: dm814x: dra62x: Disable wait pin monitoring for NAND
ARM: dts: dm814x: dra62x: Fix NAND device nodes
ARM: dts: stm32f429: Add Ethernet support
ARM: dts: stm32f429: Add system config bank node
ARM: dts: at91: sama5d2: add nand0 and nfc0 nodes
ARM: dts: at91: sama5d2: add dma properties to UART nodes
ARM: dts: at91: sama5d2 Xplained: Correct the macb irq pinctrl node
ARM: dts: exynos: Don't overheat the Odroid XU3-Lite on high load
ARM: dts: exynos: Add cooling levels for Exynos5422/5800 CPUs
...
Newly added support for additional SoCs:
- Axis Artpec-6 SoC family
- Allwinner A83T SoC
- Mediatek MT7623
- NXP i.MX6QP SoC
- ST Microelectronics stm32f469 microcontroller
New features:
- SMP support for Mediatek mt2701
- Big-endian support for NXP i.MX
- DaVinci now uses the new DMA engine dma_slave_map
- OMAP now uses the new DMA engine dma_slave_map
- earlyprintk support for palmchip uart on mach-tango
- delay timer support for orion
Other:
- Exynos PMU driver moved out to drivers/soc/
- Various smaller updates for Renesas, Xilinx, PXA, AT91, OMAP, uniphier
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVu68DGCrR//JCVInAQIHVQ//Wblms+NKj3aKh6m2Sscs/YkSbFaQ4sY2
rNyfxLIYsLXkth1kbdHRFSMyL68Ym+xutErgw/3HQPB2D1YtYJE3VJ/y8AU92SU3
oHyQIty+atB8d8zBbtlkWmat94NIfYf0I8PQETreGb1LMaJqAf0mDEDAyorTLZcZ
UtQ817Ihn7urqwdTJpTO58V41RmY/vflbHI5T6bIjUJn6fF1e/7+VqtMIfq5sjJ6
0EPEQdu8s5AJ7gcGlGi9I5gAtSnWSA/9phAxul9P8/HrMpUWIxreSEAy8FY7W14F
4TON3sQrnw7nyA72U80KGIXhgLy7SbEmHcSqyy4YJK3ycdk6VYk0CBO7nWVYAiD1
knLisOH6jwe0LIj9WXiRR+Y2Q53pXN8SF77pLDahSnvuShnYEjEH5uELHtxe7Vxh
gn+NH1rDkRTgdYgt4RWlVyUoLkddQWzLb1m4QyQlvxtTR25cJJayXdVX2MRrNPF5
c1zRa9HH+b8LJQIMdWfo/NoHhHtftkkGGsqHAAaypZqdpyk0j2HpJYk5ecPR4f5C
/8o/h/5xOI9gEzp/DVYSZ1VAvRqBQGIDfKBXWq6GuoZaF0aN8ISe5IxFn5Yx2F46
fNaxqiNpWmyywl8D+tSWPFK6aE21AXKGi5zIzexZZqy283aDjlUPI+tgF2GKIuKP
3ayYTDeBpLI=
=ynNj
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"Newly added support for additional SoCs:
- Axis Artpec-6 SoC family
- Allwinner A83T SoC
- Mediatek MT7623
- NXP i.MX6QP SoC
- ST Microelectronics stm32f469 microcontroller
New features:
- SMP support for Mediatek mt2701
- Big-endian support for NXP i.MX
- DaVinci now uses the new DMA engine dma_slave_map
- OMAP now uses the new DMA engine dma_slave_map
- earlyprintk support for palmchip uart on mach-tango
- delay timer support for orion
Other:
- Exynos PMU driver moved out to drivers/soc/
- Various smaller updates for Renesas, Xilinx, PXA, AT91, OMAP,
uniphier"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
ARM: uniphier: rework SMP code to support new System Bus binding
ARM: uniphier: add missing of_node_put()
ARM: at91: avoid defining CONFIG_* symbols in source code
ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1
ARM: imx: Make reset_control_ops const
ARM: imx: Do L2 errata only if the L2 cache isn't enabled
ARM: imx: select ARM_CPU_SUSPEND only for imx6
dmaengine: pxa_dma: fix the maximum requestor line
ARM: alpine: select the Alpine MSI controller driver
ARM: pxa: add the number of DMA requestor lines
dmaengine: mmp-pdma: add number of requestors
dma: mmp_pdma: Add the #dma-requests DT property documentation
ARM: OMAP2+: Add rtc hwmod configuration for ti81xx
ARM: s3c24xx: Avoid warning for inb/outb
ARM: zynq: Move early printk virtual address to vmalloc area
ARM: DRA7: hwmod: Add custom reset handler for PCIeSS
ARM: SAMSUNG: Remove unused register offset definition
ARM: EXYNOS: Cleanup header files inclusion
drivers: soc: samsung: Enable COMPILE_TEST
MAINTAINERS: Add maintainers entry for drivers/soc/samsung
...
Pull ARM updates from Russell King:
"Another mixture of changes this time around:
- Split XIP linker file from main linker file to make it more
maintainable, and various XIP fixes, and clean up a resulting
macro.
- Decompressor cleanups from Masahiro Yamada
- Avoid printing an error for a missing L2 cache
- Remove some duplicated symbols in System.map, and move
vectors/stubs back into kernel VMA
- Various low priority fixes from Arnd
- Updates to allow bus match functions to return negative errno
values, touching some drivers and the driver core. Greg has acked
these changes.
- Virtualisation platform udpates form Jean-Philippe Brucker.
- Security enhancements from Kees Cook
- Rework some Kconfig dependencies and move PSCI idle management code
out of arch/arm into drivers/firmware/psci.c
- ARM DMA mapping updates, touching media, acked by Mauro.
- Fix places in ARM code which should be using virt_to_idmap() so
that Keystone2 can work.
- Fix Marvell Tauros2 to work again with non-DT boots.
- Provide a delay timer for ARM Orion platforms"
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (45 commits)
ARM: 8546/1: dma-mapping: refactor to fix coherent+cma+gfp=0
ARM: 8547/1: dma-mapping: store buffer information
ARM: 8543/1: decompressor: rename suffix_y to compress-y
ARM: 8542/1: decompressor: merge piggy.*.S and simplify Makefile
ARM: 8541/1: decompressor: drop redundant FORCE in Makefile
ARM: 8540/1: decompressor: use clean-files instead of extra-y to clean files
ARM: 8539/1: decompressor: drop more unneeded assignments to "targets"
ARM: 8538/1: decompressor: drop unneeded assignments to "targets"
ARM: 8532/1: uncompress: mark putc as inline
ARM: 8531/1: turn init_new_context into an inline function
ARM: 8530/1: remove VIRT_TO_BUS
ARM: 8537/1: drop unused DEBUG_RODATA from XIP_KERNEL
ARM: 8536/1: mm: hide __start_rodata_section_aligned for non-debug builds
ARM: 8535/1: mm: DEBUG_RODATA makes no sense with XIP_KERNEL
ARM: 8534/1: virt: fix hyp-stub build for pre-ARMv7 CPUs
ARM: make the physical-relative calculation more obvious
ARM: 8512/1: proc-v7.S: Adjust stack address when XIP_KERNEL
ARM: 8411/1: Add default SPARSEMEM settings
ARM: 8503/1: clk_register_clkdev: remove format string interface
ARM: 8529/1: remove 'i' and 'zi' targets
...
- New tool dtx_diff to diff DT files.
- Sync kernel's dtc/libfdt to current dtc repo master.
- Fix for reserved memory regions located in highmem.
- Document standard unit suffixes for DT properties.
- Various DT binding doc updates.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW7B34AAoJEPr7XbWNvGHDI4QP/0W0s3dvJ4l/TNeu/n1ZN8i7
H4FYNcNGVEPJMaI4gIV+GOnxJ4hTnEX2ftG9MEZCywVHWNCg4IAaIW1wQ52Sufnc
Uncc9qO0MMR5Y1Siu/DuLi+ARyPQrke3M/o5xU9XJjSdz9QpnYw1MpMnpAJANomk
/8Wjn2jEBHDJrxmJ73nE/CAVu8iFyWHTmt5pDQBoQub2NVuAX6rNcVmpmr0PhDMd
0CKokB+wmLHZEA2R4BBefjLwwKU1WrF/5ytXpsJ01NeZsExagJZz1fQdy3Z6o1Xx
PRTukmmNhknatNTJOD8XmLr/SWN2CKNuJK5EOoV2opAvN/fc+mrk95DGKzjh5n64
aCRHzZgKAOYOqdVJKHfJ9hfzgG/zdt4mt1RKhLD+6qZNoSeQSrtikN3DWibPMZQR
uHRC9fqalx+W4cBH4jakGYrpsbQOaQFjb6vHY8V/auSB2cx97YVuKCawnSerjWZv
1tu8dqNG0qwt9g0hgA+ycwitulUNSLSvLGp3mxBJXN2ULPHygCw53JUWFQEZhoAa
JQqZ7lrUSE+AEp6Cwc0sNn07UMoCAoZKbTaurm2rn2RrKMfnirbf/sdZkc9Hq2pg
TIJOJlmJmvheoCl7894iV1l18ooPqldk6h8d9fc6rngaQYkNaV0c9nlaMLTa2Rwi
bVztrJItiymIhjIB86Iw
=hz7v
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull DeviceTree updates from Rob Herring:
- new tool 'dtx_diff' to diff DT files
- sync kernel's dtc/libfdt to current dtc repo master
- fix for reserved memory regions located in highmem
- document standard unit suffixes for DT properties
- various DT binding doc updates
* tag 'devicetree-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
of: Add vendor prefix for eGalax_eMPIA Technology Inc
Input: ads7846: Add description how to use internal reference (ADS7846)
ARM: realview: add EB syscon variants to bindings
devicetree: bindings: ARM: Use "uV" for micro-volt
serial: fsl-imx-uart: Fix typo in fsl,dte-mode description
of: add 'const' for of_property_*_string*() parameter '*np'
of/unittest: fix infinite loop in of_unittest_destroy_tracked_overlays()
of: alloc anywhere from memblock if range not specified
kbuild: Allow using host dtc instead of kernel's copy
of: resolver: Add missing of_node_get and of_node_put
of: Add United Radiant Technology Corporation vendor prefix
dt/bindings: add documentation on standard property unit suffixes
scripts/dtc: Update to upstream commit b06e55c88b9b
ARM: boot: Add an implementation of strnlen for libfdt
scripts/dtc: dtx_diff - add info to error message
dtc: create tool to diff device trees
Pull networking updates from David Miller:
"Highlights:
1) Support more Realtek wireless chips, from Jes Sorenson.
2) New BPF types for per-cpu hash and arrap maps, from Alexei
Starovoitov.
3) Make several TCP sysctls per-namespace, from Nikolay Borisov.
4) Allow the use of SO_REUSEPORT in order to do per-thread processing
of incoming TCP/UDP connections. The muxing can be done using a
BPF program which hashes the incoming packet. From Craig Gallek.
5) Add a multiplexer for TCP streams, to provide a messaged based
interface. BPF programs can be used to determine the message
boundaries. From Tom Herbert.
6) Add 802.1AE MACSEC support, from Sabrina Dubroca.
7) Avoid factorial complexity when taking down an inetdev interface
with lots of configured addresses. We were doing things like
traversing the entire address less for each address removed, and
flushing the entire netfilter conntrack table for every address as
well.
8) Add and use SKB bulk free infrastructure, from Jesper Brouer.
9) Allow offloading u32 classifiers to hardware, and implement for
ixgbe, from John Fastabend.
10) Allow configuring IRQ coalescing parameters on a per-queue basis,
from Kan Liang.
11) Extend ethtool so that larger link mode masks can be supported.
From David Decotigny.
12) Introduce devlink, which can be used to configure port link types
(ethernet vs Infiniband, etc.), port splitting, and switch device
level attributes as a whole. From Jiri Pirko.
13) Hardware offload support for flower classifiers, from Amir Vadai.
14) Add "Local Checksum Offload". Basically, for a tunneled packet
the checksum of the outer header is 'constant' (because with the
checksum field filled into the inner protocol header, the payload
of the outer frame checksums to 'zero'), and we can take advantage
of that in various ways. From Edward Cree"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1548 commits)
bonding: fix bond_get_stats()
net: bcmgenet: fix dma api length mismatch
net/mlx4_core: Fix backward compatibility on VFs
phy: mdio-thunder: Fix some Kconfig typos
lan78xx: add ndo_get_stats64
lan78xx: handle statistics counter rollover
RDS: TCP: Remove unused constant
RDS: TCP: Add sysctl tunables for sndbuf/rcvbuf on rds-tcp socket
net: smc911x: convert pxa dma to dmaengine
team: remove duplicate set of flag IFF_MULTICAST
bonding: remove duplicate set of flag IFF_MULTICAST
net: fix a comment typo
ethernet: micrel: fix some error codes
ip_tunnels, bpf: define IP_TUNNEL_OPTS_MAX and use it
bpf, dst: add and use dst_tclassid helper
bpf: make skb->tc_classid also readable
net: mvneta: bm: clarify dependencies
cls_bpf: reset class and reuse major in da
ldmvsw: Checkpatch sunvnet.c and sunvnet_common.c
ldmvsw: Add ldmvsw.c driver code
...
Initial commit for PH1-Pro4 Ace board support.
Note:
There are two variants for the amount of DDR memory; 1GB or 2GB.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is used for on-board inter-connection.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This board has an EEPROM (STMicroelectronics M24C64-WMN6TP) connected
to the I2C channel 0 of the SoC. Its slave address is 0x54.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
During the review process of the UniPhier System Bus driver
(drivers/bus/uniphier.c), the current binding of the System Bus
Controller turned out to be no good. In order to make the driver
really usable, we have to switch over to the new binding defined by
Documentation/devicetree/bindings/bus/uniphier-system-bus.txt.
The old binding will be still supported for a while to keep the
backward compatibility.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This property is used in common by several boards. Move it to the
common place (uniphier-support-card.dtsi). If necessary, each board
can still override the property.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Here is the big char/misc driver update for 4.6-rc1.
The majority of the patches here is hwtracing and some new mic drivers,
but there's a lot of other driver updates as well. Full details in the
shortlog.
All have been in linux-next for a while with no reported issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iEYEABECAAYFAlbp9IcACgkQMUfUDdst+ykyJgCeLTC2QNGrh51kiJglkVJ0yD36
q4MAn0NkvSX2+iv5Jq8MaX6UQoRa4Nun
=MNjR
-----END PGP SIGNATURE-----
Merge tag 'char-misc-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc updates from Greg KH:
"Here is the big char/misc driver update for 4.6-rc1.
The majority of the patches here is hwtracing and some new mic
drivers, but there's a lot of other driver updates as well. Full
details in the shortlog.
All have been in linux-next for a while with no reported issues"
* tag 'char-misc-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (238 commits)
goldfish: Fix build error of missing ioremap on UM
nvmem: mediatek: Fix later provider initialization
nvmem: imx-ocotp: Fix return value of imx_ocotp_read
nvmem: Fix dependencies for !HAS_IOMEM archs
char: genrtc: replace blacklist with whitelist
drivers/hwtracing: make coresight-etm-perf.c explicitly non-modular
drivers: char: mem: fix IS_ERROR_VALUE usage
char: xillybus: Fix internal data structure initialization
pch_phub: return -ENODATA if ROM can't be mapped
Drivers: hv: vmbus: Support kexec on ws2012 r2 and above
Drivers: hv: vmbus: Support handling messages on multiple CPUs
Drivers: hv: utils: Remove util transport handler from list if registration fails
Drivers: hv: util: Pass the channel information during the init call
Drivers: hv: vmbus: avoid unneeded compiler optimizations in vmbus_wait_for_unload()
Drivers: hv: vmbus: remove code duplication in message handling
Drivers: hv: vmbus: avoid wait_for_completion() on crash
Drivers: hv: vmbus: don't loose HVMSG_TIMER_EXPIRED messages
misc: at24: replace memory_accessor with nvmem_device_read
eeprom: 93xx46: extend driver to plug into the NVMEM framework
eeprom: at25: extend driver to plug into the NVMEM framework
...
* add types for USB Type C and PD chargers
* add act8945a charger driver
* add ACPI/DT bindings for goldfish-battery
* add support for versatile reset controller
* misc. fixes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCgAGBQJW6XstAAoJENju1/PIO/qaSmMP+gJY9U4yPscEoW2UkvKJ2y81
/Bxvy8GWSnnaFFPLMHYk/n53EPJbPnewETBftv1xRHzgJ6wQlgM/5EAEU2Qwud+A
V8K3V8VStIZLIrQ1tU8r10UE5OW95lsupCAlFp9AHYrBgIiRDUHlqWtxuhwH12F2
uLZt7moLHJFZtvg3EWl4agsvoEWfqPOKwmOpda+PyIUOlZrAIu3nItvKwBKWdvr3
WuomqfknkekkvX2lSB8R4OfE+w4fkYTFak2+4ymNiaQWrLeEqLuJbICUNGMD+APb
nX8TmQ8wmYYHLZTu455ctGJIdpYfrRI/IPAsdW/vMYnQ/8GiO0dgke5dfzZU08Du
PAWb/NM2pjFfG76fqG46hQPq/Jsns9k/SM1e3Q6fCkwewqtx8P56vUML6FtomYe7
HP3oPqlNeEpcF/jMmxKfSNiF78pmRLpCkWuhhYaT4Suv8bJhoQRE7Ur00Y47hp9i
taAIDE3HNFucqTEXMudBktEKsDPRpEx2K1fZEvZbCF8sOUK4xWPQr1yuPTXrM7jm
sWl/T4s1tn9/P6esdZUTXGghBiehj71mCHsOfXBQZPifaB2s8uINEf+GHQyQcLL4
X2HiMWrv9Pyn+PLVVwWRmTpSVIFWrCHNQPQ1ofgsgWkrEqsAbdZ4O2srlCqg/4WL
irCHBm6fbGpoVRQHg3xS
=L4ho
-----END PGP SIGNATURE-----
Merge tag 'for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply
Pull power supply and reset changes from Sebastian Reichel:
- add types for USB Type C and PD chargers
- add act8945a charger driver
- add ACPI/DT bindings for goldfish-battery
- add support for versatile reset controller
- misc fixes
* tag 'for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: (24 commits)
power: pm2301-charger: use __maybe_unused to hide pm functions
power: ipaq-micro-battery: use __maybe_unused to hide pm functions
power_supply: 88pm860x_charger: do not pass NULL to power_supply_put
jz4740-battery: Correct voltage change check
power_supply: lp8788-charger: initialize boolean 'found'
goldfish: Enable ACPI-based enumeration for goldfish battery
power: goldfish_battery: add devicetree bindings
power: act8945a: add charger driver for ACT8945A
power: add documentation for ACT8945A's charger DT bindings
ARM: dts: n900: Rename isp1704 to isp1707 to match correct name
power_supply: bq27xxx_battery: Add of modalias and match table when CONFIG_OF is enabled
power_supply: bq2415x_charger: Add of modalias and match table when CONFIG_OF is enabled
power_supply: bq2415x_charger: Do not add acpi modalias when CONFIG_ACPI is not enabled
power_supply: isp1704_charger: Add compatible of match for nxp,isp1707
power_supply: isp1704_charger: Error messages when probe fail
power_supply: Add types for USB Type C and PD chargers
power: bq24735-charger: add 'ti,external-control' option
power: bq24735-charger: document 'ti,external-control' option
power: bq24735-charger: fix failed i2c with ac-detect
power: reset: Fix dependencies for !HAS_IOMEM archs
...
This patch adds the emac device node for rk3036 SoCs.
We need to let mac clock under the DPLL which is able to provide
the accurate 50MHz what mac_ref need, since that will cause some
unstable things if the cpufreq is working.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: linux-rockchip@lists.infradead.org
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: David S. Miller <davem@davemloft.net>
- New drivers for NSA320 and LTC2990
- Added support for ADM1278 to adm1275 driver
- Added support for ncpXXxh103 to ntc_thermistor driver
- Renamed vexpress hwmon implementation
- Minor cleanups and improvements
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW5sANAAoJEMsfJm/On5mBKTEP/2SIXOFN+ew3Lhmz36Z8gDJY
LpVcFjb8S/nRDibvaYjaO5r7p6x2d3jW6wkdpt1V44l5khvODjnaZhH7qZ1xaVuI
qt9xRX0PvHAlwIpXHRNgueNAkAwTuCJqmbbYGrPQJCe4zu0sxiDrpRa117Ym1AJY
NxOts2n/VAjVn0O+F4QiJELDmSpajsVt7QPjUGYfiEHPaGDgPVq+5gqRPeL9hfOu
tjFVWn3YVJTI/Q3N/aB0+XQpwoZdu74RFnr/x7rkjzVcqiNdq0+WtFAIAS9Aw3s1
gZbwRPX7Pu/sNmcVRaj+9rSpzl9uzHbqD4+/+hCuv3LjnyAbLm3NmV2EB1u42SwE
bmqjnCTtC5InlkcKGi85Sv72YcGj5MgddSTQ9TDBKQIW8Z70rnFK/7xPbq776W/L
vFXQ62YZ14lX3sVTMVfntf6BrYeteVbJmP7d9SXeTHfHVSSaxwGrq6kim8m2zi/J
R8YMsVOok0P3ldyua73TIdujYtpz2AZ4vdddDFSlu/m1o/bp642le5HLVuKBpuYy
Szjc26JGL5ymGLAUmeEUt8jOWUqQo9MLw9Gc8kgc/Zui3q+lMJKXZ6dvkgJpnFCL
xw/fB/E6x4pDEhJPe3LeFcKBk/vF6bktEWrrA0rGHrVGJIaOhgPkxyeGV7BdNqFS
DtMy4EcjmlAKOn5oxOL5
=n07O
-----END PGP SIGNATURE-----
Merge tag 'hwmon-for-linus-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
Pull hwmon updates from Guenter Roeck:
- New drivers for NSA320 and LTC2990
- Added support for ADM1278 to adm1275 driver
- Added support for ncpXXxh103 to ntc_thermistor driver
- Renamed vexpress hwmon implementation
- Minor cleanups and improvements
* tag 'hwmon-for-linus-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging:
hwmon: Create an NSA320 hardware monitoring driver
hwmon: Define binding for the nsa320-hwmon driver
hwmon: (adm1275) Add support for ADM1278
hwmon: (ntc_thermistor) Add support for ncpXXxh103
Doc: hwmon: Fix typo "montoring" in hwmon
ARM: dts: vfxxx: Add iio_hwmon node for ADC temperature channel
ARM: dts: Change iio_hwmon nodes to use hypen in node names
hwmon: (iio_hwmon) Allow the driver to accept hypen in device tree node names
hwmon: Add LTC2990 sensor driver
hwmon: (vexpress) rename vexpress hwmon implementation
An almost purely driver related set of changes with no
major changes to the framework, only one patch adding
an unlocked version of the pinctrl_find_gpio_range_from_pin()
library call.
New drivers:
- ST Microelectronics STM32 MCU support: this is a non-MMU
low-end platform for IoT things (etc).
- Microchip PIC32 MCU support: same story as for STM32.
New subdrivers:
- Allwinner SunXi H3 R_PIO controller support.
- Qualcomm IPQ4019 support.
- MediaTek MT2701 and MT7623.
- Allwinner A64
Non-critical fixes:
- gpio_disable_free() for the Vybrid.
- pinctrl single: use a separate lockdep class.
Misc:
- Substantial cleanups and rewrites for the Super-H PFC
driver and subdrivers.
- Various fixes and cleanups, especially Paul Gortmakers
work to make nonmodular drivers nonmodular.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW5rS1AAoJEEEQszewGV1zskIQALNriHdVmPGNIuSZOUk2gqAv
hFNIzFUYM6BK6AL2wD+ZVqQe/EbZtWUF2RqhI2juP8j2WBVMxo8B9ypGjm8qDZ7q
Xtdnd8l22VP0fEmYKTwDgrjSCcMxbXFiPurZBlqCCyb/9raFqLKwx2kcxWqD4PR2
dcC8i/t2JSjGYRRCMcGn+zcKW2zja36xci/ZOExdioHYgFmorCZb9+4NYz+coijv
VEjEy98CG6itBFJ0MS3jHT949TyxpDzWp7hO8LiOAiLR50xCxTlZRT1dObOUQJqk
qhiLK2sTUFJFlTNBUGN0gfMoJo2MpfJIkVre4EV5QNkfy8vjtXeLrbjnSnTXf0r7
5OLMEJPK7mfHd7jsw/nwJMYUoqgeRO9VBXtL2JyGWpsNFBFlJv1YRXaT0AZXkgUq
63BfhTrbtge2xECJ9iqWVdGmmNv2x7lMK6RWqDr72fjONdtmNLDusfNdgYaBWc50
K910IijMX2t2HGQFzuqwQC5HgADPhqBRb2eMcilwwUs5rxzLXX/wer1rhc8guUtK
4DvGZ+wPZd2znQvNAWxsG5azoSfO8J3ibVIkMmaW3NTqyLvnbT9KiNvYuUVg/9NQ
Vcb1d9UnrhAIWzpfpeo4rzr+QIq4j46YHBqreiW/l952Apxpp2lJmV/btK0noPmA
MDTknHc2772QYIBtn01D
=TsdU
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"An almost purely driver related set of changes with no major changes
to the framework, only one patch adding an unlocked version of the
pinctrl_find_gpio_range_from_pin() library call.
New drivers:
- ST Microelectronics STM32 MCU support: this is a non-MMU low-end
platform for IoT things (etc).
- Microchip PIC32 MCU support: same story as for STM32.
New subdrivers:
- Allwinner SunXi H3 R_PIO controller support.
- Qualcomm IPQ4019 support.
- MediaTek MT2701 and MT7623.
- Allwinner A64
Non-critical fixes:
- gpio_disable_free() for the Vybrid.
- pinctrl single: use a separate lockdep class.
Misc:
- Substantial cleanups and rewrites for the Super-H PFC driver and
subdrivers.
- Various fixes and cleanups, especially Paul Gortmakers work to make
nonmodular drivers nonmodular"
* tag 'pinctrl-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits)
pinctrl: single: Use a separate lockdep class
drivers: pinctrl: add driver for Allwinner A64 SoC
pinctrl: Broadcom Northstar2 pinctrl device tree bindings
pinctrl: amlogic: Make driver independent from two-domain configuration
pinctrl: amlogic: Separate some pin functions for Meson8 / Meson8b
pinctrl: at91: use __maybe_unused to hide pm functions
pinctrl: sh-pfc: core: don't open code of_device_get_match_data()
pinctrl: uniphier: rename CONFIG options and file names
pinctrl: sunxi: make A80 explicitly non-modular
pinctrl: stm32: make explicitly non-modular
pinctrl: sh-pfc: make explicitly non-modular
pinctrl: meson: make explicitly non-modular
pinctrl: pinctrl-mt6397 driver explicitly non-modular
pinctrl: sunxi: does not need module.h
pinctrl: pxa2xx: export symbols
pinctrl: sunxi: Change mux setting on PI irq pins
pinctrl: sunxi: Remove non existing irq's
pinctrl: imx: attach iomuxc device to gpr syscon
pinctrl-bcm2835: Fix cut-and-paste error in "pull" parsing
pinctrl: lpc1850-scu: document nxp,gpio-pin-interrupt
...
Allow Openblock AX3 using hardware buffer management with mvneta.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Since mvneta driver supports using hardware buffer management (BM), in
order to use it, board files have to be adjusted accordingly. This commit
enables BM on AXP-DB and AXP-GP in same manner - because number of ports
on those boards is the same as number of possible pools, each port is
supposed to use single pool for all kind of packets.
Moreover appropriate entry is added to 'soc' node ranges, as well as "okay"
status for 'bm' and 'bm-bppi' (internal SRAM) nodes.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Armada XP network controller supports hardware buffer management (BM).
Since it is now enabled in mvneta driver, appropriate nodes can be added
to armada-xp.dtsi - for the actual common BM unit (bm@c0000) and its
internal SRAM (bm-bppi), which is used for indirect access to buffer
pointer ring residing in DRAM.
Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Since mvneta driver supports using hardware buffer management (BM), in
order to use it, board files have to be adjusted accordingly. This commit
enables BM on:
* A385-DB-AP - each port has its own pool for long and common pool for
short packets,
* A388-ClearFog - same as above,
* A388-DB - to each port unique 'short' and 'long' pools are mapped,
* A388-GP - same as above.
Moreover appropriate entry is added to 'soc' node ranges, as well as "okay"
status for 'bm' and 'bm-bppi' (internal SRAM) nodes.
[gregory.clement@free-electrons.com: add suppport for the ClearFog board]
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Armada 38x network controller supports hardware buffer management (BM).
Since it is now enabled in mvneta driver, appropriate nodes can be added
to armada-38x.dtsi - for the actual common BM unit (bm@c8000) and its
internal SRAM (bm-bppi), which is used for indirect access to buffer
pointer ring residing in DRAM.
Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The compatible string "simple-bus" is well defined in ePAPR, while
I see no documentation for the "arm,amba-bus" arnywhere in ePAPR or
Documentation/devicetree/.
DT is also used by other projects than Linux kernel. It is not a
good idea to rely on such an unofficial binding.
This commit
- replaces "arm,amba-bus" with "simple-bus"
- drops "arm,amba-bus" where it is used along with "simple-bus"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Relaxed the license on the dtsi to permit use in other projects.
Signed-off-by: Lars Persson <larper@axis.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the Synaptics RMI4 touchscreen to the Ux500 TVK
user interface board. Tested on the U8500 HREFv60plus with
the TVK UIB.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Two more fixes for 4.5:
- One is a fix for OMAP that is urgently needed to avoid DRA7xx chips from
premature aging, by always keeping the Ethernet clock enabled.
- The other solves a I/O memory layout issue on Armada, where SROM and PCI
memory windows were conflicting in some configurations.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW4yITAAoJEIwa5zzehBx38BsQAJRjZOeAec3/F+T8+3pnV0Jl
URcyIFBgXQm6AVW9bwrn7bg9GOcWm0hNk4lgQ/E6KgaZpRVJQ+bhqb79Rz45LhCG
7YmxEXtM8zhVY80/AJsEF0vzogfZsPPI3SiGF9OeIwiMEO91hpRMyvFbOqJC2H40
YX17ARv2BTozLJ2PaW9BKoFAJX2uJJqIB6QOi307m3TVFRPQ5qPpVvh43L1+7flF
ntugOzbEhIg1ZENeb0sNMtrhWlsNlQvulJl2xcp3sbXqkj3sPNIHzyvrPXhxOYQI
VFJKHDC1Op6c2PFK8H0iOQMKq+WWuOidjCGwyg5/PNAoQ4cP+AoD0EpEuXXNjh7e
8DlVhCiYNSJl7M88jahHj1pq3X+CxwQraGANHIa0nijKYp4pqOqv+CZA0sgAX5cq
Ro6U5v5XZxgSR6QGwNBtjCxmXC4z9YaYIP/nkCW2zbPQkaeocKYNykOifp1fOI59
VWufA0OTqk1XjVGcYorpgDaLFUAhgc14JEz1VLQGlw1/M+nVVcfr598FtTWrEoNI
C1L2H7ahqKpVRSYCCtUlXg4TipyurjBk3A91mVBVcrSj/A4ztGkqjwMx995KzP+w
HXI7PSulXK/HDupXslUcUCmVwkI5nxhcH7kuk978zwFFyQvDwB+A1mPysR+Naenz
sI0wqCBHKZj70kyFCflm
=/uWT
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Two more fixes for 4.5:
- One is a fix for OMAP that is urgently needed to avoid DRA7xx chips
from premature aging, by always keeping the Ethernet clock enabled.
- The other solves a I/O memory layout issue on Armada, where SROM
and PCI memory windows were conflicting in some configurations"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: mvebu: fix overlap of Crypto SRAM with PCIe memory window
ARM: dts: dra7: do not gate cpsw clock due to errata i877
ARM: OMAP2+: hwmod: Introduce ti,no-idle dt property
When the Crypto SRAM mappings were added to the Device Tree files
describing the Armada XP boards in commit c466d997bb ("ARM: mvebu:
define crypto SRAM ranges for all armada-xp boards"), the fact that
those mappings were overlaping with the PCIe memory aperture was
overlooked. Due to this, we currently have for all Armada XP platforms
a situation that looks like this:
Memory mapping on Armada XP boards with internal registers at
0xf1000000:
- 0x00000000 -> 0xf0000000 3.75G RAM
- 0xf0000000 -> 0xf1000000 16M NOR flashes (AXP GP / AXP DB)
- 0xf1000000 -> 0xf1100000 1M internal registers
- 0xf8000000 -> 0xffe0000 126M PCIe memory aperture
- 0xf8100000 -> 0xf8110000 64KB Crypto SRAM #0 => OVERLAPS WITH PCIE !
- 0xf8110000 -> 0xf8120000 64KB Crypto SRAM #1 => OVERLAPS WITH PCIE !
- 0xffe00000 -> 0xfff00000 1M PCIe I/O aperture
- 0xfff0000 -> 0xffffffff 1M BootROM
The overlap means that when PCIe devices are added, depending on their
memory window needs, they might or might not be mapped into the
physical address space. Indeed, they will not be mapped if the area
allocated in the PCIe memory aperture by the PCI core overlaps with
one of the Crypto SRAM. Typically, a Intel IGB PCIe NIC that needs 8MB
of PCIe memory will see its PCIe memory window allocated from
0xf80000000 for 8MB, which overlaps with the Crypto SRAM windows. Due
to this, the PCIe window is not created, and any attempt to access the
PCIe window makes the kernel explode:
[ 3.302213] igb: Copyright (c) 2007-2014 Intel Corporation.
[ 3.307841] pci 0000:00:09.0: enabling device (0140 -> 0143)
[ 3.313539] mvebu_mbus: cannot add window '4:f8', conflicts with another window
[ 3.320870] mvebu-pcie soc:pcie-controller: Could not create MBus window at [mem 0xf8000000-0xf87fffff]: -22
[ 3.330811] Unhandled fault: external abort on non-linefetch (0x1008) at 0xf08c0018
This problem does not occur on Armada 370 boards, because we use the
following memory mapping (for boards that have internal registers at
0xf1000000):
- 0x00000000 -> 0xf0000000 3.75G RAM
- 0xf0000000 -> 0xf1000000 16M NOR flashes (AXP GP / AXP DB)
- 0xf1000000 -> 0xf1100000 1M internal registers
- 0xf1100000 -> 0xf1110000 64KB Crypto SRAM #0 => OK !
- 0xf8000000 -> 0xffe0000 126M PCIe memory
- 0xffe00000 -> 0xfff00000 1M PCIe I/O
- 0xfff0000 -> 0xffffffff 1M BootROM
Obviously, the solution is to align the location of the Crypto SRAM
mappings of Armada XP to be similar with the ones on Armada 370, i.e
have them between the "internal registers" area and the beginning of
the PCIe aperture.
However, we have a special case with the OpenBlocks AX3-4 platform,
which has a 128 MB NOR flash. Currently, this NOR flash is mapped from
0xf0000000 to 0xf8000000. This is possible because on OpenBlocks
AX3-4, the internal registers are not at 0xf1000000. And this explains
why the Crypto SRAM mappings were not configured at the same place on
Armada XP.
Hence, the solution is two-fold:
(1) Move the NOR flash mapping on Armada XP OpenBlocks AX3-4 from
0xe8000000 to 0xf0000000. This frees the 0xf0000000 ->
0xf80000000 space.
(2) Move the Crypto SRAM mappings on Armada XP to be similar to
Armada 370 (except of course that Armada XP has two Crypto SRAM
and not one).
After this patch, the memory mapping on Armada XP boards with
registers at 0xf1 is:
- 0x00000000 -> 0xf0000000 3.75G RAM
- 0xf0000000 -> 0xf1000000 16M NOR flashes (AXP GP / AXP DB)
- 0xf1000000 -> 0xf1100000 1M internal registers
- 0xf1100000 -> 0xf1110000 64KB Crypto SRAM #0
- 0xf1110000 -> 0xf1120000 64KB Crypto SRAM #1
- 0xf8000000 -> 0xffe0000 126M PCIe memory
- 0xffe00000 -> 0xfff00000 1M PCIe I/O
- 0xfff0000 -> 0xffffffff 1M BootROM
And the memory mapping for the special case of the OpenBlocks AX3-4
(internal registers at 0xd0000000, NOR of 128 MB):
- 0x00000000 -> 0xc0000000 3G RAM
- 0xd0000000 -> 0xd1000000 1M internal registers
- 0xe800000 -> 0xf0000000 128M NOR flash
- 0xf1100000 -> 0xf1110000 64KB Crypto SRAM #0
- 0xf1110000 -> 0xf1120000 64KB Crypto SRAM #1
- 0xf8000000 -> 0xffe0000 126M PCIe memory
- 0xffe00000 -> 0xfff00000 1M PCIe I/O
- 0xfff0000 -> 0xffffffff 1M BootROM
Fixes: c466d997bb ("ARM: mvebu: define crypto SRAM ranges for all armada-xp boards")
Reported-by: Phil Sutter <phil@nwl.cc>
Cc: Phil Sutter <phil@nwl.cc>
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Force the DRA7xx Ethernet internal clock source to stay enabled
per TI erratum i877:
http://www.ti.com/lit/er/sprz429h/sprz429h.pdf
Otherwise, if the Ethernet internal clock source is disabled, the
chip will age prematurely, and the RGMII I/O timing will soon
fail to meet the delay time and skew specifications for 1000Mbps
Ethernet.
This fix should go in as soon as possible.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/omap-critical-fixes-for-v4.5-rc/20160307014209/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW3UuoAAoJEMePsQ0LvSpL4JIP/j9A1ax1c6kGfNujSzBMrVL3
I68l27ohfbo/MKMc/KsqkdahzGimIUmqkJGxrnA19UMhfyMb6l3pzlVswxfUUd10
EXl/aKlPDa+Xl+A+TCwK78C69ZXHk4nqsNDSixuoIVfxM2uTZZZmNK3FOR+/EaQ8
kUq3zwkg31HgsYxIyvqcCwpsxmDwKXx6fQ3sX5A6tQGvtsdeNofWJOVoGpZe0Ott
tmt09VEvSGvXVEL1Um6U5A+8Mw6GPWa9/wih8nYaE70BswuOmIMUxeCkrShDadpn
4Z8rqZg1Q8sdnI7ZCARS2WZ63+wrcjq04Yycf7m8feUc7cIDqlahWnrIWKuvpPAz
P20LgrwRQDgifM2TzJupPRUKX+7BoACOXTIt2A3HuOIsZRfqysFx4qoOEdQNBlVq
mOOwA/o8ly8hJI7uym8elrPY4MjZ4f6l2h/mFom0XrlS/1NcxXwuGqi9SJNneFSm
ALyCIW7YnemoOex0tUcHUg2fiGaRceWlSmzHxI0WgVyOj86hrXc8OnpjnPmuhMQV
i4pkL4Y1/UxZepd0b6QOTUC+LQvsWL008XLUr0SPm1d2Co9sxyzN8i0pXh07bsm0
sOflS6DtwWSNenX/OVVQWk0r5amNwiFFpiw7tBWIeXYi4glhyizqdGjbzxRjxJUf
QfFex23RAWtf/1ZrvqQO
=kJw8
-----END PGP SIGNATURE-----
Merge tag 'for-v4.5-rc/omap-critical-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes
ARM: OMAP2+: critical DRA7xx fix for v4.5-rc
Force the DRA7xx Ethernet internal clock source to stay enabled
per TI erratum i877:
http://www.ti.com/lit/er/sprz429h/sprz429h.pdf
Otherwise, if the Ethernet internal clock source is disabled, the
chip will age prematurely, and the RGMII I/O timing will soon
fail to meet the delay time and skew specifications for 1000Mbps
Ethernet.
This fix should go in as soon as possible.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/omap-critical-fixes-for-v4.5-rc/20160307014209/
* tag 'for-v4.5-rc/omap-critical-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
ARM: dts: dra7: do not gate cpsw clock due to errata i877
ARM: OMAP2+: hwmod: Introduce ti,no-idle dt property
Signed-off-by: Olof Johansson <olof@lixom.net>
Several cases of overlapping changes, as well as one instance
(vxlan) of a bug fix in 'net' overlapping with code movement
in 'net-next'.
Signed-off-by: David S. Miller <davem@davemloft.net>
Errata id: i877
Description:
------------
The RGMII 1000 Mbps Transmit timing is based on the output clock
(rgmiin_txc) being driven relative to the rising edge of an internal
clock and the output control/data (rgmiin_txctl/txd) being driven relative
to the falling edge of an internal clock source. If the internal clock
source is allowed to be static low (i.e., disabled) for an extended period
of time then when the clock is actually enabled the timing delta between
the rising edge and falling edge can change over the lifetime of the
device. This can result in the device switching characteristics degrading
over time, and eventually failing to meet the Data Manual Delay Time/Skew
specs.
To maintain RGMII 1000 Mbps IO Timings, SW should minimize the
duration that the Ethernet internal clock source is disabled. Note that
the device reset state for the Ethernet clock is "disabled".
Other RGMII modes (10 Mbps, 100Mbps) are not affected
Workaround:
-----------
If the SoC Ethernet interface(s) are used in RGMII mode at 1000 Mbps,
SW should minimize the time the Ethernet internal clock source is disabled
to a maximum of 200 hours in a device life cycle. This is done by enabling
the clock as early as possible in IPL (QNX) or SPL/u-boot (Linux/Android)
by setting the register CM_GMAC_CLKSTCTRL[1:0]CLKTRCTRL = 0x2:SW_WKUP.
So, do not allow to gate the cpsw clocks using ti,no-idle property in
cpsw node assuming 1000 Mbps is being used all the time. If someone does
not need 1000 Mbps and wants to gate clocks to cpsw, this property needs
to be deleted in their respective board files.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tiny fixes branch this week, in fact only one patch.
Turns out the USB support for a Renesas board was developed on a pre-release
board that ended up being changed before shipping. To avoid breakage on those
boards, and avoid confusion, it's a reasonable idea to patch now instead of
later. There are no known users of the pre-release variant any more.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW3ImHAAoJEIwa5zzehBx3/tcP/2lW14P7exYAcqIke9qagz9D
88n59MDwu+GOaiU3G/SbzClDItmEKs/sTZjPvl9l/n1cFEj//9smrsK7brklE8wk
IB3cIUBzJCSXNffBPLs0qXjrIgf86c/t5LNJCsXXritY83/wT6+YgIUKv3IaGjqW
mxXvf3Y7ymqVB7favDoThSeT8/fApRBp8d0+Z3Dr31CvmmMTp4nRg2773E2ZZYCj
pC7LaPZvAUN7ko5pnl6FtY19H+bj6hsvk2dV68xotQAvQZudDbhgZUb+yZhWxOiF
BXNYNRQxh8nVhILG8Iup48I5NEJbMmFKR0PwGaIaI29Mo2eR6FX1NXD3e6iGFx2+
xS7Jr4AW7+7t4zzOsmTUGkDJkxjkMq9wO7xkrqotYE0lPqyOKqswaOHQYKDNXJK6
ejGuzIpSvKWuuiUQSYkbm6+nR4tob96SU6fz25/ZZxRNqrd9+XCqpgKu/ZFSusYM
84C/5mwt5KzAeXoB5GnuEUIfm5uRGWWOxPYa4CknPVsEQTS0bBEiAjyYm+grPctB
DvXq4K8Ba5AJ2pA1qe8cQ0bhJuTyqkQwv9nQN5bO5SUgrAI/8ha/bSoI+AJWXmGE
RZ1Lw3JeLuaUWSPZdcCp1gQh6zWdS6bbZIPxJgZd6wMkBAdRrJscvVXwSS4lWJW5
rDINOiN37GE7/iKISuvs
=aA8l
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fix from Olof Johansson:
"Tiny fixes branch this week, in fact only one patch.
Turns out the USB support for a Renesas board was developed on a
pre-release board that ended up being changed before shipping. To
avoid breakage on those boards, and avoid confusion, it's a reasonable
idea to patch now instead of later. There are no known users of the
pre-release variant any more"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: porter: remove enable prop from HS-USB device node
Pull ARM fixes from Russell King:
"Just two ARM fixes this time: one to fix the hyp-stub for older ARM
CPUs, and another to fix the set_memory_xx() permission functions to
deal with zero sizes correctly"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8544/1: set_memory_xx fixes
ARM: 8534/1: virt: fix hyp-stub build for pre-ARMv7 CPUs
Add iio-hwmon node to expose the temperature channel on Vybrid as
hardware monitor device using the iio_hwmon driver.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Change iio_hwmon nodes to use hypen in node names instead of
underscore.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
- addition of the NAND flash node
- addition of the dma properties for UART/USART nodes
- one update of the sama5d2 Xplained phy node
- addition of USB pinmux, button and leds
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJW1w1UAAoJEAf03oE53VmQmkAIALy7FfwfsXwV4EBMjrkyBbHF
6fODom/DihCOaATD1tOaKaW0imyNXRu6qsnV5PZNRU7SCbJffolcY852iAW8I6hL
qmdTumHGQszMJu95Nz+au04l9rqGvzeQ3v136YueMFtn6oQydF/6ttQzjjcCRKPy
0FRTk6IKroKZ2qRl4dbvnMF1QJW+3eSe5U3mULEkTdc2Fup60cfwP9Z8uzzYIYgf
CnMwyakQxqp/Y9tYTIMS/RKj+VuQxI0+nN6f8dWKsWbIKIEk6n8W+RtrKdYl1GZ2
VT0GsCJ/qw+EHqk3dD45tFFIvdiXIc9UElB4p+s7CLqX4GAShN1JNkidkBrTgKw=
=7QLe
-----END PGP SIGNATURE-----
Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "at91: dt for 4.6 #2" from Nicolas Ferre:
Second 4.6 DT series, all patches for sama5d2 and its Xplained board:
- addition of the NAND flash node
- addition of the dma properties for UART/USART nodes
- one update of the sama5d2 Xplained phy node
- addition of USB pinmux, button and leds
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d2 Xplained: add leds node
ARM: dts: at91: sama5d2 Xplained: add user push button
ARM: dts: at91: sama5d2 Xplained: set pin muxing for usb gadget and usb host
ARM: dts: at91: sama5d2: add nand0 and nfc0 nodes
ARM: dts: at91: sama5d2: add dma properties to UART nodes
ARM: dts: at91: sama5d2 Xplained: Correct the macb irq pinctrl node
-----------
- Fix clock references in GPIO nodes
- Add early support to stm32f469 MCU
- Add USB HS support in host mdoe to stm32429-eval board
- Add Ethernet support to stm32429-eval board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW1rPwAAoJEMo4jShGhw+JJo0QANKHRLLRxNy/fGCp/eg5mabi
SfGxa+5K3wtFzYCo49bsHBY9e1f9mjck8TnJDqUPhWreF4kyCiDkSi93lHkqjYu0
+vYLtHdzTjWWcYZr9SsBfsMQURqAN9SypTIzgPgAy3ZeX50uhaZZQp9kAL/vn4Nr
8o2wfG5BuNzVdPcZBHTfab9anzsqZHTzUVds2h9o+qgMiHiPtFMJuSaOvMDCu/gK
Jp01NMY77ACE6s5k19EVxU42WE0Q+QmCEFig5xFjm6xUdIQdFSKx1Gal0Ngg9t0Q
CkOdjOVTWWbFtKWP+D80U996FmRY0xT705E97f123KnQJ64wJ7izdZuEDRy/2bgM
GPCdihQmBZLzf9PnXTpypKvrsoMG36CxSnFMbzSYrCHuPBRf3Ii8QyO3lr5s993A
a+VOAhij6TePp/P18mlL+XUCPV1Y+bAUJTDZpVgP4KbhrrdwkioHEV7KZ2fpK+bu
Wa5696DUqIjMsixBIWxc4FxR88t8AffpPIKu3vgMZV+bxFApXQF9b4R+JppAkZtg
mBxj84mt26tkhlnUkeBqLWx0/f8oAuUhDCCgrdmS7/xPOg29uHhkmG0P0Q0D/+5+
ulh3WcHwC6/v94C8NkKWh8z5RfMSlO81DDCGVY0e8gUOeY4F64eFEKGjQlGqCr6j
ePT0lq3OkSs3W0ih4VV+
=SVE6
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32 into next/dt
Merge "STM32 DT updates for v4.6 #2" from Maxime Coquelin:
Highlights:
-----------
- Fix clock references in GPIO nodes
- Add early support to stm32f469 MCU
- Add USB HS support in host mdoe to stm32429-eval board
- Add Ethernet support to stm32429-eval board
* tag 'stm32-dt-for-v4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32:
ARM: dts: stm32f429: Enable Ethernet on Eval board
ARM: dts: stm32f429: Add Ethernet support
ARM: dts: stm32f429: Add system config bank node
ARM: dts: stm32429i-eval: Add USB HS host mode support
ARM: dts: stm32f429: Fix clocks referenced by GPIO banks
ARM: stm32: Supply a DTS file for the STM32F469 Discovery board
- A series of GPMC related interrupt changes from
Rogeq Quadros <rogerq@ti.com> to prepare adding interrupt
support to the NAND driver
- Add RTC support for ti81xx
- Correct LogicPD Torpedo mode description
- Add basic support for LG Optimus Black phone in several
patches by Paul Kocialkowski <contact@paulk.fr>
- Change address-cells for dra7 for LPAE
- Add TBCLK for PWMSS on dra7
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW1h3JAAoJEBvUPslcq6Vz3sQQALjoT1HdNXPsS9fxoCBMRvcc
ZLMrntfj7QId/uZ63zhSxUqYRZWAGz9paDl43uS6uwWGL7G+Mml8fcpxKR008co2
gKPmAwTIYtfZDq63/mQ38jIkmr4Nj/qvY6COFDz2s5IIv41m2LMEleX5QBs8k/3X
F0FL5A9DYRaVZ5tYmZ64mVcJM/CIdDwyRjhtlV1QHVJrDQVPqcRyZGLuRzQKgati
HG0rUc8/B4ECEryrDK5ZtNqJ5LmpThfyzrjaUMzA8mOBo5HTAOOAkwFTtAxppba9
mHZQgNrJ+nAOShDmb+1wAanWw9s+UtsjKppbOhNdk2QyP4DCX8WIsRPZtp/aiDN8
6+I9mYspffe+uFKrwOpcWqtUk+Dft4P0rbcWGm5Pp+dbfSa94gYoyzHDByP5Lgtv
DOMpEZfqC/uHuhjS3ZIN4EnT2t3mY2aMupWYIWKxjv06X+Cp80XIdB5NVGzGFsqe
5ksvykF75YxMskdyo6egT+2jr+bgRkEs6H76ZHqkc6qTtGxIu6JHiuolOOen8uGH
gk3QbWY6oN6uzwtpcddQkrZkYxeoxOIH9AobHuNQ2MlCE0HwCXNE7U79/fjAv9Zs
dbwkVo5C0fraNG+f2waFskwni3mkUYiUIs8/YXXPLsXKavs9XvL5Wxxz/u7v5c+/
0hdZB8mJuoEtKvmhNk8Z
=JMzE
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.6/dt-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Part 2 of device tree changes for omaps for v4.6 merge window" from Tony Lindgren:
- A series of GPMC related interrupt changes from
Rogeq Quadros <rogerq@ti.com> to prepare adding interrupt
support to the NAND driver
- Add RTC support for ti81xx
- Correct LogicPD Torpedo mode description
- Add basic support for LG Optimus Black phone in several
patches by Paul Kocialkowski <contact@paulk.fr>
- Change address-cells for dra7 for LPAE
- Add TBCLK for PWMSS on dra7
* tag 'omap-for-v4.6/dt-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
ARM: dts: omap3-sniper: TWL4030 keypad support
Revert "ARM: dts: DRA7: Add dt nodes for PWMSS"
ARM: dts: dm814x: dra62x: Disable wait pin monitoring for NAND
ARM: dts: dm814x: dra62x: Fix NAND device nodes
ARM: dts: DRA7: Add dt nodes for PWMSS
ARM: dts: DRA7: Add TBCLK for PWMSS
ARM: dts: DRA7: change address-cells and size-cells
ARM: dts: omap3-sniper: USB OTG support
ARM: dts: LG Optimus Black codename sniper basic support
ARM: dts: dm3730-torpedo-devkit: Add "Wireless" to model
ARM: dts: Add RTC entry for dm816x
ARM: dts: Add RTC entry for dm814x and dra62x
ARM: dts: omap3: Fix NAND device nodes
ARM: dts: dm8168-evm: ARM: dts: Disable wait pin monitoring for NAND
ARM: dts: dm816x: Fix NAND device nodes
ARM: dts: am335x: Disable wait pin monitoring for NAND
ARM: dts: am335x: Fix NAND device nodes
ARM: dts: am437x: Disable wait pin monitoring for NAND
ARM: dts: am437x: Fix NAND device nodes
ARM: dts: dra7: Remove redundant nand property
...
- New i.MX6 board support: NXP/Freescale imx6qp boards, Advantech/GE,
Uniwest evi, Engicam IMX6 Q7, Toradex Apalis SoM and Ixora carrier
boards
- Relicense vf610 dts files under GPLv2/X11
- A patch series from Stefan updating Vybrid Colibri board support with
PMU, regulators and other devices enabled
- Correct PWM pinmux for Ventana boards and add more pinmux for GW54xx
- Clean up imx6q-tbs2910 dts file and add SATA PHY configuration
- A series from Russell cleaning up hummingboard dts files
- A series from Lothar updating Ka-Ro i.MX28, i.MX53 and i.MX6 boards
to use better audio codec frequency and display configurations
- Clean up whitespaces in i.MX6UL pinctrl header and add more devices
support for the SoC
- Other random dts updates to enable various devices
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJW1aZfAAoJEFBXWFqHsHzOWvwH/1ieekZ5VYnGyO4CT39DaNxU
LMkywkPtp8oUfdVHOfGEMj43knYHsaVFakGS2w8iMNzg+YonWXG/mkR3HUJmoS1L
HzFEnapLzACSSCbn8yZzWzzNvAlg2arqFErQUlhXe9/CNz64uZSigsO3Ib/JNOlX
GWDRa8szryEkEyk2cJo/wyWWSkLGGRai4uNBR6BmUq/MltVjVHOvTV5NeyKpinHZ
mQQFGEbvVk1hJ0sfceX/rmdxgvV0H3Axq8C0JyzbevUTcvS45A85tEXHkrHbYb/f
mJCNXxmmt+NrH8x79YxnuhKTRQ8lNn8fBu9wOtMaBJjRNB3ie3HBh2QabXBs/MA=
=FKmy
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt2
Merge "i.MX device tree updates for 4.6" from Shawn Guo:
- New i.MX6 board support: NXP/Freescale imx6qp boards, Advantech/GE,
Uniwest evi, Engicam IMX6 Q7, Toradex Apalis SoM and Ixora carrier
boards
- Relicense vf610 dts files under GPLv2/X11
- A patch series from Stefan updating Vybrid Colibri board support with
PMU, regulators and other devices enabled
- Correct PWM pinmux for Ventana boards and add more pinmux for GW54xx
- Clean up imx6q-tbs2910 dts file and add SATA PHY configuration
- A series from Russell cleaning up hummingboard dts files
- A series from Lothar updating Ka-Ro i.MX28, i.MX53 and i.MX6 boards
to use better audio codec frequency and display configurations
- Clean up whitespaces in i.MX6UL pinctrl header and add more devices
support for the SoC
- Other random dts updates to enable various devices
* tag 'imx-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (75 commits)
ARM: dts: imx53-qsb: Fix gpio button polarity
ARM: dts: vfxxx: Add DAC node for Vybrid SoC
ARM: dts: imx6q: add missing links between ipu2 and mipi dsi
ARM: dts: imx: Add support for Advantech/GE B850v3
ARM: dts: imx: Add support for Advantech/GE B650v3
ARM: dts: imx: Add support for Advantech/GE B450v3
ARM: dts: imx: Add support for Advantech/GE Bx50v3
ARM: dts: imx: Add Advantech BA-16 Qseven module
of: Add vendor prefix for General Electric Company
of: Add vendor prefix for Advantech Corporation
ARM: dts: imx35.dtsi: change the clock information for usb
ARM: dts: imx25.dtsi: change the clock information for usb
ARM: dts: imx6ul: add kpp support
ARM: dts: imx6ul: add gpmi support
ARM: dts: imx6ul: add lcdif support
ARM: dts: imx6ul: add sai support
ARM: dts: imx6ul: add flexcan support
ARM: dts: imx6ul: add sdma support
ARM: dts: imx6ul: add pwm[1-4] nodes
ARM: dts: imx6ul: disable PWMs by default
...
1. Split common reboot/poweroff node to separate DTSI.
2. Don't overheat Odroid XU3 by cooling CPU with cpufreq.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW1VvJAAoJEME3ZuaGi4PX0IoP/24addMWJyve/UVCh28cNV0l
gNWhCuVq1bXJIPRNSw+ZOln/XZSjcyuwqU1JNfjz2SsgaaVffPGIioJbKk55qnW7
gUO6vtwO3hxMe1kmAp7cehOep3zSr7YjxvckCmTZVZm/S0skNtsY1YM5M1hqBqi5
yoiozpoUk7LE+4VEYlDhjArwW4qaiQ1PzwD7w+G91zpuRefPiKslWdiOJw0h7BD/
yA0X6rbXC2zjRfKI5kF6dq/bKpWAqweW1FshA4EWG5Tx6jrip2q9qlH5bCl423lc
55mbJYg0YYMBt4I/GQ2oVRnqQulraj2Id2txrXlVbyji9fq7rvJdoMkVjH3CXyod
P7s7FqCgLxd/VVZw9n/Yz8XFlMRvhFMBQ/9ZXm2rpJoRcW3IekIXib23h8kX1I5l
Dd8PCAwmjCRzWCGIaGh1M7JfGDKTXyCrohK+iu78PCJQd0PYkF79Bzc7Ckcsyj/k
P7wzjpwZb83RkSU/VhgpqWxBFICTEyHruLLVCIiTFLyC0CUYOtff9aUYAiWNCQRZ
moLTJr7bqMwuDd0kz/poJ8wdQ+FRZEQfnY64Lxy73L6/lHg9tbHw3tDC7OP3RyWX
QzR3kKrDQdkUp7O+i8YPmQ+AdfnA1cqqds4RlFm+/m6Rm3/7V6d9I1bLy3hgrYcJ
87Zu00PFeuDrDORDhRCY
=P/fL
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "ARM: EXYNOS: dts for 4.6, 2nd pull" from Krzysztof Kozlowski:
Samsung DeviceTree updates and improvements for v4.6, second round:
1. Split common reboot/poweroff node to separate DTSI.
2. Don't overheat Odroid XU3 by cooling CPU with cpufreq.
* tag 'samsung-dt-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Don't overheat the Odroid XU3-Lite on high load
ARM: dts: exynos: Add cooling levels for Exynos5422/5800 CPUs
ARM: dts: exynos: Add cooling levels for Exynos5420 CPUs
ARM: dts: exynos: Move syscon reboot/poweroff to common dtsi
Add the three leds on the sama5d2 Xplained board with their pinctrl node.
The blue led is positioned with the "heartbeat" trigger.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: add commit message and adapt to newer kernel]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add the push button named "PB USER" with code 0x104. Associated pinctrl node is
also added.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
For USB gadget on port A (device mode):
- pin PA31 is configured as an input GPIO which triggers an interrupt when
vbus is detected on USB port A.
- pin PB9 is configured as an output GPIO and set to low level so the
board doesn't supply vbus to USB port A.
For USB host:
- pin PB10 is configured as an output GPIO and is active at high level.
The ohci driver will activate this pin so the board supplies vbus to USB
port B.
- pin PB9 should be configured as an output GPIO and active at high level
to use to USB port A in host mode (conflicts with USB gadget).
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
MAC is connected to a PHY in MII mode.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
These use the standard clock bindings and now we can make some
of the fixed clocks into real clocks.
Note that the clock output names may become optional as we
probably want to eventually use descriptive names, or use
just dynamically generated names as suggested by Tero.
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Detailed description for patchset:
1. Add new EXTCON_CHG_USB_SDP type
- SDP (Standard Downstream Port) USB Charging Port
means the charging connector.a
2. Add the VBUS detection by using GPIO on extcon-palmas
- Beaglex15 board uses the extcon-palmas driver
But, beaglex15 board need the GPIO support for VBUS
detection.
3. Fix the minor issue of extcon drivers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW063aAAoJEJzN3yze689ThbEQAJbn/pHDRlw7u8NUiNfRbQWd
uf//IiF2tbJ8eGpCvYIh+dLSlFbFzn3qIETAXJjZ7NfqYpgZsDAwFoMnVF6FfcMG
o2GAVGnUaXge+s+r5PkIwaCRh9LWO5iHJTHjykonhXaKKO4NrHxtsspo/We6Kth4
kmsrmovWd1CvnsvNZJXFSFf37z2eZFG+RYyrveKhFiTlliqyX/DT/RgOqPPPa0UC
9FBXrQ67ibKymX2qYLb5USQnppNFrnzDCacJBiFc2z/kpFFkII7XDrJVogn2JJfZ
M4uQ8JWqBhjrh2yU1FtQ7vuBfk8/Ssbvbp7J+roHJZGwe6AjVY2d3WCRGMLy/fFh
rCfsVvCrwupPVsVj50yTVyEJ0kiDZ9tz3rboWxfuTv/AtRxpUm9gMZ6yE/g2cBl4
RnkYp9dE/Kmu5BaaJZm9yIlHOEgQD/nhXGWm+BdgJBPB2+qAA0D7VPav0Fazjr8O
fN/kyaFHZ5jxSynGVCTsbfD8cJiVWdRzyxwoeXllvGqxwcdgHzX7LrTXrDkRtgC3
5r1B6qgm0kpPxYotrfPI+vAQnR5PGYBa0L4mwXha1rnonwI39QIgg76ZsHyy6k2u
rwGpT3zQmxFs9puf6pFAGmFCaLd1nb5r7FrslkZsn4gG100Gi0ONRRyN6Jx7f7W2
x/EvDnRYTM/pNpNp04Yb
=Zxas
-----END PGP SIGNATURE-----
Merge tag 'extcon-next-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-testing
Chanwoo writes:
Update extcon for 4.6
Detailed description for patchset:
1. Add new EXTCON_CHG_USB_SDP type
- SDP (Standard Downstream Port) USB Charging Port
means the charging connector.a
2. Add the VBUS detection by using GPIO on extcon-palmas
- Beaglex15 board uses the extcon-palmas driver
But, beaglex15 board need the GPIO support for VBUS
detection.
3. Fix the minor issue of extcon drivers
In the final versions of the Porter board (called "PORTER_C") Renesas
decided to get rid of the Maxim Integrated MAX3355 OTG chip and didn't
add any other provision to differ the host/gadget mode, so we'll have to
remove no longer valid "renesas,enable-gpio" property from the HS-USB
device node. Hopefully, the earlier revisions of the board were never
seen in the wild...
Fixes: c794f6a09a ("ARM: shmobile: porter: add HS-USB DT support")
Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds support for the volume and gesture keys, using TWL4030 keypad.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This reverts commit 5fcc673067.
The binding may need to change pending related hwmod comments,
so reverting as requested by Paul Walmsley <paul@pwsan.com>.
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] dm814x TRM: SPRUGZ8F: 11.2.4.12.2 NAND Device-Ready Pin
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add Ethernet support (Synopsys MAC IP 3.50a) on stm32f429 SOC.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
The polarity of the gpio buttons is defined to '0' which is
active high. The buttons are active low though which has been verified by
testing it and by looking into the schematics. While at it use
defines rathers than numbers for the key codes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Both nodes are required to access NAND Flash memory. Additional
settings will be necessary at the board level to use it.
Tested-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Andrew Lunn