Commit Graph

13677 Commits

Author SHA1 Message Date
Andre Przywara 94cc3f1baa arm64: dts: juno: Fix SCPI shared mem node name
The SRAM DT binding requires child nodes to use a certain node name
scheme.

Change the naming from scp-shmem to scp-sram to comply with that.

Link: https://lore.kernel.org/r/20200513103016.130417-19-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18 17:08:54 +01:00
Andre Przywara 36d48981d6 arm64: dts: juno: Fix GPU interrupt order
The Mali binding insists on the GPU interrupts to be in ordered as: job,
mmu, gpu.
Sort the GPU interrupts and interrupt-names properties accordingly.

Link: https://lore.kernel.org/r/20200513103016.130417-17-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18 17:08:54 +01:00
Andre Przywara 9d0a36ddcc arm64: dts: fvp/juno: Fix bus node names
Most Arm Ltd. boards are employing a layered bus structure, to map
the hardware design (SoC, motherboard, IOFPGA) and structure the DTs.

The "simple-bus" nodes only allow a limited set of node names. Switch
to use *-bus to be binding compliant.

This relies on a pending dt-schema.git fix for now:
https://github.com/devicetree-org/dt-schema/pull/38

Link: https://lore.kernel.org/r/20200513103016.130417-16-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18 17:08:54 +01:00
Andre Przywara 906e6dd481 arm64: dts: fvp: Fix SMMU DT node
The SMMU name in the RevC FVP DT file was not fully binding compliant.

Adjust the node name to match the binding's list of allowed names, also
shuffle the order of the interrupts to comply with the expected order.

Link: https://lore.kernel.org/r/20200513103016.130417-15-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18 17:08:54 +01:00
Andre Przywara 608f1b6cf3 arm64: dts: fvp/juno: Fix serial node names
The UARTs for all Arm Ltd. boards were using "uart" as their node name
stub.

Replace that with the required "serial" string, to comply with the PL011
DT binding.

Link: https://lore.kernel.org/r/20200513103016.130417-14-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18 17:08:54 +01:00
Andre Przywara edfac966f6 arm64: dts: juno: Use proper DT node name for USB
The EHCI/OCHI DT binding requires to use "usb" as the node name stub.

Replace the existing name with "usb" to comply with the binding.

Link: https://lore.kernel.org/r/20200513103016.130417-13-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18 17:08:54 +01:00
Andre Przywara fac959c93f arm64: dts: fvp: Fix ITS node names and #msi-cells
The GIC ITS nodes in the fastmodel DTS files were not fully binding
compliant.

Use one of the allowed node names, also add the required #msi-cells
property for the older model.

Link: https://lore.kernel.org/r/20200513103016.130417-12-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17 18:57:10 +01:00
Andre Przywara 78631aecc5 arm64: dts: fvp: Fix GIC child nodes
The GIC DT nodes for the fastmodels were not fully compliant with the
DT binding, which has certain expectations about child nodes and their
size and address cells values.

Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
This requires adjusting the interrupt nexus nodes as well, as one
field of the interrupt-map property depends on the GIC's address-size.

Since the .dts files share interrupt nexus nodes across different
interrupt controllers (GICv2 vs. GICv3), we need to use the only
commonly allowed #address-size value of <1> for both.

Link: https://lore.kernel.org/r/20200513103016.130417-11-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17 18:57:10 +01:00
Andre Przywara a78aee9e43 arm64: dts: juno: Fix GIC child nodes
The GIC DT nodes for the Juno boards were not fully compliant with
the DT binding, which has certain expectations about child nodes and
their size and address cells values.

Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
This requires adjusting the interrupt nexus nodes as well, as one
field of the interrupt-map property depends on the GIC's address-size.

Link: https://lore.kernel.org/r/20200513103016.130417-10-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17 18:57:10 +01:00
Andre Przywara 336edacfb9 arm64: dts: fvp: Fix GIC compatible names
The GIC DT binding only allows certain combinations of DT compatible
strings. The somewhat awkward "arm,cortex-a15-gic", "arm,cortex-a9-gic"
is not among those.

Drop that combination of different "cortex" based strings used for the
models, and replace it with the more useful combination including
"arm,gic-400".

Link: https://lore.kernel.org/r/20200513103016.130417-9-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17 18:57:10 +01:00
Andre Przywara 0e529dae51 arm64: dts: juno: Fix mem-timer
The Juno's mem-timer DT node was not fully compliant with the DT binding,
which has certain expectation about child nodes and their size and
address cells values.

Use a cell size of 1, as the binding requests, and spell out the ranges
property to be binding compliant.

Link: https://lore.kernel.org/r/20200513103016.130417-8-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17 18:57:10 +01:00
Andre Przywara 948204a1bf arm64: dts: juno: Move fixed devices out of bus node
The devicetree compiler complains when DT nodes without a reg property
live inside a (simple) bus node:
Warning (simple_bus_reg): Node /bus@8000000/v2m_refclk32khz
                          missing or empty reg/ranges property

Move the fixed clocks, the fixed regulator, and the gpio keys to the
root node, since they do not depend on any busses.

Link: https://lore.kernel.org/r/20200513103016.130417-7-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17 18:57:10 +01:00
Andre Przywara feebdc3f79 arm64: dts: fvp: Move fixed clocks out of bus node
The devicetree compiler complains when DT nodes without a reg property
live inside a (simple) bus node:
Warning (simple_bus_reg): Node /bus@8000000/v2m_refclk32khz
                          missing or empty reg/ranges property

Move the fixed clocks to the root node, since they do not depend on any
busses.

Link: https://lore.kernel.org/r/20200513103016.130417-6-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17 18:57:10 +01:00
Marek Behún c2671acbbb arm64: dts: armada-3720-turris-mox: fix SFP binding
The sfp compatible should be 'sff,sfp', not 'sff,sfp+'. We used patched
kernel where the latter was working.

Fixes: 7109d817db ("arm64: dts: marvell: add DTS for Turris Mox")
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17 18:57:48 +02:00
Andre Przywara 849bfc3dfc arm64: dts: fvp: Move fixed devices out of bus node
The devicetree compiler complains when DT nodes without a reg property
live inside a (simple) bus node:
Warning (simple_bus_reg): Node /bus@8000000/motherboard-bus/v2m_refclk32khz
                          missing or empty reg/ranges property

Move the fixed clocks, the fixed regulator, and the config bus subtree
to the root node, since they do not depend on any busses.

Link: https://lore.kernel.org/r/20200513103016.130417-4-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17 17:56:48 +01:00
Marek Behún 7a2c36b039 arm64: dts: armada-3720-turris-mox: forbid SDR104 on SDIO for FCC purposes
Use sdhci-caps-mask to forbid SDR104 mode on the SDIO capable SDHCI
controller. Without this the device cannot pass electromagnetic
interference certifications.

Fixes: 7109d817db ("arm64: dts: marvell: add DTS for Turris Mox")
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17 18:56:29 +02:00
Andre Przywara bb5cce12ac arm64: dts: fvp/juno: Fix node address fields
The Arm Ltd. boards were using an outdated address convention in the DT
node names, by separating the high from the low 32-bits of an address by
a comma.

Remove the comma from the node name suffix to be DT spec compliant.

Link: https://lore.kernel.org/r/20200513103016.130417-3-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17 17:55:58 +01:00
Russell King 11b2af36cc arm64: dts: add uDPU i2c bus recovery
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17 18:07:34 +02:00
Baruch Siach 1e6e612853 arm64: dts: marvell: drop i2c timeout-ms property
The timeout-ms property for i2c master nodes is undocumented, and as
never been supported. Drop it.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17 18:00:11 +02:00
Pali Rohár 1b5a2dd9e2 arm64: dts: marvell: armada-37xx: Move PCIe max-link-speed property
Move the max-link-speed property of the PCIe node from board specific
device tree files to the generic armada-37xx.dtsi.

Armada 37xx supports only PCIe gen2 speed so max-link-speed property
should be in the generic armada-37xx.dtsi file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17 17:52:30 +02:00
Marek Behún df749cdb01 arm64: dts: marvell: armada-37xx: Move PCIe comphy handle property
Move the comphy handle property of the PCIe node from board specific
device tree files (EspressoBin and Turris Mox) to the generic
armada-37xx.dtsi.

This is correct since this is the only possible PCIe PHY configuration
on Armada 37xx, so when PCIe is enabled on any board, this handle is
correct.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17 17:52:13 +02:00
Marek Behún 7158780169 arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio function
We found out that we are unable to control the PERST# signal via the
default pin dedicated to be PERST# pin (GPIO2[3] pin) on A3700 SOC when
this pin is in EP_PCIE1_Resetn mode. There is a register in the PCIe
register space called PERSTN_GPIO_EN (D0088004[3]), but changing the
value of this register does not change the pin output when measuring
with voltmeter.

We do not know if this is a bug in the SOC, or if it works only when
PCIe controller is in a certain state.

Commit f4c7d053d7 ("PCI: aardvark: Wait for endpoint to be ready
before training link") says that when this pin changes pinctrl mode
from EP_PCIE1_Resetn to GPIO, the PERST# signal is asserted for a brief
moment.

So currently the situation is that on A3700 boards the PERST# signal is
asserted in U-Boot (because the code in U-Boot issues reset via this pin
via GPIO mode), and then in Linux by the obscure and undocumented
mechanism described by the above mentioned commit.

We want to issue PERST# signal in a known way, therefore this patch
changes the pcie_reset_pin function from "pcie" to "gpio" and adds the
reset-gpios property to the PCIe node in device tree files of
EspressoBin and Armada 3720 Dev Board (Turris Mox device tree already
has this property and uDPU does not have a PCIe port).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Remi Pommarel <repk@triplefau.lt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17 17:51:43 +02:00
Russell King 847c3323d5 arm64: dts: update SolidRun Armada 8040 phy interface types
Update the SolidRun Armada 8040 platforms phy interface types from the
old 10gbase-kr to the newer and more correct 10gbase-r.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17 17:43:48 +02:00
Fugang Duan f9654d26e1 arm64: dts: imx8mp: add "fsl,imx6sx-fec" compatible string
Add "fsl,imx6sx-fec" compatible string for fec node, then
i.MX8MP EVK ethernet function can work now.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-17 22:13:47 +08:00
Linus Torvalds 5c33696f2b ARM: SoC/dt fixes for v5.7
This round of fixes is almost exclusively device tree changes,
 with trivial defconfig fixes and one compiler warning fix
 added in.
 
 A number of patches are to fix dtc warnings, in particular on
 Amlogic, i.MX and Rockchips.
 
 Other notable changes include:
 
 Renesas:
  - Fix a wrong clock configuration on R-Mobile A1,
  - Fix IOMMU support on R-Car V3H
 
 Allwinner
  - Multiple audio fixes
 
 Qualcomm
  - Use a safe CPU voltage on MSM8996
  - Fixes to match a late audio driver change
 
 Rockchip:
  - Some fixes for the newly added Pinebook Pro
 
 NXP i.MX:
  - Fix I2C1 pinctrl configuration for i.MX27 phytec-phycard board.
  - Fix imx6dl-yapp4-ursa board Ethernet connection.
 
 OMAP:
  - A regression fix for non-existing can device on am534x-idk
  - Fix flakey wlan on droid4 where some devices would not connect
    at all because of internal pull being used with an external pull
  - Fix occasional missed wake-up events on droid4 modem uart
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl6/Dx8ACgkQmmx57+YA
 GNmRJw/+MjrVUuD+KHjkfOX68zJ4puLluj1PGn//t0DnQPkrmPnDMP0gs/62cMNc
 4U3SIlYCivSOiz6N6gyvEU+j/sMqzCn7J3jBsUqCEvcOBm0X3b1T6OAwK8kp1TVq
 zAbEs/YaHBYKPIUOrstZwLkTCDLUXQlqPs7aEubyZ+awqa+EW9joGDyrus53jCIP
 pbaLV+52TGpOENfKRv05k6eJrtLfNM6Yt5qoCPRE4DYvbSumwXarPT/WOC1V5C/9
 KUwh3bVi6bRUEuhIHomnKqLK+GA8DMVw+HU9vNHDHexbdSQGsIMuFrCyWktwEizq
 7FTAKpEiuFJkOD6eyNCe3x5f2W5isDRvV8ehULaCRa8CbiBJUGY9wOdllMAYLuna
 haFGjJ8aKIPwgmoxjFL534hXprAMAGAAm8ZUcULIS+X8/8R2c+fzIadJ6ZS+VmNh
 2Nq4qNAPh8pTJJXzM9oNtI7HQLwOkAp49/r5FOrSReUFQVt84ofHy/QxAUdDMTkq
 7250L8G+SrpDQiNxck2pOYIKNqQcRUeJU60fTlkQlljBIjKOTn9zUrEhYLpujD3g
 vKLBmpek67fHfXB/sBpFOALCYw7prRacIyZrDHUKgEhP85WnkXXoZ+NQL5edgZGC
 qZ+h5xeRc6eBFYSP30HYQYL4fhTYokvWSdu5AbWBdJlAoAHk1mQ=
 =fXzR
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-fixes-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC/dt fixes from Arnd Bergmann:
 "This round of fixes is almost exclusively device tree changes, with
  trivial defconfig fixes and one compiler warning fix added in.

  A number of patches are to fix dtc warnings, in particular on Amlogic,
  i.MX and Rockchips.

  Other notable changes include:

  Renesas:
   - Fix a wrong clock configuration on R-Mobile A1
   - Fix IOMMU support on R-Car V3H

  Allwinner
   - Multiple audio fixes

  Qualcomm
   - Use a safe CPU voltage on MSM8996
   - Fixes to match a late audio driver change

  Rockchip:
   - Some fixes for the newly added Pinebook Pro

  NXP i.MX:
   - Fix I2C1 pinctrl configuration for i.MX27 phytec-phycard board
   - Fix imx6dl-yapp4-ursa board Ethernet connection

  OMAP:
   - A regression fix for non-existing can device on am534x-idk
   - Fix flakey wlan on droid4 where some devices would not connect at
     all because of internal pull being used with an external pull
   - Fix occasional missed wake-up events on droid4 modem uart"

* tag 'arm-soc-fixes-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
  ARM: dts: iwg20d-q7-dbcm-ca: Remove unneeded properties in hdmi@39
  ARM: dts: renesas: Make hdmi encoder nodes compliant with DT bindings
  arm64: dts: renesas: Make hdmi encoder nodes compliant with DT bindings
  arm64: defconfig: add MEDIA_PLATFORM_SUPPORT
  arm64: defconfig: ARCH_R8A7795: follow changed config symbol name
  arm64: defconfig: add DRM_DISPLAY_CONNECTOR
  arm64: defconfig: DRM_DUMB_VGA_DAC: follow changed config symbol name
  ARM: oxnas: make ox820_boot_secondary static
  ARM: dts: r8a7740: Add missing extal2 to CPG node
  ARM: dts: omap4-droid4: Fix occasional lost wakeirq for uart1
  ARM: dts: omap4-droid4: Fix flakey wlan by disabling internal pull for gpio
  arm64: dts: allwinner: a64: Remove unused SPDIF sound card
  arm64: dts: allwinner: a64: pinetab: Fix cpvdd supply name
  arm64: dts: meson-g12: remove spurious blank line
  arm64: dts: meson-g12b-khadas-vim3: add missing frddr_a status property
  arm64: dts: meson-g12-common: fix dwc2 clock names
  arm64: dts: meson-g12b-ugoos-am6: fix usb vbus-supply
  arm64: dts: freescale: imx8mp: update input_val for AUDIOMIX_BIT_STREAM
  ARM: dts: r7s9210: Remove bogus clock-names from OSTM nodes
  ARM: dts: rockchip: fix pinctrl sub nodename for spi in rk322x.dtsi
  ...
2020-05-16 13:27:58 -07:00
Ulrich Hecht f0e5405b9e arm64: dts: mt8173: Add capacity-dmips-mhz attributes
Dhrystone benchmark on Acer Chromebook R13 CB5-312T:
A72: 15698587 dps @ 1807 MHz
A53:  7598784 dps @ 1703 MHz

Signed-off-by: Ulrich Hecht <uli-qwV78thtvt0@public.gmane.org>
Link: https://lore.kernel.org/r/1563529816-3992-1-git-send-email-uli@fpond.eu
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16 18:36:40 +02:00
Chunfeng Yun f0210518aa arm64: dts: mt2712: use non-empty ranges for usb-phy
Use non-empty ranges for usb-phy to make the layout of
its registers clearer;
Replace deprecated compatible by generic

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16 17:34:48 +02:00
Hsin-Yi Wang fff1257317 arm64: dts: mt8173: fix mdp aliases property name
Fix warning:
Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20200414030815.192104-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16 17:09:06 +02:00
Manivannan Sadhasivam 1b118385de arm64: dts: mediatek: Switch to SPDX license identifier for MT6797 SoC
Switch to SPDX license identifier for MT6797 SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200222162444.11590-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16 17:03:30 +02:00
Manivannan Sadhasivam 1f3f87305e arm64: dts: mediatek: Enable I2C support for 96Boards X20 Development board
There are 7 I2C ports used on this board. Hence, enable all of them.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200222162444.11590-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16 17:03:30 +02:00
Manivannan Sadhasivam d3c84299f2 arm64: dts: mediatek: Add I2C support for MT6797 SoC
Add I2C support for Mediatek MT6797 SoC. There are a total of 8 I2C
controllers in this SoC (2 being shared) and they are same as the
controllers present in MT6577 SoC. Hence, the driver support is added with
DT fallback method.

As per the datasheet, there are controllers with _imm prefix like i2c2_imm
and i2c3_imm. These appears to be in different memory regions but sharing
the same pins with i2c2 and i2c3 respectively. Since there is no clear
evidence of what they really are, I've adapted the numbering/naming scheme
from the downstream code by Mediatek.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200222162444.11590-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16 17:03:30 +02:00
Marc Zyngier 5107000faa KVM: arm64: Make KVM_CAP_MAX_VCPUS compatible with the selected GIC version
KVM_CAP_MAX_VCPUS always return the maximum possible number of
VCPUs, irrespective of the selected interrupt controller. This
is pretty misleading for userspace that selects a GICv2 on a GICv3
system that supports v2 compat: It always gets a maximum of 512
VCPUs, even if the effective limit is 8. The 9th VCPU will fail
to be created, which is unexpected as far as userspace is concerned.

Fortunately, we already have the right information stashed in the
kvm structure, and we can return it as requested.

Reported-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Alexandru Elisei <alexandru.elisei@arm.com>
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Link: https://lore.kernel.org/r/20200427141507.284985-1-maz@kernel.org
2020-05-16 15:05:02 +01:00
Keqian Zhu c862626e19 KVM: arm64: Support enabling dirty log gradually in small chunks
There is already support of enabling dirty log gradually in small chunks
for x86 in commit 3c9bd4006b ("KVM: x86: enable dirty log gradually in
small chunks"). This adds support for arm64.

x86 still writes protect all huge pages when DIRTY_LOG_INITIALLY_ALL_SET
is enabled. However, for arm64, both huge pages and normal pages can be
write protected gradually by userspace.

Under the Huawei Kunpeng 920 2.6GHz platform, I did some tests on 128G
Linux VMs with different page size. The memory pressure is 127G in each
case. The time taken of memory_global_dirty_log_start in QEMU is listed
below:

Page Size      Before    After Optimization
  4K            650ms         1.8ms
  2M             4ms          1.8ms
  1G             2ms          1.8ms

Besides the time reduction, the biggest improvement is that we will minimize
the performance side effect (because of dissolving huge pages and marking
memslots dirty) on guest after enabling dirty log.

Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200413122023.52583-1-zhukeqian1@huawei.com
2020-05-16 15:05:02 +01:00
Suzuki K Poulose 0529c90212 KVM: arm64: Unify handling THP backed host memory
We support mapping host memory backed by PMD transparent hugepages
at stage2 as huge pages. However the checks are now spread across
two different places. Let us unify the handling of the THPs to
keep the code cleaner (and future proof for PUD THP support).
This patch moves transparent_hugepage_adjust() closer to the caller
to avoid a forward declaration for fault_supports_stage2_huge_mappings().

Also, since we already handle the case where the host VA and the guest
PA may not be aligned, the explicit VM_BUG_ON() is not required.

Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200507123546.1875-3-yuzenghui@huawei.com
2020-05-16 15:05:02 +01:00
Suzuki K Poulose 9f2836146b KVM: arm64: Clean up the checking for huge mapping
If we are checking whether the stage2 can map PAGE_SIZE,
we don't have to do the boundary checks as both the host
VMA and the guest memslots are page aligned. Bail the case
easily.

While we're at it, fixup a typo in the comment below.

Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200507123546.1875-2-yuzenghui@huawei.com
2020-05-16 15:05:02 +01:00
Jiang Yi 48c963e31b KVM: arm/arm64: Release kvm->mmu_lock in loop to prevent starvation
Do cond_resched_lock() in stage2_flush_memslot() like what is done in
unmap_stage2_range() and other places holding mmu_lock while processing
a possibly large range of memory.

Signed-off-by: Jiang Yi <giangyi@amazon.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200415084229.29992-1-giangyi@amazon.com
2020-05-16 15:05:02 +01:00
Zenghui Yu 892713e97c KVM: arm64: Sidestep stage2_unmap_vm() on vcpu reset when S2FWB is supported
stage2_unmap_vm() was introduced to unmap user RAM region in the stage2
page table to make the caches coherent. E.g., a guest reboot with stage1
MMU disabled will access memory using non-cacheable attributes. If the
RAM and caches are not coherent at this stage, some evicted dirty cache
line may go and corrupt guest data in RAM.

Since ARMv8.4, S2FWB feature is mandatory and KVM will take advantage
of it to configure the stage2 page table and the attributes of memory
access. So we ensure that guests always access memory using cacheable
attributes and thus, the caches always be coherent.

So on CPUs that support S2FWB, we can safely reset the vcpu without a
heavy stage2 unmapping.

Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200415072835.1164-1-yuzenghui@huawei.com
2020-05-16 15:05:01 +01:00
Fuad Tabba 656012c731 KVM: Fix spelling in code comments
Fix spelling and typos (e.g., repeated words) in comments.

Signed-off-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200401140310.29701-1-tabba@google.com
2020-05-16 15:05:01 +01:00
Marc Zyngier ce6f8f02f9 KVM: arm64: Use cpus_have_final_cap for has_vhe()
By the time we start using the has_vhe() helper, we have long
discovered whether we are running VHE or not. It thus makes
sense to use cpus_have_final_cap() instead of cpus_have_const_cap(),
which leads to a small text size reduction.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: David Brazdil <dbrazdil@google.com>
Link: https://lore.kernel.org/r/20200513103828.74580-1-maz@kernel.org
2020-05-16 15:04:51 +01:00
Marc Zyngier c6fe89ff8b KVM: arm64: Simplify __kvm_timer_set_cntvoff implementation
Now that this function isn't constrained by the 32bit PCS,
let's simplify it by taking a single 64bit offset instead
of two 32bit parameters.

Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-05-16 15:04:18 +01:00
Fuad Tabba 25357de01b KVM: arm64: Clean up kvm makefiles
Consolidate references to the CONFIG_KVM configuration item to encompass
entire folders rather than per line.

Signed-off-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200505154520.194120-5-tabba@google.com
2020-05-16 15:04:18 +01:00
Will Deacon f26133624d KVM: arm64: Change CONFIG_KVM to a menuconfig entry
Changing CONFIG_KVM to be a 'menuconfig' entry in Kconfig mean that we
can straightforwardly enumerate optional features, such as the virtual
PMU device as dependent options.

Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200505154520.194120-4-tabba@google.com
2020-05-16 15:04:18 +01:00
Will Deacon bf7bc1df30 KVM: arm64: Update help text
arm64 KVM supports 16k pages since 02e0b7600f
("arm64: kvm: Add support for 16K pages"), so update the Kconfig help
text accordingly.

Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200505154520.194120-3-tabba@google.com
2020-05-16 15:04:18 +01:00
Will Deacon d82755b2e7 KVM: arm64: Kill off CONFIG_KVM_ARM_HOST
CONFIG_KVM_ARM_HOST is just a proxy for CONFIG_KVM, so remove it in favour
of the latter.

Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200505154520.194120-2-tabba@google.com
2020-05-16 15:04:18 +01:00
Marc Zyngier 9ed24f4b71 KVM: arm64: Move virt/kvm/arm to arch/arm64
Now that the 32bit KVM/arm host is a distant memory, let's move the
whole of the KVM/arm64 code into the arm64 tree.

As they said in the song: Welcome Home (Sanitarium).

Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200513104034.74741-1-maz@kernel.org
2020-05-16 15:03:59 +01:00
Arnd Bergmann d5fef88ccb Renesas fixes for v5.7 (take two)
- Fix a wrong clock configuration on R-Mobile A1,
   - Minor fixes that are fast-tracked to avoid introducing regressions
     during conversion of DT bindings to json-schema.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXr5jTgAKCRCKwlD9ZEnx
 cKSMAQCGIyrVtXHISZSFlp3poR1bBMejfxvZWmLIBzIPSw28SQEAqGTxP7dONrXY
 JIbYmduRiRfWK6h0ghr769xp/KQPIAQ=
 =dl06
 -----END PGP SIGNATURE-----

Merge tag 'renesas-fixes-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes

Renesas fixes for v5.7 (take two)

  - Fix a wrong clock configuration on R-Mobile A1,
  - Minor fixes that are fast-tracked to avoid introducing regressions
    during conversion of DT bindings to json-schema.

* tag 'renesas-fixes-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: dts: iwg20d-q7-dbcm-ca: Remove unneeded properties in hdmi@39
  ARM: dts: renesas: Make hdmi encoder nodes compliant with DT bindings
  arm64: dts: renesas: Make hdmi encoder nodes compliant with DT bindings
  ARM: dts: r8a7740: Add missing extal2 to CPG node

Link: https://lore.kernel.org/r/20200515125043.22811-1-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-15 23:14:36 +02:00
Arnd Bergmann 495e135643 Two fixes for the Allwinner SoCs, one to remove some inexistant sound card on
the A64, and one to fix the audio codec regulator on the pinetab.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXr7M6gAKCRDj7w1vZxhR
 xQxeAP4qE6EtWCAZoryxU3KMJGPRSDktuGFlzPkOL77svJvT9wEAkPvvgQtYk0UI
 7nCsv4YVvAZGCRVocUx2XUS/uFLhbA4=
 =BUW7
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-fixes-for-5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes

Two fixes for the Allwinner SoCs, one to remove some inexistant sound card on
the A64, and one to fix the audio codec regulator on the pinetab.

* tag 'sunxi-fixes-for-5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: a64: Remove unused SPDIF sound card
  arm64: dts: allwinner: a64: pinetab: Fix cpvdd supply name

Link: https://lore.kernel.org/r/f7a98a47-316d-4b1a-b5a5-0e1e330d5f52.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-15 23:13:45 +02:00
Arnd Bergmann a875e0e5a2 VExpress modularization
This series enables building various Versatile Express platform drivers
 as modules. The primary target is the Fast Model FVP which is supported
 in Android. As Android is moving towards their GKI, or generic kernel,
 the hardware support has to be in modules. Currently ARCH_VEXPRESS
 enables several built-in only drivers. Some of these are needed, but
 some are only needed for older 32-bit VExpress platforms and can just
 be disabled.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAl68MeUQHHJvYmhAa2Vy
 bmVsLm9yZwAKCRD6+121jbxhw/96EACb8MVXgss/RBPfcfKeb46tgdP6XfxlDqma
 /lWdd88KM3YZI0ym8uBQZX/XwUmuU1bcbxv9E/j0i+i/YER7qrdbsYfeU5CLhAbA
 vidC1fRuqXNPZRsnc5PnVP913PvRiNgNfGM4BUxz5i7aLfl9IGcujdY/uekEoo2i
 9nyAYxMmZBZsHU28y0nXuZaUK7mC7YDZFXM4z6u6Q0nnbS4r5C8b+cUCeTk0w8Ex
 pA1pTWjRFvnpT1wZZU65FRaxv33dO3MbReT84rbQvrRo/IDKFi+VfAw4/UJFWBoF
 Ck1cmEchjPcTf7ut/clET+LqCuCVESwmDGmOhJ78m7m8WxsdoaUSfJSsPNMF7dxE
 +ePIvl/jovqMnCCR+RKbpcIzQvOckk6zp1xnqQNDii46BSCayXQEYtoxRj0B0X3k
 c4izH58Z7NTUa+IbVf02bwqOl2qMlGSp2KocXNTrBqznRkmCiWB+HHmrX/TQusWL
 22sDHuxGRjOhD2yINOMQGeol7fXmIH7M2rjjpoGR1cWGRT/Xj7xU3Eme/VAE0nQv
 VHFoWW6YDVAfsuwJePgPrHysZcH96mhTCRVo9Gx1xC0IaZpcxFPQkk0LTKtu5CWY
 jYA1ml1vLDCl7l/yzfQjdtSm6lLg15ihZ+M6jbPdPacdBqmBL5UmPf30sW53XXAG
 BagmwNHCNQ==
 =c5eS
 -----END PGP SIGNATURE-----

Merge tag 'vexpress-modules-for-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into arm/soc

VExpress modularization

This series enables building various Versatile Express platform drivers
as modules. The primary target is the Fast Model FVP which is supported
in Android. As Android is moving towards their GKI, or generic kernel,
the hardware support has to be in modules. Currently ARCH_VEXPRESS
enables several built-in only drivers. Some of these are needed, but
some are only needed for older 32-bit VExpress platforms and can just
be disabled.

* tag 'vexpress-modules-for-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  ARM: vexpress: Don't select VEXPRESS_CONFIG
  bus: vexpress-config: Support building as module
  vexpress: Move setting master site to vexpress-config bus
  bus: vexpress-config: simplify config bus probing
  bus: vexpress-config: Merge vexpress-syscfg into vexpress-config
  mfd: vexpress-sysreg: Support building as a module
  mfd: vexpress-sysreg: Use devres API variants
  mfd: vexpress-sysreg: Drop unused syscon child devices
  mfd: vexpress-sysreg: Drop selecting CONFIG_CLKSRC_MMIO
  clk: vexpress-osc: Support building as a module
  clk: vexpress-osc: Use the devres clock API variants
  clk: versatile: Only enable SP810 on 32-bit by default
  clk: versatile: Rework kconfig structure
  amba: Retry adding deferred devices at late_initcall
  arm64: vexpress: Don't select CONFIG_POWER_RESET_VEXPRESS
  ARM: vexpress: Move vexpress_flags_set() into arch code

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-15 23:04:40 +02:00
David S. Miller da07f52d3c Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Move the bpf verifier trace check into the new switch statement in
HEAD.

Resolve the overlapping changes in hinic, where bug fixes overlap
the addition of VF support.

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-15 13:48:59 -07:00
Linus Torvalds f85c1598dd Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Pull networking fixes from David Miller:

 1) Fix sk_psock reference count leak on receive, from Xiyu Yang.

 2) CONFIG_HNS should be invisible, from Geert Uytterhoeven.

 3) Don't allow locking route MTUs in ipv6, RFCs actually forbid this,
    from Maciej Żenczykowski.

 4) ipv4 route redirect backoff wasn't actually enforced, from Paolo
    Abeni.

 5) Fix netprio cgroup v2 leak, from Zefan Li.

 6) Fix infinite loop on rmmod in conntrack, from Florian Westphal.

 7) Fix tcp SO_RCVLOWAT hangs, from Eric Dumazet.

 8) Various bpf probe handling fixes, from Daniel Borkmann.

* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (68 commits)
  selftests: mptcp: pm: rm the right tmp file
  dpaa2-eth: properly handle buffer size restrictions
  bpf: Restrict bpf_trace_printk()'s %s usage and add %pks, %pus specifier
  bpf: Add bpf_probe_read_{user, kernel}_str() to do_refine_retval_range
  bpf: Restrict bpf_probe_read{, str}() only to archs where they work
  MAINTAINERS: Mark networking drivers as Maintained.
  ipmr: Add lockdep expression to ipmr_for_each_table macro
  ipmr: Fix RCU list debugging warning
  drivers: net: hamradio: Fix suspicious RCU usage warning in bpqether.c
  net: phy: broadcom: fix BCM54XX_SHD_SCR3_TRDDAPD value for BCM54810
  tcp: fix error recovery in tcp_zerocopy_receive()
  MAINTAINERS: Add Jakub to networking drivers.
  MAINTAINERS: another add of Karsten Graul for S390 networking
  drivers: ipa: fix typos for ipa_smp2p structure doc
  pppoe: only process PADT targeted at local interfaces
  selftests/bpf: Enforce returning 0 for fentry/fexit programs
  bpf: Enforce returning 0 for fentry/fexit progs
  net: stmmac: fix num_por initialization
  security: Fix the default value of secid_to_secctx hook
  libbpf: Fix register naming in PT_REGS s390 macros
  ...
2020-05-15 13:10:06 -07:00
Dinh Nguyen fa4aa8a530 arm64: defconfig: Add LEDS_TRIGGER_TIMER
Add support for LEDS_TRIGGER_TIMER.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2020-05-15 14:19:02 -05:00
Sharat Masetty 39f3d3bb05 arm64: dts: qcom: sc7180: Add A618 gpu dt blob
This patch adds the required dt nodes and properties
to enabled A618 GPU.

Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Link: https://lore.kernel.org/r/1588329036-18732-1-git-send-email-smasetty@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15 12:03:49 -07:00
Linus Torvalds 01d8a74803 Fix flush_icache_range() second argument in machine_kexec() to be an
address rather than size.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAl6+z98ACgkQa9axLQDI
 XvFKOA//VFEAWOrCWS65DUn4TuonMG+foUp82zxaFZWK1epGCZoIEJQrSG6g5Png
 phL6Gx2oniqj+taLYZWqckMe+7k/yn9Xq+0DwDliMjaY9NB9bldE9J9ZGxpa4jBI
 qIrdaTgtRip1LQvm5BczmANGf86/p9E4nC6qHBJf9Stn9SYxoQuZlOGiwaK8XTe2
 QGn+NQ69ln7TkfUwEixhGI39dOHasrDAGgcUp/pTn2ki8mtpE2lG8+qSxxGTGTIT
 1SaJftER8JSc3VKjXKhOIaSwx1MqwTx0Cx4dTfAGhKzcQLdmXz0GDJjQCzU0weOP
 yHyH1gbJYUmB5X+CSA2OKssxsxcckVNMvTm7Jnn3Pb0f9oHVZQV4UR8cE/G40/hh
 c6OHAJXfmGla5GhNpRUXB5SGJyWDxaIrdZRXbDPCWGOqWxwIJyFWNz5h4kiVsyAe
 OJBtgzCqw3oUkr7KXgz0EECWV+T22+Y5cBbolptpqm7m6JbDQf/iviVJV5tkXnLF
 vkbZEx94Ajy4U4TZkQBWlJFN8M4Z+ttYuGYxebnurNI2Ottb0czGFypx+WXdGItp
 9rBaklIfzsCPoXZH0iHtaRxbDl4avwS46yKndtb2Y6tGoqqSNW4A6rf+S3YxvqBN
 bEBxMqxCuMxPWNPBb3bXpw4QlFo4LLkWQeAvbc59SROep35cPTo=
 =BoxO
 -----END PGP SIGNATURE-----

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fix from Catalin Marinas:
 "Fix flush_icache_range() second argument in machine_kexec() to be an
  address rather than size"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: fix the flush_icache_range arguments in machine_kexec
2020-05-15 11:08:46 -07:00
David Matlack cb953129bf kvm: add halt-polling cpu usage stats
Two new stats for exposing halt-polling cpu usage:
halt_poll_success_ns
halt_poll_fail_ns

Thus sum of these 2 stats is the total cpu time spent polling. "success"
means the VCPU polled until a virtual interrupt was delivered. "fail"
means the VCPU had to schedule out (either because the maximum poll time
was reached or it needed to yield the CPU).

To avoid touching every arch's kvm_vcpu_stat struct, only update and
export halt-polling cpu usage stats if we're on x86.

Exporting cpu usage as a u64 and in nanoseconds means we will overflow at
~500 years, which seems reasonably large.

Signed-off-by: David Matlack <dmatlack@google.com>
Signed-off-by: Jon Cargille <jcargill@google.com>
Reviewed-by: Jim Mattson <jmattson@google.com>

Message-Id: <20200508182240.68440-1-jcargill@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-05-15 12:26:26 -04:00
Sami Tolvanen 439dc2a117 arm64: scs: Add shadow stacks for SDEI
This change adds per-CPU shadow call stacks for the SDEI handler.
Similarly to how the kernel stacks are handled, we add separate shadow
stacks for normal and critical events.

Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: James Morse <james.morse@arm.com>
Tested-by: James Morse <james.morse@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-15 16:35:50 +01:00
Sami Tolvanen 5287569a79 arm64: Implement Shadow Call Stack
This change implements shadow stack switching, initial SCS set-up,
and interrupt shadow stacks for arm64.

Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-15 16:35:50 +01:00
Sami Tolvanen 9654736891 arm64: Disable SCS for hypervisor code
Disable SCS for code that runs at a different exception level by
adding __noscs to __hyp_text.

Suggested-by: James Morse <james.morse@arm.com>
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-15 16:35:50 +01:00
Sami Tolvanen cde5dec89e arm64: vdso: Disable Shadow Call Stack
Shadow stacks are only available in the kernel, so disable SCS
instrumentation for the vDSO.

Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-15 16:35:50 +01:00
Sami Tolvanen e73f02c6eb arm64: efi: Restore register x18 if it was corrupted
If we detect a corrupted x18, restore the register before jumping back
to potentially SCS instrumented code. This is safe, because the wrapper
is called with preemption disabled and a separate shadow stack is used
for interrupt handling.

Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-15 16:35:50 +01:00
Sami Tolvanen 6d37d81f44 arm64: Preserve register x18 when CPU is suspended
Don't lose the current task's shadow stack when the CPU is suspended.

Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-15 16:35:50 +01:00
Sami Tolvanen da64e9d1f8 arm64: Reserve register x18 from general allocation with SCS
Reserve the x18 register from general allocation when SCS is enabled,
because the compiler uses the register to store the current task's
shadow stack pointer. Note that all external kernel modules must also be
compiled with -ffixed-x18 if the kernel has SCS enabled.

Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-15 16:35:49 +01:00
Michael Kao 26af2884e4 arm64: dts: mt8173: fix cooling device range
When thermal reaches target temperature,it would be pinned to state 0
(max frequency and power).
Fix the throttling range to no limit.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
Link: https://lore.kernel.org/r/20200424082340.4127-1-michael.kao@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-15 17:32:24 +02:00
Hsin-Yi Wang 3b1f6c5e4d arm64: dts: mt8173: fix vcodec-enc clock
Fix the assigned-clock-parents to higher frequency clock to avoid h264
encode timeout:

[  134.763465] mtk_vpu 10020000.vpu: vpu ipi 4 ack time out !
[  134.769008] [MTK_VCODEC][ERROR][18]: vpu_enc_send_msg() vpu_ipi_send msg_id c002 len 32 fail -5
[  134.777707] [MTK_VCODEC][ERROR][18]: vpu_enc_encode() AP_IPIMSG_ENC_ENCODE 0 fail

venc_sel is the clock used by h264 encoder, and venclt_sel is the clock
used by vp8 encoder. Assign venc_sel to vcodecpll_ck and venclt_sel to
vcodecpll_370p5.

    vcodecpll                         1482000000
       vcodecpll_ck                    494000000
          venc_sel                     494000000
...
       vcodecpll_370p5                 370500000
          venclt_sel                   370500000

Fixes: fbbad0287c ("arm64: dts: Using standard CCF interface to set vcodec clk")
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200504124442.208004-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-15 17:27:38 +02:00
Daniel Borkmann 0ebeea8ca8 bpf: Restrict bpf_probe_read{, str}() only to archs where they work
Given the legacy bpf_probe_read{,str}() BPF helpers are broken on archs
with overlapping address ranges, we should really take the next step to
disable them from BPF use there.

To generally fix the situation, we've recently added new helper variants
bpf_probe_read_{user,kernel}() and bpf_probe_read_{user,kernel}_str().
For details on them, see 6ae08ae3de ("bpf: Add probe_read_{user, kernel}
and probe_read_{user,kernel}_str helpers").

Given bpf_probe_read{,str}() have been around for ~5 years by now, there
are plenty of users at least on x86 still relying on them today, so we
cannot remove them entirely w/o breaking the BPF tracing ecosystem.

However, their use should be restricted to archs with non-overlapping
address ranges where they are working in their current form. Therefore,
move this behind a CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE and
have x86, arm64, arm select it (other archs supporting it can follow-up
on it as well).

For the remaining archs, they can workaround easily by relying on the
feature probe from bpftool which spills out defines that can be used out
of BPF C code to implement the drop-in replacement for old/new kernels
via: bpftool feature probe macro

Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Reviewed-by: Masami Hiramatsu <mhiramat@kernel.org>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Brendan Gregg <brendan.d.gregg@gmail.com>
Cc: Christoph Hellwig <hch@lst.de>
Link: https://lore.kernel.org/bpf/20200515101118.6508-2-daniel@iogearbox.net
2020-05-15 08:10:36 -07:00
Greg Kroah-Hartman f877a18c08 FPGA Manager changes for 5.8
Here's the first set of changes for the 5.8-rc1 merge window.
 
 Dominic's change adds support for accessing AFU regions with gdb.
 Gustavo's change is a cleanup patch regarding variable lenght arrays.
 Richard's changes update dt-bindings and add support for stratix and agilex.
 Sergiu's changes update spi transfers with the new delay field.
 Xu's change addresses an issue with a wrong return value.
 Shubhrajyoti's change makes the Zynq FPGA driver return -EPROBE_DEFER on
 check of devm_clk_get failure.
 Xu's change for DFL enables multiple opens.
 
 All of these patches have been reviewed, have appropriate Acked-by's and
 have been in the last few linux-next releases without issues.
 
 Signed-off-by: Moritz Fischer <mdf@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iIUEABYIAC0WIQS/ea/a56fFi9QbQeJ+E8eWOj6VqQUCXrbxaw8cbWRmQGtlcm5l
 bC5vcmcACgkQfhPHljo+lamnQAD/dQa0AzlcPyIbo6pcufwyeZPgjKEunXiCd0vc
 nb1caZEBAMV69oNK441+vYy911LuY6x/hdz0Ch4E4NQK0zjUrAcM
 =LWCH
 -----END PGP SIGNATURE-----

Merge tag 'fpga-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga into char-misc-next

Moritz writes:

FPGA Manager changes for 5.8

Here's the first set of changes for the 5.8-rc1 merge window.

Dominic's change adds support for accessing AFU regions with gdb.
Gustavo's change is a cleanup patch regarding variable lenght arrays.
Richard's changes update dt-bindings and add support for stratix and agilex.
Sergiu's changes update spi transfers with the new delay field.
Xu's change addresses an issue with a wrong return value.
Shubhrajyoti's change makes the Zynq FPGA driver return -EPROBE_DEFER on
check of devm_clk_get failure.
Xu's change for DFL enables multiple opens.

All of these patches have been reviewed, have appropriate Acked-by's and
have been in the last few linux-next releases without issues.

Signed-off-by: Moritz Fischer <mdf@kernel.org>

* tag 'fpga-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
  fpga: dfl: afu: support debug access to memory-mapped afu regions
  fpga: dfl.h: Replace zero-length array with flexible-array member
  arm64: dts: agilex: correct service layer driver's compatible value
  dt-bindings, firmware: add compatible value Intel Stratix10 service layer binding
  fpga: stratix10-soc: add compatible property value for intel agilex
  arm64: dts: agilex: correct FPGA manager driver's compatible value
  dt-bindings: fpga: add compatible value to Stratix10 SoC FPGA manager binding
  fpga: machxo2-spi: Use new structure for SPI transfer delays
  fpga: ice40-spi: Use new structure for SPI transfer delays
  fpga: dfl: support multiple opens on feature device node.
2020-05-15 16:09:24 +02:00
Ricardo Cañuelo 72676ecfe1 arm64: dts: renesas: Make hdmi encoder nodes compliant with DT bindings
Small fixes to make these DTs compliant with the adi,adv7511w binding.

  r8a77970-eagle.dts,
  r8a77970-v3msk.dts,
  r8a77980-condor.dts,
  r8a77980-v3hsk.dts,
  r8a77990-ebisu.dts:
    Remove the adi,input-style and adi,input-justification properties.

  r8a77995-draak.dts:
    Reorder the I2C slave addresses of the hdmi-encoder@39 node and
    remove the adi,input-style and adi,input-justification properties.

Signed-off-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200511110611.3142-2-ricardo.canuelo@collabora.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-15 10:41:35 +02:00
Maxime Ripard b3a0a2f910
arm64: dts: allwinner: h6: Add IOMMU
Now that we have a driver for the IOMMU, let's start using it.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-05-15 09:35:39 +02:00
Zhou Wang 528443e32a arm64: defconfig: Enable UACCE/PCI PASID/SEC2/HPRE configs
Enable configs for UACCE, PCI PASID, HiSilicon SEC2 and HPRE drivers.

Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-05-15 09:29:47 +08:00
Bjorn Andersson 3f65d51e9e arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC
Presumably the GPU node needs to control both the GPU and GPU GX power
domains, but given that GPU GX now depends on the GPU GDSC both can
effectively be controlled by controlling GPU GX. So use this instead.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200417070044.1376212-5-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 17:09:53 -07:00
Rajendra Nayak 2317b87a2a arm64: dts: qcom: db820c: Add vdd_gfx and tie it into mmcc
Add the SPMI regulator node in the PMI8994, use it to give us VDD_GX
at a fixed max nominal voltage for the db820c and specify this as supply
for the MMSS GPU_GX GDSC.

With the introduction of CPR support the range for VDD_GX should be
expanded.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/20200417070044.1376212-4-bjorn.andersson@linaro.org
[bjorn: Split between pmi8994 and db820c, changed voltage, rewrote commit message]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 17:09:41 -07:00
Stephan Gerhold 756d534b3e arm64: dts: qcom: apq8016-sbc: merge -pins.dtsi into main .dtsi
apq8016-sbc.dtsi is the only remaining device which takes up
4 files since it has its pinctrl split into separate files.

Actually this does not really make the device tree easier to read
(just harder to find nodes). For db820c the files were merged in
commit 88264f1f6b ("arm64: dts: qcom: db820c: Remove pin specific files").

Do the same for apq8016-sbc (db410c) and move the pinctrl definitions
into apq8016-sbc.dtsi.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200514112754.148919-3-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 10:29:34 -07:00
Stephan Gerhold 38a4d932f7 arm64: dts: qcom: msm8916: move gpu opp table to gpu node
In msm8916.dtsi the GPU OPP table is defined under the root node,
whereas in msm8996.dtsi/sdm845.dtsi it is a subnode of the gpu device
(which makes it easier to find).

Move it to the gpu device node to make this consistent.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200514112754.148919-2-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 10:29:31 -07:00
Stephan Gerhold e6717dbaef arm64: dts: qcom: msm8916: avoid using _ in node names
Many nodes in the MSM8916 device trees use '_' in node names
(especially pinctrl), even though (seemingly) '-' is preferred now.
Make this more consistent by replacing '_' with '-' where possible.

Similar naming is used for pinctrl in newer device trees (e.g. sdm845.dtsi).

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200514112754.148919-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 10:29:16 -07:00
Bjorn Andersson ece74ab227 arm64: defconfig: Enable Qualcomm SC7180 pinctrl and gcc
Enable the Qualcomm SC7180 pinctrl and gcc driver, in order to allow the
kernel to boot to console.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200116045457.2489704-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 10:28:28 -07:00
Bjorn Andersson 2536bedec6 arm64: dts: qcom: c630: Specify UFS device reset
On some device the reset line for the UFS memory needs to be tickled in
order for UFS to initialize properly, add this to the ufs_mem_hc node.

Reviewed-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200406060049.227029-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 10:26:42 -07:00
Bjorn Andersson 3fb298d0b2 arm64: dts: qcom: c630: Add WiFi node
Specify regulators and enable the &wifi node. The firmware uses the 8
bit version of the host capability message, so specify this quirk.

Reviewed-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191018055841.3729591-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 10:26:24 -07:00
Michael Srba 4b20d4705a arm64: dts: qcom: msm8916-samsung-a3u: add nodes for display panel
This patch wires up display support on Samsung Galaxy A3 2015.

Signed-off-by: Michael Srba <michael.srba@seznam.cz>

Link: https://lore.kernel.org/r/20200514170129.10902-1-michael.srba@seznam.cz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 10:11:39 -07:00
Miklos Szeredi c8ffd8bcdd vfs: add faccessat2 syscall
POSIX defines faccessat() as having a fourth "flags" argument, while the
linux syscall doesn't have it.  Glibc tries to emulate AT_EACCESS and
AT_SYMLINK_NOFOLLOW, but AT_EACCESS emulation is broken.

Add a new faccessat(2) syscall with the added flags argument and implement
both flags.

The value of AT_EACCESS is defined in glibc headers to be the same as
AT_REMOVEDIR.  Use this value for the kernel interface as well, together
with the explanatory comment.

Also add AT_EMPTY_PATH support, which is not documented by POSIX, but can
be useful and is trivial to implement.

Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
2020-05-14 16:44:25 +02:00
Bjorn Andersson 1cacdf5d3b arm64: dts: qcom: db820c: Fix invalid pm8994 supplies
It's uncertain where the "vreg_s8a_l3a_input" comes from, but the supply
for VDD_L3_L11 on PM8994 should be VREG_S3A_1P3, so correct this - and
drop the vreg_s8a_l3a_input.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Fixes: 83d9ed4342 ("arm64: dts: qcom: db820c: Use regulator names from schematics")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200417070712.1376355-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 06:47:32 -07:00
Bjorn Andersson 14a9f4c6ab arm64: dts: qcom: db820c: Add pmi8994 RPM regulators
The PMI8994 provides 3 SPMS regulators and one boost/bypass regulator.
Define s1 and the boot/bypass and update pm8994 to appropriately
describe the supply from PMI8994.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200417070303.1376290-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14 06:47:24 -07:00
Max Krummenacher 39572dd33b arm64: defconfig: add MEDIA_PLATFORM_SUPPORT
Commit 06b93644f4 ("media: Kconfig: add an option to filter in/out
platform drivers") adds a new Kconfig symbol which now hides drivers
currently enabled in the arm64 defconfig. Enable it to get those
drivers back.

Link: https://lore.kernel.org/r/20200427134003.45188-5-max.krummenacher@toradex.com
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14 00:14:38 +02:00
Max Krummenacher c226669674 arm64: defconfig: ARCH_R8A7795: follow changed config symbol name
Completes commit b925adfceb ("soc: renesas: Add ARCH_R8A7795[01] for
existing R-Car H3") and commit 361c5dbb44 ("arm64: dts: renesas:
Remove use of ARCH_R8A7795").

CONFIG_ARCH_R8A7795 was split in CONFIG_ARCH_R8A77950 and
CONFIG_ARCH_R8A77951.

Link: https://lore.kernel.org/r/20200427134003.45188-4-max.krummenacher@toradex.com
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14 00:14:24 +02:00
Max Krummenacher 50045c730d arm64: defconfig: add DRM_DISPLAY_CONNECTOR
Add DRM_DISPLAY_CONNECTOR. This got introduced with the bridge rework
Which renamed among others DRM_DUMB_VGA_DAC.

Link: https://lore.kernel.org/r/20200427134003.45188-3-max.krummenacher@toradex.com
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14 00:14:07 +02:00
Max Krummenacher 5f450f6713 arm64: defconfig: DRM_DUMB_VGA_DAC: follow changed config symbol name
This occurrence wasn't changed in the original rename commit.

Fixes commit 0411374bdf ("drm/bridge: dumb-vga-dac: Rename driver to
simple-bridge").

Link: https://lore.kernel.org/r/20200427134003.45188-2-max.krummenacher@toradex.com
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14 00:13:49 +02:00
Arnd Bergmann 43f3b777a6 arm64: dts: fixes for v5.7-rc
Misc arm64 DT-only fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl618H0ACgkQWTcYmtP7
 xmVJ3Q/+MpOYMznZERRxosRf5VAI+jqO9QX2gLGM/sVnlt/OPm16Py58pUjZC3/o
 liGtCKiLW7wCYb25+kKFvs4en8MoSane/OpNoxJSnh8kvhDflKQwAUd5PES1LhSH
 dvmj737fBjvyof+tVoGoV2E1+mfef32iCIEenhtqW93nHRMtCQF+fCKMk8W5O4zT
 JJGc9UHxiqa37APiZpenaKBTbntb4TvqURJnRgB8xiWF8LRMXpbRIL4XnddzrzbM
 cQWn4/FR/iBPMNtFHo17rlr+mXfJUMiXxZk/PiLy3YRkFCHo6qwaLCg3fBHZFDe5
 qT1rAgUXJkfBPms7YfjYCe1tnGSQgvR/XBrb2lTE2/b+PxQQlQJRGHJuwxres7O4
 O1PCYvSFsQPFD9oVzBtGk+AtagfXEa/7uUtuf25Qwb2WGJ46ShY4zvKehSSqvmrK
 pS9WQrJPya3EaQfMDeRQTl28jIgxIZRcQ2OcfKvrZsROfV8CHCUl/9emmaXB1kzL
 T1+VRsyJX89CPBwVTAj79GcI+Zag6TRE4hrKz4ubd1rxFa+4iO2ctgLO9FRHEeZO
 bV3TF8UOhes0fWT7qNWGcZeqErXjp2We3HJz3eS6hmZx3EA3eK2WefHmR0/mGKQo
 F7fC7E2KqCbalklsMPmvpE+PP7+6fUGYgpLMAagB59hcFoNpgjY=
 =KRNA
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/fixes

arm64: dts: fixes for v5.7-rc

Misc arm64 DT-only fixes

* tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: dts: meson-g12: remove spurious blank line
  arm64: dts: meson-g12b-khadas-vim3: add missing frddr_a status property
  arm64: dts: meson-g12-common: fix dwc2 clock names
  arm64: dts: meson-g12b-ugoos-am6: fix usb vbus-supply

Link: https://lore.kernel.org/r/7hmu6iyoc5.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14 00:07:36 +02:00
Arnd Bergmann 3b3e88e067 Some fixes for the newly added Pinebook Pro and other fixes to
make dtc and the new dtscheck against yaml bindings happy.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl6yA9QQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgeX0CACEwXPa8ChfXg+N4846D/wcwkpMVQqnTbMR
 WrnqVLUNHf71h7Yej/aXpBSgEq5er1Q/HVgbjvkAAYNw633MNWgaNMi9AFl03gTF
 uSOSUoiwauUUlvWt2aZ44IHxHS/WC0FB9/wIROpnD0SJvmYX9MJF8AVITNDsTDGv
 EsSswwAXiBxILDWWdBM2QgAZxEhan3MwBbHQrmPRePDAWylluT3tMGjEfLgIapcW
 9w44tw0kR8g7Zwgq+MYcfyHoNhUXOr1iMlCCA0LWOOtNBJAbXKM4XDp4cWwHLiI3
 nktZSWXN7B08dx4hi/++18izC6N/ZwoGycMN4wG9kvdaRnpwh3KN
 =vkl2
 -----END PGP SIGNATURE-----

Merge tag 'v5.7-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

Some fixes for the newly added Pinebook Pro and other fixes to
make dtc and the new dtscheck against yaml bindings happy.

* tag 'v5.7-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: fix pinctrl sub nodename for spi in rk322x.dtsi
  arm64: dts: rockchip: Fix Pinebook Pro FUSB302 interrupt
  ARM: dts: rockchip: swap clock-names of gpu nodes
  arm64: dts: rockchip: swap interrupts interrupt-names rk3399 gpu node
  arm64: dts: rockchip: fix status for &gmac2phy in rk3328-evb.dts
  arm64: dts: rockchip: remove extra assigned-clocks property from &gmac2phy node in rk3328-evb.dts
  ARM: dts: rockchip: fix phy nodename for rk3229-xms6
  ARM: dts: rockchip: fix phy nodename for rk3228-evb
  arm64: dts: rockchip: Rename dwc3 device nodes on rk3399 to make dtc happy
  arm64: dts: rockchip: drop #address-cells, #size-cells from rk3399 pmugrf node
  arm64: dts: rockchip: drop #address-cells, #size-cells from rk3328 grf node
  arm64: dts: rockchip: drop non-existent gmac2phy pinmux options from rk3328
  arm64: dts: rockchip: Replace RK805 PMIC node name with "pmic" on rk3328 boards
  arm64: dts: rockchip: enable DC charger detection pullup on Pinebook Pro
  arm64: dts: rockchip: fix inverted headphone detection on Pinebook Pro
  arm64: dts: rockchip: Correct PMU compatibles for PX30 and RK3308

Link: https://lore.kernel.org/r/1738941.6LdaBJIBqS@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14 00:02:56 +02:00
Arnd Bergmann 6d9ac5160d arm64: tegra: Default configuration fixes
This contains a single fix to reenable the Tegra194 PCIe host support by
 default that was inadvertently dropped as a result of the host/endpoint
 mode support that was added in v5.7-rc1.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl6qrkUTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoRoREACiEsfrfBcCltBdxNcSpguKj4OBwDny
 sAgl+hVivPe2n2EJzo7/35R63OEIaHczsqUnIyrpunYXEIiSuBQMkjkXPPfTQX/Y
 sL5kf9niYe2ZlXvrHxo/dgzpuwginrv79dOodYV0+ptVVUkMmC3/bttCRsDIGNJL
 +0pnFRxI4jiHMuhonEHFDJjqYk0D731FzmrpsP8b52w+s859nGY1zrP7FaGVl1/G
 cnt6ue7WpqT5f8rFHpcrkqkjM66luDRkDcDlJV46/nPBoDbbh4sUM9yK87BV4M3W
 0rIa1+qGi3+lTZdB+M9B59LRn6f3k2jhjZfjM+YDWO2085VPXMH3dImc6nHOhgzm
 ck+a8OtB9Y33k7XvbAVCxLjByGlqdZ9jPJKrhfpe40qZZev4+XMTbiwYBQIqD2fK
 LXHZlMl6kliYCXS3B0hchayRfr/jnBw5gibwNmOuYxFoUigW0n1VBB7bX7uMqdOz
 W2mZHu2ekXfhEmfukI6iDvlMR1OPGMSuNIKo/eDOLGNnMTb+n3L0mQ8Ac+U8oDIT
 Ppd7vtdkk+7l6+0DlMNh98PQOa04H3LDgvsqlsdwj3r8uKPeiD6YA3zCqRppm4nr
 Qre3aRWyvBPpNGo5RuAQe+i10zTcfPK/DN9+Nt1DgJxXVYm3GJEWSMM64z/Vpme5
 3A4E0Ms0CX/Shg==
 =DB0J
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.7-arm64-defconfig-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes

arm64: tegra: Default configuration fixes

This contains a single fix to reenable the Tegra194 PCIe host support by
default that was inadvertently dropped as a result of the host/endpoint
mode support that was added in v5.7-rc1.

* tag 'tegra-for-5.7-arm64-defconfig-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: defconfig: Re-enable Tegra PCIe host driver

Link: https://lore.kernel.org/r/20200430105700.167199-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14 00:01:44 +02:00
Arnd Bergmann 5258bba832 Renesas fixes for v5.7
- Fix IOMMU support on R-Car V3H,
   - Minor fixes that are fast-tracked to avoid introducing regressions
     during conversion of DT bindings to json-schema.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXqqEEQAKCRCKwlD9ZEnx
 cK6VAQDEYT5s4bzgLANPkTuvz3n5NgmS1nSC9tGrUX9co4OEUgD+OkwEnFJgLF1+
 LbwisW1fNfCz1looPeyyZTl9Q8o5Yg0=
 =cIRT
 -----END PGP SIGNATURE-----

Merge tag 'renesas-fixes-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes

Renesas fixes for v5.7

  - Fix IOMMU support on R-Car V3H,
  - Minor fixes that are fast-tracked to avoid introducing regressions
    during conversion of DT bindings to json-schema.

* tag 'renesas-fixes-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: dts: r7s9210: Remove bogus clock-names from OSTM nodes
  arm64: dts: renesas: r8a77980: Fix IPMMU VIP[01] nodes
  ARM: dts: r8a73a4: Add missing CMT1 interrupts

Link: https://lore.kernel.org/r/20200430084834.1384-1-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14 00:01:07 +02:00
Arnd Bergmann 896e18f4dc i.MX fixes for 5.7:
- Set correct AHB clock for i.MX8MN SDMA1 device to fix a "Timeout
    waiting for CH0" error.
  - Fix a linker error for i.MX6 configurations that have ARM_CPU_SUSPEND=n,
    which can happen if neither CONFIG_PM, CONFIG_CPU_IDLE, nor ARM_PSCI_FW
    are selected.
  - Fix I2C1 pinctrl configuration for i.MX27 phytec-phycard board.
  - Fix i.MX8M  AIPS 'reg' properties to remove DTC simple_bus_reg
    warnings.
  - Add missing compatible "fsl,vf610-edma" for LS1028A EDMA device, so
    that bootloader can fix up the IOMMU entries there.  Otherwise, EDMA
    just doesn't work on LS1028A with shipped bootloader.
  - Fix imx6dl-yapp4-ursa board Ethernet connection.
  - Fix input_val for AUDIOMIX_BIT_STREAM pinctrl defines on i.MX8MP
    according to Reference Manual.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl6pHtIUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM69sAgAp/H4BASI7SAbrjYsFjCP+ymPVgeS
 Y9oeLm09Q2XEF6GiRhK4SDqN56BOUelRI6nqWx3k6sU5A7SuZMqGSaZZEhCtHhjl
 iixyxSccxh4prUWSEDQPHyIJ6yjBt+QkKhycOVLwq7FFLdlrSaRuameNQAkjEU4a
 YPSL0oBd1xNbz75RaqgmyI0lzOuQg1P+GMQqmVOYfrucK94bq62FMSezyEBQxKU+
 0MVG/hEkeLtxFgzE6OpkBs1p1m+KgXE7qvV0W84VyZOKgri1qJ74V1Pl/RJNNVA0
 p46c3PH66OATAU7+pbshC0x/hsN8ZVAoBhPit5oLF7ugDNpi377jT/zRrw==
 =z3sI
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.7:

 - Set correct AHB clock for i.MX8MN SDMA1 device to fix a "Timeout
   waiting for CH0" error.
 - Fix a linker error for i.MX6 configurations that have ARM_CPU_SUSPEND=n,
   which can happen if neither CONFIG_PM, CONFIG_CPU_IDLE, nor ARM_PSCI_FW
   are selected.
 - Fix I2C1 pinctrl configuration for i.MX27 phytec-phycard board.
 - Fix i.MX8M  AIPS 'reg' properties to remove DTC simple_bus_reg
   warnings.
 - Add missing compatible "fsl,vf610-edma" for LS1028A EDMA device, so
   that bootloader can fix up the IOMMU entries there.  Otherwise, EDMA
   just doesn't work on LS1028A with shipped bootloader.
 - Fix imx6dl-yapp4-ursa board Ethernet connection.
 - Fix input_val for AUDIOMIX_BIT_STREAM pinctrl defines on i.MX8MP
   according to Reference Manual.

* tag 'imx-fixes-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: freescale: imx8mp: update input_val for AUDIOMIX_BIT_STREAM
  arm64: dts: imx8m: Fix AIPS reg properties
  arm64: dts: imx8mn: Change SDMA1 ahb clock for imx8mn
  ARM: dts: imx27-phytec-phycard-s-rdk: Fix the I2C1 pinctrl entries
  ARM: imx: provide v7_cpu_resume() only on ARM_CPU_SUSPEND=y
  ARM: dts: imx6dl-yapp4: Fix Ursa board Ethernet connection
  arm64: dts: ls1028a: add "fsl,vf610-edma" compatible
  dt-bindings: dma: fsl-edma: fix ls1028a-edma compatible

Link: https://lore.kernel.org/r/20200429063226.GT32592@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14 00:00:07 +02:00
Arnd Bergmann b130b0ad8a Qualcomm ARM64 DT fixes for v5.7
This reduces the (hard coded) CPU voltage to a safe level on MSM8996 and
 updates the audio nodes on db820c, db845c and c630 to reflect audio
 changes that landed late in the cycle.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl6pECQbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F9roQAKFCXXBcH3bnAUuBawpS
 vmHz2d22tEYfGRgjc5IDed/ix0eC8dAErNulSzN3UUhfAnEPZoe4X35Ij2USm3Ra
 4vvs4/Krzjw2ndYwgM22EtIvj4h95MfKvQz2SdJbZyFH+ITZId6sUfqcooGV2XZy
 MABVysd8tvK7v18QsawvkA+XZrEzL3jgw2W32kz2NSR5eI++98TPvArif0MsPAoa
 aHyGMBRvmTBXd6naDjkGQOsKCXzX7Uaw4a+XgaOMn/mH0489nYaRicRD4uYbi4uR
 toEbZsyPaVXYYSxqLbCIDPxDclHyvJuWA1nHrEtj3IdacFXrp/9VsmM6l4ckBdcN
 2u+8X6LIjySvJtmbUptz/6zufl9A7Vti0UY0VgdDUtOb0wkohivhOFmXcseLUuUH
 t9LGwvYidKVFqmyL0VUVFWOSoUgA1L9jcnIoiP3Was+WjYo3DYCgabnZaZgL3bhS
 XGM88s3u/HzkkbkhCQu5MtnuU2KXtEoxX7bcJCKH/UnFzH/wlkfP9ZJ2RZa2/4yY
 lYQdjvUpzYU9OBb6GZGEuspCWYdLCJFINLhJcQw0fN1d7Er0XzZXoMR7FEaCa3g7
 THonwbIw6c1MaTsLXOYpFJVvIBw2/RBP5mBGvvfP2XcCHv248nrIZ1qUoGfHxqns
 RCkV1UPEUfpR0KGUK8o8y3xn
 =AD+5
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-fixes-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm ARM64 DT fixes for v5.7

This reduces the (hard coded) CPU voltage to a safe level on MSM8996 and
updates the audio nodes on db820c, db845c and c630 to reflect audio
changes that landed late in the cycle.

* tag 'qcom-arm64-fixes-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: dts: qcom: db820c: fix audio configuration
  arm64: dts: qcom: db845c: fix asm dai setup
  arm64: qcom: c630: fix asm dai setup
  arm64: dts: qcom: msm8996: Reduce vdd_apc voltage

Link: https://lore.kernel.org/r/20200429052932.GA2627045@builder.lan
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-13 23:59:58 +02:00
Michael Srba b3d6fd8f25 arm64: dts: qcom: msm8916: Disable coresight by default
On some msm8916 devices, attempts at initializing coresight cause the boot to
fail. This was fixed by disabling the coresight-related nodes in the board dts
files. However, a cleaner approach was chosen for fixing the same issue on
msm8998: disabling coresight by default, and enabling it in board dts files
where desired.

This patch implements the same solution for msm8916, removes now redundant
overwrites in board specific dts files and and enables coresight in db410c's
board dts in order to keep the current behavior.

Fixes: b1fcc5702a ("arm64: dts: qcom: msm8916: Add CTI options")
Signed-off-by: Michael Srba <michael.srba@seznam.cz>

Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20200513184735.30104-1-michael.srba@seznam.cz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-13 14:21:14 -07:00
Paolo Bonzini 4aef2ec902 Merge branch 'kvm-amd-fixes' into HEAD 2020-05-13 12:14:05 -04:00
Clément Péron 5961bdf2df
arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6
Enable CPU opp tables for Tanix TX6.

Also add the fixed regulator that provided vdd-cpu-gpu required for
CPU opp tables.

This voltage has been found using a voltmeter and could be wrong.

Tested-by: Jernej Škrabec <jernej.skrabec@gmail.com>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-05-13 16:20:02 +02:00
Clément Péron c83e24e7bf
arm64: dts: allwinner: h6: add voltage range to OPP table
Some boards have a fixed regulator and can't reach the voltage set
by the OPP table.

Add a range where the minimal voltage is the target and the maximal
voltage is 1.2V.

Suggested-by: Ondřej Jirman <megous@megous.com>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-05-13 16:19:59 +02:00
Nagarjuna Kristam bc8788b2f3 arm64: tegra: Add XUDC node on Tegra194
Tegra194 has one XUSB device mode controller which can be operated in HS
and SS modes. Add a DT node for this XUSB device mode controller.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-13 12:59:42 +02:00
Rob Herring d3cd7d02e7 arm64: tegra: Kill off "simple-panel" compatibles
"simple-panel" is a Linux driver and has never been an accepted upstream
compatible string, so remove it.

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-13 12:59:40 +02:00
Fabio Estevam e98ad55989 arm64: dts: imx8qxp-mek: Do not use underscore in node name
Underscores are not recommended to be used in node names, so change
the pinctrl IO expander node name.

This change also makes the pinctrl node names to follow the convention
used by other pinctrl group names.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-13 16:56:45 +08:00
Douglas Anderson 9fc18435d2 arm64: dts: qcom: sc7180: Add "no-map" to cmd_db reserved area
The example in the bindings and all the current users (except sc7180)
have "no-map".  I'm pretty sure we need it on sc7180 too.  Add it.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: e0abc5eb52 ("arm64: dts: qcom: sc7180: Add cmd_db reserved area")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200424085121.1.I9d1e84d30f488cdb5a957f582abaecd2c0b24d70@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-12 12:22:40 -07:00
Stephan Gerhold a4c2951274 arm64: dts: qcom: msm8916-samsung-a5u: Add touchscreen
A5U uses a Melfas MMS345L touchscreen that is connected to
blsp_i2c5. Add it to the device tree.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200426140642.204395-5-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-12 11:24:01 -07:00
Stephan Gerhold 16fb3e4226 arm64: dts: qcom: msm8916-samsung-a2015: Add touchscreen regulator
A3U and A5U both use an extra touchscreen LDO regulator
that provides 3.3V for the touch screen controller.

Add it as fixed regulator to the common include.

Cc: Michael Srba <Michael.Srba@seznam.cz>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200426140642.204395-4-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-12 11:23:08 -07:00
Stephan Gerhold 246d19d2c2 arm64: dts: qcom: msm8916: Add blsp_i2c5
MSM8916 has another I2C QUP controller that can be enabled on
GPIO 18 and 19.

Add blsp_i2c5 to msm8916.dtsi and disable it by default.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200426140642.204395-3-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-12 11:22:10 -07:00
Stephan Gerhold 428384b535 arm64: dts: qcom: msm8916: Add blsp_i2c1
MSM8916 has another I2C QUP controller that can be enabled on
GPIO 2 and 3.

Add blsp_i2c1 to msm8916.dtsi and disable it by default.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200426140642.204395-2-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-12 11:22:08 -07:00
Sai Prakash Ranjan 0f1decaa83 arm64: dts: qcom: sc7180: Support ETMv4 power management
Now that deep idle states are properly supported on SC7180,
we need to add "coresight-loses-context-with-cpu" property
to avoid failure of trace session because of losing context
on entering deep idle states.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/20200424111644.27970-1-saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-12 11:10:08 -07:00
Mark Brown e4e9f6dfee arm64: bti: Fix support for userspace only BTI
When setting PTE_MAYBE_GP we check system_supports_bti() but this is
true for systems where only CONFIG_BTI is set causing us to enable BTI
on some kernel text. Add an extra check for the kernel mode option,
using an ifdef due to line length.

Fixes: c8027285e3 ("arm64: Set GP bit in kernel page tables to enable BTI for the kernel")
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20200512113950.29996-1-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-12 18:45:17 +01:00
Geert Uytterhoeven 357dd8a2af arm64: cpufeature: Add "or" to mitigations for multiple errata
Several actions are not mitigations for a single erratum, but for
multiple errata.  However, printing a line like

    CPU features: detected: ARM errata 1165522, 1530923

may give the false impression that all three listed errata have been
detected.  This can confuse the user, who may think his Cortex-A55 is
suddenly affected by a Cortex-A76 erratum.

Add "or" to all descriptions for mitigations for multiple errata, to
make it clear that only one or more of the errata printed are
applicable, and not necessarily all of them.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200512145255.5520-1-geert+renesas@glider.be
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-12 18:37:13 +01:00
Will Deacon 3a88d7c5c9 arm64: kconfig: Update and comment GCC version check for kernel BTI
Some versions of GCC are known to suffer from a BTI code generation bug,
meaning that CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI cannot be solely used
to determine whether or not we can compile with kernel with BTI enabled.

Update the BTI Kconfig entry to refer to the relevant GCC bugzilla entry
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94697) and update the check
now that the fix has been merged into GCC release 10.1.

Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-12 13:02:31 +01:00
Lad Prabhakar 0e36587c08 arm64: dts: renesas: r8a774c0-cat874: Add support for AISTARVISION MIPI Adapter V2.1
This patch adds support for AISTARVISION MIPI Adapter V2.1 board connected
to G2E board. Common file aistarvision-mipi-adapter-2.1.dtsi is created
which have the camera endpoint nodes for imx219 and ov5645 so that this can
be re-used with other G2x platforms.

r8a774c0-ek874-mipi-2.1.dts file enables the required VIN/CSI nodes and by
default ties ov5645 camera endpoint to CSI2.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1587397794-11237-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-12 10:05:36 +02:00
Masahiro Yamada 1ca0c2f612 kbuild: remove unused AS assignment
$(AS) is not used anywhere in the kernel build, hence commit
aa824e0c96 ("kbuild: remove AS variable") killed it.

Remove the left-over code in arch/{arm,arm64}/Makefile.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Will Deacon <will@kernel.org>
2020-05-12 13:28:33 +09:00
Douglas Anderson 0d1ce0d14b arm64: dts: sdm845: Add "no-hpd" to sn65dsi86 on cheza
We don't have the HPD line hooked up to the bridge chip.  Add it as
suggested in the patch ("dt-bindings: drm/bridge: ti-sn65dsi86:
Document no-hpd").

NOTE: this patch isn't expected to have any effect but just keeps us
cleaner for the future.  Currently the driver in Linux just assumes
that nobody has HPD hooked up.  This change allows us to later
implement HPD support in the driver without messing up sdm845-cheza.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200507143354.v5.6.I89df9b6094549b8149aa8b8347f7401c678055b0@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-11 18:20:27 -07:00
Loic Poulain 26bea4e42a arch: arm64: dts: msm8996: Add CCI node
Add CCI controller node, which can be used to communicate with
camera sensors (I2C subset). MSM8996 CCI offers two masters,
i2c-bus@0 and i2c-bus@1.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1587470425-13726-2-git-send-email-loic.poulain@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-11 16:53:07 -07:00
Loic Poulain 4a4a26317e arm64: dts: msm8996: Fix CSI IRQ types
Each IRQ_TYPE_NONE interrupt causes a warning at boot.
Fix that by defining an appropriate type.

Fixes: e0531312e7 ("arm64: dts: qcom: msm8996: Add CAMSS support")
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1587470425-13726-1-git-send-email-loic.poulain@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-11 16:52:51 -07:00
Sibi Sankar bec71ba243 arm64: dts: qcom: sc7180: Update Q6V5 MSS node
Add TCSR node and update MSS node to support MSA based Modem boot on
SC7180 SoCs.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200421143228.8981-8-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-11 12:31:51 -07:00
Sibi Sankar e14a15eba8 arm64: dts: qcom: sc7180: Add Q6V5 MSS node
This patch adds Q6V5 MSS PAS remoteproc node for SC7180 SoCs.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200421143228.8981-7-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-11 12:31:48 -07:00
Sibi Sankar 33c172b96a arm64: dts: qcom: sc7180: Update reserved memory map
Add missing regions and remove unused regions from the reserved memory
map, as described in version 5.

Tested-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200421143228.8981-6-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-11 12:28:38 -07:00
Amit Daniel Kachhap 203b1152d1 arm64/crash_core: Export KERNELPACMASK in vmcoreinfo
Recently arm64 linux kernel added support for Armv8.3-A Pointer
Authentication feature. If this feature is enabled in the kernel and the
hardware supports address authentication then the return addresses are
signed and stored in the stack to prevent ROP kind of attack. Kdump tool
will now dump the kernel with signed lr values in the stack.

Any user analysis tool for this kernel dump may need the kernel pac mask
information in vmcoreinfo to generate the correct return address for
stacktrace purpose as well as to resolve the symbol name.

This patch is similar to commit ec6e822d1a ("arm64: expose user PAC
bit positions via ptrace") which exposes pac mask information via ptrace
interfaces.

The config gaurd ARM64_PTR_AUTH is removed form asm/compiler.h so macros
like ptrauth_kernel_pac_mask can be used ungaurded. This config protection
is confusing as the pointer authentication feature may be missing at
runtime even though this config is present.

Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/1589202116-18265-1-git-send-email-amit.kachhap@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-11 14:29:10 +01:00
Luke Nelson fd868f1481 bpf, arm64: Optimize ADD,SUB,JMP BPF_K using arm64 add/sub immediates
The current code for BPF_{ADD,SUB} BPF_K loads the BPF immediate to a
temporary register before performing the addition/subtraction. Similarly,
BPF_JMP BPF_K cases load the immediate to a temporary register before
comparison.

This patch introduces optimizations that use arm64 immediate add, sub,
cmn, or cmp instructions when the BPF immediate fits. If the immediate
does not fit, it falls back to using a temporary register.

Example of generated code for BPF_ALU64_IMM(BPF_ADD, R0, 2):

without optimization:

  24: mov x10, #0x2
  28: add x7, x7, x10

with optimization:

  24: add x7, x7, #0x2

The code could use A64_{ADD,SUB}_I directly and check if it returns
AARCH64_BREAK_FAULT, similar to how logical immediates are handled.
However, aarch64_insn_gen_add_sub_imm from insn.c prints error messages
when the immediate does not fit, and it's simpler to check if the
immediate fits ahead of time.

Co-developed-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Acked-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/r/20200508181547.24783-4-luke.r.nels@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-11 12:21:39 +01:00
Luke Nelson fd49591cb4 bpf, arm64: Optimize AND,OR,XOR,JSET BPF_K using arm64 logical immediates
The current code for BPF_{AND,OR,XOR,JSET} BPF_K loads the immediate to
a temporary register before use.

This patch changes the code to avoid using a temporary register
when the BPF immediate is encodable using an arm64 logical immediate
instruction. If the encoding fails (due to the immediate not being
encodable), it falls back to using a temporary register.

Example of generated code for BPF_ALU32_IMM(BPF_AND, R0, 0x80000001):

without optimization:

  24: mov  w10, #0x8000ffff
  28: movk w10, #0x1
  2c: and  w7, w7, w10

with optimization:

  24: and  w7, w7, #0x80000001

Since the encoding process is quite complex, the JIT reuses existing
functionality in arch/arm64/kernel/insn.c for encoding logical immediates
rather than duplicate it in the JIT.

Co-developed-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Acked-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/r/20200508181547.24783-3-luke.r.nels@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-11 12:21:39 +01:00
Luke Nelson 579d1b3faa arm64: insn: Fix two bugs in encoding 32-bit logical immediates
This patch fixes two issues present in the current function for encoding
arm64 logical immediates when using the 32-bit variants of instructions.

First, the code does not correctly reject an all-ones 32-bit immediate,
and returns an undefined instruction encoding.

Second, the code incorrectly rejects some 32-bit immediates that are
actually encodable as logical immediates. The root cause is that the code
uses a default mask of 64-bit all-ones, even for 32-bit immediates.
This causes an issue later on when the default mask is used to fill the
top bits of the immediate with ones, shown here:

  /*
   * Pattern: 0..01..10..01..1
   *
   * Fill the unused top bits with ones, and check if
   * the result is a valid immediate (all ones with a
   * contiguous ranges of zeroes).
   */
  imm |= ~mask;
  if (!range_of_ones(~imm))
          return AARCH64_BREAK_FAULT;

To see the problem, consider an immediate of the form 0..01..10..01..1,
where the upper 32 bits are zero, such as 0x80000001. The code checks
if ~(imm | ~mask) contains a range of ones: the incorrect mask yields
1..10..01..10..0, which fails the check; the correct mask yields
0..01..10..0, which succeeds.

The fix for both issues is to generate a correct mask based on the
instruction immediate size, and use the mask to check for all-ones,
all-zeroes, and values wider than the mask.

Currently, arch/arm64/kvm/va_layout.c is the only user of this function,
which uses 64-bit immediates and therefore won't trigger these bugs.

We tested the new code against llvm-mc with all 1,302 encodable 32-bit
logical immediates and all 5,334 encodable 64-bit logical immediates.

Fixes: ef3935eeeb ("arm64: insn: Add encoder for bitwise operations using literals")
Suggested-by: Will Deacon <will@kernel.org>
Co-developed-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200508181547.24783-2-luke.r.nels@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-11 12:21:39 +01:00
Christoph Hellwig d51c214541 arm64: fix the flush_icache_range arguments in machine_kexec
The second argument is the end "pointer", not the length.

Fixes: d28f6df130 ("arm64/kexec: Add core kexec support")
Cc: <stable@vger.kernel.org> # 4.8.x-
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-05-11 12:02:14 +01:00
Eric Biggers 2aaba014b5 crypto: lib/sha1 - remove unnecessary includes of linux/cryptohash.h
<linux/cryptohash.h> sounds very generic and important, like it's the
header to include if you're doing cryptographic hashing in the kernel.
But actually it only includes the library implementation of the SHA-1
compression function (not even the full SHA-1).  This should basically
never be used anymore; SHA-1 is no longer considered secure, and there
are much better ways to do cryptographic hashing in the kernel.

Most files that include this header don't actually need it.  So in
preparation for removing it, remove all these unneeded includes of it.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-05-08 15:32:17 +10:00
Eric Biggers a221b33b65 crypto: arm64/aes-glue - use crypto_shash_tfm_digest()
Instead of manually allocating a 'struct shash_desc' on the stack and
calling crypto_shash_digest(), switch to using the new helper function
crypto_shash_tfm_digest() which does this for us.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-05-08 15:32:13 +10:00
Grygorii Strashko ef2d1363c5 arm64: dts: ti: k3-am65/j721e-mcu: update cpts node
Update CPTS node following DT binding update:
 - add reg and compatible properties
 - fix node name

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-07 17:51:03 -07:00
Bjorn Andersson 9cbcb81dc8 arm64: defconfig: Remove QCOM_GLINK_SSR
Remove the QCOM_GLINK_SSR option from the arm64 defconfig, as the module
is assimilated by QCOM_GLINK - which is selected by other means.

Acked-by: Chris Lew <clew@codeaurora.org>
Acked-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Link: https://lore.kernel.org/r/20200423003736.2027371-5-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-07 11:14:15 -07:00
Linus Torvalds 6e7f2eacf0 - Avoid potential NULL dereference in huge_pte_alloc() on pmd_alloc()
failure
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAl60Nq8ACgkQa9axLQDI
 XvHCvg/8CupwSce53iZE2NcUHjbyiUxrbKRG094PAnXCT87XSm7ubWeskh0hOjHq
 M/e1eKvD3NbXhe99/fMU//biRTwhCLc1e5zSYD/i19mXz0tkYaU+w6bvP2Nq96Ui
 Qd+N/sGMATl5fRvgQ7M70nbUARXmD9v0vwocDijRomq2vr4t4jHAzMeD1XrhS0JH
 2hmzMSQL2vaGQ0otC75qA0iaG4GRUS4tQJT78v03G5KzCdZsSyr9j4X8Ev2/FhPm
 agismE/5EqVM/8XF0iVlAv9hsRp8gmvD3w9mz1Bw6bqjcXcTT3vy8lC0OO9WkPdF
 8kGhzE+Xoge6Yb46hIJJnlVnm1btGAdRXQjjMyJXE26vaFkm1wxia+/oTr9AmSYm
 hxn3WIpAYxwCprF2qLsgOU1qcCs/JO05asYC6iPuNFz/ViJS8plTWPkXP+myvChU
 OOYgSElKURFrLVcMUExCLR38jAO0PecgIh2qmNsk2U6ZXTMPAPggGeB7mToBfSAx
 xxKrNERQZ0G8hlwweINAYJosccSi8YLzAO3zU9wAicf0rd/zB/zd27q75kjEvmY2
 Bt5Jjo1DvFRnick+Cf64ToBkfI+UPRqlr4a741NeVt6PBYmpWgqFm4vSHpAo45Z/
 3sDF20t7FctVOd4Akz0s9b3ZoZpzQxZ3rnxJXxzeptWIE3uU5J0=
 =wehO
 -----END PGP SIGNATURE-----

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fix from Catalin Marinas:
 "Avoid potential NULL dereference in huge_pte_alloc() on pmd_alloc()
  failure"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: hugetlb: avoid potential NULL dereference
2020-05-07 09:55:58 -07:00
Mark Brown bf740a905f arm64: vdso: Map the vDSO text with guarded pages when built for BTI
The kernel is responsible for mapping the vDSO into userspace processes,
including mapping the text section as executable. Handle the mapping of
the vDSO for BTI similarly, mapping the text section as guarded pages so
the BTI annotations in the vDSO become effective when they are present.

This will mean that we can have BTI active for the vDSO in processes that
do not otherwise support BTI. This should not be an issue for any expected
use of the vDSO.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200506195138.22086-12-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Mark Brown 5e02a1887f arm64: vdso: Force the vDSO to be linked as BTI when built for BTI
When the kernel and hence vDSO are built with BTI enabled force the linker
to link the vDSO as BTI. This will cause the linker to warn if any of the
input files do not have the BTI annotation, ensuring that we don't silently
fail to provide a vDSO that is built and annotated for BTI when the
kernel is being built with BTI.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200506195138.22086-11-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Mark Brown a6aadc2827 arm64: vdso: Annotate for BTI
Generate BTI annotations for all assembly files included in the 64 bit
vDSO.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200506195138.22086-10-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Mark Brown 3a9b136c99 arm64: asm: Provide a mechanism for generating ELF note for BTI
ELF files built for BTI should have a program property note section which
identifies them as such. The linker expects to find this note in all
object files it is linking into a BTI annotated output, the compiler will
ensure that this happens for C files but for assembler files we need to do
this in the source so provide a macro which can be used for this purpose.
To support likely future requirements for additional notes we split the
defininition of the flags to set for BTI code from the macro that creates
the note itself.

This is mainly for use in the vDSO which should be a normal ELF shared
library and should therefore include BTI annotations when built for BTI.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20200506195138.22086-9-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Mark Brown 97fed779f2 arm64: bti: Provide Kconfig for kernel mode BTI
Now that all the code is in place provide a Kconfig option allowing users
to enable BTI for the kernel if their toolchain supports it, defaulting it
on since this has security benefits. This is a separate configuration
option since we currently don't support secondary CPUs that lack BTI if
the boot CPU supports it.

Code generation issues mean that current GCC 9 versions are not able to
produce usable BTI binaries so we disable support for building with GCC
versions prior to 10, once a fix is backported to GCC 9 the dependencies
will be updated.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200506195138.22086-8-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Mark Brown 67d4a1cd09 arm64: mm: Mark executable text as guarded pages
When the kernel is built for BTI and running on a system which supports
make all executable text guarded pages to ensure that loadable module
and JITed BPF code is protected by BTI.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200506195138.22086-7-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Mark Brown fa76cfe65c arm64: bpf: Annotate JITed code for BTI
In order to extend the protection offered by BTI to all code executing in
kernel mode we need to annotate JITed BPF code appropriately for BTI. To
do this we need to add a landing pad to the start of each BPF function and
also immediately after the function prologue if we are emitting a function
which can be tail called. Jumps within BPF functions are all to immediate
offsets and therefore do not require landing pads.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200506195138.22086-6-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Mark Brown c8027285e3 arm64: Set GP bit in kernel page tables to enable BTI for the kernel
Now that the kernel is built with BTI annotations enable the feature by
setting the GP bit in the stage 1 translation tables.  This is done
based on the features supported by the boot CPU so that we do not need
to rewrite the translation tables.

In order to avoid potential issues on big.LITTLE systems when there are
a mix of BTI and non-BTI capable CPUs in the system when we have enabled
kernel mode BTI we change BTI to be a _STRICT_BOOT_CPU_FEATURE when we
have kernel BTI.  This will prevent any CPUs that don't support BTI
being started if the boot CPU supports BTI rather than simply not using
BTI as we do when supporting BTI only in userspace.  The main concern is
the possibility of BTYPE being preserved by a CPU that does not
implement BTI when a thread is migrated to it resulting in an incorrect
state which could generate an exception when the thread migrates back to
a CPU that does support BTI.  If we encounter practical systems which
mix BTI and non-BTI CPUs we will need to revisit this implementation.

Since we currently do not generate landing pads in the BPF JIT we only
map the base kernel text in this way.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200506195138.22086-5-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Mark Brown 714a8d02ca arm64: asm: Override SYM_FUNC_START when building the kernel with BTI
When the kernel is built for BTI override SYM_FUNC_START and related macros
to add a BTI landing pad to the start of all global functions, ensuring that
they are BTI safe. The ; at the end of the BTI_x macros is for the
benefit of the macro-generated functions in xen-hypercall.S.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200506195138.22086-4-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Mark Brown 92e2294d87 arm64: bti: Support building kernel C code using BTI
When running with BTI enabled we need to ask the compiler to enable
generation of BTI landing pads beyond those generated as a result of
pointer authentication instructions being landing pads. Since the two
features are practically speaking unlikely to be used separately we
will make kernel mode BTI depend on pointer authentication in order
to simplify the Makefile.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200506195138.22086-3-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Mark Brown 717b938e22 arm64: Document why we enable PAC support for leaf functions
Document the fact that we enable pointer authentication protection for
leaf functions since there is some narrow potential for ROP protection
benefits and little overhead has been observed.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20200506195138.22086-2-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 17:53:20 +01:00
Linus Torvalds 8c16ec94dc Bugfixes, mostly for ARM and AMD, and more documentation.
-----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl6yqbIUHHBib256aW5p
 QHJlZGhhdC5jb20ACgkQv/vSX3jHroObBQf+NH9DCs6X92YggAoNpJl6uSIOX35X
 ErdWqYj80Xx95QU73aMukjs3Zqxe6WfYI9jPEOD8SDUZzZlVfIA35D8BYlqt1c5R
 A2K2ebTQbZ+j487QTUPbEvEivyxyVSozwvOdKBfL5kv0D9Cn2STyjVjmguUoCp9n
 VztmwbwpSZdOnexRSolwAWuyOriYbvpV12cIZpcMGrjL67yZPv8UyCxxJplDCLlB
 1c8tvGI2Md8apE/YZDqlCFh3H4YBQsact8uOoyY8cXKO/xIAsZOI+Dhm/cQAhGDk
 QIQqv/hkM4HPvOXQluwIau4Cx+Fl05xY/ggtQt4z/8yml2pOw8PKmwziZA==
 =60QX
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull kvm fixes from Paolo Bonzini:
 "Bugfixes, mostly for ARM and AMD, and more documentation.

  Slightly bigger than usual because I couldn't send out what was
  pending for rc4, but there is nothing worrisome going on. I have more
  fixes pending for guest debugging support (gdbstub) but I will send
  them next week"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (22 commits)
  KVM: X86: Declare KVM_CAP_SET_GUEST_DEBUG properly
  KVM: selftests: Fix build for evmcs.h
  kvm: x86: Use KVM CPU capabilities to determine CR4 reserved bits
  KVM: VMX: Explicitly clear RFLAGS.CF and RFLAGS.ZF in VM-Exit RSB path
  docs/virt/kvm: Document configuring and running nested guests
  KVM: s390: Remove false WARN_ON_ONCE for the PQAP instruction
  kvm: ioapic: Restrict lazy EOI update to edge-triggered interrupts
  KVM: x86: Fixes posted interrupt check for IRQs delivery modes
  KVM: SVM: fill in kvm_run->debug.arch.dr[67]
  KVM: nVMX: Replace a BUG_ON(1) with BUG() to squash clang warning
  KVM: arm64: Fix 32bit PC wrap-around
  KVM: arm64: vgic-v4: Initialize GICv4.1 even in the absence of a virtual ITS
  KVM: arm64: Save/restore sp_el0 as part of __guest_enter
  KVM: arm64: Delete duplicated label in invalid_vector
  KVM: arm64: vgic-its: Fix memory leak on the error path of vgic_add_lpi()
  KVM: arm64: vgic-v3: Retire all pending LPIs on vcpu destroy
  KVM: arm: vgic-v2: Only use the virtual state when userspace accesses pending bits
  KVM: arm: vgic: Only use the virtual state when userspace accesses enable bits
  KVM: arm: vgic: Synchronize the whole guest on GIC{D,R}_I{S,C}ACTIVER read
  KVM: arm64: PSCI: Forbid 64bit functions for 32bit guests
  ...
2020-05-07 09:50:59 -07:00
Vincenzo Frascino 7e9f5e6629 arm64: vdso: Add --eh-frame-hdr to ldflags
LLVM's unwinder depends on the .eh_frame_hdr being present for
unwinding. However, when compiling Linux with GCC, the section
is not present in the vdso library object and when compiling
with Clang, it is present, but it has zero length.

With GCC the problem was not spotted because libgcc unwinder does
not require the .eh_frame_hdr section to be present.

Add --eh-frame-hdr to ldflags to correctly generate and populate
the section for both GCC and LLVM.

Fixes: 28b1a824a4 ("arm64: vdso: Substitute gettimeofday() with C implementation")
Reported-by: Tamas Zsoldos <tamas.zsoldos@arm.com>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Tested-by: Tamas Zsoldos <tamas.zsoldos@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200507104049.47834-1-vincenzo.frascino@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 14:40:12 +01:00
Sibi Sankar 68aee4af5f arm64: dts: qcom: sdm845-cheza: Add iommus property
Add iommus property to remoteproc modem node.

Following SMMU global faults are seen without it.

arm-smmu 15000000.iommu: Unexpected global fault, this could be serious
arm-smmu 15000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000,
                         GFSYNR1 0x00000781, GFSYNR2 0x00000000

arm-smmu 15000000.iommu: Unexpected global fault, this could be serious
arm-smmu 15000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000,
                         GFSYNR1 0x00000461, GFSYNR2 0x00000000

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/38c607841e81664a2db69a27260cd7dfbd653458.1587407458.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-07 14:21:42 +01:00
Mark Rutland 027d0c7101 arm64: hugetlb: avoid potential NULL dereference
The static analyzer in GCC 10 spotted that in huge_pte_alloc() we may
pass a NULL pmdp into pte_alloc_map() when pmd_alloc() returns NULL:

|   CC      arch/arm64/mm/pageattr.o
|   CC      arch/arm64/mm/hugetlbpage.o
|                  from arch/arm64/mm/hugetlbpage.c:10:
| arch/arm64/mm/hugetlbpage.c: In function ‘huge_pte_alloc’:
| ./arch/arm64/include/asm/pgtable-types.h:28:24: warning: dereference of NULL ‘pmdp’ [CWE-690] [-Wanalyzer-null-dereference]
| ./arch/arm64/include/asm/pgtable.h:436:26: note: in expansion of macro ‘pmd_val’
| arch/arm64/mm/hugetlbpage.c:242:10: note: in expansion of macro ‘pte_alloc_map’
|     |arch/arm64/mm/hugetlbpage.c:232:10:
|     |./arch/arm64/include/asm/pgtable-types.h:28:24:
| ./arch/arm64/include/asm/pgtable.h:436:26: note: in expansion of macro ‘pmd_val’
| arch/arm64/mm/hugetlbpage.c:242:10: note: in expansion of macro ‘pte_alloc_map’

This can only occur when the kernel cannot allocate a page, and so is
unlikely to happen in practice before other systems start failing.

We can avoid this by bailing out if pmd_alloc() fails, as we do earlier
in the function if pud_alloc() fails.

Fixes: 66b3923a1a ("arm64: hugetlb: add support for PTE contiguous bit")
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reported-by: Kyrill Tkachov <kyrylo.tkachov@arm.com>
Cc: <stable@vger.kernel.org> # 4.5.x-
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-05-07 09:24:15 +01:00
Mike Leach fd955a7eac arm64: dts: hi6220: Add CTI options
Adds in CTI device tree information for the Hikey620 board.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-05-07 14:44:56 +08:00
David S. Miller 3793faad7b Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Conflicts were all overlapping changes.

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-06 22:10:13 -07:00
Loic Poulain a8dad3e1e3 arm64: dts: hikey960: pinctrl: Fix spi2/spi3 pinconf
Only the pinmux was selected, not the pinconf, leading to spi issues.
Increase drive strength so that max speed (25Mhz) can be achieved.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-05-07 11:22:43 +08:00
Alex Elder b94c280d0b arm64: dts: sdm845: add IPA iommus property
Add an "iommus" property to the IPA node in "sdm845.dtsi".  It is
required because there are two regions of memory the IPA accesses
through an SMMU.  The next few patches define and map those regions.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-06 17:27:48 -07:00
Sibi Sankar 54e9d5f708 arm64: dts: qcom: sdm845: Add SoC compatible to MTP
Add missing SoC compatible to SDM845 MTP board file.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200504202243.5476-2-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-06 11:19:51 -07:00
Linus Torvalds 3c40cdb0e9 Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu:
 "This fixes a potential scheduling latency problem for the algorithms
  used by WireGuard"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: arch/nhpoly1305 - process in explicit 4k chunks
  crypto: arch/lib - limit simd usage to 4k chunks
2020-05-06 10:20:00 -07:00
Stephen Boyd d823836ad1 arm64: tegra: Remove redundant CLKDEV_LOOKUP selects
The arm64 architecture selects COMMON_CLK at the toplevel ARM64 config.
The COMMON_CLK config option already selects CLKDEV_LOOKUP so it's
redundant to have this selected again for the Tegra specific config.

Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/20200409064416.83340-4-sboyd@kernel.org
2020-05-05 12:33:59 -07:00
Rob Herring 81134fb541 clk: versatile: Rework kconfig structure
CONFIG_COMMON_CLK_VERSATILE doesn't really do anything other than hiding
Arm Ltd reference platform clock drivers. It is both selected by the
platforms that need it and has a 'depends on' for those platforms. Let's
drop the selects and convert CONFIG_COMMON_CLK_VERSATILE into a
menuconfig entry. With this make CONFIG_ICST visible.

Move the 'select REGMAP_MMIO' to the drivers that require it (SP810 did
not).

This also has the side effect of enabling CONFIG_ICST for COMPILE_TEST
as it was not visible before.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2020-05-05 11:43:14 -05:00
Rob Herring 6aec54a649 arm64: vexpress: Don't select CONFIG_POWER_RESET_VEXPRESS
The VExpress power-off/reset driver is not needed on 64-bit platforms as
PSCI power-off and reset can be used instead. Stop selecting it so it
can be disabled and not always built-in.

CONFIG_VEXPRESS_CONFIG can also be dropped as it was a dependency for
CONFIG_POWER_RESET_VEXPRESS.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2020-05-05 11:42:50 -05:00
Daniel Thompson ab8ad279ce arm64: cacheflush: Fix KGDB trap detection
flush_icache_range() contains a bodge to avoid issuing IPIs when the kgdb
trap handler is running because issuing IPIs is unsafe (and not needed)
in this execution context. However the current test, based on
kgdb_connected is flawed: it both over-matches and under-matches.

The over match occurs because kgdb_connected is set when gdb attaches
to the stub and remains set during normal running. This is relatively
harmelss because in almost all cases irq_disabled() will be false.

The under match is more serious. When kdb is used instead of kgdb to access
the debugger then kgdb_connected is not set in all the places that the
debug core updates sw breakpoints (and hence flushes the icache). This
can lead to deadlock.

Fix by replacing the ad-hoc check with the proper kgdb macro. This also
allows us to drop the #ifdef wrapper.

Fixes: 3b8c9f1cdf ("arm64: IPI each CPU after invalidating the I-cache for kernel mappings")
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200504170518.2959478-1-daniel.thompson@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-05 16:09:30 +01:00
Will Deacon e5159827e0 Merge branches 'for-next/asm' and 'for-next/insn' into for-next/bti
Merge in dependencies for in-kernel Branch Target Identification support.

* for-next/asm:
  arm64: Disable old style assembly annotations
  arm64: kernel: Convert to modern annotations for assembly functions
  arm64: entry: Refactor and modernise annotation for ret_to_user
  x86/asm: Provide a Kconfig symbol for disabling old assembly annotations
  x86/32: Remove CONFIG_DOUBLEFAULT

* for-next/insn:
  arm64: insn: Report PAC and BTI instructions as skippable
  arm64: insn: Don't assume unrecognized HINTs are skippable
  arm64: insn: Provide a better name for aarch64_insn_is_nop()
  arm64: insn: Add constants for new HINT instruction decode
2020-05-05 15:19:09 +01:00
Will Deacon 80e4e56132 Merge branch 'for-next/bti-user' into for-next/bti
Merge in user support for Branch Target Identification, which narrowly
missed the cut for 5.7 after a late ABI concern.

* for-next/bti-user:
  arm64: bti: Document behaviour for dynamically linked binaries
  arm64: elf: Fix allnoconfig kernel build with !ARCH_USE_GNU_PROPERTY
  arm64: BTI: Add Kconfig entry for userspace BTI
  mm: smaps: Report arm64 guarded pages in smaps
  arm64: mm: Display guarded pages in ptdump
  KVM: arm64: BTI: Reset BTYPE when skipping emulated instructions
  arm64: BTI: Reset BTYPE when skipping emulated instructions
  arm64: traps: Shuffle code to eliminate forward declarations
  arm64: unify native/compat instruction skipping
  arm64: BTI: Decode BYTPE bits when printing PSTATE
  arm64: elf: Enable BTI at exec based on ELF program properties
  elf: Allow arch to tweak initial mmap prot flags
  arm64: Basic Branch Target Identification support
  ELF: Add ELF program property parsing support
  ELF: UAPI and Kconfig additions for ELF program properties
2020-05-05 15:15:58 +01:00
Will Deacon eeb2d87ece arm64: cpufeature: Group indexed system register definitions by name
Some system registers contain an index in the name (e.g. ID_MMFR<n>_EL1)
and, while this index often follows the register encoding, newer additions
to the architecture are necessarily tacked on the end. Sorting these
registers by encoding therefore becomes a bit of a mess.

Group the indexed system register definitions by name so that it's easier to
read and will hopefully reduce the chance of us accidentally introducing
duplicate definitions in the future.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-05 14:04:37 +01:00
Boris Brezillon cbd7214402 arm64: dts: rockchip: Define the rockchip Video Decoder node on rk3399
RK3399 has a Video decoder, define the node in the dtsi. We also add
the missing power-domain in mmu node and enable the block.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Link: https://lore.kernel.org/r/20200403221345.16702-6-ezequiel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-05-05 14:27:38 +02:00
Will Deacon 433022b58e arm64: cpufeature: Extend comment to describe absence of field info
When a feature register field is omitted from the description of the
register, the corresponding bits are treated as STRICT RES0, including
for KVM guests. This is subtly different to declaring the field as
HIDDEN/STRICT/EXACT/0, so update the comment to call this out.

Signed-off-by: Will Deacon <will@kernel.org>
2020-05-05 11:45:21 +01:00
Geert Uytterhoeven ebcea694e6 arm64: Sort vendor-specific errata
Sort configuration options for vendor-specific errata by vendor, to
increase uniformity.
Move ARM64_WORKAROUND_REPEAT_TLBI up, as it is also selected by
ARM64_ERRATUM_1286807.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-05 09:43:51 +01:00
Grygorii Strashko 461d6d058c arm64: dts: ti: j721e-main: add main navss cpts node
Add DT node for Main NAVSS CPTS module.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04 12:02:03 -07:00
Grygorii Strashko 29390928fe arm64: dts: ti: k3-j721e-mcu: add mcu cpsw cpts node
Add DT node for The TI J721E MCU CPSW CPTS which is part of MCU CPSW NUSS.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04 12:02:03 -07:00
Grygorii Strashko b3f7e95f03 arm64: dts: ti: k3-am65-main: add main navss cpts node
Add DT node for Main NAVSS CPTS module.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04 12:02:03 -07:00
Grygorii Strashko 885a26bae0 arm64: dts: ti: k3-am65-mcu: add cpsw cpts node
Add DT node for the TI AM65x SoC Common Platform Time Sync (CPTS).

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04 12:02:03 -07:00
Alex Elder e9e89c45bf arm64: dts: sdm845: add IPA iommus property
Add an "iommus" property to the IPA node in "sdm845.dtsi".  It is
required because there are two regions of memory the IPA accesses
through an SMMU.  The next few patches define and map those regions.

Signed-off-by: Alex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20200504181350.22822-1-elder@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-04 11:45:44 -07:00
Anshuman Khandual da7bad98ee arm64/cpuinfo: Move device_initcall() near cpuinfo_regs_init()
This moves device_initcall() near cpuinfo_regs_init() making the calling
sequence clear. Besides it is a standard practice to have device_initcall()
(any __initcall for that matter) just after the function it actually calls.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Suzuki Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org

Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/1588595377-4503-1-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-04 18:08:40 +01:00
Ondrej Jirman cff1110178
arm64: dts: allwinner: sun50i-a64: Add missing address/size-cells
The binding specifies #address-cells and #size-cells should be present.
Without them present, dtc issues a warning because default for
#address-cells seems to be <2>:

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi:1108.4-52:
  Warning (dma_ranges_format):
    /soc/dram-controller@1c62000:dma-ranges:
    "dma-ranges" property has invalid length (12 bytes)
    (parent #address-cells == 1, child #address-cells == 2,
    #size-cells == 1)

mbus #address-cells should be 1.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-05-04 18:40:13 +02:00
Clément Péron fe79ea577b
arm64: dts: allwinner: h6: Enable CPU opp tables for Pine H64
Enable CPU and GPU opp tables for Pine H64.

This needs to change the CPU regulator max voltage to fit
the OPP table.

Also add the ramp-delay information to avoid any out of spec
running as the regulator is slower at reaching the voltage
requested compare to the PLL reaching the frequency.

There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-05-04 18:40:13 +02:00
Clément Péron d8e2b7e11b
arm64: dts: allwinner: Sort Pine H64 device-tree nodes
Pine H64 device-tree have some nodes not properly sorted.

Fix this.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-05-04 18:40:13 +02:00
Paolo Bonzini 7134fa0709 KVM/arm fixes for Linux 5.7, take #2
- Fix compilation with Clang
 - Correctly initialize GICv4.1 in the absence of a virtual ITS
 - Move SP_EL0 save/restore to the guest entry/exit code
 - Handle PC wrap around on 32bit guests, and narrow all 32bit
   registers on userspace access
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAl6r7LMPHG1hekBrZXJu
 ZWwub3JnAAoJECPQ0LrRPXpDOioQAI3MzfQ/sGaJN/83ZLOdKdqvSmRwJrwoHH/K
 qX0HgDky3/OMPD+uIlYpo5f1RLM2R/pDj6rhpg8IcWhfVXWEZZHU9Z8xqc3o8Hpo
 Hp4if0pe9+6iaUPuGyzP0Di5Dj+6eNglHoSsvyeeGsH1b7YzE812wN0VnGHB7+T5
 /lEMfCSDWmtMa63FvcX9oxqKCWr1pjpUJ46u0D2uszcbYpIPXm4AMZgX0ZxnlreT
 IPQ6uvG7bBeTjrkucScwqoH8L2/xBP2y6D2HoC7ANmvn4Wv8neJNYh0LQt0zgsTI
 DTNwy2E1R27lxtQtp9Y05itA1N1qkj6hRowgEWgtMtlLQyz0PUT+xFHl+T1iBQjz
 zcEoL49/A4x01fw6JVqDraItEBW6g8fjnJul/FZ7K6Psncxz9oRjSSz+sSVLgn/W
 wthA2ChVlGVzpQsfByVmARTFew65Ls/rm1h9TzZcMWZsEdQRLi5NtyFkLBq2aMMz
 D15//aFQf7jmiSv+uVALZcnU1dBxqqzGBY8pwSrNSv4LsZAcDOsKRpgoe3zFVj48
 rzbUOWXthEpXo4RipOoEeNavuFwetwcCKlyO5hnvUhlR5Yc0ofQiWKZE5vZ6yGm4
 cg2CUMBy7Mjcg+80vo5qnRS5E6S+xQHgBnzwau0DOTIZDerKjH69gsn8JxiRNRbo
 Ix9uMPY8
 =455e
 -----END PGP SIGNATURE-----

Merge tag 'kvmarm-fixes-5.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master

KVM/arm fixes for Linux 5.7, take #2

- Fix compilation with Clang
- Correctly initialize GICv4.1 in the absence of a virtual ITS
- Move SP_EL0 save/restore to the guest entry/exit code
- Handle PC wrap around on 32bit guests, and narrow all 32bit
  registers on userspace access
2020-05-04 12:01:37 -04:00
Mark Brown 47d67e4d19 arm64: insn: Report PAC and BTI instructions as skippable
The PAC and BTI instructions can be safely skipped so report them as
such, allowing them to be probed.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200504131326.18290-5-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-04 16:06:29 +01:00
Mark Brown c71052cc9e arm64: insn: Don't assume unrecognized HINTs are skippable
Currently the kernel assumes that any HINT which it does not explicitly
recognise is skippable.  This is not robust as new instructions may be
added which need special handling, and in any case software should only
be using explicit NOP instructions for deliberate NOPs.

This has the effect of rendering PAC and BTI instructions unprobeable
which means that probes can't be inserted on the first instruction of
functions built with those features.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200504131326.18290-4-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-04 16:06:29 +01:00
Mark Brown 07dcd9677c arm64: insn: Provide a better name for aarch64_insn_is_nop()
The current aarch64_insn_is_nop() has exactly one caller which uses it
solely to identify if the instruction is a HINT that can safely be stepped,
requiring us to list things that aren't NOPs and make things more confusing
than they need to be. Rename the function to reflect the actual usage and
make things more clear.

Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200504131326.18290-3-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-04 16:06:29 +01:00
Mark Brown bd507ca277 arm64: insn: Add constants for new HINT instruction decode
Add constants for decoding newer instructions defined in the HINT space.
Since we are now decoding both the op2 and CRm fields rename the enum as
well; this is compatible with what the existing users are doing.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200504131326.18290-2-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-04 16:06:29 +01:00
Andrew Scull 02ab1f5018 arm64: Unify WORKAROUND_SPECULATIVE_AT_{NVHE,VHE}
Errata 1165522, 1319367 and 1530923 each allow TLB entries to be
allocated as a result of a speculative AT instruction. In order to
avoid mandating VHE on certain affected CPUs, apply the workaround to
both the nVHE and the VHE case for all affected CPUs.

Signed-off-by: Andrew Scull <ascull@google.com>
Acked-by: Will Deacon <will@kernel.org>
CC: Marc Zyngier <maz@kernel.org>
CC: James Morse <james.morse@arm.com>
CC: Suzuki K Poulose <suzuki.poulose@arm.com>
CC: Will Deacon <will@kernel.org>
CC: Steven Price <steven.price@arm.com>
Link: https://lore.kernel.org/r/20200504094858.108917-1-ascull@google.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-04 16:05:47 +01:00
Mark Brown 50479d58ea arm64: Disable old style assembly annotations
Now that we have converted arm64 over to the new style SYM_ assembler
annotations select ARCH_USE_SYM_ANNOTATIONS so the old macros aren't
available and we don't regress.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200501115430.37315-4-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-04 12:46:03 +01:00
Mark Brown 0343a7e463 arm64: kernel: Convert to modern annotations for assembly functions
In an effort to clarify and simplify the annotation of assembly functions
in the kernel new macros have been introduced. These replace ENTRY and
ENDPROC and also add a new annotation for static functions which previously
had no ENTRY equivalent. Update the annotations in the core kernel code to
the new macros.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200501115430.37315-3-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-04 12:46:03 +01:00
Mark Brown 06607c7e93 arm64: entry: Refactor and modernise annotation for ret_to_user
As part of an effort to clarify and clean up the assembler annotations
new macros have been introduced which annotate the start and end of blocks
of code in assembler files. Currently ret_to_user has an out of line slow
path work_pending placed above the main function which makes annotating the
start and end of these blocks of code awkward.

Since work_pending is only referenced from within ret_to_user try to make
things a bit clearer by moving it after the current ret_to_user and then
marking both ret_to_user and work_pending as part of a single ret_to_user
code block.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200501115430.37315-2-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-05-04 12:46:03 +01:00
Samuel Holland 29ee412bb7
arm64: dts: allwinner: a64: Remove unused SPDIF sound card
As of v5.7-rc2, Linux now prints the following message at boot:

  [   33.848525] platform sound_spdif: deferred probe pending

This is because sound_spdif is waiting on its CPU DAI &spdif to probe,
but &spdif is disabled in the device tree.

Exposure of the SPDIF pin is board-specific functionality, so the sound
card and codec DAI belong in the individual board DTS, not the SoC DTSI.
In fact, no in-tree A64 board DTS enables &spdif, so let's remove the
card and DAI entirely.

This reverts commit 78e071370a.

Acked-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-05-04 13:44:57 +02:00
Samuel Holland 5f39dd2327
arm64: dts: allwinner: a64: pinetab: Fix cpvdd supply name
An older version of the analog codec binding referenced the headphone
amplifier binding as "hpvcc". However, by the time it was merged in
commit 21dd30200e ("ASoC: dt-bindings: sun50i-codec-analog: Add
headphone amp regulator supply"), the regulator reference was renamed to
"cpvdd". This board's device tree still uses the old name, which fails
to work at runtime, and which causes a warning from `make dtbs_check`.
Resolve both by fixing the name.

Fixes: 674ef1d0a7 ("arm64: dts: allwinner: a64: add support for PineTab")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-05-04 12:53:29 +02:00
Masami Hiramatsu 7d5620d31e arm64: dts: uniphier: Add support for Akebi96
Add the device tree for Akebi96. Akebi96 is a 96boards certified
development board based on UniPhir LD20.
( https://www.96boards.org/product/akebi96/ )

This board has;
- MAX3421 USB-SPI chip on SPI port3 (for USB gadget port)
- Simple frame buffer with 1080p fixed resolution.
- I2S port which is connected to aout1b instead of aout1.
- 3 serial ports, only serial3 has CTS/RTS.
- No NAND, only eMMC on the board.
- OP-TEE installed firmware.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-04 10:07:35 +09:00
Masahiro Yamada 1a13827b77 arm64: dts: uniphier: add #address-cells and #size-cells to SPI nodes
Documentation/devicetree/bindings/spi/spi-uniphier.txt requires
#address-cells and #size-cells, but they are missing in actual DT files.

Also, 'make ARCH=arm64 dtbs_check' is really noisy.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-04 10:07:35 +09:00
Kunihiko Hayashi 8f664ce7ed arm64: dts: uniphier: Stabilize Ethernet RGMII mode of PXs3 ref board
The RGMII PHY implemented in PXs3 ref board needs to change
drive-strength properties of the Ethernet Tx pins to stabilize the PHY.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-04 09:24:14 +09:00
Kunihiko Hayashi 44f0746d60 arm64: dts: uniphier: Add ethernet aliases
Add 'aliases' properties for ethernet device.

U-Boot performs a fix-up of the MAC address and will overwrite the values
from the Linux devicetree for aliased ethernet device. The MAC address can
be inherited from U-Boot by adding aliases of ethernet devices.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-04 09:24:00 +09:00
Kunihiko Hayashi f03b998de0 arm64: dts: uniphier: Add XDMAC node
Add external DMA controller support implemented in UniPhier SoCs.
This supports for LD11, LD20 and PXs3.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-04 09:18:08 +09:00
Rob Herring 0b104773b4 PCI: Constify struct pci_ecam_ops
struct pci_ecam_ops is typically DT match table data which is defined to
be const. It's also best practice for ops structs to be const. Ideally,
we'd make struct pci_ops const as well, but that becomes pretty
invasive, so for now we just cast it where needed.

Link: https://lore.kernel.org/r/20200409234923.21598-2-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <amurray@thegoodpenguin.co.uk>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Len Brown <lenb@kernel.org>
Cc: Jonathan Chocron <jonnyc@amazon.com>
Cc: Zhou Wang <wangzhou1@hisilicon.com>
Cc: Robert Richter <rrichter@marvell.com>
Cc: Toan Le <toan@os.amperecomputing.com>
Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
Cc: Mans Rullgard <mans@mansr.com>
Cc: linux-acpi@vger.kernel.org
2020-05-01 16:28:59 +01:00
Marc Zyngier 0225fd5e0a KVM: arm64: Fix 32bit PC wrap-around
In the unlikely event that a 32bit vcpu traps into the hypervisor
on an instruction that is located right at the end of the 32bit
range, the emulation of that instruction is going to increment
PC past the 32bit range. This isn't great, as userspace can then
observe this value and get a bit confused.

Conversly, userspace can do things like (in the context of a 64bit
guest that is capable of 32bit EL0) setting PSTATE to AArch64-EL0,
set PC to a 64bit value, change PSTATE to AArch32-USR, and observe
that PC hasn't been truncated. More confusion.

Fix both by:
- truncating PC increments for 32bit guests
- sanitizing all 32bit regs every time a core reg is changed by
  userspace, and that PSTATE indicates a 32bit mode.

Cc: stable@vger.kernel.org
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-05-01 09:51:08 +01:00
Łukasz Stelmach 51075e0cb7 arm64: kexec_file: print appropriate variable
The value of kbuf->memsz may be different than kbuf->bufsz after calling
kexec_add_buffer(). Hence both values should be logged.

Fixes: 52b2a8af74 ("arm64: kexec_file: load initrd and device-tree")
Fixes: 3751e728ce ("arm64: kexec_file: add crash dump support")
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: James Morse <james.morse@arm.com>
Cc: Bhupesh Sharma <bhsharma@redhat.com>
Link: https://lore.kernel.org/r/20200430163142.27282-2-l.stelmach@samsung.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-30 21:31:22 +01:00
Guixiong Wei 037d9303a7 arm: mm: use __pfn_to_section() to get mem_section
Replace the open-coded '__nr_to_section(pfn_to_section_nr(pfn))' in
pfn_valid() with a more concise call to '__pfn_to_section(pfn)'.

No functional change.

Signed-off-by: Guixiong Wei <guixiongwei@gmail.com>
Link: https://lore.kernel.org/r/20200430161858.11379-1-guixiongwei@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-30 21:13:56 +01:00
Vincenzo Frascino 1578e5d031 arm64: vdso: Add -fasynchronous-unwind-tables to cflags
On arm64 linux gcc uses -fasynchronous-unwind-tables -funwind-tables
by default since gcc-8, so now the de facto platform ABI is to allow
unwinding from async signal handlers.

However on bare metal targets (aarch64-none-elf), and on old gcc,
async and sync unwind tables are not enabled by default to avoid
runtime memory costs.

This means if linux is built with a baremetal toolchain the vdso.so
may not have unwind tables which breaks the gcc platform ABI guarantee
in userspace.

Add -fasynchronous-unwind-tables explicitly to the vgettimeofday.o
cflags to address the ABI change.

Fixes: 28b1a824a4 ("arm64: vdso: Substitute gettimeofday() with C implementation")
Cc: Will Deacon <will@kernel.org>
Reported-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-04-30 18:35:32 +01:00
Jerome Brunet 38f58fc51d arm64: defconfig: enable meson gx audio as module
Enable the module config for the Amlogic GX audio card.
This module will imply the internal components usually associated
with it to make a functional sound card on these platforms.

Also enable the simple amplifier module which often used on the
output stage of those cards.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20200421163935.775935-2-jbrunet@baylibre.com
2020-04-30 07:53:22 -07:00
Vinod Koul f7a8bc1cf0 arm64: defconfig: Enable SM8250 GCC driver
Enable the SM8250 GCC driver so that we can boot to shell with defconfig

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200424102943.2368764-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-30 06:08:06 -07:00
Marc Zyngier 6e977984f6 KVM: arm64: Save/restore sp_el0 as part of __guest_enter
We currently save/restore sp_el0 in C code. This is a bit unsafe,
as a lot of the C code expects 'current' to be accessible from
there (and the opportunity to run kernel code in HYP is specially
great with VHE).

Instead, let's move the save/restore of sp_el0 to the assembly
code (in __guest_enter), making sure that sp_el0 is correct
very early on when we exit the guest, and is preserved as long
as possible to its host value when we enter the guest.

Reviewed-by: Andrew Jones <drjones@redhat.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-04-30 12:01:35 +01:00
Fangrui Song 6aea9e0503 KVM: arm64: Delete duplicated label in invalid_vector
SYM_CODE_START defines \label , so it is redundant to define \label again.
A redefinition at the same place is accepted by GNU as
(https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=159fbb6088f17a341bcaaac960623cab881b4981)
but rejected by the clang integrated assembler.

Fixes: 617a2f392c ("arm64: kvm: Annotate assembly using modern annoations")
Signed-off-by: Fangrui Song <maskray@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Link: https://github.com/ClangBuiltLinux/linux/issues/988
Link: https://lore.kernel.org/r/20200413231016.250737-1-maskray@google.com
2020-04-30 11:17:00 +01:00
Jason A. Donenfeld a9a8ba90fa crypto: arch/nhpoly1305 - process in explicit 4k chunks
Rather than chunking via PAGE_SIZE, this commit changes the arch
implementations to chunk in explicit 4k parts, so that calculations on
maximum acceptable latency don't suddenly become invalid on platforms
where PAGE_SIZE isn't 4k, such as arm64.

Fixes: 0f961f9f67 ("crypto: x86/nhpoly1305 - add AVX2 accelerated NHPoly1305")
Fixes: 012c82388c ("crypto: x86/nhpoly1305 - add SSE2 accelerated NHPoly1305")
Fixes: a00fa0c887 ("crypto: arm64/nhpoly1305 - add NEON-accelerated NHPoly1305")
Fixes: 16aae3595a ("crypto: arm/nhpoly1305 - add NEON-accelerated NHPoly1305")
Cc: stable@vger.kernel.org
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Reviewed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-04-30 15:16:59 +10:00
Jason A. Donenfeld 706024a52c crypto: arch/lib - limit simd usage to 4k chunks
The initial Zinc patchset, after some mailing list discussion, contained
code to ensure that kernel_fpu_enable would not be kept on for more than
a 4k chunk, since it disables preemption. The choice of 4k isn't totally
scientific, but it's not a bad guess either, and it's what's used in
both the x86 poly1305, blake2s, and nhpoly1305 code already (in the form
of PAGE_SIZE, which this commit corrects to be explicitly 4k for the
former two).

Ard did some back of the envelope calculations and found that
at 5 cycles/byte (overestimate) on a 1ghz processor (pretty slow), 4k
means we have a maximum preemption disabling of 20us, which Sebastian
confirmed was probably a good limit.

Unfortunately the chunking appears to have been left out of the final
patchset that added the glue code. So, this commit adds it back in.

Fixes: 84e03fa39f ("crypto: x86/chacha - expose SIMD ChaCha routine as library function")
Fixes: b3aad5bad2 ("crypto: arm64/chacha - expose arm64 ChaCha routine as library function")
Fixes: a44a3430d7 ("crypto: arm/chacha - expose ARM ChaCha routine as library function")
Fixes: d7d7b85356 ("crypto: x86/poly1305 - wire up faster implementations for kernel")
Fixes: f569ca1647 ("crypto: arm64/poly1305 - incorporate OpenSSL/CRYPTOGAMS NEON implementation")
Fixes: a6b803b3dd ("crypto: arm/poly1305 - incorporate OpenSSL/CRYPTOGAMS NEON implementation")
Fixes: ed0356eda1 ("crypto: blake2s - x86_64 SIMD implementation")
Cc: Eric Biggers <ebiggers@google.com>
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: stable@vger.kernel.org
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-04-30 15:16:59 +10:00
Richard Gong fd0d094531 arm64: dts: agilex: correct service layer driver's compatible value
Correct the compatible property value for Intel Service Layer driver
on Intel Agilex SoC platform.

Signed-off-by: Richard Gong <richard.gong@intel.com>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
2020-04-29 20:37:11 -07:00
Richard Gong 8d6b6bbe6d arm64: dts: agilex: correct FPGA manager driver's compatible value
Correct the compatible property value for FPGA manager driver on
Intel Agilex SoC platform.

Signed-off-by: Richard Gong <richard.gong@intel.com>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
2020-04-29 20:37:09 -07:00
Catalin Marinas ada66f1837 arm64: Reorder the macro arguments in the copy routines
The current argument order is obviously buggy (memcpy.S):

	macro strb1 ptr, regB, val
	strb \ptr, [\regB], \val
	endm

However, it cancels out as the calling sites in copy_template.S pass the
address as the regB argument.

Mechanically reorder the arguments to match the instruction mnemonics.
There is no difference in objdump before and after this patch.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200429183702.28445-1-catalin.marinas@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-29 21:50:01 +01:00
Jerome Brunet f315050894 arm64: dts: meson: kvim3: move hdmi to tdm a
The tdmout b is physically routed to the 40 pin header and the tdmout c
is routed to the m2 connector. It makes these interfaces poor
candidates to handle the HDMI 8ch i2s link (2ch i2s * 4 lanes) as it would
force the same link format on the related connectors.

Instead use the TDM A interface. This one is not routed to the outside
world on the vim3, so it can only be used for HDMI.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200421141814.639480-1-jbrunet@baylibre.com
2020-04-29 12:20:40 -07:00
Neil Armstrong adf27a87eb arm64: dts: meson-g12: remove spurious blank line
Remove spurious blank line introduced in f12a463d2f but was not part
of the original patch at [1].

[1] http://lore.kernel.org/r/20200313090713.15147-3-narmstrong@baylibre.com

Fixes: f12a463d2f ("arm64: dts: meson-g12: add the SPIFC nodes")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200420080018.11607-1-narmstrong@baylibre.com
2020-04-29 12:12:11 -07:00
Tim Lewis 75800d7017 arm64: dts: meson: S922X: extend cpu opp-points
Add extra cpu pop points to allow mild overclock on S922X. The opp
points are found in Hardkernel N2 sources [1] and testing shows no
obvious issues on other S922X devices. Thermal throttling should
keep things in-check if needed.

[1] f86cd9487c

Signed-off-by: Tim Lewis <elatllat@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200426162119.GA23268@imac
2020-04-29 12:00:18 -07:00
Neil Armstrong 5ac0869fb3 arm64: dts: meson-g12b-khadas-vim3: add missing frddr_a status property
In the process of moving the VIM3 audio nodes to a G12B specific dtsi
for enabling the SM1 based VIM3L, the frddr_a status = "okay" property
got dropped.
This re-enables the frddr_a node to fix audio support.

Fixes: 4f26cc1c96 ("arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi")
Reported-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20191018140216.4257-1-narmstrong@baylibre.com
2020-04-29 11:45:06 -07:00
Neil Armstrong 08dc0e5dd9 arm64: dts: meson: fix leds subnodes name
Fix the leds subnode names to match (^led-[0-9a-f]$|led)

It fixes:
meson-g12b-a311d-khadas-vim3.dt.yaml: leds: 'red', 'white' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-g12b-s922x-khadas-vim3.dt.yaml: leds: 'red', 'white' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-g12b-odroid-n2.dt.yaml: leds: 'blue' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxbb-nanopi-k2.dt.yaml: leds: 'stat' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxbb-nexbox-a95x.dt.yaml: leds: 'blue' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxbb-odroidc2.dt.yaml: leds: 'blue' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxbb-vega-s95-pro.dt.yaml: leds: 'blue' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxbb-vega-s95-meta.dt.yaml: leds: 'blue' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxbb-vega-s95-telos.dt.yaml: leds: 'blue' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxbb-wetek-hub.dt.yaml: leds: 'system' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxbb-wetek-play2.dt.yaml: leds: 'ethernet', 'system', 'wifi' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxl-s905x-libretech-cc.dt.yaml: leds: 'blue', 'system' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxl-s905d-libretech-pc.dt.yaml: leds: 'blue', 'green' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxm-rbox-pro.dt.yaml: leds: 'blue', 'red' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-gxm-s912-libretech-pc.dt.yaml: leds: 'blue', 'green' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-sm1-sei610.dt.yaml: leds: 'bluetooth' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
meson-sm1-khadas-vim3l.dt.yaml: leds: 'red', 'white' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200326165958.19274-6-narmstrong@baylibre.com
2020-04-29 11:26:34 -07:00
Neil Armstrong d120b5f980 arm64: dts: meson-gxbb-kii-pro: fix board compatible
Remove the uneeded "amlogic,p201", "amlogic,s905" in the board compatible list.

It fixes:
meson-gxbb-kii-pro.dt.yaml: /: compatible: ['videostrong,kii-pro', 'amlogic,p201', 'amlogic,s905', 'amlogic,meson-gxbb'] is not valid under any of the given schemas

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200326165958.19274-5-narmstrong@baylibre.com
2020-04-29 11:26:33 -07:00
Neil Armstrong 5c28dcbb3a arm64: dts: meson-g12b-ugoos-am6: fix board compatible
Add missing amlogic,s922x in the board compatible list.

It fixes:
meson-g12b-ugoos-am6.dt.yaml: /: compatible: ['ugoos,am6', 'amlogic,g12b'] is not valid under any of the given schemas

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200326165958.19274-4-narmstrong@baylibre.com
2020-04-29 11:26:33 -07:00
Neil Armstrong 9ecded10b4 arm64: dts: meson: fixup SCP sram nodes
The GX and AXG SCP sram nodes were using invalid compatible and
node names for the sram entries.

Fixup the sram entries node names, and use proper compatible for them.

It notably fixes:
sram@c8000000: 'scp-shmem@0', 'scp-shmem@200' do not match any of the regexes: '^([a-z]*-)?sram(-section)?@[a-f0-9]+$', 'pinctrl-[0-9]+'

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200326165958.19274-3-narmstrong@baylibre.com
2020-04-29 11:26:33 -07:00
Neil Armstrong e4f634d812 arm64: dts: meson-g12-common: fix dwc2 clock names
Use the correct dwc2 clock name.

Fixes: 9baf7d6be7 ("arm64: dts: meson: g12a: Add G12A USB nodes")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200326160857.11929-3-narmstrong@baylibre.com
2020-04-29 11:22:19 -07:00
Neil Armstrong 4e025fd91b arm64: dts: meson-g12b-ugoos-am6: fix usb vbus-supply
The USB supply used the wrong property, fixing:
meson-g12b-ugoos-am6.dt.yaml: usb@ffe09000: 'vbus-regulator' does not match any of the regexes: '^usb@[0-9a-f]+$', 'pinctrl-[0-9]+'

Fixes: 2cd2310fca ("arm64: dts: meson-g12b-ugoos-am6: add initial device-tree")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200326160857.11929-2-narmstrong@baylibre.com
2020-04-29 11:22:19 -07:00
Martin Blumenstingl 2f9139c260 arm64: dts: amlogic: use the new USB control driver for GXL and GXM
Add the correcly architectured USB Glue node and adapt all the Amlogic
GXL and GXM board to the new organization.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200326134507.4808-11-narmstrong@baylibre.com
2020-04-29 11:17:01 -07:00
Mark Rutland 1d09094aa6 arm64: vdso: use consistent 'map' nomenclature
The current code doesn't use a consistent naming scheme for structures,
enums, or variables, making it harder than necessary to determine the
relationship between these.

Let's make this easier by consistently using 'map' nomenclature for
mappings created in userspace, minimizing redundant comments, and
using designated array initializers to tie indices to their respective
elements.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200428164921.41641-5-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-29 10:52:53 +01:00
Mark Rutland d3418f3839 arm64: vdso: use consistent 'abi' nomenclature
The current code doesn't use a consistent naming scheme for structures,
enums, or variables, making it harder than necessary to determine the
relationship between these.

Let's make this easier by consistently using 'vdso_abi' nomenclature.
The 'vdso_lookup' array is renamed to 'vdso_info' to describe what it
contains rather than how it is consumed.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200428164921.41641-4-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-29 10:52:53 +01:00
Mark Rutland 3ee16ff343 arm64: vdso: simplify arch_vdso_type ifdeffery
Currently we have some ifdeffery to determine the number of elements in
enum arch_vdso_type as VDSO_TYPES, rather that the usual pattern of
having the enum define this:

| enum foo_type {
|         FOO_TYPE_A,
|         FOO_TYPE_B,
| #ifdef CONFIG_C
|         FOO_TYPE_C,
| #endif
|         NR_FOO_TYPES
| }

... however, given we only use this number to size the vdso_lookup[]
array, this is redundant anyway as the compiler can automatically size
the array to fit all defined elements.

So let's remove the VDSO_TYPES to simplify the code.

At the same time, let's use designated initializers for the array
elements so that these are guarnateed to be at the expected indices,
regardless of how we modify the structure. For clariy the redundant
explicit initialization of the enum elements is dropped.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200428164921.41641-3-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-29 10:52:53 +01:00
Mark Rutland 74fc72e77d arm64: vdso: remove aarch32_vdso_pages[]
The aarch32_vdso_pages[] array is unnecessarily confusing. We only ever
use the C_VECTORS and C_SIGPAGE slots, and the other slots are unused
despite having corresponding mappings (sharing pages with the AArch64
vDSO).

Let's make this clearer by using separate variables for the vectors page
and the sigreturn page. A subsequent patch will clean up the C_* naming
and conflation of pages with mappings.

Note that since both the vectors page and sig page are single
pages, and the mapping is a single page long, their pages array do not
need to be NULL-terminated (and this was not the case with the existing
code for the sig page as it was the last entry in the aarch32_vdso_pages
array).

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200428164921.41641-2-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-29 10:52:53 +01:00
Yangbo Lu 6c660819d5 arm64: dts: fsl: add fsl,extts-fifo property for fman ptp
The 1588 timer supports external trigger timestamp FIFO on
FMan on QorIQ ARM platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-29 11:44:43 +08:00
Anson Huang 8c30e7caac arm64: dts: imx8mn: Update VDD_ARM 1.2GHz setpoint voltage
The latest datasheet Rev. 0.1, 03/2020 removes below constrain:

"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."

So, for 1.2GHz setpoint VDD_ARM can use its typical voltage
directly.

The datasheet can be downloaded from below link:
https://www.nxp.com/docs/en/data-sheet/IMX8MNCEC.pdf

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-29 11:39:07 +08:00
Shengjiu Wang 1248c86fd6 arm64: dts: freescale: imx8mp: update input_val for AUDIOMIX_BIT_STREAM
Update input_val for AUDIOMIX_BIT_STREAM according to latest RM.

Fixes: 6d9b8d2043 ("arm64: dts: freescale: Add i.MX8MP dtsi support")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-29 11:30:32 +08:00
Yuantian Tang ac082ea87d arm64: dts: lx2160a: add more thermal zone support
There are 7 thermal zones in lx2160a soc. Add the
rest thermal zone node to enable them.
Also correct one of the values for tmu-calibration property.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-29 10:56:43 +08:00
Anson Huang d394039c1a arm64: dts: imx8qxp-mek: Add PMIC thermal zone support
i.MX8QXP MEK board has PMIC thermal sensor, add support for it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-29 10:54:57 +08:00
Anson Huang bc3895b29d arm64: dts: imx8qxp-mek: Sort labels alphabetically
Sort the labels alphabetically for consistency.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-29 10:54:45 +08:00
Matt Porter ebfa8951e6 arm64: dts: imx8mm: specify #sound-dai-cells for SAI nodes
Add #sound-dai-cells properties to SAI nodes.

Signed-off-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-29 10:46:30 +08:00
Daniel Borkmann 0b54142e4b Merge branch 'work.sysctl' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Pull in Christoph Hellwig's series that changes the sysctl's ->proc_handler
methods to take kernel pointers instead. It gets rid of the set_fs address
space overrides used by BPF. As per discussion, pull in the feature branch
into bpf-next as it relates to BPF sysctl progs.

Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/bpf/20200427071508.GV23230@ZenIV.linux.org.uk/T/
2020-04-28 21:23:38 +02:00
Ard Biesheuvel 76085aff29 efi/libstub/arm64: align PE/COFF sections to segment alignment
The arm64 kernel's segment alignment is fixed at 64 KB for any page
size, and relocatable kernels are able to fix up any misalignment of
the kernel image with respect to the 2 MB section alignment that is
mandated by the arm64 boot protocol.

Let's increase the PE/COFF section alignment to the same value, so that
kernels loaded by the UEFI PE/COFF loader are guaranteed to end up at
an address that doesn't require any reallocation to be done if the
kernel is relocatable.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20200413155521.24698-6-ardb@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 17:36:52 +01:00
Vincenzo Frascino 86b8783701 arm64: vdso: Add '-Bsymbolic' to ldflags
Commit 28b1a824a4 ("arm64: vdso: Substitute gettimeofday() with C
implementation") introduced an unused 'VDSO_LDFLAGS' variable to the
vdso Makefile, suggesting that we should be passing '-Bsymbolic' to the
linker, as we do when linking the compat vDSO.

Although it's not strictly necessary to pass this flag, it would be
required if we were to add any internal references to the exported
symbols. It's also consistent with how we link the compat vdso so, since
there's no real downside from passing it, add '-Bsymbolic' to the ldflags
for the native vDSO.

Fixes: 28b1a824a4 ("arm64: vdso: Substitute gettimeofday() with C implementation")
Reported-by: Geoff Levand <geoff@infradead.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20200428150854.33130-1-vincenzo.frascino@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 17:17:09 +01:00
Ard Biesheuvel 9b5aaec441 arm64: drop duplicate definitions of ID_AA64MMFR0_TGRAN constants
A bunch of ID_AA64MMFR0_TGRAN_* constant definitions appear twice
in arch/arm64/include/asm/sysreg.h, so drop the duplicates.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200414134706.8435-1-ardb@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 16:46:48 +01:00
Zenghui Yu f4be140fa3 KVM: arm64: Drop PTE_S2_MEMATTR_MASK
The only user of PTE_S2_MEMATTR_MASK macro had been removed since
commit a501e32430 ("arm64: Clean up the default pgprot setting").
It has been about six years and no one has used it again.

Let's drop it.

Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200415105746.314-1-yuzenghui@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:51:33 +01:00
Gavin Shan 9d2d75ede5 arm64/kernel: Fix range on invalidating dcache for boot page tables
Prior to commit 8eb7e28d4c ("arm64/mm: move runtime pgds to
rodata"), idmap_pgd_dir, tramp_pg_dir, reserved_ttbr0, swapper_pg_dir,
and init_pg_dir were contiguous at the end of the kernel image. The
maintenance at the end of __create_page_tables assumed these were
contiguous, and affected everything from the start of idmap_pg_dir
to the end of init_pg_dir.

That commit moved all but init_pg_dir into the .rodata section, with
other data placed between idmap_pg_dir and init_pg_dir, but did not
update the maintenance. Hence the maintenance is performed on much
more data than necessary (but as the bootloader previously made this
clean to the PoC there is no functional problem).

As we only alter idmap_pg_dir, and init_pg_dir, we only need to perform
maintenance for these. As the other dirs are in .rodata, the bootloader
will have initialised them as expected and cleaned them to the PoC. The
kernel will initialize them as necessary after enabling the MMU.

This patch reworks the maintenance to only cover the idmap_pg_dir and
init_pg_dir to avoid this unnecessary work.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200427235700.112220-1-gshan@redhat.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:48:03 +01:00
Ard Biesheuvel cfa7ede20f arm64: set TEXT_OFFSET to 0x0 in preparation for removing it entirely
TEXT_OFFSET on arm64 is a historical artifact from the early days of
the arm64 port where the boot protocol was basically 'copy this image
to the base of memory + 512k', giving us 512 KB of guaranteed BSS space
to put the swapper page tables. When the arm64 Image header was added in
v3.10, it already carried the actual value of TEXT_OFFSET, to allow the
bootloader to discover it dynamically rather than hardcode it to 512 KB.

Today, this memory window is not used for any particular purpose, and
it is simply handed to the page allocator at boot. The only reason it
still exists is because of the 512k misalignment it causes with respect
to the 2 MB aligned virtual base address of the kernel, which affects
the virtual addresses of all statically allocated objects in the kernel
image.

However, with the introduction of KASLR in v4.6, we added the concept of
relocatable kernels, which rewrite all absolute symbol references at
boot anyway, and so the placement of such kernels in the physical address
space is irrelevant, provided that the minimum segment alignment is
honoured (64 KB in most cases, 128 KB for 64k pages kernels with vmap'ed
stacks enabled). This makes 0x0 and 512 KB equally suitable values for
TEXT_OFFSET on the off chance that we are dealing with boot loaders that
ignore the value passed via the header entirely.

Considering that the distros as well as Android ship KASLR-capable
kernels today, and the fact that TEXT_OFFSET was discoverable from the
Image header from the very beginning, let's change this value to 0x0, in
preparation for removing it entirely at a later date.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20200415082922.32709-1-ardb@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:38:57 +01:00
Mark Brown 30218da597 arm64: lib: Consistently enable crc32 extension
Currently most of the assembly files that use architecture extensions
enable them using the .arch directive but crc32.S uses .cpu instead. Move
that over to .arch for consistency.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20200414182843.31664-1-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:36:32 +01:00
Will Deacon a2a6996352 arm64: cpufeature: Add an overview comment for the cpufeature framework
Now that Suzuki isn't within throwing distance, I thought I'd better add
a rough overview comment to cpufeature.c so that it doesn't take me days
to remember how it works next time.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200421142922.18950-9-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:23:45 +01:00
Will Deacon 98448cdfe7 arm64: cpufeature: Relax checks for AArch32 support at EL[0-2]
We don't need to be quite as strict about mismatched AArch32 support,
which is good because the friendly hardware folks have been busy
mismatching this to their hearts' content.

  * We don't care about EL2 or EL3 (there are silly comments concerning
    the latter, so remove those)

  * EL1 support is gated by the ARM64_HAS_32BIT_EL1 capability and handled
    gracefully when a mismatch occurs

  * EL0 support is gated by the ARM64_HAS_32BIT_EL0 capability and handled
    gracefully when a mismatch occurs

Relax the AArch32 checks to FTR_NONSTRICT.

Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200421142922.18950-8-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:23:42 +01:00
Will Deacon eab2f92607 arm64: cpufeature: Relax AArch32 system checks if EL1 is 64-bit only
If AArch32 is not supported at EL1, the AArch32 feature register fields
no longer advertise support for some system features:

  * ISAR4.SMC
  * PFR1.{Virt_frac, Sec_frac, Virtualization, Security, ProgMod}

In which case, we don't need to emit "SANITY CHECK" failures for all of
them.

Add logic to relax the strictness of individual feature register fields
at runtime and use this for the fields above if 32-bit EL1 is not
supported.

Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200421142922.18950-7-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:23:37 +01:00
Will Deacon 1efcfe79d9 arm64: cpufeature: Factor out checking of AArch32 features
update_cpu_features() is pretty large, so split out the checking of the
AArch32 features into a separate function and call it after checking the
AArch64 features.

Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200421142922.18950-6-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:23:34 +01:00
Will Deacon 13dc4d8361 arm64: cpufeature: Remove redundant call to id_aa64pfr0_32bit_el0()
There's no need to call id_aa64pfr0_32bit_el0() twice because the
sanitised value of ID_AA64PFR0_EL1 has already been updated for the CPU
being onlined.

Remove the redundant function call.

Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200421142922.18950-5-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:23:30 +01:00
Will Deacon 540f76d12c arm64: cpufeature: Add CPU capability for AArch32 EL1 support
Although we emit a "SANITY CHECK" warning and taint the kernel if we
detect a CPU mismatch for AArch32 support at EL1, we still online the
CPU with disastrous consequences for any running 32-bit VMs.

Introduce a capability for AArch32 support at EL1 so that late onlining
of incompatible CPUs is forbidden.

Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200421142922.18950-4-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:23:23 +01:00
Will Deacon 0113340e6e arm64: cpufeature: Spell out register fields for ID_ISAR4 and ID_PFR1
In preparation for runtime updates to the strictness of some AArch32
features, spell out the register fields for ID_ISAR4 and ID_PFR1 to make
things clearer to read. Note that this isn't functionally necessary, as
the feature arrays themselves are not modified dynamically and remain
'const'.

Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200421142922.18950-3-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:23:18 +01:00
Sai Prakash Ranjan 9d3f888135 arm64: cpufeature: Relax check for IESB support
We don't care if IESB is supported or not as we always set
SCTLR_ELx.IESB and, if it works, that's really great.

Relax the ID_AA64MMFR2.IESB cpufeature check so that we don't warn and
taint if it's mismatched.

[will: rewrote commit message]

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200421142922.18950-2-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:23:11 +01:00
Gavin Shan 68ecabd0e6 arm64/mm: Use phys_to_page() to access pgtable memory
The macros {pgd, pud, pmd}_page() retrieves the page struct of the
corresponding page frame, which is reserved as page table. There
is already a macro (phys_to_page), defined in memory.h as below,
to convert the physical address to the page struct. Also, the header
file (memory.h) has been included by pgtable.h.

   #define phys_to_page(phys)      (pfn_to_page(__phys_to_pfn(phys)))

So it's reasonable to use the macro in pgtable.h.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200427234655.111847-1-gshan@redhat.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:11:12 +01:00
Zou Wei 2eaf63ba84 arm64: smp: Make cpus_stuck_in_kernel static
Fix the following sparse warning:

arch/arm64/kernel/smp.c:68:5: warning: symbol 'cpus_stuck_in_kernel'
was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Link: https://lore.kernel.org/r/1587623606-96698-1-git-send-email-zou_wei@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:09:57 +01:00
Jason Yan 0dd2334fd5 arm64: entry: remove unneeded semicolon in el1_sync_handler()
Fix the following coccicheck warning:

arch/arm64/kernel/entry-common.c:97:2-3: Unneeded semicolon

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200418081909.41471-1-yanaijie@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:08:57 +01:00
Ard Biesheuvel 1eae811da6 arm64/kernel: vmlinux.lds: drop redundant discard/keep macros
ARM_EXIT_KEEP and ARM_EXIT_DISCARD are always defined in the same way,
so we don't really need them in the first place.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200416132730.25290-1-ardb@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:07:05 +01:00
Ard Biesheuvel 4cf234943d arm64: drop GZFLAGS definition and export
Drop the definition and export of GZFLAGS, which was never referenced
on arm64, and whose last recorded use in the ARM port (on which arm64
was based original) was removed by patch

  commit 5e89d379edb5ae08b57f39dd8d91697275245cbf [*]
  Author: Russell King <rmk@flint.arm.linux.org.uk>
  Date:   Wed Oct 16 14:32:17 2002 +0100

    [ARM] Convert ARM makefiles to new kbuild (Sam Ravnborg, Kai, rmk)

[*] git commit ID based on Thomas Gleixner's historical GIT repository at
    git://git.kernel.org/pub/scm/linux/kernel/git/tglx/history.git

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200415123049.25504-1-ardb@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 14:06:13 +01:00
George Spelvin 99ee28d996 arm64: kexec_file: Avoid temp buffer for RNG seed
After using get_random_bytes(), you want to wipe the buffer
afterward so the seed remains secret.

In this case, we can eliminate the temporary buffer entirely.
fdt_setprop_placeholder() returns a pointer to the property value
buffer, allowing us to put the random data directly in there without
using a temporary buffer at all.  Faster and less stack all in one.

Signed-off-by: George Spelvin <lkml@sdf.org>
Acked-by: Will Deacon <will@kernel.org>
Cc: Hsin-Yi Wang <hsinyi@chromium.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20200330173801.GA9199@SDF.ORG
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 13:55:51 +01:00
Ard Biesheuvel 348a625dee arm64: rename stext to primary_entry
For historical reasons, the primary entry routine living somewhere in
the inittext section is called stext(), which is confusing, given that
there is also a section marker called _stext which lives at a fixed
offset in the image (either 64 or 4096 bytes, depending on whether
CONFIG_EFI is enabled)

Let's rename stext to primary_entry(), which is a better description
and reflects the secondary_entry() routine that already exists for
SMP boot.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200326171423.3080-1-ardb@kernel.org
Reviwed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 13:55:16 +01:00
Mark Rutland 62a679cb28 arm64: simplify ptrauth initialization
Currently __cpu_setup conditionally initializes the address
authentication keys and enables them in SCTLR_EL1, doing so differently
for the primary CPU and secondary CPUs, and skipping this work for CPUs
returning from an idle state. For the latter case, cpu_do_resume
restores the keys and SCTLR_EL1 value after the MMU has been enabled.

This flow is rather difficult to follow, so instead let's move the
primary and secondary CPU initialization into their respective boot
paths. By following the example of cpu_do_resume and doing so once the
MMU is enabled, we can always initialize the keys from the values in
thread_struct, and avoid the machinery necessary to pass the keys in
secondary_data or open-coding initialization for the boot CPU.

This means we perform an additional RMW of SCTLR_EL1, but we already do
this in the cpu_do_resume path, and for other features in cpufeature.c,
so this isn't a major concern in a bringup path. Note that even while
the enable bits are clear, the key registers are accessible.

As this now renders the argument to __cpu_setup redundant, let's also
remove that entirely. Future extensions can follow a similar approach to
initialize values that differ for primary/secondary CPUs.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Reviewed-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Cc: Amit Daniel Kachhap <amit.kachhap@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200423101606.37601-3-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 11:23:21 +01:00
Mark Rutland d0055da526 arm64: remove ptrauth_keys_install_kernel sync arg
The 'sync' argument to ptrauth_keys_install_kernel macro is somewhat
opaque at callsites, so instead lets have regular and _nosync variants
of the macro to make this a little more obvious.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Amit Daniel Kachhap <amit.kachhap@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200423101606.37601-2-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-04-28 11:23:21 +01:00
Peng Fan 6895681132 arm64: dts: imx8qxp: support scu mailbox channel
With mailbox driver support i.MX8 SCU MU channel, we could
use it to avoid trigger interrupts for each TR/RR registers
in one MU, instead, only one RX interrupt for a recv and
one TX interrupt for a send.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-28 16:50:00 +08:00
Robin Murphy 89ee3ace72 arm64: dts: rockchip: Fix Pinebook Pro FUSB302 interrupt
Although the FUSB302 driver has apparently supported the "fcs,int_n"
property since the beginning, the DT binding has never documented it,
and in fact defines a standard "interrupts" property as required. It's
also questionable whether the GPIO specifier with GPIO_ACTIVE_HIGH is
even correct, since the FUSB302 datasheet says INT_N is an "Active-LOW
open-drain interrupt output", and the Pinebook Pro schematic shows it
wired directly to the GPIO pin.

Just use the standard property like all the other RK3399 boards sharing
the same design.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/f731122c5ccde4e3d6d149a9d7bf01708b4279f7.1587736459.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-04-27 21:35:11 +02:00
Johan Jonker de70083cba arm64: dts: rockchip: remove #sound-dai-cells from &spdif node of rk3399-hugsun-x99.dts
The '#sound-dai-cells' property is already defined in rk3399.dtsi
at the 'spdif' node, so remove it from the '&spdif' node in
'rk3399-hugsun-x99.dts'.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200424155600.24254-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-04-27 21:34:26 +02:00
Johan Jonker e565dd298c arm64: dts: rockchip: remove #sound-dai-cells from &i2s1 node of rk3399-pinebook-pro.dts
The '#sound-dai-cells' property is already defined in rk3399.dtsi
at the 'i2s1' node, so remove it from the '&i2s1' node in
'rk3399-pinebook-pro.dts'.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200424155600.24254-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-04-27 21:34:26 +02:00
Johan Jonker c604fd810b arm64: dts: rockchip: swap interrupts interrupt-names rk3399 gpu node
Dts files with Rockchip rk3399 'gpu' nodes were manually verified.
In order to automate this process arm,mali-midgard.txt
has been converted to yaml. In the new setup dtbs_check with
arm,mali-midgard.yaml expects interrupts and interrupt-names values
in the same order. Fix this for rk3399.

make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/gpu/
arm,mali-midgard.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200425143837.18706-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-04-27 21:31:54 +02:00
Johan Jonker c617ed8850 arm64: dts: rockchip: fix status for &gmac2phy in rk3328-evb.dts
The status was removed of the '&gmac2phy' node with the apply
of a patch long time ago, so fix status for '&gmac2phy'
in 'rk3328-evb.dts'.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200425122345.12902-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-04-27 21:31:35 +02:00
Johan Jonker f73a28284e arm64: dts: rockchip: remove extra assigned-clocks property from &gmac2phy node in rk3328-evb.dts
There are 2 'assigned-clocks' properties in the '&gmac2phy'
node in 'rk3328-evb.dts', so remove one of them.

Info from clk-rk3328.c:

MUXGRF(SCLK_MAC2PHY, "clk_mac2phy", mux_mac2phy_src_p,
CLK_SET_RATE_NO_REPARENT,
RK3328_GRF_MAC_CON2, 10, 1, MFLAGS),

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200425122345.12902-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-04-27 21:31:35 +02:00
Tero Kristo cae809434d arm64: dts: ti: k3-j721e-main: Add main domain watchdog entries
Add DT entries for main domain watchdog0 and 1 instances.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-04-27 13:39:48 +03:00
Vignesh Raghavendra 57dfcb5dce arm64: dts: ti: k3-am65-main: Add ehrpwm nodes
Add DT nodes for all ehrpwm instances present on AM654 EVM.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-04-27 13:26:35 +03:00
Keerthy 64f9147d91 arm64: dts: ti: am654: Add thermal zones
The am654 SoC has three thermal zones namely MPU0, MPU1 and MCU
zones.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-04-27 13:14:32 +03:00
Keerthy 7fd28c6ab8 arm64: dts: ti: am65-wakeup: Add VTM node
VTM stands for voltage and thermal management.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-04-27 13:14:32 +03:00
Yoshihiro Shimoda cf8ae446bb arm64: dts: renesas: Fix IOMMU device node names
Fix IOMMU device node names as "iommu@".

Fixes: 8f507babc6 ("arm64: dts: renesas: r8a774a1: Add IPMMU device nodes")
Fixes: 63093a8e58 ("arm64: dts: renesas: r8a774b1: Add IPMMU device nodes")
Fixes: 6c7e02178e ("arm64: dts: renesas: r8a774c0: Add IPMMU device nodes")
Fixes: 3b7e7848f0 ("arm64: dts: renesas: r8a7795: Add IPMMU device nodes")
Fixes: e4b9a493df ("arm64: dts: renesas: r8a7795-es1: Add IPMMU device nodes")
Fixes: 389baa4096 ("arm64: dts: renesas: r8a7796: Add IPMMU device nodes")
Fixes: 55697cbb44 ("arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes")
Fixes: ce3b52a159 ("arm64: dts: renesas: r8a77970: Add IPMMU device nodes")
Fixes: a3901e7398 ("arm64: dts: renesas: r8a77995: Add IPMMU device nodes")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1587461775-13369-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-27 12:02:56 +02:00
Tomi Valkeinen 0836dacecf arm64: dts: ti: k3-j721e-common-proc-board: add assigned clks for DSS
The DSS related clock muxes are set via assigned-clocks in a way which
provides us:

VP0 - DisplayPort SST
VP1 - DPI0
VP2 - DSI
VP3 - DPI1

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-04-27 13:01:12 +03:00
Tomi Valkeinen 76921f15ac arm64: dts: ti: k3-j721e-main: Add DSS node
Add DSS node for J721E SoC.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-04-27 13:01:12 +03:00
Jyri Sarha fc539b90ed arm64: dts: ti: am654: Add DSS node
Add DSS node to k3-am65-main.dtsi with labels for board specific
support and syscon node for oldi-io-ctrl.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-04-27 13:01:12 +03:00
Christoph Hellwig 32927393dc sysctl: pass kernel pointers to ->proc_handler
Instead of having all the sysctl handlers deal with user pointers, which
is rather hairy in terms of the BPF interaction, copy the input to and
from  userspace in common code.  This also means that the strings are
always NUL-terminated by the common code, making the API a little bit
safer.

As most handler just pass through the data to one of the common handlers
a lot of the changes are mechnical.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Andrey Ignatov <rdna@fb.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-04-27 02:07:40 -04:00
Anson Huang 30cdd62dce arm64: dts: imx8mp: Add thermal zones support
i.MX8MP has a TMU inside which supports two thermal zones, add support
for them.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-25 16:15:00 +08:00
Fabio Estevam 921a6845d0 arm64: dts: imx8m: Fix AIPS reg properties
Commit dc3efc6ff0 ("arm64: dts: imx8m: fix aips dts node") caused several
dtc warnings like these when building with W=1:

arch/arm64/boot/dts/freescale/imx8mm.dtsi:265.23-542.5: Warning (simple_bus_reg): /soc@0/bus@30000000: simple-bus unit address format error, expected "301f0000"
arch/arm64/boot/dts/freescale/imx8mm.dtsi:544.23-602.5: Warning (simple_bus_reg): /soc@0/bus@30400000: simple-bus unit address format error, expected "305f0000"
arch/arm64/boot/dts/freescale/imx8mm.dtsi:604.23-862.5: Warning (simple_bus_reg): /soc@0/bus@30800000: simple-bus unit address format error, expected "309f0000"
arch/arm64/boot/dts/freescale/imx8mm.dtsi:864.23-909.5: Warning (simple_bus_reg): /soc@0/bus@32c00000: simple-bus unit address format error, expected "32df0000"

Fix them by using the correct address base and size in the AIPS reg
properties.

Fixes: dc3efc6ff0 ("arm64: dts: imx8m: fix aips dts node")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-25 09:35:20 +08:00
Kuldeep Singh f5ac5ac12d arm64: dts: ls1012a: Add QSPI node properties
Add support for QSPI on NXP layerscape LS1012A-RDB, LS1012A-QDS,
LS1012A-FRDM and LS1012A-FRWY boards.

LS1012A-RDB has 2 Spansion "s25fs512s" flashes of size 64M each and only
one can be accessed at a time.
LS1012A-QDS/FRDM has 1 spansion "s25fs512s" flash of size 64M.
LS1012A-FRWY has one winbond "w25q16dw" flash of size 2M.

Use generic compatibles as "jedec,spi-nor" for automatic detection of
flash. Configure RX and TX buswidth values as 2 as only two I/O lines are
available for data transfer.

Add ls1012a(si) node alongwith flash nodes.

Signed-off-by: Ashish Kumar <Ashish.kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-25 09:16:06 +08:00
Linus Torvalds 4544db3f84 - Ensure context synchronisation after a write to APIAKey.
- Fix bullet list formatting in Documentation/arm64/amu.rst to eliminate
   doc warnings.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAl6jG6sACgkQa9axLQDI
 XvFFLQ/+O/AOzG7lMP/7Yoq7+5Tt3kO8CoODHc+q7nE/Kpyn58/Aa1QorzQHM3r9
 xZkEWwYZIN/XELHtfD/6m6Z6KmtgPdHN4+UT7kJi6LSy1c4ZN6CUWMBi1RrzEN1O
 VZx6n8k0EAo6utIa3ncyWlf9+F+ja84756HdZzPtI4DOWnVkZ/A2F6+XiHRSpz+o
 txjdXVRBLigJiVOHchAV9NU6dhz3O8bnUz2jAoYW0uqIVKz9z53SvN23R+w7Kqsa
 KRL38OD/gODizc92yi8YpdIpuvQIFywgHXcbFcFf6wgi9pXHiRDDL1Q1URx0op8K
 8HjM/PEcbmeBv+QN7JvrtGolqUa2IuU5EcJ/c4hbUlHLU9PoQYHZvGkdbq1aI/Xh
 x2Jv79qWu4IMyEUQeKxOs3In7TMEwNXc81q6tv3F+1e3w/T6yAl23DNSBhNZQiol
 +nZ8GUyT4Znov9VXOBXnQsj0KvzIQq7SYTE55VejmDTIiQTZMV13Rj8KEHBr5Cej
 keUx2Hyv00IHJ7kbg+Luw9DkfCXh4byWIlHb3vPQQUQSbQx4IYroblbohFx/8jAU
 mEgQSE8E7CnT82GKAWm6lIed8h9erHMr+WUtnXhVhKFaSGCljtWIdog1LbN5vGtV
 vYs/sXVnmy349NNTOLXCdIOuaUfWCDLOwagPhQwSUPJNwu4h2Q4=
 =q/zE
 -----END PGP SIGNATURE-----

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

 - Ensure context synchronisation after a write to APIAKey.

 - Fix bullet list formatting in Documentation/arm64/amu.rst to
   eliminate doc warnings.

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  Documentation: arm64: fix amu.rst doc warnings
  arm64: sync kernel APIAKey when installing
2020-04-24 11:34:43 -07:00
Mark Brown 3ca73b70a3 crypto: arm64 - Consistently enable extension
Currently most of the crypto files enable the crypto extension using the
.arch directive but crct10dif-ce-core.S uses .cpu instead. Move that over
to .arch for consistency.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-04-24 17:42:16 +10:00
Ard Biesheuvel 22090f84bc efi/libstub: unify EFI call wrappers for non-x86
We have wrappers around EFI calls so that x86 can define special
versions for mixed mode, while all other architectures can use the
same simple definition that just issues the call directly.
In preparation for the arrival of yet another architecture that doesn't
need anything special here (RISC-V), let's move the default definition
into a shared header.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-04-23 20:15:06 +02:00
Adam Ford 15ddc3e17a arm64: dts: imx8mn: Change SDMA1 ahb clock for imx8mn
Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error.
This patch changes to ahb clock from SDMA1_ROOT to AHB which fixes the
timeout error.

Fixes: 6c3debcbae ("arm64: dts: freescale: Add i.MX8MN dtsi support")

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-23 22:50:41 +08:00
Anson Huang fecde876bc arm64: defconfig: Enable CONFIG_PINCTRL_IMX8DXL by default
Enable CONFIG_PINCTRL_IMX8DXL by default to support i.MX8DXL
pinctrl driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-23 22:46:27 +08:00
Adam Ford 593816fa2f arm64: dts: imx: Add Beacon i.MX8m-Mini development kit
Beacon Embeddedworks is launching a development kit based on the
i.MX8M Mini SoC.  The kit consists of a System on Module (SOM)
+ baseboard.  The SOM has the SoC, eMMC, and Ethernet. The baseboard
has an wm8962 audio CODEC, a single USB OTG, and three USB host ports.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-23 22:20:17 +08:00
Atish Patra 2e0eb483c0 efi/libstub: Move arm-stub to a common file
Most of the arm-stub code is written in an architecture independent manner.
As a result, RISC-V can reuse most of the arm-stub code.

Rename the arm-stub.c to efi-stub.c so that ARM, ARM64 and RISC-V can use it.
This patch doesn't introduce any functional changes.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Link: https://lore.kernel.org/r/20200415195422.19866-2-atish.patra@wdc.com
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-04-23 14:16:28 +02:00
Clément Péron ebae33c3f6
arm64: dts: allwinner: h6: Enable CPU opp tables for Orange Pi 3
Enable CPU opp tables for Orange Pi 3.

This needs to change the CPU regulator max voltage to fit
the OPP table.

Also add the ramp-delay information to avoid any out of spec
running as the regulator is slower at reaching the voltage
requested compare to the PLL reaching the frequency.

There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-23 11:36:36 +02:00
Clément Péron 67533f873a
arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink GS1
Enable CPU opp tables for Beelink GS1.

This needs to change the CPU regulator max voltage to fit
the OPP table.

Also add the ramp-delay information to avoid any out of spec
running as the regulator is slower at reaching the voltage
requested compare to the PLL reaching the frequency.

There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-23 11:36:36 +02:00
Ondrej Jirman 905434e0b5
arm64: dts: allwinner: h6: Add CPU Operating Performance Points table
Add an Operating Performance Points table for the CPU cores to
enable Dynamic Voltage & Frequency Scaling on the H6.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-23 11:36:36 +02:00
Ondrej Jirman 9f8a93b742
arm64: dts: allwinner: h6: Add thermal trip points/cooling map
This enables passive cooling by down-regulating CPU voltage
and frequency.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-23 11:35:29 +02:00
Mike Leach b1fcc5702a arm64: dts: qcom: msm8916: Add CTI options
Adds system and CPU bound CTI definitions for Qualcom msm8916 platform
(Dragonboard DB410C).
System CTIs 2-11 are omitted as no information available at present.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200415201230.15766-1-mike.leach@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-22 22:11:21 -07:00
Alexey Minnekhanov 23a6da79fe arm64: dts: qcom: Add Xiaomi Redmi Note 7 (lavender)
This adds the initial device tree support for Xiaomi
Redmi Note 7 (codename lavender) phone. It is based on
SDM660 SoC. Currently it can be booted into initrd with
a shell over UART and you can also get kernel boot logs
from a pstore-ramoops.

Signed-off-by: Alexey Minnekhanov <alexey.min@gmail.com>
Link: https://lore.kernel.org/r/20200417012630.222352-4-alexey.min@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-22 20:50:04 -07:00
Craig Tatlor feec34411d arm64: dts: qcom: Add SDM660 SoC support
Initial device tree support for Qualcomm SDM660 SoC.

SDM660 is based off MSM8998 and uses some of its drivers.
SDM630/636 are based off SDM660 SoC and they are pin
and software compatible.

The device tree is based on the CAF 4.4 kernel tree.

Features:
 * CPU nodes
 * Timer nodes
 * Interrupt controller
 * Global Clock Controller
 * Top Level Mode Multiplexer (pin controller)
 * UART node

This is inspired by and based on the work of Craig Tatlor in
https://patchwork.kernel.org/patch/10563667/

Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Alexey Minnekhanov <alexey.min@gmail.com>
Link: https://lore.kernel.org/r/20200417012630.222352-3-alexey.min@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-22 20:47:48 -07:00
Srinivas Kandagatla 7710f80ecd arm64: dts: qcom: db820c: fix audio configuration
After patch f864edff11 ("ASoC: qdsp6: q6routing: remove default routing")
and 9b60441692 ("ASoC: qdsp6: q6asm-dai: only enable dais from device tree")
asm dais and routing needs to be properly specified at device tree level.

This patch fixes this.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200422101922.8894-1-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-22 19:26:14 -07:00
Srinivas Kandagatla 1724397e65 arm64: dts: qcom: db845c: fix asm dai setup
"direction" property is only valid for asm compressed dais,
so remove it for non compressed dais

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Fixes: 89a32a4e76 ("arm64: dts: qcom: db845c: add analog audio support")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200422102044.8995-2-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-22 19:25:27 -07:00
Srinivas Kandagatla 565775aab5 arm64: qcom: c630: fix asm dai setup
"direction" property is only valid for asm compressed dais,
so remove it for non compressed dais

Fixes: 45021d35fc ("arm64: dts: qcom: c630: Enable audio support")
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200422102044.8995-1-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-22 19:25:17 -07:00
Masahiro Yamada 62d0fd591d arch: split MODULE_ARCH_VERMAGIC definitions out to <asm/vermagic.h>
As the bug report [1] pointed out, <linux/vermagic.h> must be included
after <linux/module.h>.

I believe we should not impose any include order restriction. We often
sort include directives alphabetically, but it is just coding style
convention. Technically, we can include header files in any order by
making every header self-contained.

Currently, arch-specific MODULE_ARCH_VERMAGIC is defined in
<asm/module.h>, which is not included from <linux/vermagic.h>.

Hence, the straight-forward fix-up would be as follows:

|--- a/include/linux/vermagic.h
|+++ b/include/linux/vermagic.h
|@@ -1,5 +1,6 @@
| /* SPDX-License-Identifier: GPL-2.0 */
| #include <generated/utsrelease.h>
|+#include <linux/module.h>
|
| /* Simply sanity version stamp for modules. */
| #ifdef CONFIG_SMP

This works enough, but for further cleanups, I split MODULE_ARCH_VERMAGIC
definitions into <asm/vermagic.h>.

With this, <linux/module.h> and <linux/vermagic.h> will be orthogonal,
and the location of MODULE_ARCH_VERMAGIC definitions will be consistent.

For arc and ia64, MODULE_PROC_FAMILY is only used for defining
MODULE_ARCH_VERMAGIC. I squashed it.

For hexagon, nds32, and xtensa, I removed <asm/modules.h> entirely
because they contained nothing but MODULE_ARCH_VERMAGIC definition.
Kbuild will automatically generate <asm/modules.h> at build-time,
wrapping <asm-generic/module.h>.

[1] https://lore.kernel.org/lkml/20200411155623.GA22175@zn.tnic

Reported-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Acked-by: Jessica Yu <jeyu@kernel.org>
2020-04-23 10:50:26 +09:00
Guido Günther 9251dad3a3 arm64: dts: imx8mq-librem5-devkit: Don't use underscore in node name
Rename usb_typec to usb-typec to get a rid of a warning when building
dtb with warnings enabled.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-23 09:17:35 +08:00
Guido Günther 76eceb0f36 arm64: dts: imx8mq-librem5-devkit: Use 0.9V for VDD_GPU
According to the imx8mq data sheet running VDD_GPU at 0.9V is enough
when not overclocking to 1GHz (which we currently don't do).

Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-23 09:17:18 +08:00
Mark Rutland 3fabb43818 arm64: sync kernel APIAKey when installing
A direct write to a APxxKey_EL1 register requires a context
synchronization event to ensure that indirect reads made by subsequent
instructions (e.g. AUTIASP, PACIASP) observe the new value.

When we initialize the boot task's APIAKey in boot_init_stack_canary()
via ptrauth_keys_switch_kernel() we miss the necessary ISB, and so there
is a window where instructions are not guaranteed to use the new APIAKey
value. This has been observed to result in boot-time crashes where
PACIASP and AUTIASP within a function used a mixture of the old and new
key values.

Fix this by having ptrauth_keys_switch_kernel() synchronize the new key
value with an ISB. At the same time, __ptrauth_key_install() is renamed
to __ptrauth_key_install_nosync() so that it is obvious that this
performs no synchronization itself.

Fixes: 2832158233 ("arm64: initialize ptrauth keys for kernel booting task")
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reported-by: Will Deacon <will@kernel.org>
Cc: Amit Daniel Kachhap <amit.kachhap@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Will Deacon <will@kernel.org>
2020-04-21 15:52:56 +01:00
Emanuele Giuseppe Esposito 812756a82e kvm_host: unify VM_STAT and VCPU_STAT definitions in a single place
The macros VM_STAT and VCPU_STAT are redundantly implemented in multiple
files, each used by a different architecure to initialize the debugfs
entries for statistics. Since they all have the same purpose, they can be
unified in a single common definition in include/linux/kvm_host.h

Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com>
Message-Id: <20200414155625.20559-1-eesposit@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-04-21 09:13:01 -04:00
Bjorn Andersson 240031967a arm64: dts: qcom: sm8250: Fix PDC compatible and reg
The pdc node suffers from both too narrow compatible and insufficient
cells in the reg, fix these.

Fixes: 60378f1a17 ("arm64: dts: qcom: sm8250: Add sm8250 dts file")
Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200415054703.739507-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-21 00:18:03 -07:00
Bryan O'Donoghue b7e2fba066 arm64: dts: qcom: sm8250: Add UFS controller and PHY
Add nodes for the UFS controller and PHY, and enable these for the MTP
with relevant supplies specified.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20200415061430.740854-3-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-20 23:40:43 -07:00
Bryan O'Donoghue ec13d5c23a arm64: dts: qcom: sm8250-mtp: Add pm8150, pm8150l and pm8009
Add RPMh controlled regulators for the three PMICs and specify voltage
ranges and mode for relevant regulators.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20200415061430.740854-2-bjorn.andersson@linaro.org
[bjorn: Fixed up some supplies and voltages]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-20 23:40:34 -07:00
Bjorn Andersson b6f78e2709 arm64: dts: qcom: sm8250: Add rpmhpd node
Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200415062154.741179-3-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-20 23:33:39 -07:00
Sai Prakash Ranjan 95c31e6805 arm64: dts: qcom: sc7180: Add Coresight support
Add coresight components found on Qualcomm SC7180 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/73e4352c19afff4c9ea2041b263a85e68e6eef11.1586263250.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-20 23:29:47 -07:00
Bjorn Andersson 28810eecae arm64: dts: qcom: msm8996: Reduce vdd_apc voltage
Some msm8996 based devices are unstable when run with VDD_APC of 1.23V,
which is listed as the maximum voltage in "Turbo" mode. Given that the
CPU cluster is not run in "Turbo" mode, reduce this to 0.98V - the
maximum voltage for nominal operation.

Tested-by: Loic Poulain <loic.poulain@linaro.org>
Fixes: 7a2a2231ef ("arm64: dts: apq8096-db820c: Fix VDD core voltage")
Cc: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/20200318054442.3066726-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-20 19:49:05 -07:00
Jonathan Marek 61d2ca503d arm64: dts: qcom: fix pm8150 gpio interrupts
This was mistakenly copied from the downstream dts, however the upstream
driver works differently.

I only tested this with the pm8150_gpios node (used with volume button),
but the 2 others should be the same.

Fixes: e92b61c8e7 ("arm64: dts: qcom: pm8150l: Add base dts file")
Fixes: 229d5bcad0 ("arm64: dts: qcom: pm8150b: Add base dts file")
Fixes: 5101f22a5c ("arm64: dts: qcom: pm8150: Add base dts file")
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200420153543.14512-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-20 12:45:15 -07:00
Kees Cook 6e0d6ac5f3 arm64/elf: Disable automatic READ_IMPLIES_EXEC for 64-bit address spaces
With arm64 64-bit environments, there should never be a need for automatic
READ_IMPLIES_EXEC, as the architecture has always been execute-bit aware
(as in, the default memory protection should be NX unless a region
explicitly requests to be executable).

Suggested-by: Hector Marco-Gisbert <hecmargi@upv.es>
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jason Gunthorpe <jgg@mellanox.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lkml.kernel.org/r/20200327064820.12602-7-keescook@chromium.org
2020-04-20 19:44:27 +02:00
Kees Cook eaf3f9e618 arm32/64/elf: Split READ_IMPLIES_EXEC from executable PT_GNU_STACK
The READ_IMPLIES_EXEC work-around was designed for old toolchains that
lacked the ELF PT_GNU_STACK marking under the assumption that toolchains
that couldn't specify executable permission flags for the stack may not
know how to do it correctly for any memory region.

This logic is sensible for having ancient binaries coexist in a system
with possibly NX memory, but was implemented in a way that equated having
a PT_GNU_STACK marked executable as being as "broken" as lacking the
PT_GNU_STACK marking entirely. Things like unmarked assembly and stack
trampolines may cause PT_GNU_STACK to need an executable bit, but they
do not imply all mappings must be executable.

This confusion has led to situations where modern programs with explicitly
marked executable stack are forced into the READ_IMPLIES_EXEC state when
no such thing is needed. (And leads to unexpected failures when mmap()ing
regions of device driver memory that wish to disallow VM_EXEC[1].)

In looking for other reasons for the READ_IMPLIES_EXEC behavior, Jann
Horn noted that glibc thread stacks have always been marked RWX (until
2003 when they started tracking the PT_GNU_STACK flag instead[2]). And
musl doesn't support executable stacks at all[3]. As such, no breakage
for multithreaded applications is expected from this change.

This changes arm32 and arm64 compat together, to keep behavior the same.

[1] https://lkml.kernel.org/r/20190418055759.GA3155@mellanox.com
[2] https://sourceware.org/git/?p=glibc.git;a=commitdiff;h=54ee14b3882
[3] https://lkml.kernel.org/r/20190423192534.GN23599@brightrain.aerifal.cx

Suggested-by: Hector Marco-Gisbert <hecmargi@upv.es>
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jason Gunthorpe <jgg@mellanox.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lkml.kernel.org/r/20200327064820.12602-6-keescook@chromium.org
2020-04-20 19:42:19 +02:00
Kees Cook 78066055b0 arm32/64/elf: Add tables to document READ_IMPLIES_EXEC
Add tables to document the current behavior of READ_IMPLIES_EXEC in
preparation for changing the behavior for both arm64 and arm.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jason Gunthorpe <jgg@mellanox.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lkml.kernel.org/r/20200327064820.12602-5-keescook@chromium.org
2020-04-20 19:41:50 +02:00
Vladimir Oltean dd12fa6978 arm64: dts: ls1028a: Specify the DMA channels for the DSPI controllers
LS1028A has a functional connection to the eDMA module. Even if the
spi-fsl-dspi.c driver is not using DMA for LS1028A now, define the slots
in the DMAMUX for connecting the eDMA channels to the 3 DSPI
controllers.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-20 22:36:24 +08:00
Yangtao Li 8a3a953518
arm64: dts: allwinner: h6: Add clock to CPU cores
The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-20 15:23:01 +02:00
Yoshihiro Shimoda f4d71c6ea9 arm64: dts: renesas: r8a77980: Fix IPMMU VIP[01] nodes
Missing the renesas,ipmmu-main property on ipmmu_vip[01] nodes.

Fixes: 55697cbb44 ("arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes)
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1587108543-23786-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-20 13:10:30 +02:00
Clément Péron cdaeaa2560
arm64: configs: Enable sun50i cpufreq nvmem
Allwinner H6 needs this driver to be able to get
the correct speed_bin required for DVFS.

Enable this option in arm64 defconfig.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-20 10:25:20 +02:00
Heiko Stuebner ce33988fb6 arm64: dts: rockchip: add Odroid Advance Go
The Odroid Advance Go is a handheld based on Rockchip's rk3326 soc
with a DSI display and some handheld controls including an analog
joystick connected to the saradc.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20200414082938.2977572-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-04-19 14:29:20 +02:00
Heiko Stuebner df07f7df7e arm64: dts: rockchip: add core devicetree for rk3326
The rk3326 is basically a px30 without the second display controller.
So add a dtsi based on that, that just removes the affected nodes.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20200414082938.2977572-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-04-19 14:29:20 +02:00
Johan Jonker 051083dddf arm64: dts: rockchip: remove bus-width from mmc nodes in rk3308-roc-cc
The 'bus-width' property for mmc nodes is defined both in
'rk3308.dtsi' and 'rk3308-roc-cc.dts'.
'bus-width' and pinctrl containing the bus-pins
should be in the same file, so remove all entries
from mmc nodes in 'rk3308-roc-cc.dts'.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200415131057.2366-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-04-19 14:21:47 +02:00
Tobias Schramm 1f5a3e1679 arm64: dts: rockchip: add micro SD card regulator to rockpro64
This patch adds the RockPro64's micro SD card regulator to the
RockPro64 dtsi. The regulator is present on all revisions of the
device.
Previously the regular was missing, resulting in unreliable boot
behaviour when booting from SD card.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Link: https://lore.kernel.org/r/20200416145534.1263575-1-t.schramm@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-04-19 14:19:29 +02:00