Now that the Blackfin machine drivers have been updated to the
multicomponent support, update the resources to match. The pin
settings are now a board issue and removed from the driver.
Signed-off-by: Scott Jiang <scott.jiang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Anomaly 05000480 on BF537 rev 0.0, 0.1, 0.2:
Multiple Simultaneous Urgent DMA Requests May Cause DMA System Instability
Suggested Workaround:
Program the DMA Traffic Control Period to a non-zero value. This forces
the DMA block to group accesses together rather than allow arbitration for
each piece of data placed on the internal DMA bus.
Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the bfin_write() func needs proper type information in order to
expand into the right bfin_writeX() variant, preserve the addr's type
when setting up the local __addr. Otherwise the helpers will detect
the variant based upon sizeof(void) which is almost never right.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
old cpu_xxx() APIs is planned to removed later. then, converted.
Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Every callter (except kthread_bind) should use proper
set_cpus_allowed_ptr() APIs.
Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We plan to remove cpu_possible_map and cpu_present_map later and we
have proper init_cpu_possible() and init_cpu_present() APIs.
Therefore this patch rewrites platform_init_cpus and platform_prepare_cpus
by their APIs.
Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Both the BF548-EZKIT and the BF561-EZKIT use top boot flashes, so now
that Das U-Boot uses the last small sector for its environment, update
their nor layout in the kernel accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
SGI UV's uv_tlb.c driver has become rather hard to read, with overly large
functions, non-standard coding style and (way) too long variable, constant
and function names and non-obvious code flow sequences.
This patch improves the readability and maintainability of the driver
significantly, by doing the following strict code cleanups with no side
effects:
- Split long functions into shorter logical functions.
- Shortened some variable and structure member names.
- Added special functions for reads and writes of MMR regs with
very long names.
- Added the 'tunables' table to shortened tunables_write().
- Added the 'stat_description' table to shorten uv_ptc_proc_write().
- Pass fewer 'stat' arguments where it can be derived from the 'bcp'
argument.
- Function definitions consistent on one line, and inline in few (short) cases.
- Moved some small structures and an atomic inline function to the header file.
- Moved some local variables to the blocks where they are used.
- Updated the copyright date.
- Shortened uv_write_global_mmr64() etc. using some aliasing; no
line breaks. Renamed many uv_.. functions that are not exported.
- Aligned structure fields.
[ note that not all structures are aligned the same way though; I'd like
to keep the extensive commenting in some of them. ]
- Shortened some long structure names.
- Standard pass/fail exit from init_per_cpu()
- Vertical alignment for mass initializations.
- More separation between blocks of code.
Tested on a 16-processor Altix UV.
Signed-off-by: Cliff Wickman <cpw@sgi.com>
Cc: penberg@kernel.org
Link: http://lkml.kernel.org/r/E1QOw12-0004MN-Lp@eag09.americas.sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch adds support for a new version of the SGI UV hub
chip. The hub chip is the node controller that connects multiple
blades into a larger coherent SSI.
For the most part, UV2 is compatible with UV1. The majority of
the changes are in the addresses of MMRs and in a few cases, the
contents of MMRs. These changes are the result in changes in the
system topology such as node configuration, processor types,
maximum nodes, physical address sizes, etc.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Link: http://lkml.kernel.org/r/20110511175028.GA18006@sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Turns out the documentation is wrong and doing "RAISE 1" does not result
in a software reset, only a core reset. So when the on-chip rom has a
functioning reset helper, use it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These boards don't have AD1980 modules, and that device is deprecated,
so don't bother building it up by default anymore.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the value of these MMRs aren't changing, store the value in a local
variable and work off of that. This avoids multiple MMR reads which are
implicitly forced by the volatile markings.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF537 SIC combines the gpio port H mask A interrupts with the
emac rx interrupt, so we need to demux this in software.
It also combines the gpio port H mask B and the emac tx interrupts,
and the watchdog and port F mask B interrupts, but since we don't
support mask B yet, just add the defines for now.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The search logic in the gpio demux walks all possible gpio blocks starting
at the specified pin. The trouble on bf537 parts when we demux the port
F and port G mask A interrupts is that we also demux port H mask A ints.
Most of the time this isn't an issue as people don't usually use port H,
but might as well avoid it when possible.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This functionality was merged into the common bfin_pm_standby_ctrl func
some time ago, so punt these now unused funcs and data, and localize the
wake funcs that aren't needed externally anymore.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The SIC interrupt line muxing that the bf537 does is specific to this
CPU (thankfully), so rip it out of the common code and move it to a
bf537-specific file. This tidies up the common code significantly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These are only used in a few internal Blackfin places, so move the irq
prototypes out of the global header and into the internal irq one. No
functional changes other than shuffling locales.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Prefer MMR named checks over part-specific lists, condense duplicated
code across different #ifdef branches, simplify CONFIG_PM ifdefs, and
drop unused kgdb header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure we mark cache flushing as unsafe to kgdb in SMP mode so that
kgdb doesn't flush things incorrectly on us.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
After some cache setup reordering changesets, the blackfin_cpudata init
was left behind. While cpu0's data was correct, cpu1's data was not.
Not that big of a deal as these are only used in the cpuinfo output, but
should still be fixed. So move the setup of these fields to the common
cache setup function to avoid this happening again in the future.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The smp flush lines are too long and have too many newlines, so scale
them back to match the other lines.
The %p modifier shows "(null)" for 0, so use %08x instead.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Build the sound pieces that the board actually has into the kernel, and
punt older devices that we discourage.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These files had a lot of whitespace damage, mostly due to copying and
pasting original files that had damage.
The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so
punt them all.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Start a new common IRQ header and move all of the CEC pieces there. This
lets the individual part headers worry just about its SIC defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Seems the ipipe code just copied & pasted the existing irq lookup logic,
so pull the logic out of do_irq() and into a local helper, and convert
the two users over to that.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The local ivg structs need not be exported, so mark them as static.
Further, the "num_spurious" variable is only incremented and never
actually read anywhere, so punt it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the on-chip L1 regions are not cacheable, there is no point in
trying to flush/invalidate them. Plus, older Blackfin parts like to
trigger an exception (like BF533-0.3).
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
renesas_usbhs driver can use external interrupt mode
(which come from USB-PHY) or autonomy mode (it use own interrupt)
for detecting connection/disconnection when Function.
And it will be power OFF while it has been disconnecting
if external interrupt mode is selected.
mackerel board has 2 USB ports.
But we can not use external interrupt mode
on CN22 USB0 port which is only for USB Function.
IRQ7-PORT40 is already used by Touchscreen,
and USB-PHY needs IRQ7-PORT167.
It is impossible to use IRQ7 demux on mackerel.
We can use external interrupt mode USB-Function on "USB1".
USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
But don't select both drivers in same time.
These 2 drivers are not supporting IRQ SHARD.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
renesas_usbhs is remake version of r8a66597
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This makes it possible to leave DMA slave IDs in the platform data
at default 0 value without hitting DMA channel allocation error paths.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This makes it possible to leave DMA slave IDs in the platform data
at default 0 value without hitting DMA channel allocation error paths.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add SDHI0 and SDHI1 slave ids for RX and TX to enable
DMA Engine support for SDHI on the AG5EVM board.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Simply add MMCIF slave ids for RX and TX to enable
DMA Engine support for the AG5EVM board.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add SY-DMAC support via shdma.c to the sh73a0 SoC
including slave ids, platform data and clock bindings.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch ties in the previously added sh7372 sleep
mode known as Core Standby together with the shared
SH-Mobile ARM CPUIdle implementation.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds a shared SH-Mobile ARM specific CPUIdle
implementation supporting WFI only at this point. It
serves as a common point for late registration of the
arch-specific CPUIdle code, and supports adding extra
sleep modes using the callback shmobile_cpuidle_setup()
together with shmobile_cpuidle_modes[].
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add sh7372 Core Standby sleep mode support and tie it
in with the shared SH-Mobile ARM suspend code.
The Core Standby mode is the lightest sh7372-specific
sleep mode, cutting power to the ARM core excluding the
L2 cache. Any interrupt source can be used for wakeups.
The low level portion of this code is based on the
TI OMAP sleep code in sleep34xx.S, thanks to them.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds a simple Suspend-to-RAM implementation
for SH-Mobile ARM. The struct shmobile_suspend_ops are
kept global to allow cpu-specific code to override
the callbacks if needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Enable fast bcm4329 WIFI suspend/resume on Tegra2 board.
This patch allows the mach-tegra support to tell the tegra MMC host
controller to NOT turn off power for the MMC controller the WIFI part
lives behind. Thus bcm4329 firmware doesn't need to be reloaded.
Signed-off-by: Venkat Rao <vrao@broadcom.com>
Tested-by: Grant Grundler <grundler@chromium.org>
Reviewed-by: Olof Johansson <olof@lixom.net>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Chris Ball <cjb@laptop.org>
* 'for-linus/2640/i2c' of git://git.fluff.org/bjdooks/linux: (21 commits)
mach-ux500: set proper I2C platform data from MOP500s
i2c-nomadik: break out single messsage transmission
i2c-nomadik: reset the hw after status check
i2c-nomadik: remove the unnecessary delay
i2c-nomadik: change the TX and RX threshold
i2c-nomadik: add code to retry on timeout failure
i2c-nomadik: use pm_runtime API
i2c-nomadik: print abort cause only on abort tag
i2c-nomadik: correct adapter timeout initialization
i2c-nomadik: remove the redundant error message
i2c-nomadik: corrrect returned error numbers
i2c-nomadik: fix speed enumerator
i2c-nomadik: make i2c timeout specific per i2c bus
i2c-nomadik: add regulator support
i2c: i2c-sh_mobile bus speed platform data V2
i2c: i2c-sh_mobile clock string removal
i2c-eg20t: Support new device ML7223 IOH
i2c: tegra: Add de-bounce cycles.
i2c: tegra: fix repeated start handling
i2c: tegra: recover from spurious interrupt storm
...
The Intel manual changed the name of the CPUID bit to match the
instruction name. We should follow suit for sanity's sake. (See Intel SDM
Volume 2, Table 3-20 "Feature Information Returned in the ECX Register".)
[ hpa: we can only do this at this time because there are currently no CPUs
with this feature on the market, hence this is pre-hardware enabling.
However, Cc:'ing stable so that stable can present a consistent ABI. ]
Signed-off-by: Kees Cook <kees.cook@canonical.com>
Link: http://lkml.kernel.org/r/20110524232926.GA27728@outflux.net
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: <stable@kernel.org> v2.6.36-39
This specifies the new per-platform timeout per I2C bus and
switches the I2C buses to fast mode, and increase the FIFO
depth to 8 for reads and writes.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The I2C speed enumerators in the i2c-nomadik header file were in
the wrong order.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add option to have different i2c timeout delay for different i2c buses
specified in platform data. Default to the old value unless specified.
Signed-off-by: Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The DB8500 has ePOD:s (electronic power domains) which are possible
to switch on/off to deactivate silicon blocks on the DB8500 SoC
by cutting their power without retention. We model these as simple
regulators with one bit on/off settings.
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Jonas Aberg <jonas.aberg@stericsson.com>
Signed-off-by: Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com>
Signed-off-by: Martin Persson <martin.persson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As part of the ARM arch subsystem migration, move the DB8500
cpufreq driver to drivers/cpufreq as discussed with Dave Jones. The
Makefile is not updated in order to avoid cross-subsystem conflicts
for this file in merges.
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Dave Jones <davej@redhat.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the DB5500 PRCMU driver. Right now this one is pretty
restricted in functionality, exposing a simple interface to send
I2C messages.
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This updates the DB8500 PRCMU driver to the latest version
available internally. Nominally we would update the dependent
CPUfreq driver at the same time but since that is being moved
around in this patch set we postpone that by simply deactivating
it for the time being.
This is a snapshot of the current PRCMU firmware API as it looks
right now. The PRCMU firmware is still subject to change. This
also updates the CPUfreq driver to a newer version that will
utilize the new API.
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
Signed-off-by: Martin Persson <martin.persson@stericsson.com>
Signed-off-by: Per Fransson <per.xx.fransson@stericsson.com>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Sebastien Rault <sebastien.rault@stericsson.com>
Signed-off-by: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
Signed-off-by: Rickard Andersson <rickard.andersson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We have decided that this function arbiter fits better in the MFD
subsystem. Since we need to concatenate the split header files we move
it basically like this:
mv mach-ux500/prcmu-db8500.c drivers/mfd/db8500-prcmu.c
mv mach-ux500/include/mach/prcmu-defs.h include/linux/mfd/db8500-prcmu.h
mv mach-ux500/include/mach/prcmu-regs.h drivers/mfd/db8500-prcmu-regs.h
mach-ux500/include/mach/prcmu.h >> include/linux/mfd/db8500-prcmu.h
rm arch/arm/mach-ux500/include/mach/prcmu.h
Then we update different #include statements and Makefile orders etc
to make the PRCMU driver compile, link and boot in the new place
without really changing any code.
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This makes the PRCMU base address be selected at runtime for U8500
and U5500 instead of being compiled-in.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This makes the core detect the DB8500 V2.0 and V2.1 ASICs, and
add a convenience macro for "V2 or later".
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This splits out a per-SoC IRQ range handling, so that the
DB8500 and DB5500 SoC:s can reuse aproximately the same IRQ
range with the largest span setting the roof. The same change
is done for the boards, mutatis mutandis, with a new file for
the U5500 board.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* 'for-2.6.40' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu:
percpu: Unify input section names
percpu: Avoid extra NOP in percpu_cmpxchg16b_double
percpu: Cast away printk format warning
percpu: Always align percpu output section to PAGE_SIZE
Fix up fairly trivial conflict in arch/x86/include/asm/percpu.h as per Tejun
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (22 commits)
m68knommu: Use generic show_interrupts()
coldfire_qspi compile fix
m68k: merge the mmu and non-mmu versions of sys_m68k.c
m68knommu: use asm-generic/bitops/ext2-atomic.h
m68knommu: Remove obsolete #include <linux/sys.h>
m68k: merge mmu and non-mmu versions of asm-offsets.c
m68k: merge non-mmu and mmu versions of m68k_ksyms.c
m68knommu: remove un-needed exporting of COLDFIRE symbols
m68knommu: move EXPORT of kernel_thread to function definition
m68knommu: move EXPORT of local checksumming functions to definitions
m68knommu: move EXPORT of dump_fpu to function definition
m68knommu: clean up mm/init_no.c
m68k: merge the mmu and non-mmu mm/Makefile
m68k: mv kmap_mm.c to kmap.c
m68knommu: remove stubs for __ioremap() and iounmap()
m68knommu: remove unused kernel_set_cachemode()
m68k: let Makefile sort out compiling mmu and non-mmu lib/checksum.c
m68k: remove duplicate memcpy() implementation
m68k: remove duplicate memset() implementation
m68k: remove duplicate memmove() implementation
...
In mask/restore_ioapic_entries() we should be restoring ioapic
entries when ioapics[apic].saved_registers is not NULL.
Fix the typo and address the resume hang regression reported by
Linus.
This was not found sooner because the systems where these
changes were tested on kept the IO-APIC entries intact over
resume.
Reported-and-tested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Daniel J Blueman <daniel.blueman@gmail.com>
Link: http://lkml.kernel.org/r/1306259131.7171.7.camel@sbsiddha-MOBL3.sc.intel.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Commit d12337 (rwsem: Remove redundant asmregparm annotation)
broke rwsem on UML.
As we cannot compile UML with -mregparm=3 and keeping asmregparm only
for UML is inadequate the easiest solution is using RWSEM_GENERIC_SPINLOCK.
Thanks to Thomas Gleixner for the idea.
Reported-by: Toralf Förster <toralf.foerster@gmx.de>
Tested-by: Toralf Förster <toralf.foerster@gmx.de>
Signed-off-by: Richard Weinberger <richard@nod.at>
Cc: user-mode-linux-devel@lists.sourceforge.net
Cc: <stable@kernel.org> # .39.x
Link: http://lkml.kernel.org/r/%3C1306183893-26655-1-git-send-email-richard%40nod.at%3E
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Use soc_camera_platform helper functions to dynamically manage the
camera device.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There is a lot of common code in the sys_m68k.c files. The mmu and non-mmu
versions can easily be merged into a single file.
There is really only 2 functions that differ in the 2 cases. A single
ifdef on CONFIG_MMU can take care of this. Alternatively we could break
those 2 functions out and maintain sys_m68k_no.c and sys_m68k_mm.c with
just this code in it (Makefile could then just build the right one).
Does anyone have strong feelings on which way they want this done?
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
m68knommu can use generic implementation of ext2 atomic bitops.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
It is strait forward to merge the mmu and non-mmu versions of
asm-offstes.c. Some name changes are required for the preempt and
thread_info.flags in the non-mmu entry.S assembler to make them
consistent for both setups.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (23 commits)
sh: Ignore R_SH_NONE module relocations.
SH: SE7751: Fix pcibios_map_platform_irq prototype.
sh: remove warning and warning_symbol from struct stacktrace_ops
sh: wire up sys_sendmmsg.
clocksource: sh_tmu: Runtime PM support
clocksource: sh_tmu: __clocksource_updatefreq_hz() update
clocksource: sh_cmt: Runtime PM support
clocksource: sh_cmt: __clocksource_updatefreq_hz() update
dmaengine: shdma: synchronize RCU before freeing, simplify spinlock
dmaengine: shdma: add runtime- and system-level power management
dmaengine: shdma: fix locking
sh: sh-sci: sh7377 and sh73a0 build fixes
sh: cosmetic improvement: use an existing pointer
serial: sh-sci: suspend/resume wakeup support V2
serial: sh-sci: Runtime PM support
sh: select IRQ_FORCED_THREADING.
sh: intc: Set virtual IRQs as nothread.
sh: fixup fpu.o compile order
i2c: add a module alias to the sh-mobile driver
ALSA: add a module alias to the FSI driver
...
Add SDHI0 and SDHI1 support to the AG5EVM board
including platform data, pinmux configuration
and clock bindings.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch reverts "ARM: mach-shmobile: sh7372 SDHI vector merge" and
supplies 3 IRQ resources for each SDHI block.
Some blocks have a 4th IRQ, but this is used for DRM feathres
that I do not have access tot he documentation for and are almost
certainly tainted by licensing issues. So the 4th IRQ is not
hooked-up even if it exists.
Cc: Chris Ball <cjb@laptop.org>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the struct resources for DSI0 to include the
hardware block name. Purely cosmetic, makes /proc/iomem
look slightly better.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Fix the case of too late twd_base initialization for SMP
on sh73a0 which bas been broken because sh73a0 specific
smp_prepare_cpu() and percpu_timer_setup() changed order
in the commits:
05c74a6cbcc413521eb4
Without this fix the sh73a0 SMP kernel panics on boot.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Git commit f4117ac9e2
introduced PLAT_PHYS_OFFSET, but headsmp.S was left
unchanged which results in a compile error:
AS arch/arm/mach-shmobile/headsmp.o
arch/arm/mach-shmobile/headsmp.S: Assembler messages:
arch/arm/mach-shmobile/headsmp.S:27: Error: undefined symbol `secondary_startup' in operation
arch/arm/mach-shmobile/headsmp.S:27: Error: undefined symbol `PHYS_OFFSET' in operation
make[1]: *** [arch/arm/mach-shmobile/headsmp.o] Error 1
make[1]: *** Waiting for unfinished jobs....
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the sh7372 clock code to set the RT side
set of MSTP bits to a fixed disabled state.
The sh7372 SoC contains two sets of MSTP bits,
one for the ARM (SYS) side, and one for the
SH4AL-DSP (RT) side. The actual clock associated
with the MSTP bit will only be stopped when both
sides have set the MSTP bit to disabled mode.
Some MSTP bits are enabled by default after
hardware reset, so this patch adjusts the code
to disable all MSTP bits associated with the RT
side to allow the SYS side to have full control.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The PLLC2 clock on AP4 systems does not need to run constantly to be
able to use HDMI. The HDMI hotplug interrupt works without the PLL
too, after which all the necessary clocks will be turned on by the
runtime PM.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add DMA mode support for the MMCIF controller on mackerel.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Reviewed-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Remember to also check for the CONFIG_MMC_SH_MMCIF_MODULE option
for the case of a modular MMCIF driver.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Reviewed-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Export the following sh7377 multimedia hardware blocks
using UIO: VPU, VEU[0-3], JPU and SPU2[0-1]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Export the following sh7372 multimedia hardware blocks
using UIO: VPU, VEU[0-3], JPU and SPU2[0-1]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Export the following sh7367 multimedia hardware blocks
using UIO: VPU, VEU[0-3], VEU2H, JPU and SPU1
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the sh7377 serial port types to make use of
PORT_SCIFA and PORT_SCIFB. This makes the software
match the sh7377 data sheet.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Set receive enable and transmit enable bits of SCASCR0 (E6C400089).
Values previously written to this register was bogus.
Curiously earlyprintk works with the previous code.
* Remove duplicate initialisation of GPIO port 152, SCIFA0_TXD (0xE6053098).
This should have no effect other than to very slightly reduce the amount of
code.
Reported-by: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
After cleaning up m68k_ksyms_no.c it is now strait forward to merge
the non-mmu and mmu versions of m68k_ksyms.c. The need for the extra
gcc functions is not strictly based on having an MMU or not. It is
based on the family the processor belongs too, so use an appropriate
conditional check.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Scott Jiang