mirror of https://gitee.com/openkylin/linux.git
1358 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Linus Torvalds
|
6aa2f9441f |
This is the bulk of GPIO changes for the v4.15 kernel cycle:
CORE:
- Fix the semantics of raw GPIO to actually be raw. No
inversion semantics as before, but also no open draining,
and allow the raw operations to affect lines used for
interrupts as the caller supposedly knows what they are
doing if they are getting the big hammer.
- Rewrote the __inner_function() notation calls to names that
make more sense. I just find this kind of code disturbing.
- Drop the .irq_base() field from the gpiochip since now all
IRQs are mapped dynamically. This is nice.
- Support for .get_multiple() in the core driver API. This
allows us to read several GPIO lines with a single
register read. This has high value for some usecases: it
can be used to create oscilloscopes and signal analyzers
and other things that rely on reading several lines at
exactly the same instant. Also a generally nice
optimization. This uses the new assign_bit() macro from
the bitops lib that was ACKed by Andrew Morton and
is implemented for two drivers, one of them being the
generic MMIO driver so everyone using that will be able
to benefit from this.
- Do not allow requests of Open Drain and Open Source
setting of a GPIO line simultaneously. If the hardware
actually supports enabling both at the same time the
electrical result would be disastrous.
- A new interrupt chip core helper. This will be helpful
to deal with "banked" GPIOs, which means GPIO controllers
with several logical blocks of GPIO inside them. This
is several gpiochips per device in the device model, in
contrast to the case when there is a 1-to-1 relationship
between a device and a gpiochip.
NEW DRIVERS:
- Maxim MAX3191x industrial serializer, a very interesting
piece of professional I/O hardware.
- Uniphier GPIO driver. This is the GPIO block from the
recent Socionext (ex Fujitsu and Panasonic) platform.
- Tegra 186 driver. This is based on the new banked GPIO
infrastructure.
OTHER IMPROVEMENTS:
- Some documentation improvements.
- Wakeup support for the DesignWare DWAPB GPIO controller.
- Reset line support on the DesignWare DWAPB GPIO controller.
- Several non-critical bug fixes and improvements for the
Broadcom BRCMSTB driver.
- Misc non-critical bug fixes like exotic errorpaths, removal
of dead code etc.
- Explicit comments on fall-through switch() statements.
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Merge tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v4.15 kernel cycle:
Core:
- Fix the semantics of raw GPIO to actually be raw. No inversion
semantics as before, but also no open draining, and allow the raw
operations to affect lines used for interrupts as the caller
supposedly knows what they are doing if they are getting the big
hammer.
- Rewrote the __inner_function() notation calls to names that make
more sense. I just find this kind of code disturbing.
- Drop the .irq_base() field from the gpiochip since now all IRQs are
mapped dynamically. This is nice.
- Support for .get_multiple() in the core driver API. This allows us
to read several GPIO lines with a single register read. This has
high value for some usecases: it can be used to create
oscilloscopes and signal analyzers and other things that rely on
reading several lines at exactly the same instant. Also a generally
nice optimization. This uses the new assign_bit() macro from the
bitops lib that was ACKed by Andrew Morton and is implemented for
two drivers, one of them being the generic MMIO driver so everyone
using that will be able to benefit from this.
- Do not allow requests of Open Drain and Open Source setting of a
GPIO line simultaneously. If the hardware actually supports
enabling both at the same time the electrical result would be
disastrous.
- A new interrupt chip core helper. This will be helpful to deal with
"banked" GPIOs, which means GPIO controllers with several logical
blocks of GPIO inside them. This is several gpiochips per device in
the device model, in contrast to the case when there is a 1-to-1
relationship between a device and a gpiochip.
New drivers:
- Maxim MAX3191x industrial serializer, a very interesting piece of
professional I/O hardware.
- Uniphier GPIO driver. This is the GPIO block from the recent
Socionext (ex Fujitsu and Panasonic) platform.
- Tegra 186 driver. This is based on the new banked GPIO
infrastructure.
Other improvements:
- Some documentation improvements.
- Wakeup support for the DesignWare DWAPB GPIO controller.
- Reset line support on the DesignWare DWAPB GPIO controller.
- Several non-critical bug fixes and improvements for the Broadcom
BRCMSTB driver.
- Misc non-critical bug fixes like exotic errorpaths, removal of dead
code etc.
- Explicit comments on fall-through switch() statements"
* tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (65 commits)
gpio: tegra186: Remove tegra186_gpio_lock_class
gpio: rcar: Add r8a77995 (R-Car D3) support
pinctrl: bcm2835: Fix some merge fallout
gpio: Fix undefined lock_dep_class
gpio: Automatically add lockdep keys
gpio: Introduce struct gpio_irq_chip.first
gpio: Disambiguate struct gpio_irq_chip.nested
gpio: Add Tegra186 support
gpio: Export gpiochip_irq_{map,unmap}()
gpio: Implement tighter IRQ chip integration
gpio: Move lock_key into struct gpio_irq_chip
gpio: Move irq_valid_mask into struct gpio_irq_chip
gpio: Move irq_nested into struct gpio_irq_chip
gpio: Move irq_chained_parent to struct gpio_irq_chip
gpio: Move irq_default_type to struct gpio_irq_chip
gpio: Move irq_handler to struct gpio_irq_chip
gpio: Move irqdomain into struct gpio_irq_chip
gpio: Move irqchip into struct gpio_irq_chip
gpio: Introduce struct gpio_irq_chip
pinctrl: armada-37xx: remove unused variable
...
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Stephen Boyd
|
4c4fe16971 |
Merge branch 'clk-mediatek' into clk-next
* clk-mediatek: clk: mediatek: add clock support for MT7622 SoC clk: mediatek: add clocks dt-bindings required header for MT7622 SoC clk: mediatek: add the option for determining PLL source clock dt-bindings: clock: mediatek: document clk bindings for MediaTek MT7622 SoC clk: mediatek: mark mtk_infrasys_init_early __init clk: mediatek: Add MT2712 clock support clk: mediatek: Add dt-bindings for MT2712 clocks dt-bindings: ARM: Mediatek: Document bindings for MT2712 |
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Stephen Boyd
|
eed58151d6 |
Merge branch 'clk-imx' into clk-next
* clk-imx: clk: imx: imx7d: Remove ARM_M0 clock clk: imx: imx7d: Fix parent clock for OCRAM_CLK clk: imx: clk-imx6ul: allow lcdif_pre_sel to change parent rate clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPU |
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Stephen Boyd
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8f62040086 |
Merge branch 'clk-qcom' into clk-next
* clk-qcom: clk: qcom: clk-smd-rpm: add msm8996 rpmclks clk: qcom: Implement RPM clocks for MSM8660/APQ8060 clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC clk: qcom: Elaborate on "active" clocks in the RPM clock bindings clk: qcom: Remove unused RCG ops |
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Stephen Boyd
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042e2e9c2c |
clk: tegra: Changes for v4.15-rc1
This contains cleanups and minor fixes for the Tegra clock driver. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAloBzq8THHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zobeJD/9QhqSqE1EA5jLZDE/9yqNWL7BJHgOP +csMY4y6PaEX5SkxGuLrHmMOJPNHTfFeqnL8djAkMfsmAnUOYqxKvweEFqxmgT2V 7lPOv5ScdvAejPKje1TMou29P2JYaScoU2Pk3Ve6mQIye/m1IoTJxDMhDWJYCn1c 8fetIu2J25vrGHQcl9xChxce8au0KenEkQQSot0czrgymtrpZcBAJLFPn7EqVh5i HVkvB1RZG8GKbRNNhmm9P1ryWE0r5Yi+MOCki1izr153uDLsNM5oV20UY3FohoY3 97CsgZCt3PisCRuNd+4M4uYUQomQfalfz7MR5z+4wws+9tOi3uVujNUmRzU03pBY 4fscXy6iepDGLDngUxqZkjAhy1mvV8g0iGEvNS+7ELzyC7hsAAkNHN3j2xg+uklE aVl9/SSdKMDFjZk0n2YHmnE5bYAhlweluNUsEnJ2KnNpB9V7xWuDhF6abq3NPVbS XxMLGbwy/jT4t4IziPb2CicLsRbM1qySjlDd5AxyhM4t8bq3JVgVU6M+JwcrOZnQ ydkTvoFS489kXPDl2E3NyUJOSVPfp6z05mONGsNNJIMqh4pE7Q4uaMoBXEntMxbl UHhOcJSx8SAtRe2gnEnIc7+U+ngWAFzRD6mU0qEab2bEg1VfpCP6GD6MLa2PrUBU 8Ln17zfr0lD2YQ== =wB8S -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.15-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next Pull tegra clk drivers updates from Thierry Reding: This contains cleanups and minor fixes for the Tegra clock driver. * tag 'tegra-for-4.15-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init() clk: tegra: dfll: Fix drvdata overwriting issue clk: tegra: Fix cclk_lp divisor register clk: tegra: Bump SCLK clock rate to 216 MHz clk: tegra: Use common definition of APBDMA clock gate clk: tegra: Correct parent of the APBDMA clock clk: tegra: Add AHB DMA clock entry clk: tegra: Mark APB clock as critical clk: tegra: Make tegra_clk_pll_params __ro_after_init clk: tegra: Fix sor1_out clock implementation clk: tegra: Use tegra_clk_register_periph_data() clk: tegra: Add peripheral clock registration helper clk: tegra: Check BPMP response return code dt-bindings: clock: tegra: Add sor1_out clock firmware: tegra: Propagate error code to caller |
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Linus Torvalds
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894025f24b |
USB/PHY patches for 4.15-rc1
Here is the big set of USB and PHY driver updates for 4.15-rc1. There is the usual amount of gadget and xhci driver updates, along with phy and chipidea enhancements. There's also a lot of SPDX tags and license boilerplate cleanups as well, which provide some churn in the diffstat. Other major thing is the typec code that moved out of staging and into the "real" part of the drivers/usb/ tree, which was nice to see happen. All of these have been in linux-next with no reported issues for a while. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWgm/Vw8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+yktXwCdGgpInfOEvOGFd83EPDL7a1ncyc4AoM5wI8yl 1CeLipqVIN3IsMMJptvb =zvDI -----END PGP SIGNATURE----- Merge tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/PHY updates from Greg KH: "Here is the big set of USB and PHY driver updates for 4.15-rc1. There is the usual amount of gadget and xhci driver updates, along with phy and chipidea enhancements. There's also a lot of SPDX tags and license boilerplate cleanups as well, which provide some churn in the diffstat. Other major thing is the typec code that moved out of staging and into the "real" part of the drivers/usb/ tree, which was nice to see happen. All of these have been in linux-next with no reported issues for a while" * tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (263 commits) usb: gadget: f_fs: Fix use-after-free in ffs_free_inst USB: usbfs: compute urb->actual_length for isochronous usb: core: message: remember to reset 'ret' to 0 when necessary USB: typec: Remove remaining redundant license text USB: typec: add SPDX identifiers to some files USB: renesas_usbhs: rcar?.h: add SPDX tags USB: chipidea: ci_hdrc_tegra.c: add SPDX line USB: host: xhci-debugfs: add SPDX lines USB: add SPDX identifiers to all remaining Makefiles usb: host: isp1362-hcd: remove a couple of redundant assignments USB: adutux: remove redundant variable minor usb: core: add a new usb_get_ptm_status() helper usb: core: add a 'type' parameter to usb_get_status() usb: core: introduce a new usb_get_std_status() helper usb: core: rename usb_get_status() 'type' argument to 'recip' usb: core: add Status Type definitions USB: gadget: Remove redundant license text USB: gadget: function: Remove redundant license text USB: gadget: udc: Remove redundant license text USB: gadget: legacy: Remove redundant license text ... |
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Linus Walleij
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bee67c7c9d | Merge branch 'gpio-irqchip-rework' of /home/linus/linux-gpio into devel | |
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Arnd Bergmann
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1e11cbf720 |
Support for the RGA (raster graphics accelerator) on rk3399
and efuses on rk3368. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlnxjcYQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgQg9CACKoNn8LseipJa0kc6ZYXXtVDurmVHgaPyV OpC3+YbN9tpaBh6lsujkecthmlS45qrjZUsw00P50vcGbrMgrB9zytVrFrpEVxQT iNdEccU9RFEZ1GSQTPstxI3Uv1fnDcqSCplzKEeVxZ/U7vwWwq5YAi4bSey6eMzc GNq6FfT65Uf07a0Ondn3+IUzvjRpY42BHjjQjMv3k3lSn7z94/OG0AmCkRrXkBw/ 0+jxf9eMkkEj3JaC+OhwHOLJn7bv2U67HPGjLV7BLfFUQYGjPYd8g+LdeVV9Y2PJ urGiu3o/VbUbTbl2+TWh+OWYbfLFhpBdE+ouPHBPxJMPFkiGnrdA =xf8q -----END PGP SIGNATURE----- Merge tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "Rockchip dts64 updates for 4.15 part2" from Heiko Stübner: Support for the RGA (raster graphics accelerator) on rk3399 and efuses on rk3368. * tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: add efuse for RK3368 SoCs arm64: dts: rockchip: add RGA device node for RK3399 clk: rockchip: add more rk3188 graphics clock ids clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs |
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Arnd Bergmann
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78af0be67b |
thermal: tegra: Changes for v4.15-rc1
This contains the Tegra186 BPMP thermal driver. It is used to monitor and access several thermal sensors found in the SoC. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlnp4eMTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zodrZEACEhH5rCNN/848plxE43sG3nr67MBgd j012dMLQJghvTv60nJerWOapfiNIQIubaGxMe4cW0QM6tiQ4fmIrl4ewTA20R6lI Udsy/vgzzpfGZeClVGlL9DDmnxu7yNDL+LL70Hps00d74k3rWpnf6xRcIqxsdpxJ 1bEZzZRCu4Q+0RpjgfmfrHrDo22qUrj1f0HjVQ4iFwDx6fbzNLPEkKszFoevgNPE ce7pnzmYywR+694t7CQ2REWDBIYzTZrgWqxkMtXmPgQISYzUXmqD5dzBFA2IZQO4 kWyxzlMLyV2eK4ElvKnycZFYhuEzaOG/EVlpvHtFxy8NOlAIJWNh1CXT0mwdKx/o ZQvOU64vyqBSXURFoHLkGn8KfqrNpkc1nC4KU65Vuef4XMTTeLabki2rkxKo+7nb ljnwuMBTMfsaN9iLDHCdbXxxLQN1qXiUIcdOpt95NVZS4wsL7gQvpLj9UvUCFqJj o1OilXyArZd0KzxDQDAfoq1TC+AzYrQ2/29QZHqi6gi9/Qg4ipWKOiLezeqiwSyG 6I85+fNV8Oc1nor9HqOC4cxNrO5woJA/gFw/J+JP3zg7aHOwldD4feKCeAV6QUKg /XS+S6iVqQQ7CVMV1Dw6ruiq1vaZ+DiapoaTnhC7n1g+wTfWdiQ9CsQ8UnAjVT76 mfjD/Qjn8m5NoQ== =Y8Vc -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.15-thermal' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Pull "thermal: tegra: Changes for v4.15-rc1" from Thierry Reding: This contains the Tegra186 BPMP thermal driver. It is used to monitor and access several thermal sensors found in the SoC. * tag 'tegra-for-4.15-thermal' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux: thermal: Add Tegra BPMP thermal sensor driver dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal dt-bindings: clock: tegra: Add sor1_out clock |
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Greg Kroah-Hartman
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b24413180f |
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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Chen Zhong
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bda921fad5 |
clk: mediatek: add clocks dt-bindings required header for MT7622 SoC
Add the required header for the entire clocks dt-bindings exported from topckgen, apmixedsys, infracfg, pericfg, ethsys, pciesys, ssusbsys and audsys which could be found on MT7622 SoC. Signed-off-by: Chen Zhong <chen.zhong@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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weiyi.lu@mediatek.com
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b7f1a721bb |
clk: mediatek: Add dt-bindings for MT2712 clocks
Add MT2712 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg, mcucfg and subsystem clocks. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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Adriana Reus
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259bc28306 |
clk: imx: imx7d: Remove ARM_M0 clock
IMX7d does not have an M0 Core and this particular clock doesn't seem connected to anything else. Remove this entry from the CCM driver. Signed-off-by: Adriana Reus <adriana.reus@nxp.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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Rajendra Nayak
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7066fdd0d7 |
clk: qcom: clk-smd-rpm: add msm8996 rpmclks
Add all RPM controlled clocks on msm8996 platform [srini: Fixed various issues with offsets and made names specific to msm8996] Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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Linus Walleij
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856e6bb91e |
clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC
These compatible strings need to be added to extend support for the RPM CC to cover MSM8660/APQ8060. We also need to add enumberators to the include file for a few clocks that were missing. Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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Dave Airlie
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7a88cbd8d6 |
Linux 4.14-rc7
-----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJZ9kEFAAoJEHm+PkMAQRiGw6wH/0j197qyGd0hkVFMJO6LAgN3 KQWS4nZ5BkVDocwv0RVnUJTtXqU1eozFgdVEtSoaFXpzlHGuptR2Tau9efDCJ7w3 /utZxqvhGebZd2T+j+/o/LE8BRQxhADBNJq2D/o0WNt8ecxuG0GIkhkEYt/o3z1v /sxlwVwzXB7Dc/h1WcgGJG7cS6L9KzzAzGAS/iNvdFrPOygHBv8c0MxVZIiBIeeK 1nZdyvbyM8uenSyG+prGt9ENrqXZxxfwUxIchi2V7A9m1WmD5zijNkf1JCWji/O+ UsA1auxna7MwoxjxqZuGm4MlKOwZ+8xutk4JGgc+aP/ulndJbJYu+4op/3vaFBM= =Mhx+ -----END PGP SIGNATURE----- Backmerge tag 'v4.14-rc7' into drm-next Linux 4.14-rc7 Requested by Ben Skeggs for nouveau to avoid major conflicts, and things were getting a bit conflicty already, esp around amdgpu reverts. |
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Stephen Boyd
|
6705fc9441 |
Some new clock ids for rk3188 and rk3368 as well as removal of a
superfluous memory allocation error message. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlnmPGsQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgYO7CACCYT7nEtwfQd4ajxUp9CoMYqBUEuZYv1xR NWbaK99eF2gNLZwUIkY3Y1C/YV8SA14gfeD2zmqbBe+f7MNqyUvi8VtEzidyHj0d JpIGjD1Gqy/A/Qli2RN76rPyQc9hW7KgFGIFSOEdKwmmkf6gQcb66tlG9qFfmAka Gfx7+5E226NGOtG6vjGtfW6lsrxpgpffsyOZiAK0MWLSF6y2tvxkO8kA4/elWhfc +fRYuBxjxZ74O2zJvIFMNC7L9S3fflPJ1+LRs+PSZwUgTwd7+bQlSXxh3ktc/9uf v57UmlDcRLABdL126tEK4oQLCXwIDy+LGx/2XCr791HRyQDcXo3q =0pyD -----END PGP SIGNATURE----- Merge tag 'v4.15-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next Pull Rockchip clk drivers updates from Heiko Stuebner: - new clock ids for rk3188 and rk3368 - removal of a superfluous memory allocation error message * tag 'v4.15-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: use new cif/vdpu clock ids on rk3188 clk: rockchip: export clock pclk_efuse_256 for RK3368 SoCs clk: rockchip: add more rk3188 graphics clock ids clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs clk: rockchip: Remove superfluous error message in rockchip_clk_register_cpuclk() |
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Stephen Boyd
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319663c7d1 |
Amlogic clock changes for 4.15
- Addition of Video Processing Unit VPU and VAPB clocks -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZ6bW/AAoJEHfc29rIyEnRAvkP+wZhUNg/5s/tj68Qmc34yfRq WKk6Hn4ySOpjQr3DR0LNYevqNhVALFOsMGafIRnFIE89cLyoHqTjBn7K21TctOnj YyPjMx54PP46PjBV0XJ9jk1Km+z/JYa4A79xjW4x2lfaazxZfdXyfvOCHzWsmF6R jyLwsOwNyqpbP7eYqss5qXJeBVQ56VvjL35n3fLbbpTS56RsjXNGUMoS84WNECS4 6ixs/YhpmkgJE+cOY9KaeDXmd8v9IWK4wWjcqty+CMiOZPmxW2LuxisVNEZriGQ4 dmEiD/FSjqL7hNtNco2AHhvq/Erh96S1jf8lj8grHOSSIV+jVnA/zZNGCM4Myi2P lq7qI8EuQLa5PqVdRzG5RoWelbLkvJ351QQZolmLjAVTjAdSiwibFQHqF1Ofwnak CzG3qblgItnXhboreKwvP1VI6qmnGq7m3LWi3FT6Lp3GxUsEYsvT97RMjXpOerZN D7ZGoMKu4Qu2v8i1JWJzfDPuoAg0/+jz6HAx/nKgK6bgbNYjoJ3Llw+8Tf3wPjOm uJrEHKY2WpishRFbHclO9AftBAU4+8UBh9S6Gvz4l9tGeWklHVQh1u2F7jzmNyRT pNjWVEcuiX5ckNaARDqKZu0Lv5FYdTMfQQ6OdLnxTGmWCwB9QFnzIrI2AR/tuESl hfsh89AFS7f5QnzI9P41 =rDVJ -----END PGP SIGNATURE----- Merge tag 'meson-clk-for-4.15' of git://github.com/baylibre/clk-meson into clk-next Pull Amlogic clock driver updates from Neil Armstrong: - Addition of Video Processing Unit VPU and VAPB clocks * tag 'meson-clk-for-4.15' of git://github.com/baylibre/clk-meson: clk: meson: gxbb: Add VPU and VAPB clocks data clk: meson: gxbb: Add VPU and VAPB clockids |
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Stephen Boyd
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ffc3eb6f3a |
Allwinner clock changes for 4.15
The most notable changes are: - Addition of sigma/delta modulation for the audio PLLs on the newer SoCs - A83t Display clocks supports There's also a bunch of minor fixes that didn't have any impact on current features provided by the kernel. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZ6ahsAAoJEBx+YmzsjxAgtvAQALfAX8+9HfJ7dk84s2qhLoZ6 LsTujOAzUSWgOFDRhHK5vkqzq4GMqL+Tum57g7Sa7iStkYjSjtqDoMG3ajvehm1L rGqilZFMLSiOGiV2sQXmA8EANVjqNH6jeOc6Szwo7e0tqw5FC27TjN3jNHAAmd0z B9dmKQSaquMfHa+ldtOSmUjitY1uwq4dKdxuZrCxBVcgjJEwYuXOVCCioUN+d+/j ZRkcsoROW48FqVcsu9wONGYJxgKMVfkOR6P4QuTOfrw5Flvj5DZPYKMk0c2hYcEh FfSFJU7kq43dEIzD2sS4o17RTtoJQz8pO7qQ6TwL23sgtZuxvUKofhnSFbe7OV3P nqqiaDXEayjxNYD+aN4hpKBdK6rml9bhO8d1Y4d3dgFTdP3jhbsbO3CQebbzTKTs /KLyYKG3G7r3BrvY7XfrSRT1q68mp9O8GFxUMXCGwcESiqyBFLoDX32+25fZumtg 2wADvSyTBHViJDsgHaJFuzG0rOKQLxVW2VUce3RFlFZAUCxZ9ZMrSj8ANhGfCqJ9 RH9dpTVPVw1fPl1Lpx9ZLz9sE5Y+rQXn18etyV04rTuW9nlAQqua5wLicGEAz3Dq bln44RgngxpQk/0/O77Q6U+7F9gUdowwri+1m2m0s73xNjAUAE42SuCnuFZz7P3L 4i58+Nv/CU9H98ew4TRR =4mo5 -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next Pull Allwinner clock driver updates from Maxime Ripard: - Addition of sigma/delta modulation for the audio PLLs on the newer SoCs - A83t Display clocks supports - minor fixes that didn't have any impact on current features * tag 'sunxi-clk-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: sun4i: Export video PLLs clk: sunxi-ng: Add A83T display clocks clk: sunxi-ng: sun8i: a23: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun6i: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun5i: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun4i: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun8i: h3: Use sigma-delta modulation for audio PLL clk: sunxi-ng: nm: Add support for sigma-delta modulation clk: sunxi-ng: Add sigma-delta modulation support clk: sunxi-ng: nm: Check if requested rate is supported by fractional clock clk: sunxi-ng: sun5i: Fix bit offset of audio PLL post-divider clk: sunxi-ng: a83t: Fix invalid csi-mclk mux offset clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collision clk: sunxi-ng: sun6i: Export video PLLs clk: sunxi-ng: Implement reset control status readback clk: sunxi-ng: Fix missing CLK_SET_RATE_PARENT in ccu-sun4i-a10.c clk: sunxi-ng: add CLK_SET_RATE_PARENT flag to H3 GPU clock clk: sunxi-ng: add CLK_SET_RATE_UNGATE to all H3 PLLs |
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Stephen Boyd
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ae74ac0828 |
clk/samsung updates for v4.15, part 2
- An addition of separate driver for the Exynos 4412 ISP CMU, needed
to model and properly handle the clock controller's dependencies
on the ISP power domain.
- Adding __maybe_unused attributes to the exynos5433_cmu_{suspend,
resume} ops to suppress compiler warnings with CONFIG_PM disabled.
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Merge tag 'clk-v4.15-exynos-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-next
Pull Samsung clk driver updates from Sylwester Nawrocki:
- An addition of separate driver for the Exynos 4412 ISP CMU, needed
to model and properly handle the clock controller's dependencies
on the ISP power domain.
- Adding __maybe_unused attributes to the exynos5433_cmu_{suspend,
resume} ops to suppress compiler warnings with CONFIG_PM disabled.
* tag 'clk-v4.15-exynos-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
clk: samsung: Add a separate driver for Exynos4412 ISP clocks
clk: samsung: Add dt bindings for Exynos4412 ISP clock controller
clk: samsung: Instantiate Exynos4412 ISP clocks only when available
clk: samsung: exynos5433: mark PM functions as __maybe_unused
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Arnd Bergmann
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c4db01edba |
dt-bindings: Updates for v4.15-rc1
This contains the addition of a clock alias which will be used to fix the implementation of the SOR1 clock. Also included are the bindings for the Tegra186 BPMP thermal driver, a prerequisite for both the driver and device tree changes. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlnp4PgTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zod0iD/wITLsu5aK0z8LH9lyXo0lgQJuakHTQ s/Au1D+baT4a7qGuT86unqQLlAxnlWjgmQzOnw3KSxQ0ech92uwlP9lIqeieYH20 g0jNxNFLLsfd+k6mKn1SEKx2QRxsStv+qH/rjTRB1oU7tlE87PBSwI8IdmpczVY4 EsJs4wqnbkFfmAzAEBLqyC2+P+vyW37DTq0IVK+y840iEKkEBjIpGQnNCIarc6B2 gHxFVZGZWeV0BmeuWDUzSaoxIs0tSjH/FRMbIx4CML404FMlTgdhz4j/eIGvNhAI A/9bkKeiicflg55ra7cc1GQC5wkT+KaJzO2AgQ5dVW9/OeY8zntT2/B1N/52Pz5x yJTRfP/F8KzSNQ4FMwz99CwBOgCjymHTiYWFRrVCUcM4vLJLIKy5nsiMozxGN0aH Zz53mB1qiVTUTD8rSp/8bfB/QdMac0PFhKct8pQQPpF7X4hkJ3kcidkx5UzNwCND 4/oIjaS0Oz46mxlcGkG06tnBs1TPS+s8txp+Z73V+Jccj0ppQKG6Ehs7H8t9wWPg pqVT4imE5y0zH8PJyMz/TsFzsLgc3jceP5iqRzvziK8i0mrK/Lshl6rIpe3UTavP QFLkfNyxoya1cGzist4SbQ5/0yAh2YQkRUblGMaQScHEeksftQpEWJKEVBune9CD 2ZCGdNPXE2MsuQ== =xdyX -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.15-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt Pull "dt-bindings: Updates for v4.15-rc1" from Thierry Reding: This contains the addition of a clock alias which will be used to fix the implementation of the SOR1 clock. Also included are the bindings for the Tegra186 BPMP thermal driver, a prerequisite for both the driver and device tree changes. * tag 'tegra-for-4.15-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal dt-bindings: clock: tegra: Add sor1_out clock |
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Arnd Bergmann
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6ac5482ee6 |
Second Round of Renesas ARM Based SoC DT Updates for v4.15
* r8a77430 (RZ/G1M) SoC
- Add XHCI support to SoC DT. Boards may enable this as appropriate
* All Renesas ARM based SoCs
- Add missing clocks for ARM CPU cores
Geert Uytterhoeven says "This series improves DT hardware descriptions
for Renesas arm32 SoCs by adding missing clocks properties to the
device nodes corresponding to ARM CPU cores."
* R-Car Gen 1 and 2, and RZ/G SoCs
- Use R-Car Fallback compat strings for GPIO
Simon Horman says "Use newly added R-Car GPIO Gen 1, 2 and 3 fallback
compat strings in peace of now deprecated non-generation specific R-Car
GPIO fallback compat string in the DT of Renesas ARM and arm64 based
SoCs.
As noted in the changelogs for the r8a777[89] changes, this introduces
an incompatibility with pre-v4.14 kernels used with new DTBs. There is
no run-time effect for other SoCs updated by this changeset."
* r7s72100 (RZ/A1H) GR-Peach board
- Add pin configuration subnode for ETHER pin group.
This avoids relying on boot-loader configuration of these pins.
- Enable ostm0 and ostm1 timers
Jacopo Mondi says these are "to be used as clock source and clockevent
source. The timers provides greater accuracy than the already enabled
mtu2 one."
- Correct leds node name indent
- Enable MTU2 timer pulse unit
Jacopo Mondi says "MTU2 multi-function/multi-channel timer/counter is
not enabled for GR-Peach board. The timer is used as clock event source
to schedule wake-ups, and without this enabled all sleeps not performed
through busy waiting hang the board."
* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
- Add USB function support
* r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
- Add USB2.0 Host support
* r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform
- Rework DT architecture and add DT for camera DB
Fabrizio Castro says "Some of the serial interfaces are exposed on the
camera daughter board. The camera daughter board can be connected to
the carrier board by means of expansion connectors 1, 2 and 3. The
carrier board may host an RZ/G1M or an RZ/G1N based SoM.
While adding support for the serial interfaces on the camera daughter
board we faced the dilemma of how to properly describe all of the
possible HW configurations and how to maximize code reuse.
The best option would be to use device tree overlays, however there is
still some work to be done on that front before actually using them,
therefore for the time being we decided to provide .dtsi files to
describe the carrier board and the camera daughter board, and provide
.dts files to describe the HW configurations we need to support."
* r8a779[0-4] R-Car Gen2 SoCs
- Use generic node name for VSP1 nodes
Geert Uytterhoeven says "This patch series replaces the specific node
names used for the VSP1 nodes by the preferred generic node names, cfr.
commit
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Jordan Crouse
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f97decac5f |
drm/msm: Support multiple ringbuffers
Add the infrastructure to support the idea of multiple ringbuffers. Assign each ringbuffer an id and use that as an index for the various ring specific operations. The biggest delta is to support legacy fences. Each fence gets its own sequence number but the legacy functions expect to use a unique integer. To handle this we return a unique identifier for each submission but map it to a specific ring/sequence under the covers. Newer users use a dma_fence pointer anyway so they don't care about the actual sequence ID or ring. The actual mechanics for multiple ringbuffers are very target specific so this code just allows for the possibility but still only defines one ringbuffer for each target family. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> |
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Greg Kroah-Hartman
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6bd5bb1ede |
phy: for 4.15
*) Add support in phy core to perform phy calibration
*) Return NULL for optional PHY's even if CONFIG_GENERIC_PHY is not selected
*) Add USB Phy driver for Broadcom STB SoCs
*) Add support to force mediatek PHY with USB OTG function to enter
a specific mode
*) Calibrate rockchip-typec PHY according to docs
*) Enable dual route feature for sun4i-usb in V3s SoC
*) Use dr_mode dt property to enable otg capability in rcar-gen3-usb2
*) Add driver data to specify dedicated otg pins in rcar-gen3-usb2 driver
*) Configure the RX equalizer of brcm-sata PHY
*) Update pcie phy settings for ti-pipe3 phy
*) Add set_mode callback in qcom-ufs-qmp-14nm phy
*) Use PHY callbacks in phy-qcom-ufs instead of export APIs
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Merge tag 'phy-for-4.15_v1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes:
phy: for 4.15
*) Add support in phy core to perform phy calibration
*) Return NULL for optional PHY's even if CONFIG_GENERIC_PHY is not selected
*) Add USB Phy driver for Broadcom STB SoCs
*) Add support to force mediatek PHY with USB OTG function to enter
a specific mode
*) Calibrate rockchip-typec PHY according to docs
*) Enable dual route feature for sun4i-usb in V3s SoC
*) Use dr_mode dt property to enable otg capability in rcar-gen3-usb2
*) Add driver data to specify dedicated otg pins in rcar-gen3-usb2 driver
*) Configure the RX equalizer of brcm-sata PHY
*) Update pcie phy settings for ti-pipe3 phy
*) Add set_mode callback in qcom-ufs-qmp-14nm phy
*) Use PHY callbacks in phy-qcom-ufs instead of export APIs
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Stephen Boyd
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faa865f18c |
clk/samsung updates for v4.15
Overall clk/samsung clean up and fixes. Removed remaining unused code after removal of exynos4212 SoC support; dropped internal data structure fields and related code for registering clkdev lookup entry for each possible clock object, clkdev aliases could still be defined if needed in a separate table; other minor fixes of the clock tree definitions. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJZ4K7OAAoJEE1bIKeAnHqLlFUP/12Mnb3KIeO4WvNewZupUETd 2BWpPHMS/4Al216I+RAZIgBU5lxx9xv0lMUeSfOWXwPMh/xReCY3SQ3N11KTE6DW 6PwZpXtkYUyJ9sakVMNonczljfuWKFleRBscqPy3DH2S1vzG611lmmE8QvMmie2O shKrRQOwN7lWIGSQFdu1aSa/9OsHM9xsmgGGcAWMcpXTm26/nZ4EZxd7OU3nB39G fBzqjIP8hrvDKUi4b4+5uQxaXTYN8HKTmteWJzlXtXglVR55Wu7DmXXK4eFDLsmh iE3lkUnFK2cgkQjANJeeF/GK19ZvIVjlzEGX66IrAUG8qTDSgLDCWJRxW6qwm9jl KrSyC4d1D6GfymcVWUe8drixdeimVpOxyg/FCzyJXA8jkWUfwJJvi4eqJ3inPbh7 5fv84bTxm4xOhWYOLWu4r0Z9GvxDl/DyeW5tJhkGh7ZSWBWng9f2FDZp9aloJf4K DPopqAt5e+8NCe1jyKCNLdDrZxlHp7xyYu+n/xTAVOxS/BZJ+bKvuGIp6b39dzhB LMdTwwuwDCneEINROH09FqqH7y+HqyG2vR7cFaiShzP02OE0YGu20WlhRykzajFj XhXwfDiGzgTiLjuCS3BbtuYlgFxWAmjo81/3nuJ8MTZYDaXLWuaGCWHYvSc2+oFy AiNNDhap38/ed2cLdsgl =VHBX -----END PGP SIGNATURE----- Merge tag 'clk-v4.15-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-next Pull Samsung clk driver updates from Sylwester Nawrocki: Overall clk/samsung clean up and fixes. Removed remaining unused code after removal of exynos4212 SoC support; dropped internal data structure fields and related code for registering clkdev lookup entry for each possible clock object, clkdev aliases could still be defined if needed in a separate table; other minor fixes of the clock tree definitions. * tag 'clk-v4.15-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk: clk: samsung: Remove obsolete clkdev alias support clk: samsung: Add explicit MPLL, EPLL clkdev aliases in S3C2443 driver clk: samsung: Rework clkdev alias handling in S3C2443 driver clk: samsung: Rework clkdev alias handling in Exynos5440 driver clk: samsung: Drop useless alias in Exynos5420 clk driver clk: samsung: Remove clkdev alias support in Exynos5250 clk driver clk: samsung: Remove double assignment of CLK_ARM_CLK in Exynos4 driver clk: samsung: Remove clkdev alias support in Exynos4 clk driver clk: samsung: Remove support for obsolete Exynos4212 CPU clock clk: samsung: Remove support for Exynos4212 SoCs in Exynos CLKOUT driver clk: samsung: Properly propagate flags in __PLL macro clk: samsung: Fix m2m scaler clock on Exynos542x clk: samsung: Delete a memory allocation error message in clk-cpu.c |
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Masahiro Yamada
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1c59d04505 |
dt-bindings: gpio: uniphier: add UniPhier GPIO binding
This GPIO controller is used on UniPhier SoC family. The vendor specific property "socionext,interrupt-ranges" is for specifying interrupt mapping to the parent interrupt controller because the mapping is not contiguous. It works like "ranges", but transforms "interrupts" instead of "reg". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Vivek Gautam
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55b20e8de9 |
dt-bindings: phy: Add PHY_TYPE_UFS definition
Add definition for UFS phy type. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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Neil Armstrong
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4cf8f811c6 |
clk: meson: gxbb: Add VPU and VAPB clockids
Add the clkids for the clocks feeding the Video Processing Unit. Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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Andrew Jeffery
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2cbfca66ba |
gpio: Fix loose spelling
Literally. I expect "lose" was meant here, rather than "loose", though you could feasibly use a somewhat uncommon definition of "loose" to mean what would be meant by "lose": "Loose the hounds" for instance, as in "Release the hounds". Substituting in "value" for "hounds" gives "release the value", and makes some sense, but futher substituting back to loose gives "loose the value" which overall just seems a bit anachronistic. Instead, use modern, pragmatic English and save a character. Cc: Russell Currey <ruscur@russell.cc> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Arnd Bergmann
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092283190a |
Device tree changes for omaps for v4.15 merge window to improve
support for omap35xx-evm, am34xx-epos-evm and dra7:
- A series of changes to fix support for omap35xx-evm
- A series of changes to add earlycon support for n8x0, pandaboard
and omap5 boards
- A series of changes for am43xx-epos-evm pinctrl modes for default
and sleep states
- A series of changes to correct pbias regulator voltage for dra7
from 3V to 3.3V
- Use microchip compatible instead of deprecated mcp compatible for
mcp23017
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Merge tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "device tree changes for omaps for v4.15 merge window" from Tony Lindgren:
Device tree changes for omaps for v4.15 merge window to improve
support for omap35xx-evm, am34xx-epos-evm and dra7:
- A series of changes to fix support for omap35xx-evm
- A series of changes to add earlycon support for n8x0, pandaboard
and omap5 boards
- A series of changes for am43xx-epos-evm pinctrl modes for default
and sleep states
- A series of changes to correct pbias regulator voltage for dra7
from 3V to 3.3V
- Use microchip compatible instead of deprecated mcp compatible for
mcp23017
* tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
ARM: dts: omap3: Replace deprecated mcp prefix
ARM: dts: dra7-evm: Move pcie RC node to common file
ARM: dts: omap5: Increase max-voltage of pbias regulator
ARM: dts: dra7: Increase max-voltage of pbias regulator
ARM: dts: am43xx-epos-evm: Add default pinmux for unused pins
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for usb2_phy1 and usb2_phy2
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for uart0
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for matrix_keypad0
ARM: dts: am43xx-epos-evm: Add sleep pinmux for mmc1
ARM: dts: am43xx-epos-evm: Add sleep pinmux for pixcir_ts
ARM: dts: am43xx-epos-evm: Add sleep pinmux for gpmc
ARM: dts: am43xx-epos-evm: Add sleep pinmux for ecap0
ARM: dts: am43xx-epos-evm: Add sleep pinmux for qspi1
ARM: dts: am43xx-epos-evm: Add sleep pinmux for spi0 and spi1
ARM: dts: am43xx: Introduce additional pinmux definitions for DS0
ARM: dts: Configure earlycon for omap5-common
ARM: dts: Configure earlycon for pandaboard
ARM: dts: Configure earlycon for n8x0
ARM: dts: omap3-evm: Add DSS {vdds_dsi,vdda_video}-supply references
ARM: dts: omap3: Add Sharp LS037V7DW01 'envdd' supply
...
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Arnd Bergmann
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7d738dbbe2 |
Merge tag 'stm32-dt-for-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/soc
Pull "STM32 DT updates for v4.15, round 1" from Alexandre Torgue: Highlights: ---------- -Add I2C1 support on STM32F746 SoC -Enable I2C1 on STM32F746 eval board -Add Timers support on STM32F746 SoC -Add USB HS and FS supports on STM32F746 Soc -Enable USB HS on STM32F746 disco and eval boards -Enable USB FS en STM32F746 disco board -Add Vrefbuf to STM32H743 SoC -Add LPTIMERS support on STM32H743 SoC -Add DMAMUX support on STM32H743 SoC -Enable STM32H743 clock driver -Add MDMA support on STM32H743 SoC -Change pinctrl pinmux entries for all SoC. * tag 'stm32-dt-for-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: Add MDMA support for STM32H743 SoC ARM: dts: stm32: Enable USB FS on stm32f746-disco ARM: dts: stm32: Add USB FS support for STM32F746 MCU ARM: dts: stm32: Enable USB HS on stm32f746-disco ARM: dts: stm32: Enable USB HS on stm32746g-eval ARM: dts: stm32: Add USB HS support for STM32F746 MCU ARM: dts: stm32: change pinctrl bindings definition ARM: dts: stm32: Enable STM32H743 clock driver ARM: dts: stm32: fix hse clock frequency on STM32H743 Eval board ARM: dts: stm32: add Timers driver for stm32f746 MCU ARM: dts: stm32: Add DMAMUX support for STM32H743 SoC ARM: dts: stm32: Add lptimer definitions to stm32h743 ARM: dts: stm32: add vrefbuf to stm32h743 ARM: dts: stm32: Add I2C1 support for STM32F746 eval board ARM: dts: stm32: Add I2C1 support for STM32F746 SoC |
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Arnd Bergmann
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c305cf3388 |
Merge tag 'renesas-dt-bindings-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC DT Bindings Updates for v4.15" from Simon Horman:
* Consistently do not use ';' in documentation of compat strings
for boards. A misture of using and not using a trailing ';' had
krept in over time with not using being dominant.
* Document bindings for
- Eagle board and r8a77970 (V3M) SoC bindings.
Eagle is a board for the V3M SoC
- Document Kingfisher board bindings.
Kingfisher is an extension board for the H3ULCB and M3ULCB boards.
* Add r8a77970 (V3M) SYSC power domain definitions
Add macros usable by the device tree sources to reference r8a77970 SYSC
power domains by index.
* Add Renesas SoC DT bindings doc to Renesas ARM section of MAINTAINERS file
* Drop bogus node name suffix from example of /renesas,dw-hdmi binding
* Document APMU and SMP enable method for r8a7745 (RZ/G1E) SoC
* tag 'renesas-dt-bindings-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: remove inconsistent ; from documentation
arm64: renesas: document Eagle board bindings
arm: shmobile: Document Kingfisher board DT bindings
dt-bindings: power: add R8A77970 SYSC power domain definitions
MAINTAINERS: Add Renesas SoC DT bindings doc to Renesas ARM sections
ARM: shmobile: Document R-Car V3M SoC DT bindings
dt-bindings: display: renesas: dw-hdmi: Drop bogus node name suffix
dt-bindings: apmu: Document r8a7745 support
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Mikko Perttunen
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3e09b155d5 |
dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal
In Tegra186, the BPMP (Boot and Power Management Processor) implements an interface that is used to read system temperatures, including CPU cluster and GPU temperatures. This binding describes the thermal sensor that is exposed by BPMP. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Jonathan Liu
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4328a2186e |
clk: sunxi-ng: sun4i: Export video PLLs
The video PLLs are used directly by the HDMI controller. Export them so that we can use them in our DT node. Signed-off-by: Jonathan Liu <net147@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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Thierry Reding
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4d1dc40185 |
dt-bindings: clock: tegra: Add sor1_out clock
The sor1_src clock implemented on Tegra210 is modelled the wrong way around, which causes some issues with HDMI and DP support. This clock implementation is provided by BPMP on Tegra186, which models this in a more correct way. Since this introduces incompatibilities between the two SoC generations which we want to avoid, the Tegra210 will be fixed in subsequent patches. This change adds sor1_out as an alias for sor1_src. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Alexandre Torgue
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162d58c26d |
ARM: dts: stm32: change pinctrl bindings definition
Initially each pin was declared in "include/dt-bindings/stm32<SOC>-pinfunc.h" and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX). Since this approach was approved, the number of supported MCU has increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new file in "include/dt-bindings" each time a new STM32 SOC arrives I propose a new approach which consist to use a macro to define pin muxing in device tree. All STM32 will use the common macro to define pinmux. Furthermore, it will make STM32 maintenance and integration of new SOC easier . Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com> Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <robh@kernel.org> |
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Geert Uytterhoeven
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44842cc8a8 |
dt-bindings: clk: r7s72100: Add missing I and G clocks
Add the missing definitions for the I (CPU) and G (Image Processing) clocks, so these clocks can be referred to from device nodes in DT. Note that these clocks are already fully supported otherwise (DT bindings, Linux driver, r7s72100.dtsi), they were just omitted from the header file. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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Marek Szyprowski
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8ca8ac1024 |
clk: samsung: Add dt bindings for Exynos4412 ISP clock controller
Some registers for the Exynos 4412 ISP (Camera subsystem) clocks are located in the ISP power domain. Because those registers are also located in a different memory region than the main clock controller, support for them can be provided by a separate clock controller. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> |
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Heiko Stuebner
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4e07533f30 |
clk: rockchip: add more rk3188 graphics clock ids
Add ids for cif, v{d/e}pu clocks on rk3188. ACLK_CIF does get a needed
1 at it's end but that should be safe because no driver for the camera
interface has surfaced so far and the old vendor kernels for these socs
are based on linux-3.0 and still used board files then, so there really
are no previous users anywhere to be found.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Romain Perier
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8c04f7a3e3 |
clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs
Signed-off-by: Romain Perier <romain.perier@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Marek Szyprowski
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45d882daf8 |
clk: samsung: Add explicit MPLL, EPLL clkdev aliases in S3C2443 driver
S3C2443 platform still use non-dt based lookup in some of its drivers to get MPLL and EPLL clocks. Till now it worked only because PLL() macro implicitly created aliases for all instantiated clocks. This feature will be removed, so explicitly create aliases for MPLL and EPLL clocks. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> |
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Jerome Brunet
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e891a5a401 |
pinctrl: meson-gx: TEST_N belongs to the AO controller
On meson-gx platforms, TEST_N has been incorrectly declared in the EE controller while it belongs to AO controller. Move the pin to the appropriate controller Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Sean Wang
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7f4fbf79f4 |
reset: mediatek: add reset controller dt-bindings required header for MT7622 SoC
Add the reset controller dt-bindings exported from infracfg, pericfg, hifsys and ethsys which could be found on MT7622 SoC. So that we can reference them from within a device-tree file. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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Andrew F. Davis
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130c28daf0 |
ARM: dts: am43xx: Introduce additional pinmux definitions for DS0
AM43xx platform pinmux registers contain bits to set state during suspend (DS0), add these bit definitions here. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Chen-Yu Tsai
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80815004a4 |
clk: sunxi-ng: sun6i: Export video PLLs
The 2x outputs of the 2 video PLL clocks are directly used by the
HDMI controller block.
Export them so they can be referenced in the device tree.
Fixes:
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Sergei Shtylyov
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ecadea00f5 |
dt-bindings: clock: Add R8A77970 CPG core clock definitions
Add macros usable by the device tree sources to reference the R8A77970 CPG core clocks by index. The data come from the table 8.2c of R-Car Series, 3rd Generation User's Manual: Hardware (Rev. 0.55, Jun. 30, 2017). Based on the original (and large) patch by Daisuke Matsushita <daisuke.matsushita.ns@hitachi.com>. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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Vineet Gupta
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13541226dc |
ARC: reset: remove the misleading v1 suffix all over
There is no plan yet to do a v2 board. And even if we were to do it only some IPs would actually change, so it be best to add suffixes at that point, not now ! Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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Sergei Shtylyov
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833bdb47c8 |
dt-bindings: power: add R8A77970 SYSC power domain definitions
Add macros usable by the device tree sources to reference R8A77970 SYSC power domains by index. Based on the original (and large) patch by Daisuke Matsushita <daisuke.matsushita.ns@hitachi.com>. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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Linus Torvalds
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7318413077 |
Merge branch '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
"This is the main pull request for 4.14 for MIPS; below a summary of
the non-merge commits:
CM:
- Rename mips_cm_base to mips_gcr_base
- Specify register size when generating accessors
- Use BIT/GENMASK for register fields, order & drop shifts
- Add cluster & block args to mips_cm_lock_other()
CPC:
- Use common CPS accessor generation macros
- Use BIT/GENMASK for register fields, order & drop shifts
- Introduce register modify (set/clear/change) accessors
- Use change_*, set_* & clear_* where appropriate
- Add CM/CPC 3.5 register definitions
- Use GlobalNumber macros rather than magic numbers
- Have asm/mips-cps.h include CM & CPC headers
- Cluster support for topology functions
- Detect CPUs in secondary clusters
CPS:
- Read GIC_VL_IDENT directly, not via irqchip driver
DMA:
- Consolidate coherent and non-coherent dma_alloc code
- Don't use dma_cache_sync to implement fd_cacheflush
FPU emulation / FP assist code:
- Another series of 14 commits fixing corner cases such as NaN
propgagation and other special input values.
- Zero bits 32-63 of the result for a CLASS.D instruction.
- Enhanced statics via debugfs
- Do not use bools for arithmetic. GCC 7.1 moans about this.
- Correct user fault_addr type
Generic MIPS:
- Enhancement of stack backtraces
- Cleanup from non-existing options
- Handle non word sized instructions when examining frame
- Fix detection and decoding of ADDIUSP instruction
- Fix decoding of SWSP16 instruction
- Refactor handling of stack pointer in get_frame_info
- Remove unreachable code from force_fcr31_sig()
- Convert to using %pOF instead of full_name
- Remove the R6000 support.
- Move FP code from *_switch.S to *_fpu.S
- Remove unused ST_OFF from r2300_switch.S
- Allow platform to specify multiple its.S files
- Add #includes to various files to ensure code builds reliable and
without warning..
- Remove __invalidate_kernel_vmap_range
- Remove plat_timer_setup
- Declare various variables & functions static
- Abstract CPU core & VP(E) ID access through accessor functions
- Store core & VP IDs in GlobalNumber-style variable
- Unify checks for sibling CPUs
- Add CPU cluster number accessors
- Prevent direct use of generic_defconfig
- Make CONFIG_MIPS_MT_SMP default y
- Add __ioread64_copy
- Remove unnecessary inclusions of linux/irqchip/mips-gic.h
GIC:
- Introduce asm/mips-gic.h with accessor functions
- Use new GIC accessor functions in mips-gic-timer
- Remove counter access functions from irq-mips-gic.c
- Remove gic_read_local_vp_id() from irq-mips-gic.c
- Simplify shared interrupt pending/mask reads in irq-mips-gic.c
- Simplify gic_local_irq_domain_map() in irq-mips-gic.c
- Drop gic_(re)set_mask() functions in irq-mips-gic.c
- Remove gic_set_polarity(), gic_set_trigger(), gic_set_dual_edge(),
gic_map_to_pin() and gic_map_to_vpe() from irq-mips-gic.c.
- Convert remaining shared reg access, local int mask access and
remaining local reg access to new accessors
- Move GIC_LOCAL_INT_* to asm/mips-gic.h
- Remove GIC_CPU_INT* macros from irq-mips-gic.c
- Move various definitions to the driver
- Remove gic_get_usm_range()
- Remove __gic_irq_dispatch() forward declaration
- Remove gic_init()
- Use mips_gic_present() in place of gic_present and remove
gic_present
- Move gic_get_c0_*_int() to asm/mips-gic.h
- Remove linux/irqchip/mips-gic.h
- Inline __gic_init()
- Inline gic_basic_init()
- Make pcpu_masks a per-cpu variable
- Use pcpu_masks to avoid reading GIC_SH_MASK*
- Clean up mti, reserved-cpu-vectors handling
- Use cpumask_first_and() in gic_set_affinity()
- Let the core set struct irq_common_data affinity
microMIPS:
- Fix microMIPS stack unwinding on big endian systems
MIPS-GIC:
- SYNC after enabling GIC region
NUMA:
- Remove the unused parent_node() macro
R6:
- Constify r2_decoder_tables
- Add accessor & bit definitions for GlobalNumber
SMP:
- Constify smp ops
- Allow boot_secondary SMP op to return errors
VDSO:
- Drop gic_get_usm_range() usage
- Avoid use of linux/irqchip/mips-gic.h
Platform changes:
Alchemy:
- Add devboard machine type to cpuinfo
- update cpu feature overrides
- Threaded carddetect irqs for devboards
AR7:
- allow NULL clock for clk_get_rate
BCM63xx:
- Fix ENETDMA_6345_MAXBURST_REG offset
- Allow NULL clock for clk_get_rate
CI20:
- Enable GPIO and RTC drivers in defconfig
- Add ethernet and fixed-regulator nodes to DTS
Generic platform:
- Move Boston and NI 169445 FIT image source to their own files
- Include asm/bootinfo.h for plat_fdt_relocated()
- Include asm/time.h for get_c0_*_int()
- Include asm/bootinfo.h for plat_fdt_relocated()
- Include asm/time.h for get_c0_*_int()
- Allow filtering enabled boards by requirements
- Don't explicitly disable CONFIG_USB_SUPPORT
- Bump default NR_CPUS to 16
JZ4700:
- Probe the jz4740-rtc driver from devicetree
Lantiq:
- Drop check of boot select from the spi-falcon driver.
- Drop check of boot select from the lantiq-flash MTD driver.
- Access boot cause register in the watchdog driver through regmap
- Add device tree binding documentation for the watchdog driver
- Add docs for the RCU DT bindings.
- Convert the fpi bus driver to a platform_driver
- Remove ltq_reset_cause() and ltq_boot_select(
- Switch to a proper reset driver
- Switch to a new drivers/soc GPHY driver
- Add an USB PHY driver for the Lantiq SoCs using the RCU module
- Use of_platform_default_populate instead of __dt_register_buses
- Enable MFD_SYSCON to be able to use it for the RCU MFD
- Replace ltq_boot_select() with dummy implementation.
Loongson 2F:
- Allow NULL clock for clk_get_rate
Malta:
- Use new GIC accessor functions
NI 169445:
- Add support for NI 169445 board.
- Only include in 32r2el kernels
Octeon:
- Add support for watchdog of 78XX SOCs.
- Add support for watchdog of CN68XX SOCs.
- Expose support for mips32r1, mips32r2 and mips64r1
- Enable more drivers in config file
- Add support for accessing the boot vector.
- Remove old boot vector code from watchdog driver
- Define watchdog registers for 70xx, 73xx, 78xx, F75xx.
- Make CSR functions node aware.
- Allow access to CIU3 IRQ domains.
- Misc cleanups in the watchdog driver
Omega2+:
- New board, add support and defconfig
Pistachio:
- Enable Root FS on NFS in defconfig
Ralink:
- Add Mediatek MT7628A SoC
- Allow NULL clock for clk_get_rate
- Explicitly request exclusive reset control in the pci-mt7620 PCI driver.
SEAD3:
- Only include in 32 bit kernels by default
VoCore:
- Add VoCore as a vendor t0 dt-bindings
- Add defconfig file"
* '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (167 commits)
MIPS: Refactor handling of stack pointer in get_frame_info
MIPS: Stacktrace: Fix microMIPS stack unwinding on big endian systems
MIPS: microMIPS: Fix decoding of swsp16 instruction
MIPS: microMIPS: Fix decoding of addiusp instruction
MIPS: microMIPS: Fix detection of addiusp instruction
MIPS: Handle non word sized instructions when examining frame
MIPS: ralink: allow NULL clock for clk_get_rate
MIPS: Loongson 2F: allow NULL clock for clk_get_rate
MIPS: BCM63XX: allow NULL clock for clk_get_rate
MIPS: AR7: allow NULL clock for clk_get_rate
MIPS: BCM63XX: fix ENETDMA_6345_MAXBURST_REG offset
mips: Save all registers when saving the frame
MIPS: Add DWARF unwinding to assembly
MIPS: Make SAVE_SOME more standard
MIPS: Fix issues in backtraces
MIPS: jz4780: DTS: Probe the jz4740-rtc driver from devicetree
MIPS: Ci20: Enable RTC driver
watchdog: octeon-wdt: Add support for 78XX SOCs.
watchdog: octeon-wdt: Add support for cn68XX SOCs.
watchdog: octeon-wdt: File cleaning.
...
|
|
|
Linus Torvalds
|
f60a2abfdb |
The diff is dominated by the Allwinner A10/A20 SoCs getting converted to
the sunxi-ng framework. Otherwise, the heavy hitters are various drivers for SoCs like AT91, Amlogic, Renesas, and Rockchip. There are some other new clk drivers in here too but overall this is just a bunch of clk drivers for various different pieces of hardware and a collection of non-critical fixes for clk drivers. New Drivers: - Allwinner R40 SoCs - Renesas R-Car Gen3 USB 2.0 clock selector PHY - Atmel AT91 audio PLL - Uniphier PXs3 SoCs - ARC HSDK Board PLLs - AXS10X Board PLLs - STMicroelectronics STM32H743 SoCs Removed Drivers: - Non-compiling mb86s7x support Updates: - Allwinner A10/A20 SoCs converted to sunxi-ng framework - Allwinner H3 CPU clk fixes - Renesas R-Car D3 SoC - Renesas V2H and M3-W modules - Samsung Exynos5420/5422/5800 audio fixes - Rockchip fractional clk approximation fixes - Rockchip rk3126 SoC support within the rk3128 driver - Amlogic gxbb CEC32 and sd_emmc clks - Amlogic meson8b reset controller support - IDT VersaClock 5P49V5925/5P49V6901 support - Qualcomm MSM8996 SMMU clks - Various 'const' applications for struct clk_ops - si5351 PLL reset bugfix - Uniphier audio on LD11/LD20 and ethernet support on LD11/LD20/Pro4/PXs2 - Assorted Tegra clk driver fixes -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJZuIAQAAoJEK0CiJfG5JUlUMQQAKFwCZRfTzz0m9jJ9s1XZSR/ vldNAEUGm+Mz0W84xIzFqaT0UI1+SJK4e9Du+EN6phcCD5yVB0JS2EtRa84Bku/i Zy6AYSUNbGjx94HPwIq1hKt+UOIfBiNbJKMnkoCbEyYPA/TiWzr8JR5GyLjwYhPq IZHSvKqUKM3h2nr+MtpFJIIk8DlkLARRca4CCqa5i2Oqj6B8rjQQAq7TaLAM3ASN tSFIW2vdmWD+om2L57WHhwBgaYnUB4jBCRWkFZRsO4ZIRgm4VpePmosy2UTZ7fqb kEaW2bPuv65zUHpvjHG6yXo+yh0yk1fBsXG/joXgJ4oOmNzsIgnCZzPnGUC1ccms QdK/qhdIXsdgiR2DZtYuzUHji8+TNIPPjfAFyJjUwxDBXpqzXvsvltx2a1hg/rUP VDvTL2OnoGtrW2bXPufCkxBsyejJ4RqC5riMJws5xgMkqKKUajiLovPeuL6+8kU+ ncqWYiIkEvHNKpmW511G/g+ClLk89zgXfxKFWWR+iDjSvA0hgaiRj1V3C2HIyS8f CLpalf6ao2+O008rUiaiqJyxWuwLujcdYokay2HXvTYc45rXrVwvlaDajxqs2eer lekUA4ZbX2g6qvB0lna6PNlv8JLQ1XPdzhWD2eeQIi7JgVSgwg++kUJqglsuai56 eg5zNo6891GL9zFW10/A =0JbT -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The diff is dominated by the Allwinner A10/A20 SoCs getting converted to the sunxi-ng framework. Otherwise, the heavy hitters are various drivers for SoCs like AT91, Amlogic, Renesas, and Rockchip. There are some other new clk drivers in here too but overall this is just a bunch of clk drivers for various different pieces of hardware and a collection of non-critical fixes for clk drivers. New Drivers: - Allwinner R40 SoCs - Renesas R-Car Gen3 USB 2.0 clock selector PHY - Atmel AT91 audio PLL - Uniphier PXs3 SoCs - ARC HSDK Board PLLs - AXS10X Board PLLs - STMicroelectronics STM32H743 SoCs Removed Drivers: - Non-compiling mb86s7x support Updates: - Allwinner A10/A20 SoCs converted to sunxi-ng framework - Allwinner H3 CPU clk fixes - Renesas R-Car D3 SoC - Renesas V2H and M3-W modules - Samsung Exynos5420/5422/5800 audio fixes - Rockchip fractional clk approximation fixes - Rockchip rk3126 SoC support within the rk3128 driver - Amlogic gxbb CEC32 and sd_emmc clks - Amlogic meson8b reset controller support - IDT VersaClock 5P49V5925/5P49V6901 support - Qualcomm MSM8996 SMMU clks - Various 'const' applications for struct clk_ops - si5351 PLL reset bugfix - Uniphier audio on LD11/LD20 and ethernet support on LD11/LD20/Pro4/PXs2 - Assorted Tegra clk driver fixes" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (120 commits) clk: si5351: fix PLL reset ASoC: atmel-classd: remove aclk clock ASoC: atmel-classd: remove aclk clock from DT binding clk: at91: clk-generated: make gclk determine audio_pll rate clk: at91: clk-generated: create function to find best_diff clk: at91: add audio pll clock drivers dt-bindings: clk: at91: add audio plls to the compatible list clk: at91: clk-generated: remove useless divisor loop clk: mb86s7x: Drop non-building driver clk: ti: check for null return in strrchr to avoid null dereferencing clk: Don't write error code into divider register clk: uniphier: add video input subsystem clock clk: uniphier: add audio system clock clk: stm32h7: Add stm32h743 clock driver clk: gate: expose clk_gate_ops::is_enabled clk: nxp: clk-lpc32xx: rename clk_gate_is_enabled() clk: uniphier: add PXs3 clock data clk: hi6220: change watchdog clock source clk: Kconfig: Name RK805 in Kconfig for COMMON_CLK_RK808 clk: cs2000: Add cs2000_set_saved_rate ... |
|
|
Linus Torvalds
|
e90937e756 |
ARM: arm64: Devicetree updates for v4.14
As usual, device tree updates is the bulk of our material in this merge
window. This time around, 559 patches affecting both 32- and 64-bit
platforms.
Changes are too many to list individually, but some of the larger ones:
New platform/SoC support:
- Automotive:
+ Renesas R-Car D3 (R8A77995)
+ TI DT76x
+ MediaTek mt2712e
- Communication-oriented:
+ Qualcomm IPQ8074
+ Broadcom Stingray
+ Marvell Armada 8080
- Set top box:
+ Uniphier PXs3
Besides some vendor reference boards for the SoC above, there are also several
new boards/machines:
- TI AM335x Moxa UC-8100-ME-T open platform
- TI AM57xx Beaglebone X15 Rev C
- Microchip/Atmel sama5d27 SoM1 EK
- Broadcom Raspberry Pi Zero W
- Gemini-based D-Link DIR-685 router
- Freescale i.MX6:
+ Toradex Apalis module + Apalis and Ixora carrier boards
+ Engicam GEAM6UL Starter Kit
- Freescale i.MX53-based Beckhoff CX9020 Embedded PC
- Mediatek mt7623-based BananaPi R2
- Several Allwinner-based single-board computers:
+ Cubietruck plus
+ Bananapi M3, M2M and M64
+ NanoPi A64
+ A64-OLinuXino
+ Pine64
- Rockchip RK3328 Pine64/Rock64 board support
- Rockchip RK3399 boards:
+ RK3399 Sapphire module on Excavator carrier (RK3399 reference design)
+ Theobroma Systems RK3399-Q7 SoM
- ZTE ZX296718 PCBOX Board
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Merge tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM/arm64 Devicetree updates from Olof Johansson:
"As usual, device tree updates is the bulk of our material in this
merge window. This time around, 559 patches affecting both 32- and
64-bit platforms.
Changes are too many to list individually, but some of the larger
ones:
New platform/SoC support:
- Automotive:
+ Renesas R-Car D3 (R8A77995)
+ TI DT76x
+ MediaTek mt2712e
- Communication-oriented:
+ Qualcomm IPQ8074
+ Broadcom Stingray
+ Marvell Armada 8080
- Set top box:
+ Uniphier PXs3
Besides some vendor reference boards for the SoC above, there are also
several new boards/machines:
- TI AM335x Moxa UC-8100-ME-T open platform
- TI AM57xx Beaglebone X15 Rev C
- Microchip/Atmel sama5d27 SoM1 EK
- Broadcom Raspberry Pi Zero W
- Gemini-based D-Link DIR-685 router
- Freescale i.MX6:
+ Toradex Apalis module + Apalis and Ixora carrier boards
+ Engicam GEAM6UL Starter Kit
- Freescale i.MX53-based Beckhoff CX9020 Embedded PC
- Mediatek mt7623-based BananaPi R2
- Several Allwinner-based single-board computers:
+ Cubietruck plus
+ Bananapi M3, M2M and M64
+ NanoPi A64
+ A64-OLinuXino
+ Pine64
- Rockchip RK3328 Pine64/Rock64 board support
- Rockchip RK3399 boards:
+ RK3399 Sapphire module on Excavator carrier (RK3399 reference design)
+ Theobroma Systems RK3399-Q7 SoM
- ZTE ZX296718 PCBOX Board"
* tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (559 commits)
ARM: dts: at91: at91sam9g45: add AC97
arm64: dts: marvell: mcbin: enable more networking ports
arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node
arm64: dts: marvell: add TX interrupts for PPv2.2
arm64: dts: uniphier: add PXs3 SoC support
ARM: dts: uniphier: add pinctrl groups of ethernet phy mode
ARM: dts: uniphier: fix size of sdctrl nodes
ARM: dts: uniphier: add AIDET nodes
arm64: dts: uniphier: fix size of sdctrl node
arm64: dts: uniphier: add AIDET nodes
Revert "ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2"
arm64: dts: uniphier: add reset controller node of analog amplifier
arm64: dts: marvell: add Device Tree files for Armada-8KP
arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM
arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM
dt-bindings: add rk3399-q7 SoM
ARM: dts: rockchip: enable usb for rv1108-evb
ARM: dts: rockchip: add usb nodes for rv1108 SoCs
dt-bindings: update grf-binding for rv1108 SoCs
ARM: dts: aspeed-g4: fix AHB window size of the SMC controllers
...
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|
|
Linus Torvalds
|
ae46654bcf |
ARM: SoC driver updates for v4.14
This branch contains platform-related driver updates for ARM and ARM64.
Among them:
- Reset driver updates:
+ New API for dealing with arrays of resets
+ Make unimplemented {de,}assert return success on shared resets
+ MSDKv1 driver
+ Removal of obsolete Gemini reset driver
+ Misc updates for sunxi and Uniphier
- SoC drivers:
+ Platform SoC driver registration on Tegra
+ Shuffle of Qualcomm drivers into a submenu
+ Allwinner A64 support for SRAM
+ Renesas R-Car R3 support
+ Power domains for Rockchip RK3366
- Misc updates and smaller fixes for TEE and memory driver subsystems
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"This branch contains platform-related driver updates for ARM and ARM64.
Among them:
- Reset driver updates:
+ New API for dealing with arrays of resets
+ Make unimplemented {de,}assert return success on shared resets
+ MSDKv1 driver
+ Removal of obsolete Gemini reset driver
+ Misc updates for sunxi and Uniphier
- SoC drivers:
+ Platform SoC driver registration on Tegra
+ Shuffle of Qualcomm drivers into a submenu
+ Allwinner A64 support for SRAM
+ Renesas R-Car R3 support
+ Power domains for Rockchip RK3366
- Misc updates and smaller fixes for TEE and memory driver
subsystems"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
firmware: arm_scpi: fix endianness of dev_id in struct dev_pstate_set
soc/tegra: fuse: Add missing semi-colon
soc/tegra: Restrict SoC device registration to Tegra
drivers: soc: sunxi: add support for A64 and its SRAM C
drivers: soc: sunxi: add support for remapping func value to reg value
drivers: soc: sunxi: fix error processing on base address when claiming
dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C
bus: sunxi-rsb: Enable by default for ARM64
soc/tegra: Register SoC device
firmware: tegra: set drvdata earlier
memory: Convert to using %pOF instead of full_name
soc: Convert to using %pOF instead of full_name
bus: Convert to using %pOF instead of full_name
firmware: Convert to using %pOF instead of full_name
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC
reset: uniphier: add analog amplifiers reset control
reset: uniphier: add video input subsystem reset control
...
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|
Linus Torvalds
|
4dfc278803 |
IOMMU Updates for Linux v4.14
Slightly more changes than usual this time:
- KDump Kernel IOMMU take-over code for AMD IOMMU. The code now
tries to preserve the mappings of the kernel so that master
aborts for devices are avoided. Master aborts cause some
devices to fail in the kdump kernel, so this code makes the
dump more likely to succeed when AMD IOMMU is enabled.
- Common flush queue implementation for IOVA code users. The
code is still optional, but AMD and Intel IOMMU drivers had
their own implementation which is now unified.
- Finish support for iommu-groups. All drivers implement this
feature now so that IOMMU core code can rely on it.
- Finish support for 'struct iommu_device' in iommu drivers. All
drivers now use the interface.
- New functions in the IOMMU-API for explicit IO/TLB flushing.
This will help to reduce the number of IO/TLB flushes when
IOMMU drivers support this interface.
- Support for mt2712 in the Mediatek IOMMU driver
- New IOMMU driver for QCOM hardware
- System PM support for ARM-SMMU
- Shutdown method for ARM-SMMU-v3
- Some constification patches
- Various other small improvements and fixes
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Merge tag 'iommu-updates-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel:
"Slightly more changes than usual this time:
- KDump Kernel IOMMU take-over code for AMD IOMMU. The code now tries
to preserve the mappings of the kernel so that master aborts for
devices are avoided. Master aborts cause some devices to fail in
the kdump kernel, so this code makes the dump more likely to
succeed when AMD IOMMU is enabled.
- common flush queue implementation for IOVA code users. The code is
still optional, but AMD and Intel IOMMU drivers had their own
implementation which is now unified.
- finish support for iommu-groups. All drivers implement this feature
now so that IOMMU core code can rely on it.
- finish support for 'struct iommu_device' in iommu drivers. All
drivers now use the interface.
- new functions in the IOMMU-API for explicit IO/TLB flushing. This
will help to reduce the number of IO/TLB flushes when IOMMU drivers
support this interface.
- support for mt2712 in the Mediatek IOMMU driver
- new IOMMU driver for QCOM hardware
- system PM support for ARM-SMMU
- shutdown method for ARM-SMMU-v3
- some constification patches
- various other small improvements and fixes"
* tag 'iommu-updates-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (87 commits)
iommu/vt-d: Don't be too aggressive when clearing one context entry
iommu: Introduce Interface for IOMMU TLB Flushing
iommu/s390: Constify iommu_ops
iommu/vt-d: Avoid calling virt_to_phys() on null pointer
iommu/vt-d: IOMMU Page Request needs to check if address is canonical.
arm/tegra: Call bus_set_iommu() after iommu_device_register()
iommu/exynos: Constify iommu_ops
iommu/ipmmu-vmsa: Make ipmmu_gather_ops const
iommu/ipmmu-vmsa: Rereserving a free context before setting up a pagetable
iommu/amd: Rename a few flush functions
iommu/amd: Check if domain is NULL in get_domain() and return -EBUSY
iommu/mediatek: Fix a build warning of BIT(32) in ARM
iommu/mediatek: Fix a build fail of m4u_type
iommu: qcom: annotate PM functions as __maybe_unused
iommu/pamu: Fix PAMU boot crash
memory: mtk-smi: Degrade SMI init to module_init
iommu/mediatek: Enlarge the validate PA range for 4GB mode
iommu/mediatek: Disable iommu clock when system suspend
iommu/mediatek: Move pgtable allocation into domain_alloc
iommu/mediatek: Merge 2 M4U HWs into one iommu domain
...
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Linus Torvalds
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5f9cc57036 |
LED updates for 4.14
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Merge tag 'leds_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds
Pull LED updates from Jacek Anaszewski:
"LED class drivers improvements:
leds-pca955x:
- add Device Tree support and bindings
- use devm_led_classdev_register()
- add GPIO support
- prevent crippled LED class device name
- check for I2C errors
leds-gpio:
- add optional retain-state-shutdown DT property
- allow LED to retain state at shutdown
leds-tlc591xx:
- merge conditional tests
- add missing of_node_put
leds-powernv:
- delete an error message for a failed memory allocation in
powernv_led_create()
leds-is31fl32xx.c
- convert to using custom %pOF printf format specifier
Constify attribute_group structures in:
- leds-blinkm
- leds-lm3533
Make several arrays static const in:
- leds-aat1290
- leds-lp5521
- leds-lp5562
- leds-lp8501"
* tag 'leds_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds:
leds: pca955x: check for I2C errors
leds: gpio: Allow LED to retain state at shutdown
dt-bindings: leds: gpio: Add optional retain-state-shutdown property
leds: powernv: Delete an error message for a failed memory allocation in powernv_led_create()
leds: lp8501: make several arrays static const
leds: lp5562: make several arrays static const
leds: lp5521: make several arrays static const
leds: aat1290: make array max_mm_current_percent static const
leds: pca955x: Prevent crippled LED device name
leds: lm3533: constify attribute_group structure
dt-bindings: leds: add pca955x
leds: pca955x: add GPIO support
leds: pca955x: use devm_led_classdev_register
leds: pca955x: add device tree support
leds: Convert to using %pOF instead of full_name
leds: blinkm: constify attribute_group structures.
leds: tlc591xx: add missing of_node_put
leds: tlc591xx: merge conditional tests
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Olof Johansson
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b884026a2b |
Merge branch 'next/dt64' into next/dt
* next/dt64: (233 commits) arm64: dts: marvell: mcbin: enable more networking ports arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node arm64: dts: marvell: add TX interrupts for PPv2.2 arm64: dts: uniphier: add PXs3 SoC support arm64: dts: uniphier: fix size of sdctrl node arm64: dts: uniphier: add AIDET nodes arm64: dts: uniphier: add reset controller node of analog amplifier arm64: dts: marvell: add Device Tree files for Armada-8KP arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM dt-bindings: add rk3399-q7 SoM arm64: dts: rockchip: add rk3328-rock64 board arm64: dts: rockchip: add rk3328 pdm node ARM64: dts: meson-gxl-libretech-cc: Add GPIO lines names ARM64: dts: meson-gx: Add AO CEC nodes ARM64: dts: meson-gx: update AO clkc to new bindings arm64: dts: rockchip: add more rk3399 iommu nodes arm64: dts: rockchip: add rk3368 iommu nodes arm64: dts: rockchip: add rk3328 iommu nodes arm64: zynqmp: Add generic compatible string for I2C EEPROM ... |
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Martin Blumenstingl
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126534141b |
MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd
Compared to the old xrx200_phy_fw driver the new version has multiple enhancements. The name of the firmware files does not have to be added to all .dts files anymore - one now configures the GPHY mode (FE or GE) instead. Each GPHY can now also boot separate firmware (thus mixing of GE and FE GPHYs is now possible). The new implementation is based on the RCU syscon-mfd and uses the reeset_controller framework instead of raw RCU register reads/writes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Cc: john@phrozen.org Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17128/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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Gabriel Fernandez
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3e4d618b07 |
clk: stm32h7: Add stm32h743 clock driver
This patch enables clocks for STM32H743 boards. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> for MFD changes: Acked-by: Lee Jones <lee.jones@linaro.org> for DT-Bindings Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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Stephen Boyd
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056db9d7c4 |
Allwinner clock changes for 4.14, part 3
Conversion of the last two SoCs (A10, A20) to the sunxi-ng framework. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZno1VAAoJEBx+YmzsjxAgJ4gQALqulaGhH4rEjW5oouZ8JJwd O3s4FFazKMXlgV1q/LYbf1eYrUQhJbr4tHTbCbqm3klaMTz6jOAnRlTjSKkoIssA jrtbP6MzHcWE6RnaIA96z45T2p5ZyMGt18/ZgpdQlmmQ9GcV27I+gQs0VsLLPMY0 PGlG+r6qDnwHbCaEymvbLG16/xLVXHmqXrWQ/9GRWRK1fQ7ffgGw80X1ASuflSnE fJCqfhUc1SG3ZGho0xZXFKUvifoaHg1gyFQrrP5mVhYSeUogYSMrvQim/RwwxSVx 6GkHmNj6O15UvD2A7Y71VqjvjNi5gB054J18Nl8PxFJyHPa33ocC5DkbOXEJI6jL PESH29A6myS+v2cY6lm1PVdWIGrDNcCgocjsZSeyn4xKU6oPmFHzlISt0hZPPoQ3 lxqWZrH9rUeVLVAkX2XzMhi4xHc6wZF2eTsp+e0ylDL09c//Dt2ojKgWoN7DeUlN sRgjcPlGB5KRYMYi1ChH5RSsH8h8S4wzF2mSESkGjLCZ82r1BerRBjvaF1MaIEGd xm5yNBw4Y3HL+AoRSEZiZ9FjERfejiI3Q/oqgcLdAGiYD0pDWMU+wjrfHXnQ1yOj HITZaabZRf19D+pNdLpMlzp1UmQQbflCDfOnXaz1r1q6yuWdXvXmgIL2CfQGPqCD Yn+FyX0JEE6yq4lvJ4fA =Wce+ -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-for-4.14-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next Pull more Allwinner clock changes from Maxime Ripard: * Conversion of the last two SoCs (A10, A20) to the sunxi-ng framework * tag 'sunxi-clk-for-4.14-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: Add sun4i/sun7i CCU driver dt-bindings: List devicetree binding for the CCU of Allwinner A10 dt-bindings: List devicetree binding for the CCU of Allwinner A20 |
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Arnd Bergmann
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c32e176ac1 |
A lot of attention for the rv1108 soc targetted at media-processing
(usb, operating points, spi, pwm, adc, watchdog, i2c and devices for its evb). RK3228/3229 gets iommu and spi nodes. Similar to the rk3288 which also gets some more iommu nodes as well as getting converted to 64 bit addresses due to wanting to address more than 4GB of memory via LPAE. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlmdoA4QHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgeBtB/9oM4MmVRJ0YX7hk4NuU9c4HHdvCW0f1rJe Q6rE6dP7fW3J27d6PuySVWzvIBmD+3xVA2t0dDm85DIP8f1DFz3vyNhkEsu1VG89 MULTektihczugCy+sh3iHILs4fLXJ8QUjCKJWOcWmZHOaXNXXjJIVjC97m5F4ZAj KVOYXNnCKdaHYIeP0lkjStL8Z9Ua7svkjfgsSPTGTSJQQ+bGcd/8JnmlkzjfHWLw qNz6M7FPoJ1rAffskr1At27oRs7UAVSKNAejl8DWKvLXml6NQPRRRu99sLLanxII 3b6LsC6Vwea4a1Rjwx0LZWdDUtB1W34/ZIEw4JceK/i6HfV5K2Oi =di6U -----END PGP SIGNATURE----- Merge tag 'v4.14-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "second round of Rockchip dts32 changes for 4.14" from Heiko Stübner: A lot of attention for the rv1108 soc targetted at media-processing (usb, operating points, spi, pwm, adc, watchdog, i2c and devices for its evb). RK3228/3229 gets iommu and spi nodes. Similar to the rk3288 which also gets some more iommu nodes as well as getting converted to 64 bit addresses due to wanting to address more than 4GB of memory via LPAE. * tag 'v4.14-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: enable usb for rv1108-evb ARM: dts: rockchip: add usb nodes for rv1108 SoCs dt-bindings: update grf-binding for rv1108 SoCs ARM: dts: rockchip: add cpu power supply for rv1108 evb ARM: dts: rockchip: add cpu opp table for rv1108 ARM: dts: rockchip: add rk322x iommu nodes ARM: dts: rockchip: add accelerometer bma250e dt node for rv1108 evb ARM: dts: rockchip: add pmic rk805 dt node for rv1108 evb ARM: dts: rockchip: add pwm backlight for rv1108 evb ARM: dts: rockchip: add pwm dt nodes for rv1108 ARM: dts: rockchip: add spi dt node for rv1108 ARM: dts: rockchip: add saradc support for rv1108 ARM: dts: rockchip: add watchdog dt node for rv1108 ARM: dts: rockchip: add i2c dt nodes for rv1108 clk: rockchip: fix up indentation of some RV1108 clock-ids clk: rockchip: rename the clk id for HCLK_I2S1_2CH clk: rockchip: add more clk ids for rv1108 ARM: dts: rockchip: add more iommu nodes on rk3288 ARM: dts: rockchip: convert rk3288 device tree files to 64 bits ARM: dts: rockchip: add spi node and spi pinctrl on rk3228/rk3229 Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Priit Laes
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c84f5683f6 |
clk: sunxi-ng: Add sun4i/sun7i CCU driver
Introduce a clock controller driver for sun4i A10 and sun7i A20 series SoCs. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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Srinivas Kandagatla
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69a6beab08 |
clk: msm8996-gcc: add missing smmu clks
This patch adds missing LPASS smmu clks which are required by the audio driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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Stephen Boyd
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535b1100d1 |
clk: renesas: Updates for v4.14
- Add more module clocks for R-Car V2H and M3-W,
- Add support for the R-Car Gen3 USB 2.0 clock selector PHY,
- Add support for the new R-Car D3 SoC,
- Allow compile-testing of all (sub)drivers now all dummy infrastructure
is available,
- Small fixes and cleanups.
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Merge tag 'clk-renesas-for-v4.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next
Pull Renesas clk driver updates from Geert Uytterhoeven:
* Add more module clocks for R-Car V2H and M3-W,
* Add support for the R-Car Gen3 USB 2.0 clock selector PHY,
* Add support for the new R-Car D3 SoC,
* Allow compile-testing of all (sub)drivers now all dummy infrastructure
is available,
* Small fixes and cleanups.
* tag 'clk-renesas-for-v4.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r8a7796: Add USB3.0 clock
clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHY
clk: renesas: cpg-mssr: Add R8A77995 support
clk: renesas: rcar-gen3: Add support for SCCG/Clean peripheral clocks
clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3
clk: renesas: Add r8a77995 CPG Core Clock Definitions
clk: renesas: rcar-gen3-cpg: Refactor checks for accessing the div table
clk: renesas: rcar-gen3-cpg: Drop superfluous variable
clk: renesas: Allow compile-testing of all (sub)drivers
clk: renesas: r8a7792: Add IMR-LX3/LSX3 clocks
clk: renesas: div6: Document fields used for parent selection
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Stephen Boyd
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cf657bb940 |
The biggest change is fixing the jitter on the fractional clock-type
Rockchip socs experience with the default approximation. For that we introduce the ability to override it with a clock-specific approximation and use that to create the needed rate settings as described in the Rockchip soc manuals (same for all Rockchip socs). Apart from that we have support for the rk3126 clock controller which is similar to the rk3128 with some minimal differences and a lot of improvements and fixes for the rv1108 clock controller (missing clocks, some clock-ids, naming fixes, register fixes). -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlmcl8sQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgeiBB/wIf5LHDu09HuOb1bjtYASMc//ve2ymhpd7 QsccJ0nteJTWnYQlrJUPYN8YhRVqPNrz7Fq8PkMMkzm89fQQ6lr5DxOy6olKTPM4 sGf+242eE3XttHjJxcshNPS98A56zBa9OgNC9sUsTex8r7NaJn+Gvlf0sXEgQRQi 5FprJf49/4rlHZypVMg1j+aMEWM8ZAmXLP3F77Qch+rfxE74POV9/HI7EEoSQ9MX TxwEewmM8IGXY9aVTvtADPmX31CgdOD3qm4giwGkBf2F8SajP8R63wi+BYpNfUTX +TrexLXEfeKEVtU+xPXsNYmEnAOW6sRvfyUnq4oA1hVSnFoexFA1 =Upwy -----END PGP SIGNATURE----- Merge tag 'v4.14-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next Pull Rockchip clk driver updates from Heiko Stuebner: The biggest change is fixing the jitter on the fractional clock-type Rockchip socs experience with the default approximation. For that we introduce the ability to override it with a clock-specific approximation and use that to create the needed rate settings as described in the Rockchip soc manuals (same for all Rockchip socs). Apart from that we have support for the rk3126 clock controller which is similar to the rk3128 with some minimal differences and a lot of improvements and fixes for the rv1108 clock controller (missing clocks, some clock-ids, naming fixes, register fixes). * tag 'v4.14-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: fix the rv1108 clk_mac sel register description clk: rockchip: rename rv1108 macphy clock to mac clk: rockchip: add rv1108 ACLK_GMAC and PCLK_GMAC clocks clk: rockchip: add rk3228 SCLK_SDIO_SRC clk id clk: rockchip: add rv1108 ACLK_GAMC and PCLK_GMAC ID clk: rockchip: add rk3228 sclk_sdio_src ID clk: rockchip: add special approximation to fix up fractional clk's jitter clk: fractional-divider: allow overriding of approximation clk: rockchip: modify rk3128 clk driver to also support rk3126 dt-bindings: add documentation for rk3126 clock clk: rockchip: add some critical clocks for rv1108 SoC clk: rockchip: rename some of clks for rv1108 SoC clk: rockchip: fix up some clks describe error for rv1108 SoC clk: rockchip: support more clks for rv1108 clk: rockchip: fix up the pll clks error for rv1108 SoC clk: rockchip: support more rates for rv1108 cpuclk clk: rockchip: fix up indentation of some RV1108 clock-ids clk: rockchip: rename the clk id for HCLK_I2S1_2CH clk: rockchip: add more clk ids for rv1108 |
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Stephen Boyd
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1fea70bc18 |
Allwinner clock changes for 4.14, round 2
Usual improvements: - Added support for fixed post-divider on divider and NKM-style clocks - Added driver for R40 CCU Non critical fixes (from round 1): - Fix sunxi-ng/ccu-sunxi-r.h header file guard macro typo - Make fractional clock modes really used and correctly configured - Make H3 cpu clock rate change correctly to be used with cpufreq -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAlmaR6AOHHdlbnNAY3Np ZS5vcmcACgkQOJpUIZwPJDC8YA//aLULoosISnyHs+wKowVHuDb7/mQ82O1gOAxC oE/vscd/WCRm7A5tfy+xHfajX/YRf32Qc09wB7fxUF4R0lgkO9QjUO0yX74a6bPh HCh/+bcmeNl9TZAYpTs72Q4nfc1x63OZwxMqTRnBmh3cevyIBJiFvqPjoMeD+Ari n32QEBgGE+A8bWshVFpNFyId6iyfMfozSYninIkVkwMGr7QgBgJRK1/5sftyZMR+ NQ2IGkaUfICnXofF//pNKsH7TN770gyDtFVWjrKZMrEKoP+gp3mawzMpfePKH/O6 4ihcm5LOo1Kdg5UzRTpQ2B/9fNUn2EvFYT6RuIBfddQcaflT1AzWtNK52j2L/crD tFyamcCSsNY5LzeySbVW+pQMRfrq6UCYtssiL7HYEcwMzvv61PfyDtKq5dxtJd0Q W8S6wPE/foj0i0JQWs0K70AacGU6XdEanUAtc5r3AsniCwwOtlwnaQqOlE5CiwAo HOSItOxX4Y/9QglnntsDyhNUaKpaSiG21XdE3ho3xq1/CS9ED3p5Ljbshem5fnPi mPisF6Ca6NVvCZ+sjH2RVvmGyh3d+BPfQLWC/sTamC4rnpDalrMq6IsCOivzbxqQ ltkYwUO1nmz5NMloeWYCUWWmLUOECCQu7Mppf2UQxpidrEEY0mbBYFdOlehrlHZT bWt2NdQ= =DKSp -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next Pull Allwinner clock changes from Chen-Yu Tsai: * Added support for fixed post-divider on divider and NKM-style clocks * Added driver for R40 CCU * Fix sunxi-ng/ccu-sunxi-r.h header file guard macro typo * Make fractional clock modes really used and correctly configured * Make H3 cpu clock rate change correctly to be used with cpufreq * tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: support R40 SoC dt-bindings: add compatible string for Allwinner R40 CCU clk: sunxi-ng: nkm: add support for fixed post-divider clk: sunxi-ng: div: Add support for fixed post-divider dt-bindings: clock: sunxi-ccu: Add compatibles for sun5i CCU driver clk: sunxi-ng: allow set parent clock (PLL_CPUX) for CPUX clock on H3 clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change clk: sunxi-ng: Wait for lock when using fractional mode clk: sunxi-ng: Make fractional helper less chatty clk: sunxi-ng: multiplier: Fix fractional mode clk: sunxi-ng: Fix fractional mode for N-M clocks clk: sunxi-ng: Fix header guard of ccu-sun8i-r.h |
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Yong Wu
|
a9467d9542 |
iommu/mediatek: Move MTK_M4U_TO_LARB/PORT into mtk_iommu.c
The definition of MTK_M4U_TO_LARB and MTK_M4U_TO_PORT are shared by all the gen2 M4U HWs. Thus, Move them out from mt8173-larb-port.h, and put them into the c file. Suggested-by: Honghui Zhang <honghui.zhang@mediatek.com> Signed-off-by: Yong Wu <yong.wu@mediatek.com> Signed-off-by: Joerg Roedel <jroedel@suse.de> |
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Elaine Zhang
|
c7d0045b08 |
clk: rockchip: rename rv1108 macphy clock to mac
This MAC has no internal phy for rv1108 and the whole clock infrastructure hasn't been used yet, so is safe to fix. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Elaine Zhang
|
1858698e0a |
clk: rockchip: add rv1108 ACLK_GAMC and PCLK_GMAC ID
This patch exports gmac aclk and pclk for dts reference. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Elaine Zhang
|
9762e7ff16 |
clk: rockchip: add rk3228 sclk_sdio_src ID
This patch exports sdio src clock for dts reference. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Icenowy Zheng
|
cd030a78f7 |
clk: sunxi-ng: support R40 SoC
Allwinner R40 SoC have a clock controller module in the style of the SoCs beyond sun6i, however, it's more rich and complex. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Chen-Yu Tsai <wens@csie.org> |
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Arnd Bergmann
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e517030e26 |
Reset controller changes for v4.14
- constify zx2967 reset_ops
- add a convenience API to manage an array of resets
- let deassert report success and let assert report success for shared resets
if the reset controller driver does not implement (de)assert.
- add HSDKv1 reset driver
- remove Gemini reset controller, the driver is made obsolete
by a combined clock/reset driver in drivers/clk
- fix the total number of reset lines in the sunxi driver
- various uniphier updates and fixes:
- remove sLD3 SoC support
- simplify system reset register and bit definitions
- add audio systems, video input subsystem, and analog amplifiers reset
controls
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Merge tag 'reset-for-4.14' of git://git.pengutronix.de/git/pza/linux into next/drivers
Pull "Reset controller changes for v4.14" from Philipp Zabel:
- constify zx2967 reset_ops
- add a convenience API to manage an array of resets
- let deassert report success and let assert report success for shared resets
if the reset controller driver does not implement (de)assert.
- add HSDKv1 reset driver
- remove Gemini reset controller, the driver is made obsolete
by a combined clock/reset driver in drivers/clk
- fix the total number of reset lines in the sunxi driver
- various uniphier updates and fixes:
- remove sLD3 SoC support
- simplify system reset register and bit definitions
- add audio systems, video input subsystem, and analog amplifiers reset
controls
* tag 'reset-for-4.14' of git://git.pengutronix.de/git/pza/linux:
reset: uniphier: add analog amplifiers reset control
reset: uniphier: add video input subsystem reset control
reset: uniphier: add audio systems reset control
reset: sunxi: fix number of reset lines
reset: uniphier: do not use per-SoC macro for system reset block
reset: uniphier: remove sLD3 SoC support
Revert "reset: Add a Gemini reset controller"
ARC: reset: introduce HSDKv1 reset driver
reset: make (de)assert report success for self-deasserting reset drivers
reset: Add APIs to manage array of resets
reset: zx2967: constify zx2967_reset_ops.
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Arnd Bergmann
|
9da95d8f5b |
- add mt7623a smp support
- scpsys: reduce code duplication - scpsys: add mt7622 support - pmic wrapper: make of_device_ids constant -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlmVfMEXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00MGyw//b1Ax9tAl+eX1phkU5r/sdyd6 KS72i4pMo4yyyuoPCLKhpwH2rL1UrgY/T6f6bEyVf6KNhzgUvx1P4Y5PSpo2R+Jv AJ9lIypXCxUvmrQL5FOuQ+8SY694SSm1IBsoJ70pNA+/m7//Yfk0eiueUa7epNI0 dhrHOvNaZPQbnCUjFa+qdkK8x04MoAKUQcq9sp1vpcvYTL7V6OrW2V6kc0iqwaN1 G91QW2r+XAgO1KA1PIMqC8E9v06dhYWuaPI3SMCIqp/NFnNZA8j58KySzW7+nB/B 7IlDARYDyzokw/JTUuWSlOOPh425xVSExidkTbCgb7m0Lt8i3CvW89yXsqKSL/+U Ezek9w/rJNGb5OoLhT1xQfy6XrXFCW78gl9HKZhbrM1eBiEeJctLlmQula57nyJH qIlCMjuueKYHUKTGT5LXidNbGesfx4vLt6v803XouF4D3NCIqPahdFqtBnEfsOEO l1xwbTSq44VSFtUKSdRrgt6e8Uxa25ftOkbKlS8vIPcsYJ7gnK7r2/ERWNJF8F+f x4toGOKhOVRTRwAZIx9ncKnQp08g6jegiRHW4JrJNmPnUwwC00I06+Jiltg5KJIP ZqgfjXesdjD660pWl70YGMRtdUNLuNgZRnyXg1CM94CfOimUBZi2PXhoK1Wm/7sj Db0QrPV4DQHti15Q0ig= =IW3o -----END PGP SIGNATURE----- Merge tag 'v4.13-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers Pull "arm: mediatek: soc updates for v4.14" from Matthias Brugger: - add mt7623a smp support - scpsys: reduce code duplication - scpsys: add mt7622 support - pmic wrapper: make of_device_ids constant * tag 'v4.13-next-soc' of https://github.com/mbgg/linux-mediatek: soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC soc: mediatek: add header files required for MT7622 SCPSYS dt-binding soc: mediatek: reduce code duplication of scpsys_probe across all SoCs dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC soc: mtk-pmic-wrap: make of_device_ids const. ARM: mediatek: add MT7623a smp bringup code |
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Arnd Bergmann
|
2de8161251 |
ARM: Keystone DTS for 4.14
Contents: - ti-sci power domain, clock and reset controller support - DSP nodes for k2h/k2l/k2e evms - DSP CMA memory pools for k2h/k2l/k2e/keg evms - MMC/hsmmc suport for k2g - eDMA support for k2g - DCAN support for k2g -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZlOAZAAoJEHJsHOdBp5c/ZNIP/3wCj+qddu92u7PKknIKptKQ zMKfXnSI01DnjBiuUM3qD6N/ELJCmYrFs2mdYhxjSPNNzKIhMwfg6fSHMWoAmFIN juP5VGCs61e2PWOOL74vw93f1+GEWawgG8VpreeFOgkmDXM1t2jHGFdNkOQH64to B6ONt423UodLIUp8VQzEcH5sluVHErv2OwizO/EWBKAnioQDlKUIS9KDG3eXb98E oVuoso4v8WIoZQj7Rtwpj7gAjnFxCl6DbEWsD5upJ1XLmUtAjqbnGe5PZihYQolJ Klc1qqk0gJPQxfkVzesEOn6k0J5y9+SwYELX9DGnno1yDCA98InCtYdTEDENKqlr dWAvlsbC0JjaHJnC9hU83Y62rMLZsO/fTV7EZU6Cu1M2Suu8O66LFjlnx77uB21g pES0y8bPFdre5JdHXwtvLtyeaDQR2HnTwhzS3Ul1VeMP6gjsiD4FoHAYeqE7tfOE dIaYnORlvMbDE5qP7aeFR3blIPIGXtMyI1ARD+NY4uLUtOUevttCQh+pSasaJ/pF HcYdL9aH1EvTGCS+WY+oes8+6oII1YQo/ASmV200OFHrg1Ucme9iEiaeFAqrR4rO tIXtcOSR4LMjiDHqRBtw5/Ei8hiprRz4070oVAHaKQ190XpmmQe2AkgthrgsKmXM THbU5V8bDRTvNKLmYU7U =9ZLH -----END PGP SIGNATURE----- Merge tag 'keystone_dts_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt Pull "ARM: Keystone DTS for 4.14" from Santosh Shilimkar: Contents: - ti-sci power domain, clock and reset controller support - DSP nodes for k2h/k2l/k2e evms - DSP CMA memory pools for k2h/k2l/k2e/keg evms - MMC/hsmmc suport for k2g - eDMA support for k2g - DCAN support for k2g * tag 'keystone_dts_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (22 commits) ARM: dts: keystone-k2g-ice: Add and enable DSP CMA memory pool ARM: dts: keystone-k2g-evm: Add and enable DSP CMA memory pool ARM: dts: keystone-k2g: Add DSP node ARM: dts: k2g: Add DCAN nodes dt-bindings: net: c_can: Update binding for clock and power-domains property ARM: dts: keystone-k2g-evm: Enable MMC0 and MMC1 ARM: dts: keystone-k2g: add MMC0 and MMC1 nodes ARM: dts: keystone-k2g: Add eDMA nodes dt-bindings: ti,omap-hsmmc: Add 66AK2G mmc controller dt-bindings: ti,edma: Add 66AK2G specific information ARM: dts: keystone-k2g: Add gpio nodes ARM: dts: keystone-k2e-evm: Add and enable DSP CMA memory pool ARM: dts: keystone-k2l-evm: Add and enable common DSP CMA memory pool ARM: dts: keystone-k2hk-evm: Add and enable common DSP CMA memory pool ARM: dts: keystone-k2e: Add DSP node ARM: dts: keystone-k2l: Add DSP nodes ARM: dts: keystone-k2hk: Add DSP nodes ARM: dts: keystone-k2g: Add TI SCI reset-controller node ARM: dts: keystone-k2g: Add ti-sci clock provider node ARM: dts: keystone-k2g: Add ti-sci power domain node ... |
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Arnd Bergmann
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f822e60085 |
Renesas ARM Based SoC Drivers Updates for v4.14
Add R-Car D3 (r8a77995) support to the Renesas-specific SoC drivers - SoC identification - System controller - Reset controller -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZf0DrAAoJENfPZGlqN0++LacP/jcymVeUMDpkkPTcoM6b37Qq ADSDdiR+1Szu29wtfNDTFUoAlh4UvlpAN93GGJLZ/iYsMDyZYIhcUhnE4l119fdy 6iMwDhctXHlQ8VNhY0Z9MUXZyyN2Fu/9L2ZDJ2briM2xoNiMgdUYvMlsZI8ZaN1/ JRmfP+lzCM25Rkdi9sLYolj8szaxbW9RgLBgvXD7ERJ5bsJRKGs6aDrJ2AXMZpwn BVOeughlPTxvv+NVFA1qZXWh63/7RjW5t6OMgHw3eNOABKv+o5YfdqOZAa8PHgn9 LhNAkR90Il9hsGesWwHMKPuCgGHE0R/2nQppWM0xBWO/HfMRnpx8DEt+em/Kjpep uxex+bqMOJB0GksVWPM73ci1CQmQxKS6xrTXeTE9kiN+6WD+b0Fsntoz2XN62uJO df0z46N6T3I4jFc00vOBnXxCdgDCBCJLxtU8NFg8jzmGP+NkKxxYiwCEs1auKlLF CUVX+o8H4V9FKnD3h0/mNsNyw/gCw6TWXlyr/Ba6AjBuZ8TghhMjQ+zbY+xCN9sb IFONbr69pVBJ9N2ssGWdf2iLfa+JNcaJdEPZUkumgUlZ9M5RgS+yg3YoTFtlAO6R JN2uP1E20qBLlrvAu7pv9HQEim80RyDT2DU2a1qFNx32vhqfl6g3sccJJvGpzodj 7y7per6KkpvUGrck0kAI =AO// -----END PGP SIGNATURE----- Merge tag 'renesas-drivers-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Pull "Renesas ARM Based SoC Drivers Updates for v4.14" from Simon Horman: Add R-Car D3 (r8a77995) support to the Renesas-specific SoC drivers - SoC identification - System controller - Reset controller * tag 'renesas-drivers-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: rcar-rst: Add support for R-Car D3 soc: renesas: rcar-sysc: Add support for R-Car D3 power areas soc: renesas: Add r8a77995 SYSC PM Domain Binding Definitions soc: renesas: Identify R-Car D3 |
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Geert Uytterhoeven
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714c53aa2e |
clk: renesas: Add r8a77995 CPG Core Clock Definitions
Add all R-Car D3 Clock Pulse Generator Core Clock Outputs, as listed
in Table 8.2f ("List of Clocks [R-Car D3]") of the R-Car Series, 3rd
Generation Hardware User's Manual (Rev. 0.55, Jun. 30, 2017).
Note that internal CPG clocks (S0, S1, S2, S3, S1C, S3C, SDSRC, and
SSPSRC) are not included, as they are used as internal clock sources
only, and never referenced from DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
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Fenglin Wu
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d7b5f5cc5e |
pinctrl: qcom: spmi-gpio: Add support for GPIO LV/MV subtype
GPIO LV (low voltage)/MV (medium voltage) subtypes have different features and register mappings than 4CH/8CH subtypes. Add support for LV and MV subtypes. Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Cédric Le Goater
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561099a1a2 |
leds: pca955x: add GPIO support
The PCA955x family of chips are I2C LED blinkers whose pins not used to control LEDs can be used as general purpose I/Os (GPIOs). The following adds such a support by defining different operation modes for the pins (See bindings documentation for more details). The pca955x driver is then extended with a gpio_chip when some of pins are operating as GPIOs. The default operating mode is to behave as a LED. The GPIO support is conditioned by CONFIG_LEDS_PCA955X_GPIO. Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com> |
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Chen Zhong
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4f04ff03dc |
soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
Add relevant header files required for dt-bindings of SCPSYS power domain control for all subsystems found on MT7622 SoC. Signed-off-by: Chen Zhong <chen.zhong@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Tony Lindgren
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eba6130b31 |
ARM: dts: Add dra7 iodelay configuration
Add dra7 iodelay configuration. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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Elaine Zhang
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a376a4b045 |
clk: rockchip: fix up indentation of some RV1108 clock-ids
Make the code look better. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Elaine Zhang
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1b6428a286 |
clk: rockchip: rename the clk id for HCLK_I2S1_2CH
i2s1 has 2 channels but not 8 channels. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> [and the clock id hasn't been used in either clock-driver nor dts, so is safe to rename] Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Elaine Zhang
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cbbd6c2f55 |
clk: rockchip: add more clk ids for rv1108
Add new clk ids for the peripherals on rv1108 soc. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Neil Armstrong
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596f2b78da |
dt-bindings: clock: gxbb-aoclk: Add CEC 32k clock
This patchadds the clock binding entry for the CEC 32K AO Clock. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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Jerome Brunet
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a5841de691 |
clk: meson: gxbb: Add sd_emmc clk0 clkids
Add the clkids for the clocks feeding the input0 of the mmc controllers Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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Jerome Brunet
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90640fd05e |
clk: meson-gxbb: expose almost every clock in the bindings
Expose all clocks which maybe used as DT bindings Only clock ids internal the controller remain un-exposed Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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Jerome Brunet
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31128822ce |
clk: meson8b: expose every clock in the bindings
Expose all clocks which maybe used as DT bindings Only clock ids internal the controller remain un-exposed (none on this particular controller at the moment) Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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Martin Blumenstingl
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0f9b973b65 |
dt-bindings: clock: meson8b: describe the embedded reset controller
The Amlogic Meson8/Meson8b/Meson8m2 clock controller provides some reset lines. These are used for example to boot the secondary CPU cores. This patch describes the reset controller which is embedded into the clock controller on these SoCs. A header file is provided which provides preprocessor macros for each reset line (to make the .dts files easier to read). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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Geert Uytterhoeven
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ee011c5b4c |
soc: renesas: Add r8a77995 SYSC PM Domain Binding Definitions
Add power domain indices for R-Car D3. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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Dave Gerlach
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d16645054d |
dt-bindings: Drop k2g genpd device ID macros
Commit
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Elaine Zhang
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8bf3560f6c |
dt-bindings: power: add RK3366 SoCs header for power-domain
According to a description from TRM, add all the power domains. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Eugeniy Paltsev
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e0be864f14 |
ARC: reset: introduce HSDKv1 reset driver
The HSDK v1 periphery IPs can be reset by accessing some registers from the CGU block. The list of available reset lines is documented in the DT bindings. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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Krzysztof Kozlowski
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ff60dcedbd |
pinctrl: samsung: dt-bindings: Use better name for external interrupt function
On Exynos, 0xf is always used as value of external interrupt in pin mux function thus a more descriptive macro name can be used. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> |
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Linus Torvalds
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568d135d33 |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
"Boston platform support:
- Document DT bindings
- Add CLK driver for board clocks
CM:
- Avoid per-core locking with CM3 & higher
- WARN on attempt to lock invalid VP, not BUG
CPS:
- Select CONFIG_SYS_SUPPORTS_SCHED_SMT for MIPSr6
- Prevent multi-core with dcache aliasing
- Handle cores not powering down more gracefully
- Handle spurious VP starts more gracefully
DSP:
- Add lwx & lhx missaligned access support
eBPF:
- Add MIPS support along with many supporting change to add the
required infrastructure
Generic arch code:
- Misc sysmips MIPS_ATOMIC_SET fixes
- Drop duplicate HAVE_SYSCALL_TRACEPOINTS
- Negate error syscall return in trace
- Correct forced syscall errors
- Traced negative syscalls should return -ENOSYS
- Allow samples/bpf/tracex5 to access syscall arguments for sane
traces
- Cleanup from old Kconfig options in defconfigs
- Fix PREF instruction usage by memcpy for MIPS R6
- Fix various special cases in the FPU eulation
- Fix some special cases in MIPS16e2 support
- Fix MIPS I ISA /proc/cpuinfo reporting
- Sort MIPS Kconfig alphabetically
- Fix minimum alignment requirement of IRQ stack as required by
ABI / GCC
- Fix special cases in the module loader
- Perform post-DMA cache flushes on systems with MAARs
- Probe the I6500 CPU
- Cleanup cmpxchg and add support for 1 and 2 byte operations
- Use queued read/write locks (qrwlock)
- Use queued spinlocks (qspinlock)
- Add CPU shared FTLB feature detection
- Handle tlbex-tlbp race condition
- Allow storing pgd in C0_CONTEXT for MIPSr6
- Use current_cpu_type() in m4kc_tlbp_war()
- Support Boston in the generic kernel
Generic platform:
- yamon-dt: Pull YAMON DT shim code out of SEAD-3 board
- yamon-dt: Support > 256MB of RAM
- yamon-dt: Use serial* rather than uart* aliases
- Abstract FDT fixup application
- Set RTC_ALWAYS_BCD to 0
- Add a MAINTAINERS entry
core kernel:
- qspinlock.c: include linux/prefetch.h
Loongson 3:
- Add support
Perf:
- Add I6500 support
SEAD-3:
- Remove GIC timer from DT
- Set interrupt-parent per-device, not at root node
- Fix GIC interrupt specifiers
SMP:
- Skip IPI setup if we only have a single CPU
VDSO:
- Make comment match reality
- Improvements to time code in VDSO"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (86 commits)
locking/qspinlock: Include linux/prefetch.h
MIPS: Fix MIPS I ISA /proc/cpuinfo reporting
MIPS: Fix minimum alignment requirement of IRQ stack
MIPS: generic: Support MIPS Boston development boards
MIPS: DTS: img: Don't attempt to build-in all .dtb files
clk: boston: Add a driver for MIPS Boston board clocks
dt-bindings: Document img,boston-clock binding
MIPS: Traced negative syscalls should return -ENOSYS
MIPS: Correct forced syscall errors
MIPS: Negate error syscall return in trace
MIPS: Drop duplicate HAVE_SYSCALL_TRACEPOINTS select
MIPS16e2: Provide feature overrides for non-MIPS16 systems
MIPS: MIPS16e2: Report ASE presence in /proc/cpuinfo
MIPS: MIPS16e2: Subdecode extended LWSP/SWSP instructions
MIPS: MIPS16e2: Identify ASE presence
MIPS: VDSO: Fix a mismatch between comment and preprocessor constant
MIPS: VDSO: Add implementation of gettimeofday() fallback
MIPS: VDSO: Add implementation of clock_gettime() fallback
MIPS: VDSO: Fix conversions in do_monotonic()/do_monotonic_coarse()
MIPS: Use current_cpu_type() in m4kc_tlbp_war()
...
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Paul Burton
|
7461279bba |
dt-bindings: Document img,boston-clock binding
Add device tree binding documentation for the clocks provided by the MIPS Boston development board from Imagination Technologies, and a header file describing the available clocks for use by device trees & driver. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Frank Rowand <frowand.list@gmail.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16482/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
|
|
Linus Torvalds
|
c7d28eca1d |
This is the bulk of GPIO changes for the v4.13 series:
Core:
- Export add/remove for lookup tables so that modules can export GPIO
descriptor tables.
- Handle GPIO sleep states: it is now possible to flag that a GPIO line
may loose its state during suspend/resume of the system to save
power. This is used in the Wolfson Micro Arizona driver.
- ACPI-based GPIO was tightened up a lot around the edges.
- Use bitmap_fill() to speed up a loop.
New drivers:
- Exar XRA1403 SPI-based GPIO.
- MVEBU driver now supports Armada 7K and 8K.
- LP87565 PMIC GPIO.
- Renesas R-CAR R8A7743 (RZ/G1M).
- The new IOT2040 8250 serial/GPIO also comes in through this
changeset.
Substantial driver changes:
- Seriously fix the Exar 8250 GPIO portions to work.
- The MCP23S08 was moved out to a pin control driver.
- Convert MEVEBU to use regmap for register access.
- Drop Vulcan support from the Broadcom driver.
- Serious cleanup and improvement of the mockup driver, giving us a
better test coverage.
Misc:
- Lots of janitorial clean up.
- A bunch of documentation fixes.
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Merge tag 'gpio-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v4.13 series.
Some administrativa:
I have a slew of 8250 serial patches and the new IOT2040 serial+GPIO
driver coming in through this tree, along with a whole bunch of Exar
8250 fixes. These are ACKed by Greg and also hit drivers/platform/*
where they are ACKed by Andy Shevchenko.
Speaking about drivers/platform/* there is also a bunch of ACPI stuff
coming through that route, again ACKed by Andy.
The MCP23S08 changes are coming in here as well. You already have the
commits in your tree, so this is just a result of sharing an immutable
branch between pin control and GPIO.
Core:
- Export add/remove for lookup tables so that modules can export GPIO
descriptor tables.
- Handle GPIO sleep states: it is now possible to flag that a GPIO
line may loose its state during suspend/resume of the system to
save power. This is used in the Wolfson Micro Arizona driver.
- ACPI-based GPIO was tightened up a lot around the edges.
- Use bitmap_fill() to speed up a loop.
New drivers:
- Exar XRA1403 SPI-based GPIO.
- MVEBU driver now supports Armada 7K and 8K.
- LP87565 PMIC GPIO.
- Renesas R-CAR R8A7743 (RZ/G1M).
- The new IOT2040 8250 serial/GPIO also comes in through this
changeset.
Substantial driver changes:
- Seriously fix the Exar 8250 GPIO portions to work.
- The MCP23S08 was moved out to a pin control driver.
- Convert MEVEBU to use regmap for register access.
- Drop Vulcan support from the Broadcom driver.
- Serious cleanup and improvement of the mockup driver, giving us a
better test coverage.
Misc:
- Lots of janitorial clean up.
- A bunch of documentation fixes"
* tag 'gpio-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (70 commits)
serial: exar: Add support for IOT2040 device
gpio-exar/8250-exar: Make set of exported GPIOs configurable
platform: Accept const properties
serial: exar: Factor out platform hooks
gpio-exar/8250-exar: Rearrange gpiochip parenthood
gpio: exar: Fix iomap request
gpio-exar/8250-exar: Do not even instantiate a GPIO device for Commtech cards
serial: uapi: Add support for bus termination
gpio: rcar: Add R8A7743 (RZ/G1M) support
gpio: gpio-wcove: Fix GPIO control register offset calculation
gpio: lp87565: Add support for GPIO
gpio: dwapb: fix missing first irq for edgeboth irq type
MAINTAINERS: Take maintainership for GPIO ACPI support
gpio: exar: Fix reading of directions and values
gpio: exar: Allocate resources on behalf of the platform device
gpio-exar/8250-exar: Fix passing in of parent PCI device
gpio: mockup: use devm_kcalloc() where applicable
gpio: mockup: add myself as author
gpio: mockup: improve the error message
gpio: mockup: don't return magic numbers from probe()
...
|
|
|
Linus Torvalds
|
dddd564dbb |
This time we've got one core change to introduce a bulk clk_get API,
some new clk drivers and updates for old ones. The diff is pretty
spread out across a handful of different SoC clk drivers for Broadcom, TI,
Qualcomm, Renesas, Rockchip, Samsung, and Allwinner, mostly due to the
introduction of new drivers.
Core:
- New clk bulk get APIs
- Clk divider APIs gained the ability to consider a different parent than
the current one
New Drivers:
- Renesas r8a779{0,1,2,4} CPG/MSSR
- TI Keystone SCI firmware controlled clks and OMAP4 clkctrl
- Qualcomm IPQ8074 SoCs
- Cortina Systems Gemini (SL3516/CS3516)
- Rockchip rk3128 SoCs
- Allwinner A83T clk control units
- Broadcom Stingray SoCs
- CPU clks for Mediatek MT8173/MT2701/MT7623 SoCs
Removed Drivers:
- Old non-DT version of the Realview clk driver
Updates:
- Renesas Kconfig/Makefile cleanups
- Amlogic CEC EE clk support
- Improved Armada 7K/8K cp110 clk support
- Rockchip clk id exposing, critical clk markings
- Samsung converted to clk_hw registration APIs
- Fixes for Samsung exynos5420 audio clks
- USB2 clks for Hisilicon hi3798cv200 SoC and video/camera clks for hi3660
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This time we've got one core change to introduce a bulk clk_get API,
some new clk drivers and updates for old ones. The diff is pretty
spread out across a handful of different SoC clk drivers for Broadcom,
TI, Qualcomm, Renesas, Rockchip, Samsung, and Allwinner, mostly due to
the introduction of new drivers.
Core:
- New clk bulk get APIs
- Clk divider APIs gained the ability to consider a different parent
than the current one
New Drivers:
- Renesas r8a779{0,1,2,4} CPG/MSSR
- TI Keystone SCI firmware controlled clks and OMAP4 clkctrl
- Qualcomm IPQ8074 SoCs
- Cortina Systems Gemini (SL3516/CS3516)
- Rockchip rk3128 SoCs
- Allwinner A83T clk control units
- Broadcom Stingray SoCs
- CPU clks for Mediatek MT8173/MT2701/MT7623 SoCs
Removed Drivers:
- Old non-DT version of the Realview clk driver
Updates:
- Renesas Kconfig/Makefile cleanups
- Amlogic CEC EE clk support
- Improved Armada 7K/8K cp110 clk support
- Rockchip clk id exposing, critical clk markings
- Samsung converted to clk_hw registration APIs
- Fixes for Samsung exynos5420 audio clks
- USB2 clks for Hisilicon hi3798cv200 SoC and video/camera clks for
hi3660"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (147 commits)
clk: gemini: Read status before using the value
clk: scpi: error when clock fails to register
clk: at91: Add sama5d2 suspend/resume
gpio: dt-bindings: Add documentation for gpio controllers on Armada 7K/8K
clk: keystone: TI_SCI_PROTOCOL is needed for clk driver
clk: samsung: audss: Fix silent hang on Exynos4412 due to disabled EPLL
clk: uniphier: provide NAND controller clock rate
clk: hisilicon: add usb2 clocks for hi3798cv200 SoC
clk: Add Gemini SoC clock controller
clk: iproc: Remove __init marking on iproc_pll_clk_setup()
clk: bcm: Add clocks for Stingray SOC
dt-bindings: clk: Extend binding doc for Stingray SOC
clk: mediatek: export cpu multiplexer clock for MT8173 SoCs
clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs
clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't work
clk: renesas: cpg-mssr: Use of_device_get_match_data() helper
clk: hi6220: add acpu clock
clk: zx296718: export I2S mux clocks
clk: imx7d: create clocks behind rawnand clock gate
clk: hi3660: Set PPLL2 to 2880M
...
|
|
|
Linus Torvalds
|
a9ceea2674 |
ARM: 64-bit DT updates
Device-tree updates for arm64 platforms. For the first time I can
remember, this is actually larger than the corresponding branch for
32-bit platforms overall, though that has more individual changes.
A significant portion this time is due to added machine support:
- Initial support for the Realtek RTD1295 SoC, along with the Zidoo
X9S set-top-box
- Initial support for Actions Semi S900 and the Bubblegum-96
single-board-cёmputer.
- Rockchips support for the rk3399-Firefly single-board-computer
gets added, this one stands out for being relatively fast,
affordable and well₋supported, compared to many boards that
only fall into one or two of the above categories.
- Mediatek gains support for the mt6797 mobile-phone SoC platform
and corresponding evaluation board.
- Amlogic board support gets added for the NanoPi K2 and S905x
LibreTech CC single-board computers and the R-Box Pro set-top-box
- Allwinner board support gets added for the OrangePi Win,
Orangepi Zero Plus 2, NanoPi NEO2 and Orange Pi Prime single
board computers and the SoPine system-on-module.
- Renesas board support for Salvator-XS and H3ULCB
automotive development systems.
- Socionext Uniphier board support for LD11-global and LD20-global,
whatever those may be.
- Broadcom adds support for the new Stingray communication processor
in its iProc family, along with two reference boards.
Other updates include:
- For the hisicon platform, support for Hi3660-Hikey960 gets
extended significantly.
- Lots of smaller updates for Renesas, Amlogic, Rockchip, UniPhier,
Broadcom, Allwinner, Hisilicon, Qualcomm, Marvell, and NXP.
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Arnd Bergmann:
"Device-tree updates for arm64 platforms. For the first time I can
remember, this is actually larger than the corresponding branch for
32-bit platforms overall, though that has more individual changes.
A significant portion this time is due to added machine support:
- Initial support for the Realtek RTD1295 SoC, along with the Zidoo
X9S set-top-box
- Initial support for Actions Semi S900 and the Bubblegum-96
single-board-cёmputer.
- Rockchips support for the rk3399-Firefly single-board-computer gets
added, this one stands out for being relatively fast, affordable
and well₋supported, compared to many boards that only fall into one
or two of the above categories.
- Mediatek gains support for the mt6797 mobile-phone SoC platform and
corresponding evaluation board.
- Amlogic board support gets added for the NanoPi K2 and S905x
LibreTech CC single-board computers and the R-Box Pro set-top-box
- Allwinner board support gets added for the OrangePi Win, Orangepi
Zero Plus 2, NanoPi NEO2 and Orange Pi Prime single board computers
and the SoPine system-on-module.
- Renesas board support for Salvator-XS and H3ULCB automotive
development systems.
- Socionext Uniphier board support for LD11-global and LD20-global,
whatever those may be.
- Broadcom adds support for the new Stingray communication processor
in its iProc family, along with two reference boards.
Other updates include:
- For the hisicon platform, support for Hi3660-Hikey960 gets extended
significantly.
- Lots of smaller updates for Renesas, Amlogic, Rockchip, UniPhier,
Broadcom, Allwinner, Hisilicon, Qualcomm, Marvell, and NXP"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (243 commits)
ARM64: dts: marvell: armada37xx: Fix timer interrupt specifiers
Revert "arm64: dts: marvell: add dma-mask in crypto nodes for 7k/8k"
arm64: dts: mediatek: don't include missing file
ARM64: dts: meson-gxl: Add Libre Technology CC support
dt-bindings: arm: amlogic: Add Libre Technology CC board
dt-bindings: add Libre Technology vendor prefix
arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K
arm64: dts: zte: Use - instead of @ for DT OPP entries
arm64: dts: marvell: add gpio support for Armada 7K/8K
arm64: dts: marvell: add pinctrl support for Armada 7K/8K
arm64: dts: marvell: use new binding for the system controller on cp110
arm64: dts: marvell: remove *-clock-output-names on cp110
arm64: dts: marvell: use new bindings for xor clocks on ap806
arm64: dts: marvell: mcbin: enable the mdio node
arm64: dts: Add Actions Semi S900 and Bubblegum-96
dt-bindings: Add vendor prefix for uCRobotics
arm64: dts: marvell: add xmdio nodes for 7k/8k
arm64: dts: marvell: add a comment on the cp110 slave node status
arm64: dts: marvell: remove cpm crypto nodes from dts files
arm64: dts: marvell: cp110: enable the crypto engine at the SoC level
...
|
|
|
Linus Torvalds
|
e854711291 |
ARM: SoC driver updates
- New SoC specific drivers
- NVIDIA Tegra PM Domain support for newer SoCs (Tegra186 and later)
based on the "BPMP" firmware
- Clocksource and system controller drivers for the newly added
Action Semi platforms (both arm and arm64).
- Reset subsystem, merged through arm-soc by tradition:
- New drivers for Altera Stratix10, TI Keystone and Cortina Gemini SoCs
- Various subsystem-wide cleanups
- Updates for existing SoC-specific drivers
- TI GPMC (General Purpose Memory Controller)
- Mediatek "scpsys" system controller support for MT6797
- Broadcom "brcmstb_gisb" bus arbitrer
- ARM SCPI firmware
- Renesas "SYSC" system controller
One more driver update was submitted for the Freescale/NXP DPAA
data path acceleration that has previously been used on PowerPC
chips. I ended up postponing the merge until some API questions
for its unusual MMIO access are resolved.
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"New SoC specific drivers:
- NVIDIA Tegra PM Domain support for newer SoCs (Tegra186 and later)
based on the "BPMP" firmware
- Clocksource and system controller drivers for the newly added
Action Semi platforms (both arm and arm64).
Reset subsystem, merged through arm-soc by tradition:
- New drivers for Altera Stratix10, TI Keystone and Cortina Gemini
SoCs
- Various subsystem-wide cleanups
Updates for existing SoC-specific drivers
- TI GPMC (General Purpose Memory Controller)
- Mediatek "scpsys" system controller support for MT6797
- Broadcom "brcmstb_gisb" bus arbitrer
- ARM SCPI firmware
- Renesas "SYSC" system controller
One more driver update was submitted for the Freescale/NXP DPAA data
path acceleration that has previously been used on PowerPC chips. I
ended up postponing the merge until some API questions for its unusual
MMIO access are resolved"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits)
clocksource: owl: Add S900 support
clocksource: Add Owl timer
soc: renesas: rcar-sysc: Use GENPD_FLAG_ALWAYS_ON
firmware: tegra: Fix locking bugs in BPMP
soc/tegra: flowctrl: Fix error handling
soc/tegra: bpmp: Implement generic PM domains
soc/tegra: bpmp: Update ABI header
PM / Domains: Allow overriding the ->xlate() callback
soc: brcmstb: enable drivers for ARM64 and BMIPS
soc: renesas: Rework Kconfig and Makefile logic
reset: Add the TI SCI reset driver
dt-bindings: reset: Add TI SCI reset binding
reset: use kref for reference counting
soc: qcom: smsm: Improve error handling, quiesce probe deferral
cpufreq: scpi: use new scpi_ops functions to remove duplicate code
firmware: arm_scpi: add support to populate OPPs and get transition latency
dt-bindings: reset: Add reset manager offsets for Stratix10
memory: omap-gpmc: add error message if bank-width property is absent
memory: omap-gpmc: make dts snippet include semicolon
reset: Add a Gemini reset controller
...
|
|
|
Linus Torvalds
|
1849f800fb |
ARM: Device-tree updates
Device-tree continues to see lots of updates. The majority of patches
here are smaller changes for new hardware on existing platforms, and
there are a few larger changes worth pointing out.
New machines:
- The new Action Semi S500 platform is added along with initial
support for the LeMaker Guitar board.
- STM32 gains support for three new boards: stm32h743-disco,
stm32f746-disco, and stm32f769-disco, along with new device
support for the existing stm32f429 boards.
- Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H
with 10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module
plus board.
- On Marvell "mvebu", we gain support for the Linksys WRT3200ACM
wireless router.
- For NXP i.MX, we gain support for the Gateworks Ventana GW5600
and the Technexion Pico i.MX7D single-board computers.
- The BeagleBone Blue is added for OMAP, it's the latest variation
of the popular Beaglebone Black single-board computer.
- The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards
are added, these are the latest variations of a seemingly endless
supply of similar single-board computers.
Other updates:
- Linus Walleij improves support for the "Faraday" based SoC platforms
from various SoC makers (Moxart, Aspeed, Gemini)
- The ARM Mali GPU is now describe on Rockchips SoCs
- Mediatek MT7623 is extended significantly, making it much
more useful.
- Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom,
Allwinner, Qualcomm, iMX
- For Amlogic, the clock support is extended a lot on meson8b.
- We now build the devicetree file for the Raspberry Pi 3 on 32-bit
ARM, in addition to the existing ARM64 support, to help users
wanting to run a 32-bit system on it.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM device-tree updates from Arnd Bergmann:
"Device-tree continues to see lots of updates. The majority of patches
here are smaller changes for new hardware on existing platforms, and
there are a few larger changes worth pointing out.
New machines:
- The new Action Semi S500 platform is added along with initial
support for the LeMaker Guitar board.
- STM32 gains support for three new boards: stm32h743-disco,
stm32f746-disco, and stm32f769-disco, along with new device support
for the existing stm32f429 boards.
- Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H with
10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module plus
board.
- On Marvell "mvebu", we gain support for the Linksys WRT3200ACM
wireless router.
- For NXP i.MX, we gain support for the Gateworks Ventana GW5600 and
the Technexion Pico i.MX7D single-board computers.
- The BeagleBone Blue is added for OMAP, it's the latest variation of
the popular Beaglebone Black single-board computer.
- The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards are
added, these are the latest variations of a seemingly endless
supply of similar single-board computers.
Other updates:
- Linus Walleij improves support for the "Faraday" based SoC
platforms from various SoC makers (Moxart, Aspeed, Gemini)
- The ARM Mali GPU is now describe on Rockchips SoCs
- Mediatek MT7623 is extended significantly, making it much more
useful.
- Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom,
Allwinner, Qualcomm, iMX
- For Amlogic, the clock support is extended a lot on meson8b.
- We now build the devicetree file for the Raspberry Pi 3 on 32-bit
ARM, in addition to the existing ARM64 support, to help users
wanting to run a 32-bit system on it"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (345 commits)
ARM: dts: socfpga: set the i2c frequency
ARM: dts: socfpga: Add second ethernet alias to VINING FPGA
ARM: dts: socfpga: Drop LED node from VINING FPGA
ARM: dts: socfpga: Remove I2C EEPROMs from VINING FPGA
ARM: dts: socfpga: Enable QSPI support on VINING FPGA
ARM: dts: socfpga: Fix the ethernet clock phandle
ARM: pxa: Use - instead of @ for DT OPP entries
ARM: dts: owl-s500: Add SPS node
ARM: dts: owl-s500: Set CPU enable-method
dt-bindings: arm: cpus: Add S500 enable-method
ARM: dts: Add Actions Semi S500 and LeMaker Guitar
dt-bindings: arm: Document Actions Semi S900
dt-bindings: timer: Document Owl timer
ARM: dts: imx6q-cm-fx6: add sdio wifi/bt nodes
dt-bindings: arm: Document Actions Semi S500
dt-bindings: Add vendor prefix for Actions Semi
ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM
ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango)
ARM: dts: armada-385-linksys: fixup button node names
ARM: dts: armada-385-linksys: group pins in pinctrl
...
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Linus Torvalds
|
8ca302e9c6 |
ARM: SoC platform updates
SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
for a few platforms:
- Andres Färber adds initial support for the Actions Semi S500 (a.k.a.
'owl') platform, a close relative of the S900 platform he adds for arm64.
- in mach-omap2, we remove more legacy code
- Rockchips gains support for the RV1108 SoC designed for camera
applications.
- For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)
- Minor updates for other platforms, including davinci, s3c64xx,
prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
for a few platforms:
- Andres Färber adds initial support for the Actions Semi S500 (aka
'owl') platform, a close relative of the S900 platform he adds for
arm64.
- in mach-omap2, we remove more legacy code
- Rockchips gains support for the RV1108 SoC designed for camera
applications.
- For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)
- Minor updates for other platforms, including davinci, s3c64xx,
prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
ARM: owl: smp: Drop bogus holding pen
ARM: owl: Drop custom machine
ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3
soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating
soc: actions: Add Owl SPS
dt-bindings: power: Add Owl SPS power domains
MAINTAINERS: Update Actions Semi section with SPS
ARM: owl: Implement CPU enable-method for S500
MAINTAINERS: Add Actions Semi Owl section
ARM: Prepare Actions Semi S500
ARM: socfpga: Increase max number of GPIOs
ARM: stm32: Introduce MACH_STM32F469 flag
ARM: prima2: remove redundant select CPU_V7
ARM: davinci: fix const warnings
ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON
ARM: OMAP4: hwmod_data: add SHAM crypto accelerator
ARM: OMAP4: hwmod data: add des
ARM: OMAP4: hwmod data: add aes2
ARM: OMAP4: hwmod data: add aes1
ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe()
...
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Linus Torvalds
|
f4dd029ee0 |
Char/Misc patches for 4.13-rc1
Here is the "big" char/misc driver patchset for 4.13-rc1. Lots of stuff in here, a large thunderbolt update, w1 driver header reorg, the new mux driver subsystem, google firmware driver updates, and a raft of other smaller things. Full details in the shortlog. All of these have been in linux-next for a while with the only reported issue being a merge problem with this tree and the jc-docs tree in the w1 documentation area. The fix should be obvious for what to do when it happens, if not, we can send a follow-up patch for it afterward. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWVpXKA8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ynLrQCdG9SxRjAbOd6pT9Fr2NAzpUG84YsAoLw+I3iO EMi60UXWqAFJbtVMS9Aj =yrSq -----END PGP SIGNATURE----- Merge tag 'char-misc-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc updates from Greg KH: "Here is the "big" char/misc driver patchset for 4.13-rc1. Lots of stuff in here, a large thunderbolt update, w1 driver header reorg, the new mux driver subsystem, google firmware driver updates, and a raft of other smaller things. Full details in the shortlog. All of these have been in linux-next for a while with the only reported issue being a merge problem with this tree and the jc-docs tree in the w1 documentation area" * tag 'char-misc-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (147 commits) misc: apds990x: Use sysfs_match_string() helper mei: drop unreachable code in mei_start mei: validate the message header only in first fragment. DocBook: w1: Update W1 file locations and names in DocBook mux: adg792a: always require I2C support nvmem: rockchip-efuse: add support for rk322x-efuse nvmem: core: add locking to nvmem_find_cell nvmem: core: Call put_device() in nvmem_unregister() nvmem: core: fix leaks on registration errors nvmem: correct Broadcom OTP controller driver writes w1: Add subsystem kernel public interface drivers/fsi: Add module license to core driver drivers/fsi: Use asynchronous slave mode drivers/fsi: Add hub master support drivers/fsi: Add SCOM FSI client device driver drivers/fsi/gpio: Add tracepoints for GPIO master drivers/fsi: Add GPIO based FSI master drivers/fsi: Document FSI master sysfs files in ABI drivers/fsi: Add error handling for slave drivers/fsi: Add tracepoints for low-level operations ... |