From "Chip Errata for the i.MX 6Dual/6Quad"
ERR006687 ENET: Only the ENET wake-up interrupt request can wake the
system from Wait mode.
The ENET block generates many interrupts. Only one of these interrupt lines
is connected to the General Power Controller (GPC) block, but a logical OR
of all of the ENET interrupts is connected to the General Interrupt Controller
(GIC). When the system enters Wait mode, a normal RX Done or TX Done does not
wake up the system because the GPC cannot see this interrupt. This impacts
performance of the ENET block because its interrupts are serviced only when
the chip exits Wait mode due to an interrupt from some other wake-up source.
Adding MX6QDL_PAD_GPIO_6__ENET_IRQ is the 1st step to
workaround this problem.
The input reg is set to 0x3c to set IOMUX_OBSRV_MUX1 to ENET_IRQ.
The mux reg value is 0x11, so that the observable mux is routed to
this pin and to the gpio controller(sion bit). These magic values
come from Ranjani Vaidyanathan's patch:
"ENGR00257847-1 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is active"
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Note that the fec driver code currently hard-codes an active-low
reset, regardless of the flags in the device tree.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instead of calling the regulator for the ARM core as 'cpu', let's rename it
as 'vddarm', so that we keep a better consistency with the other internal
regulators:
vdd1p1: 800 <--> 1375 mV at 1100 mV
vdd3p0: 2800 <--> 3150 mV at 3000 mV
vdd2p5: 2000 <--> 2750 mV at 2400 mV
vddarm: 725 <--> 1450 mV at 1150 mV
vddpu: 725 <--> 1450 mV at 1150 mV
vddsoc: 725 <--> 1450 mV at 1200 mV
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds support for imx6qdl-sabresd board's power
key, the key is named "SW1" on board, press it can wake up
system from suspend.
Add a new pinctrl entry for gpio keys and move all gpio
keys pin to this entry.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Device tree for iMX6SL doesn't have an existing cpu frequency table
as well as the VDDSOC/PU.
Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Thermal sensor needs pll3_usb_otg when measuring temperature,
so we need to pass clk info to thermal driver.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds cpufreq dts for i.mx6dl to support cpufreq driver.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
i.MX6Q needs to update vddarm, vddsoc/pu regulators when cpu freq
is changed, each setpoint has different voltage, so we need to
pass vddarm, vddsoc/pu's freq-voltage info from dts together.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
According to datasheet, VDD_CACHE_CAP must not exceed VDDARM_CAP
by more than 200mV, as all of i.MX6Q boards' VDD_CACHE_CAP currently
are connected to VDDSOC_CAP, so we need to follow this rule by
increasing VDDARM_CAP's voltage.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add file imx6q-nitrogen6x.dts,
imx6dl-nitrogen6x.dts,
imx6qdl-nitrogen6x.dtsi
And add board to makefile.
Eric Nelson created a web page to show the
differences between Nitrogen6x and Sabre Lite boards.
http://boundarydevices.com/differences-sabre-lite-nitrogen6x
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
KEY_COL4 is over-current for usbotg on Sabre Lite.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
GPIO16 is used for I2C3, not ENET_REF_CLK.
Also, remove pull-ups from tx pins, and ENET_MDIO
which has an external pull-up.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Set the data delays to min, and clock delays to max
because the traces are equal length on pcb.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Explicitly sets the pad GPIO_0 (sys_mclk) to 0x030b0.
Before this patch, it has the value 0x130b0 if using mainline u-boot.
So this patch also removes hysteresis. The 100k pulldown remains so
that a disabled clock will be low.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch moves pin EIM_D23 (phy reset) from pinctrl_hog to pinctrl_enet.
It also explicitly sets the pad to 0x000b0.
Before this patch, it has the value 0x1b0b0 if using mainline u-boot.
So this patch also removes hysteresis and a 100K pullup since the pad
is always an output.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch moves pin EIM_D22(power enable) from pinctrl_hog to pinctrl_usbotg.
It also explicitly sets the pad to 0x000b0, which is also the value
that it has before this patch if using mainline u-boot.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch moves pin EIM_D19 (CS) from pinctrl_hog to pinctrl_ecspi1.
It also explicitly sets the pad to 0x000b1.
Before this patch, it has the value 0x100b1 if using mainline u-boot.
So this patch also removes hysteresis since the pad is always an output.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch moves pin SD3_DAT5/4 (CD/WP) from pinctrl_hog to pinctrl_usdhc3.
It also explicitly sets the pad SD3_DAT5 to 0x1b0b0, which is also the value
that it has before this patch if using mainline u-boot.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch moves pin NANDF_D6 (CD) from pinctrl_hog to pinctrl_usdhc4.
It also explicitly sets the pad to 0x1b0b0, which is also the value
that it has before this patch if using mainline u-boot.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds spdif support for imx6qdl-sabreauto by inserting the cpu dai
node with pinctrl group and its ASoC dai link node.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
On Sabre Lite usdhc4 is a micro sd slot, which has no
write protect.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Uart1 is available on Sabre Lite.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This makes the structure of Sabre Lite board files the same
as Sabre SD board files so that they are easier to compare.
By this, I mean that the majority of the file imx6q-sabrelite.dts
is moved to imx6qdl-sabrelite.dtsi so that both imx6q-sabrelite.dts
and imx6dl-sabrelite.dts can include it.
Now Sabre Lite has support for Dual Lite/Solo
processors.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
In order to follow the standard approach used on other imx dts files, place the
'status' node as the last one.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Make the interrupts node slightly more readable.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Make the interrupts node slightly more readable.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Make the interrupts node slightly more readable.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Make the interrupts node slightly more readable.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The solo/duallite reference manual does not mention
this setting, but it works.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
We must specify the value of audmux pinctrl if we want to use pinctrl_pm().
Thus change bypass value 0x80000000 to what we exactly need.
This patch also seperately unset PUE bit for TXD so that IOMUX won't pull
up/down the pin after turning into tristate. When we use SSI normal mode to
playback monaural audio via I2S signal, there'd be a pulled curve occur to
its signal at the second slot if setting PUE bit for TXD. And it will make
the second channel to play a constant noise. So by keeping the signal level
in the second slot, we can get a constant high level signal (-1) or a low
level one (0).
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
MX6QDL_PAD_EIM_D23__GPIO3_IO23 appears twice in the hog pin group.
Remove one of the occurrences.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add Ethernet support for imx6q udoo board.
Tested by booting a kernel via NFS.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The device tree specification recommends that generic name should be
used for nodes. So instead of naming those fixed regulator nodes
arbitrarily, let's use the generic name 'regulator@num' for those nodes.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that
boards that share the same pinctrl setting do not have to define it time
and time again in <board>.dts. However, along with the devices and use
cases being added continuously, the pinctrl setting nodes under iomuxc
becomes more than expected. This bloats device tree blob for particular
board unnecessarily since only a small subset of those pinctrl setting
nodes will be used by the board. It impacts not only the DTB file size
but also the run-time device tree lookup efficiency.
The patch moves all the pinctrl data into individual boards as needed.
With the changes, the pinctrl setting nodes becomes local to particular
board, and it makes no sense to continue numbering the setting for
given peripheral. Thus, all the pinctrl phandler name gets updated to
have only peripheral name in there.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that
boards that share the same pinctrl setting do not have to define it time
and time again in <board>.dts. However, along with the devices and use
cases being added continuously, the pinctrl setting nodes under iomuxc
becomes more than expected. This bloats device tree blob for particular
board unnecessarily since only a small subset of those pinctrl setting
nodes will be used by the board. It impacts not only the DTB file size
but also the run-time device tree lookup efficiency.
The patch moves all the pinctrl data into individual boards as needed.
With the changes, the pinctrl setting nodes becomes local to particular
board, and it makes no sense to continue numbering the setting for
given peripheral. Thus, all the pinctrl phandler name gets updated to
have only peripheral name in there.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add initial support for cm-fx6 module.
cm-fx6 is a module based on mx6q SoC with the following features:
- Up to 4GB of DDR3
- 1 LCD/DVI output port
- 1 HDMI output port
- 2 LVDS LCD ports
- Gigabit Ethernet
- Analog Audio
- CAN
- SATA
- NAND
- PCIE
This patch allows to boot up the module, configures the serial console,
the Ethernet adapter and the heartbeat led.
cm-fx6 is embedded inside the Utilite computer.
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The Gateworks Ventana product family consists of several baseboard designs
based on the Freescale i.MX6 family of processors. Each baseboard has a
different set of possible features.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Typically nodes are disabled by default and enabled when needed.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Here's a set of patches for (hopefully) -rc1. Some of them are fixes,
but a good number of them also do things such as enable new drivers in
the defconfigs for platforms that have such devices, increases coverage
of the multiplatform defconfig and some DTS changes that plumbs up some
of the devices that now have bindings and driver support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJS7VYsAAoJEIwa5zzehBx3FKIQAIVIkjlKAtvRpg+P/BYWigXq
6jG2xuBhwf1Yciu70ttvfRnR9bGJc+0o5w/qjr7ARSFp7GkDlWXtIwj+1EwGSEES
hB/f2GcBfNLJOI0rHvvudz+7HlpiyfB6iMj3U25hnpShrSTxbOHDC6pU6pYjUzBy
T1AYTmfa0vwuy9TNodOr4dVYlbJc3YA0V2sBTusXDFwm03XTdCd7E7RJIr/MRDEN
96PtaNrfstmxeTjN0NBuL2IdsZNR2mn/cgWTL1lVqVE8+z7QyvmPDqmWD5iCVQaM
+6mJbXL4jzM1CyB8Qf89sNtTaFVjwbgvbtuljPv/7q/jhf2rvixaMzywCv28FjB+
uJCaLh1r/HiR61tlw0yX3ixPdKFJqyWV9vF5+uuwmEQCCPpFWGzTcNaZ7NRiYzEt
yqt1ZRDhEAli8iHt96LxMwLIklaDGvuxLtHsv4a5djEoaO/yqRTNZXDjwIsIzkpD
N8vUwPf7Pnw+3/5iGVTQdZaPzmrNjqTOLwz0s7ys2avVsRsNNi68hMuIj+qrNlzu
/tJhhh0u9SONRM3c6D9mtrZPD7Gs8QgMbT9TyZ2/ILQKuo4wO9F1GDN93MjZI5oq
1rX/QUeYItWQamzHGmI8ZlAx4YlsxxB90eJ8CaG2F8sVtumklrFRb43Vf9NRsyo/
XDrjoS/cdi7PAO0wemkg
=ymAC
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Here's a set of patches for (hopefully) -rc1. Some of them are fixes,
but a good number of them also do things such as enable new drivers in
the defconfigs for platforms that have such devices, increases
coverage of the multiplatform defconfig and some DTS changes that
plumbs up some of the devices that now have bindings and driver
support.
The commit dates are recent; we've mostly collected these fixes in the
last few days but I also had to rebuild the branch yesterday to sort
out some internal conflicts which reset the timestamps. The changes
should have been tested by each platform maintainer already (and few
of them have cross-platform impact) so I'm personally not too
concerned by it at this time"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
ARM: multi_v7_defconfig: remove redundant entries and re-enable TI_EDMA
ARM: multi_v7_defconfig: add mvebu drivers
clocksource: kona: Add basic use of external clock
drivers: bus: fix CCI driver kcalloc call parameters swap
ARM: dts: bcm28155-ap: Fix Card Detection GPIO
ARM: multi_v7_defconfig: Select CONFIG_AT803X_PHY
ARM: keystone: config: fix build warning when CONFIG_DMADEVICES is not set
MAINTAINERS: ARM: SiRF: use regex patterns to involve all SiRF drivers
ARM: dts: zynq: Add SDHCI nodes
ARM: hisi: don't select SMP
ARM: tegra: rebuild tegra_defconfig to add DEBUG_FS
ARM: multi_v7: copy most options from tegra_defconfig
ARM: iop32x: fix power off handling for the EM7210 board
ARM: integrator: restore static map on the CP
ARM: msm_defconfig: Enable MSM clock drivers
ARM: dts: msm: Add clock controller nodes and hook into uart
ARM: OMAP4+: move errata initialization to omap4_pm_init_early
ARM: OMAP4460: cpuidle: Extend PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD on cpuidle
ARM: mvebu: fix compilation warning on Armada 370 (i.e. non-SMP)
ARM: shmobile: r8a7790.dtsi: ficx i2c[0-3] clock reference
...
TI_EDMA fell out of automatically selected options in the multi_v7
defconfig due to a select being removed from the davinci Kconfig entry. So
we need to re-enable explicitly to not regress some platforms.
The rest is just the result of running 'make multi_v7_defconfig + make
savedefconfig' to remove entries that are no longer needed due to changed
dependencies/selects or defaults.
Signed-off-by: Olof Johansson <olof@lixom.net>
Recent boot farm testing has highlighted some issues with mvebu and
multiplatform kernels. Increase the test coverage so we can discover
these issues earlier.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Olof Johansson <olof@lixom.net>
The board schematic states that the "SD_CARD_DET_N gets pulled to GND
when card is inserted" so the polarity has been updated to active low.
Polarity is now specified with a GPIO define instead of a magic number.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Correct i2c clock references for r8a7790 (R-Car H2) SoC
The error was introduced in 72197ca7a1 ("ARM: shmobile: r8a7790:
Reference clocks") which is queued up for v3.14.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQIcBAABAgAGBQJS4b3VAAoJENfPZGlqN0++soAP/33lDjmDES2ACWrgJ0EHX9h3
H0w36L6aOvL2vaTSZYmTnf0VrzuHUpiTmGCWZSboumxaiKZfcPYqKii+SV+OdHjW
Ua5Cz6v+F8uqlz/Ziw04rKneUpdg+EGYIrR2tjLP11BNAJCqSJ3bjcR8TbmUfeTN
yyzEiN7MqWoT+JiUub9PBZkI/yIylqHnDc/a4vcNjKMmN5Y5CTEKLNgwmt2Cpv5F
1XLNPcUwvwLOnKFCReoXey1OqJLODfDLhwsuyQInkF5U3FZNT91Ly6WG1KTJuBEE
Acx7AAppoOAdH2Y85TQv67qPIuY/tOeosSXtrV/F2lOIe2xccGPcrMNtYydrQdfg
u8pmz+Nwr3I4Vwg1fx/Jqdht0nqv53B4BKqgSGkemubdJAPFct78yt8LJuDfCiZD
TCETU/N0pO/LDF+SL81/kLNmVlogCQwZmeLg4v/vImZ08pyeriOeOJPCfHE+cUur
sUofqrJKZubVWQOrfojjOni2YDgM5p3CnrpLocLC1rtclYRIp6UpnbEGShQovW2Y
j+fBBz+APlIcLn6bBvaEVIkcnmwqH7jHUUn0/3R6sx8m+706FEqhYA2QRTDTCH2R
TQ58MNzzN7wlkXYa5RGbjiEoQfqlzFFzfx+6SfvOTmDLlia5M1vG+mXLR7EmLgnG
9ZRGxBwTIuTTOEttxep/
=UVOK
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-fixes2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Second Round of Renesas ARM Based SoC DT Fixes for v3.14
Correct i2c clock references for r8a7790 (R-Car H2) SoC
The error was introduced in 72197ca7a1 ("ARM: shmobile: r8a7790:
Reference clocks") which is queued up for v3.14.
* tag 'renesas-dt-fixes2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790.dtsi: ficx i2c[0-3] clock reference
Signed-off-by: Olof Johansson <olof@lixom.net>
Troy Kisky