Commit Graph

74 Commits

Author SHA1 Message Date
Sasha Levitskiy cdc1cfb3e5 Cleanup: warning fixit.
bootable/recovery has a dependent commit: I9adb470b04e4301989d128c9c3097b21b4dea431

Change-Id: Icf23e659265d71d5226d527c2b40cfbc132320ee
Signed-off-by: Sasha Levitskiy <sanek@google.com>
2014-04-11 16:15:46 -07:00
Kévin PETIT d82b2a3eb4 Fix the build for NEON in libpixelflinger
ARCH_ARM_HAVE_NEON is only ever defined to true, so test for that.
For the NEON function to be used, the file has to include
machine/cpu-features.h so that __ARM_HAVE_NEON is defined.

Change-Id: I0db196b39c493092415859e009531fcff6fc1e8b
Signed-off-by: Kévin PETIT <kevin.petit@arm.com>
2014-03-06 15:53:27 +00:00
Kévin PETIT c2659e72d7 Fix the handling of CodeCache return codes in pixelflinger
The error condition was not correctly detected: an error was
reported by checking that the index returned by CodeCache::cache
was non-zero. This did not work because this function can return
a positive value on success.

Change-Id: I1f90125ee62ab277b80da4dfb341733cd6e8e86a
Signed-off-by: Kévin PETIT <kevin.petit@arm.com>
2014-02-26 11:39:13 +00:00
Ashok Bhat 3078b13b98 Fix compiler warnings in libpixelflinger
Change-Id: I6a5708ae6bc934b196d59d81a6cd550b05ed704f
Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
2014-02-20 14:21:55 -08:00
Colin Cross f88fb1fade pixelflinger: support multilib builds
Use the LOCAL_*_arch variables to support building for 32-bit and
64-bit at the same time.

Change-Id: Ibef8044e8b6500a6aa111320eb35bcdaf51ad064
2014-02-11 13:36:14 -08:00
Colin Cross 32ea4a895c pixelflinger: use __builtin___clear_cache instead of cacheflush
cacheflush doesn't exist on LP64 any more, and gcc's
__builtin___clear_cache is better in every way.  Use it instead.

Change-Id: Ibbf6facbdefc15b6dda51d014e1c44fb7aa2b17d
2014-02-11 13:32:44 -08:00
Elliott Hughes 81eb357b58 Use <stdint.h> for INT32_MIN and INT32_MAX.
Bug: 12708004
Change-Id: I99f222b2db1d128abf6ffbf7173a5aaff48f8e85
2014-01-24 16:08:03 -08:00
Colin Cross d4146e6091 system/core: rename aarch64 target to arm64
Rename aarch64 build targets to arm64.  The gcc toolchain is still
aarch64.

Change-Id: Ia92d8a50824e5329cf00fd6f4f92eae112b7f3a3
2014-01-23 18:01:14 -08:00
Ashok Bhat 658f89dc5c Pixelflinger: Add AArch64 support to pixelflinger JIT.
See the comment-block at the top of Aarch64Assembler.cpp
for overview on how AArch64 support has been implemented

In addition, this commit contains
[x] AArch64 inline asm versions of gglmul series of
    functions and a new unit test bench to test the
    functions

[x] Assembly implementations of scanline_col32cb16blend
    and scanline_t32cb16blend for AArch64, with unit
    test bench

Change-Id: I915cded9e1d39d9a2a70bf8a0394b8a0064d1eb4
Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
2013-12-12 17:30:13 +00:00
Ashok Bhat bfc6dc4ca8 Pixelflinger: Support for handling 64-bit addresses in GGL Assembler
GGLAssembler assumes addresses to be 32-bit and uses ARM 32-bit
instructions to load/store/manipulate addresses. To support, 64-bit
architectures, following changes has been done

1. ARMAssemblerInterface has been extended to support four new
   operations ADDR_LDR, ADDR_STR, ADDR_SUB, ADDR_ADD. Base class
   implements these virtual functions to use 32bit  equivalent
   function. This avoids existing 32-bit Assembler backend
   implementations like ARMAssembler and MIPSAssembler  from
   mapping the new functions to existing equivalent routines.
   This also allows 64-bit Architectures like AArch64 to override
   the function in their assembler backend implementations.

2. GGLAssembler code (spread over GGLAssembler.cpp, GGLAssembler.h
   and texturing.cpp) has been changed to use the new operations
   for address operations.

Change-Id: I3d7eace4691e3e47cef737d97ac67ce6ef4fb18d
Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
2013-12-12 17:30:13 +00:00
Ashok Bhat d10afb1748 Pixelflinger: Fix issue of pointers being stored in ints
Pixelflinger's code makes assumptions, at certain places,
that pointers can be stored as ints. This patch makes use
of uintptr_t wherever pointers are stored as int or cast
to int.

Change-Id: Ie76f425cbc82ac038a747f77a95bd31774f4a8e8
Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
2013-12-12 17:30:13 +00:00
synergy dev cd2fe3b49b libpixelflinger: do not use anonymous structs
Avoiding the use of gnu extensions improves code portability

Change-Id: Ie9e94e3ce030f52a22997f8a48de1e6c1c549894
2013-11-25 18:54:56 +00:00
Ying Wang 083b5ccba3 Add liblog
Bug: 8580410
Change-Id: Iab3a9b4307f207c14a04a922cc7350c54e60e9ad
2013-04-09 22:03:45 -07:00
Mathias Agopian 9857d99eec move tinyutils into its own namespace
I was fed-up with the constant conflicts in Eclipse
with the "libutils" version.

Also fix a few copyright notices.

Change-Id: I8ffcb845af4b5d0d178f5565f64dfcfbfa27fcd6
2013-04-01 16:50:43 -07:00
Ian Rogers 04b5ac36a5 Remove unnecessary compiler pragma.
With dlmalloc 2.8.6 the compiler pragmas to suppress warnings are not
necessary.
Also fix compiler warning about redefinition of LOG_TAG.

Depends upon: https://android-review.googlesource.com/42351

Change-Id: I50f70be31f4bd994b09083e722759464476c70b3
2012-08-29 18:13:14 -07:00
Jean-Baptiste Queru c3c5358b94 Merge "Add MIPS support to pixelflinger." 2012-08-27 14:22:22 -07:00
Ian Rogers 2d13791ce7 Upgrade to dlmalloc 2.8.5.
Remove mspace functionality from cutils.
Directly declare mspace from dlmalloc in code flinger's code cache, and
manage without using morecore.

Depends upon: https://android-review.googlesource.com/41717

Change-Id: If927254febd4414212c690f16509ef2ee1b44b44
2012-08-20 15:30:35 -07:00
Paul Lind 2bc2b79278 Add MIPS support to pixelflinger.
See the comment-block at the top of MIPSAssembler.cpp for
implementation overview.

Change-Id: Id492c10610574af8c89c38d19e12fafc3652c28a
2012-08-13 11:41:15 -07:00
Duane Sand 068f9f3bf9 Add Mips support to libpixelflinger
Change-Id: Ib81cb01b8d90ed1afa1fd54b3cc009d7fec0f814
2012-05-30 11:48:53 -07:00
Bhanu Chetlapalli 65026f980a Prevent bit shifting if num bits is negative
Causes OpenGL Software Renderer to generate incorrect window
coordinates on MIPS & possibly x86

Change-Id: I3c51b6a5a4e6af75e9b31d9d47e4e4d894825888
Signed-off-by: Bhanu Chetlapalli <bhanu@mips.com>
2012-01-25 14:45:30 -08:00
Steve Block 2ac29d0250 Rename LOG_ASSERT to ALOG_ASSERT
Change-Id: Iff15ac5e7ab226d437c08d23f18fd54e6793e65c
2012-01-17 17:56:20 +00:00
Steve Block 8aeb6e244a Rename (IF_)LOGE(_IF) to (IF_)ALOGE(_IF)
Change-Id: I52fce957db06c281e2618daa4e2ecba19974f2eb
2012-01-17 17:56:20 +00:00
Steve Block 4f07a1f826 Rename (IF_)LOGW(_IF) to (IF_)ALOGW(_IF)
Change-Id: I6c2a1d56dadb7e5c69e478f4d8c7d9f2127db2af
2012-01-17 17:56:20 +00:00
Steve Block 4163b45949 Rename (IF_)LOGI(_IF) to (IF_)ALOGI(_IF)
Change-Id: I929ea38bc6fe6efeefa7870c8e7e4c19cd0029b3
2012-01-17 17:56:19 +00:00
Steve Block 9786ec417f Rename (IF_)LOGD(_IF) to (IF_)ALOGD(_IF)
Change-Id: Ia0476219b71ece949595515ee07ea072ed349d73
2012-01-17 17:56:19 +00:00
Steve Block 66b68757f6 Rename (IF_)LOGV(_IF) to (IF_)ALOGV(_IF)
Change-Id: Ia9a357dec5ad12eea93fd03401a3b02b38e4e94f
2012-01-17 17:56:18 +00:00
Vladimir Chtchetkine dccddee972 Fix DEBUG_NEEDS usage
Change-Id: Ic107c60080e55e1f9092f20fe3bd55e7592ca9fd
2011-08-29 10:02:24 -07:00
David 'Digit' Turner 39764f41a5 pixelflinger: Provide more scanline shortcut functions.
This patch adds a dozen more "shortcut" scanline-processing functions
to pixel-flingers. All of them avoid using the JIT for the corresponding
operation (on ARM), or using the generic and _extremely_ slow 'scanline'
function (on x86, where there is no JIT).

The shortcuts were selected by running the system under emulation
(build full_x86-eng, then launch emulator-x86), and correspond to
operations that are in use when using the system's typical UI features.

This makes it much more responsive and amenable to testing most
applications, at least those that don't use OpenGL ES heavily.

Note that HW OpenGLES emulation is under completion and should solve this
problem entirely, though is not there yet.

Change-Id: I9c73ba21ad158d6cc5532fabe7ed2419e00ecb3f
2011-04-16 13:13:58 +02:00
Jean-Baptiste Queru 720fdebb4c am 4906db21: Merge "codeflinger: Correct misleading comment of STM instruction"
* commit '4906db21e041327042b87122b233e1f150618334':
  codeflinger: Correct misleading comment of STM instruction
2010-11-23 11:02:51 -08:00
Jean-Baptiste Queru 4906db21e0 Merge "codeflinger: Correct misleading comment of STM instruction" 2010-11-23 10:52:14 -08:00
Jean-Baptiste Queru 287a9585dc am 8e0e372a: Set PROT_EXEC on the whole pixelflinger code cache.
Merge commit '8e0e372a388434a0553810e2b958e59a26a6bd96' into gingerbread-plus-aosp

* commit '8e0e372a388434a0553810e2b958e59a26a6bd96':
  Set PROT_EXEC on the whole pixelflinger code cache.
2010-10-15 06:08:04 -07:00
Jean-Baptiste Queru 8e0e372a38 Set PROT_EXEC on the whole pixelflinger code cache.
The pointer difference between word pointers is a number
of words, and it needs to be multiplied by the size of a word
to get a proper byte size.

Without this, we tend to see crashes when the code crosses
a page boundary.

Bug: 3026204
Bug: 3097482
Change-Id: I37776d26d5afcdb1da71680de02fbb95e6548371
2010-10-14 14:29:00 -07:00
Jean-Baptiste Queru 468f23ac2f Manual merge
Change-Id: I849703a709fe4bf9ea7181268221d9b648b2e73d
2010-08-25 09:54:23 -07:00
Dave Butcher ef18202fd1 Copyright message changed
Change requested by Android Open Source Project
2010-08-19 12:31:34 +01:00
Kan-Ru Chen a7e96642a9 codeflinger: Correct misleading comment of STM instruction
According to the ARM Architecture Reference Manual, the comment on
STM instruction should be in reverse order.

Change-Id: I4af852a0478798ff7b02ab9c29c68e320ff78696
Signed-off-by: Kan-Ru Chen <kanru@0xlab.org>
2010-08-18 17:02:34 +08:00
Jean-Baptiste Queru 838336fa61 am 5dfd90e5: Merge "pixelflinger: Fix function naming typo: gglBitBlti"
Merge commit '5dfd90e5c79774d9981d25ab4defbd1e1f652c34' into gingerbread-plus-aosp

* commit '5dfd90e5c79774d9981d25ab4defbd1e1f652c34':
  pixelflinger: Fix function naming typo: gglBitBlti
2010-08-17 07:48:42 -07:00
Jean-Baptiste Queru 933dc05929 am 4ea1a52b: Merge "libpixelflinger: ARMv6 specific objects are not used. Remove."
Merge commit '4ea1a52b1bbbd6e78c5909c75d773416108f5b84' into gingerbread-plus-aosp

* commit '4ea1a52b1bbbd6e78c5909c75d773416108f5b84':
  libpixelflinger: ARMv6 specific objects are not used.  Remove.
2010-08-17 07:48:41 -07:00
Jim Huang 7caef0c70f am 6090dacd: libpixelflinger: Move codeflinger test function to test-opengl-codegen
Merge commit '6090dacd1894429baaf13f7b30b2f6e9e2c1617f' into gingerbread-plus-aosp

* commit '6090dacd1894429baaf13f7b30b2f6e9e2c1617f':
  libpixelflinger: Move codeflinger test function to test-opengl-codegen
2010-08-17 07:48:36 -07:00
Jean-Baptiste Queru 5dfd90e5c7 Merge "pixelflinger: Fix function naming typo: gglBitBlti" 2010-08-16 09:33:04 -07:00
Jean-Baptiste Queru 4ea1a52b1b Merge "libpixelflinger: ARMv6 specific objects are not used. Remove." 2010-08-16 09:25:13 -07:00
Jim Huang 6e1a9430e8 pixelflinger: Fix function naming typo: gglBitBlti
From the functionality, the function gglBitBlti() implemented bit-block
(image) transfer operation in which several bitmaps are combined into
one using a raster operator.  Renaming to gglBitBlit() should be
explicit.

Change-Id: I23886623b5421131cf7c7bfb8ec67c3809566c93
2010-08-10 02:56:47 +08:00
Jim Huang 9fcaff4621 libpixelflinger: ARMv6 specific objects are not used. Remove.
This patch attempts to remove the generation of libpixelflinger_armv6,
which contains the ARMv6 specific object - rotate90CW_4x4_16v6.o.  But,
libpixelflinger_armv6 is not actually used by other projects.

Change-Id: I0e26fa2cf8b4dacfd208dd4279539c3e5b07580e
2010-08-10 02:18:53 +08:00
Jim Huang 6090dacd18 libpixelflinger: Move codeflinger test function to test-opengl-codegen
There is no need to include codeflinger test function in
libpixelflinger.  Instead, it should exist in test-opengl-codegen.

Change-Id: Ic5b0bd1f754b2ac678d4e16565568c70ceb8d325
2010-08-10 02:07:38 +08:00
The Android Open Source Project 67e6fcd195 merge from froyo-plus-aosp
Change-Id: Ie231effb4d9dfd63aa98ec08b269c31ce32aa1c0
2010-06-21 11:50:42 -07:00
The Android Open Source Project f0d644fa23 merge from open-source master
Change-Id: I1ec0e1e702687697eccd3bf6c4f115cac85e382c
2010-06-15 11:23:52 -07:00
Jean-Baptiste Queru 62f4d86b7c Fix build - cpu-features is ARM-specific
Change-Id: I66521f279545a249e3dcb645914f7b66f23cef21
2010-06-15 08:19:56 -07:00
Martyn Capewell 4dc1fa8e8d Adds support for UBFX to JIT and Disassembler
This introduces UBFX instruction generation abilities to the Pixelflinger JIT,
and also modifies the component extraction function to generate the
instruction.

The extract function contains defines to prevent generation of UBFX on pre-v7
cores. The JIT itself retains the ability to produce the instruction even on
v5/6.

This patch only generates UBFX when MOV, AND or BIC can't be used. Based on
the TRM, this appears to be faster on A9 than using UBFX in all cases.

On startup, Pixelflinger JITs three chunks of code. UBFX improves these as
follows:

 00000077:03515104_00000000_00000000
 (Blends a single colour into an RGB565 buffer.)
  Before: 27 inst/pixel, After: 24 inst/pixel, Improvement: 12.5%
 00000077:03545404_00000A01_00000000
 (Blends RGBA8888 texture into an RGB565 buffer using alpha.)
  Before: 30 inst/pixel, After: 27 inst/pixel, Improvement: 11.1%
 00000077:03545404_00000A04_00000000
 (Blends RGB565 texture into an RGB565 buffer using alpha.)
  Before: 29 inst/pixel, After: 27 inst/pixel, Improvement: 7.4%
2010-05-28 17:04:36 +01:00
Nick Kralevich beeeee705b Allow pixelflinger to work when NX (No Execute) is enabled.
Instead of allocating memory from the (non executable) heap,
allocate memory using mspace and ensure that we use mprotect
to mark it as PROT_EXEC.  This allows pixelflinger to
continue to work even when NX protections are enabled.

Testing: Using the ApiDemos market app, verify that
Apidemos -> Graphics -> OpenGL ES -> GLSurfaceView
works when "adb shell setprop debug.egl.hw 0" is set.

Change-Id: Ib569cd2543c6fa25688ee76325a712bc2347450b
2010-05-07 16:35:52 -07:00
The Android Open Source Project 44bce0fb57 merge from open-source master
Change-Id: Ic4cfffc3c8d465224b062cef7bcfe5827441057c
2010-05-05 16:03:52 -07:00
Bruce Beare 2bef93cc20 cpu-features.h is only available for ARM
Change-Id: I1e8001a1875bfd9cebfe18dfd757556b55c8213c
2010-05-04 15:35:09 -07:00