2008-02-01 18:05:41 +08:00
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2009-04-14 02:45:38 +08:00
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#include "qemu-common.h"
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2011-09-18 04:00:27 +08:00
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/* Target word size (must be identical to pointer size). */
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#if UINTPTR_MAX == UINT32_MAX
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# define TCG_TARGET_REG_BITS 32
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#elif UINTPTR_MAX == UINT64_MAX
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# define TCG_TARGET_REG_BITS 64
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#else
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# error Unknown pointer size for tcg target
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#endif
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2008-02-01 18:05:41 +08:00
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#if TCG_TARGET_REG_BITS == 32
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typedef int32_t tcg_target_long;
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typedef uint32_t tcg_target_ulong;
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#define TCG_PRIlx PRIx32
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#define TCG_PRIld PRId32
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#elif TCG_TARGET_REG_BITS == 64
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typedef int64_t tcg_target_long;
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typedef uint64_t tcg_target_ulong;
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#define TCG_PRIlx PRIx64
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#define TCG_PRIld PRId64
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#else
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#error unsupported
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#endif
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2012-03-03 06:30:03 +08:00
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#include "tcg-target.h"
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#include "tcg-runtime.h"
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2008-02-01 18:05:41 +08:00
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#if TCG_TARGET_NB_REGS <= 32
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typedef uint32_t TCGRegSet;
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#elif TCG_TARGET_NB_REGS <= 64
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typedef uint64_t TCGRegSet;
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#else
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#error unsupported
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#endif
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2011-08-18 05:11:46 +08:00
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#if TCG_TARGET_REG_BITS == 32
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2013-02-20 15:51:49 +08:00
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/* Turn some undef macros into false macros. */
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2011-08-18 05:11:46 +08:00
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#define TCG_TARGET_HAS_div_i64 0
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#define TCG_TARGET_HAS_div2_i64 0
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#define TCG_TARGET_HAS_rot_i64 0
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#define TCG_TARGET_HAS_ext8s_i64 0
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#define TCG_TARGET_HAS_ext16s_i64 0
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#define TCG_TARGET_HAS_ext32s_i64 0
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#define TCG_TARGET_HAS_ext8u_i64 0
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#define TCG_TARGET_HAS_ext16u_i64 0
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#define TCG_TARGET_HAS_ext32u_i64 0
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#define TCG_TARGET_HAS_bswap16_i64 0
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#define TCG_TARGET_HAS_bswap32_i64 0
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#define TCG_TARGET_HAS_bswap64_i64 0
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#define TCG_TARGET_HAS_neg_i64 0
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#define TCG_TARGET_HAS_not_i64 0
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#define TCG_TARGET_HAS_andc_i64 0
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#define TCG_TARGET_HAS_orc_i64 0
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#define TCG_TARGET_HAS_eqv_i64 0
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#define TCG_TARGET_HAS_nand_i64 0
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#define TCG_TARGET_HAS_nor_i64 0
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#define TCG_TARGET_HAS_deposit_i64 0
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2012-09-22 01:13:34 +08:00
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#define TCG_TARGET_HAS_movcond_i64 0
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2013-02-20 15:51:52 +08:00
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#define TCG_TARGET_HAS_add2_i64 0
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#define TCG_TARGET_HAS_sub2_i64 0
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#define TCG_TARGET_HAS_mulu2_i64 0
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2013-02-20 15:51:53 +08:00
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#define TCG_TARGET_HAS_muls2_i64 0
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2013-02-20 15:51:49 +08:00
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/* Turn some undef macros into true macros. */
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#define TCG_TARGET_HAS_add2_i32 1
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#define TCG_TARGET_HAS_sub2_i32 1
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#define TCG_TARGET_HAS_mulu2_i32 1
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2011-08-18 05:11:46 +08:00
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#endif
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2011-09-30 00:52:11 +08:00
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#ifndef TCG_TARGET_deposit_i32_valid
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#define TCG_TARGET_deposit_i32_valid(ofs, len) 1
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#endif
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#ifndef TCG_TARGET_deposit_i64_valid
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#define TCG_TARGET_deposit_i64_valid(ofs, len) 1
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#endif
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2011-08-18 05:11:46 +08:00
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/* Only one of DIV or DIV2 should be defined. */
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#if defined(TCG_TARGET_HAS_div_i32)
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#define TCG_TARGET_HAS_div2_i32 0
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#elif defined(TCG_TARGET_HAS_div2_i32)
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#define TCG_TARGET_HAS_div_i32 0
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#endif
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#if defined(TCG_TARGET_HAS_div_i64)
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#define TCG_TARGET_HAS_div2_i64 0
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#elif defined(TCG_TARGET_HAS_div2_i64)
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#define TCG_TARGET_HAS_div_i64 0
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#endif
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2010-03-20 02:12:29 +08:00
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typedef enum TCGOpcode {
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2010-06-04 01:40:04 +08:00
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#define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
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2008-02-01 18:05:41 +08:00
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#include "tcg-opc.h"
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#undef DEF
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NB_OPS,
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2010-03-20 02:12:29 +08:00
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} TCGOpcode;
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2008-02-01 18:05:41 +08:00
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#define tcg_regset_clear(d) (d) = 0
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#define tcg_regset_set(d, s) (d) = (s)
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#define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
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2009-10-29 05:44:34 +08:00
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#define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
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#define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
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2008-02-01 18:05:41 +08:00
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#define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
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#define tcg_regset_or(d, a, b) (d) = (a) | (b)
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#define tcg_regset_and(d, a, b) (d) = (a) & (b)
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#define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
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#define tcg_regset_not(d, a) (d) = ~(a)
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typedef struct TCGRelocation {
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struct TCGRelocation *next;
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int type;
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uint8_t *ptr;
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tcg_target_long addend;
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} TCGRelocation;
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typedef struct TCGLabel {
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2008-05-20 00:32:18 +08:00
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int has_value;
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2008-02-01 18:05:41 +08:00
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union {
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tcg_target_ulong value;
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TCGRelocation *first_reloc;
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} u;
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} TCGLabel;
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typedef struct TCGPool {
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struct TCGPool *next;
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2008-05-20 00:32:18 +08:00
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int size;
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uint8_t data[0] __attribute__ ((aligned));
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2008-02-01 18:05:41 +08:00
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} TCGPool;
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#define TCG_POOL_CHUNK_SIZE 32768
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#define TCG_MAX_LABELS 512
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2008-03-17 03:21:07 +08:00
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#define TCG_MAX_TEMPS 512
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2008-02-01 18:05:41 +08:00
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2008-05-10 18:52:05 +08:00
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/* when the size of the arguments of a called function is smaller than
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this value, they are statically allocated in the TB stack frame */
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#define TCG_STATIC_CALL_ARGS_SIZE 128
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2010-03-20 02:36:30 +08:00
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typedef enum TCGType {
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TCG_TYPE_I32,
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TCG_TYPE_I64,
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TCG_TYPE_COUNT, /* number of different types */
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2008-02-01 18:05:41 +08:00
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2010-06-03 08:26:55 +08:00
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/* An alias for the size of the host register. */
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2008-02-01 18:05:41 +08:00
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#if TCG_TARGET_REG_BITS == 32
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2010-06-03 08:26:55 +08:00
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TCG_TYPE_REG = TCG_TYPE_I32,
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2010-03-20 02:36:30 +08:00
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#else
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2010-06-03 08:26:55 +08:00
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TCG_TYPE_REG = TCG_TYPE_I64,
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2010-03-20 02:36:30 +08:00
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#endif
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2010-06-03 08:26:55 +08:00
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/* An alias for the size of the native pointer. We don't currently
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support any hosts with 64-bit registers and 32-bit pointers. */
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TCG_TYPE_PTR = TCG_TYPE_REG,
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/* An alias for the size of the target "long", aka register. */
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2010-03-20 02:36:30 +08:00
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#if TARGET_LONG_BITS == 64
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TCG_TYPE_TL = TCG_TYPE_I64,
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2008-02-01 18:05:41 +08:00
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#else
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2010-03-20 02:36:30 +08:00
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TCG_TYPE_TL = TCG_TYPE_I32,
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2008-02-01 18:05:41 +08:00
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#endif
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2010-03-20 02:36:30 +08:00
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} TCGType;
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2008-02-01 18:05:41 +08:00
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typedef tcg_target_ulong TCGArg;
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2011-10-12 01:43:15 +08:00
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/* Define a type and accessor macros for variables. Using a struct is
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2008-02-04 03:56:33 +08:00
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nice because it gives some level of type safely. Ideally the compiler
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be able to see through all this. However in practice this is not true,
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2011-11-22 18:06:22 +08:00
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especially on targets with braindamaged ABIs (e.g. i386).
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2008-02-04 03:56:33 +08:00
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We use plain int by default to avoid this runtime overhead.
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Users of tcg_gen_* don't need to know about any of this, and should
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2008-11-17 22:43:54 +08:00
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treat TCGv as an opaque type.
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2011-05-22 20:02:40 +08:00
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In addition we do typechecking for different types of variables. TCGv_i32
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2008-11-17 22:43:54 +08:00
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and TCGv_i64 are 32/64-bit variables respectively. TCGv and TCGv_ptr
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are aliases for target_ulong and host pointer sized values respectively.
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*/
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2008-02-04 03:56:33 +08:00
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2012-10-31 15:04:25 +08:00
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#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
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/* Macros/structures for qemu_ld/st IR code optimization:
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TCG_MAX_HELPER_LABELS is defined as same as OPC_BUF_SIZE in exec-all.h. */
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#define TCG_MAX_QEMU_LDST 640
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typedef struct TCGLabelQemuLdst {
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int is_ld:1; /* qemu_ld: 1, qemu_st: 0 */
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int opc:4;
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int addrlo_reg; /* reg index for low word of guest virtual addr */
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int addrhi_reg; /* reg index for high word of guest virtual addr */
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int datalo_reg; /* reg index for low word to be loaded or stored */
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int datahi_reg; /* reg index for high word to be loaded or stored */
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int mem_index; /* soft MMU memory index */
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uint8_t *raddr; /* gen code addr of the next IR of qemu_ld/st IR */
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uint8_t *label_ptr[2]; /* label pointers to be updated */
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} TCGLabelQemuLdst;
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#endif
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2009-07-27 22:13:04 +08:00
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#ifdef CONFIG_DEBUG_TCG
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2009-04-14 02:45:38 +08:00
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#define DEBUG_TCGV 1
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#endif
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2008-02-04 03:56:33 +08:00
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#ifdef DEBUG_TCGV
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typedef struct
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{
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2008-12-08 01:16:42 +08:00
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int i32;
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2008-11-17 22:43:54 +08:00
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} TCGv_i32;
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2008-02-04 03:56:33 +08:00
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2008-11-17 22:43:54 +08:00
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typedef struct
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{
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2008-12-08 01:16:42 +08:00
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int i64;
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2008-11-17 22:43:54 +08:00
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} TCGv_i64;
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2011-05-27 20:12:13 +08:00
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typedef struct {
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int iptr;
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} TCGv_ptr;
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2008-11-17 22:43:54 +08:00
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#define MAKE_TCGV_I32(i) __extension__ \
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({ TCGv_i32 make_tcgv_tmp = {i}; make_tcgv_tmp;})
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#define MAKE_TCGV_I64(i) __extension__ \
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({ TCGv_i64 make_tcgv_tmp = {i}; make_tcgv_tmp;})
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2011-05-27 20:12:13 +08:00
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#define MAKE_TCGV_PTR(i) __extension__ \
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({ TCGv_ptr make_tcgv_tmp = {i}; make_tcgv_tmp; })
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2008-12-08 01:16:42 +08:00
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#define GET_TCGV_I32(t) ((t).i32)
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#define GET_TCGV_I64(t) ((t).i64)
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2011-05-27 20:12:13 +08:00
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#define GET_TCGV_PTR(t) ((t).iptr)
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2008-02-04 03:56:33 +08:00
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#if TCG_TARGET_REG_BITS == 32
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2008-11-17 22:43:54 +08:00
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#define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
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#define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
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2008-02-04 03:56:33 +08:00
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#endif
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#else /* !DEBUG_TCGV */
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2008-11-17 22:43:54 +08:00
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typedef int TCGv_i32;
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typedef int TCGv_i64;
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2011-05-27 20:12:13 +08:00
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#if TCG_TARGET_REG_BITS == 32
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#define TCGv_ptr TCGv_i32
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#else
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#define TCGv_ptr TCGv_i64
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#endif
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2008-11-17 22:43:54 +08:00
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#define MAKE_TCGV_I32(x) (x)
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#define MAKE_TCGV_I64(x) (x)
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2011-05-27 20:12:13 +08:00
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#define MAKE_TCGV_PTR(x) (x)
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2008-11-17 22:43:54 +08:00
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#define GET_TCGV_I32(t) (t)
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#define GET_TCGV_I64(t) (t)
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2011-05-27 20:12:13 +08:00
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#define GET_TCGV_PTR(t) (t)
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2009-03-10 16:56:30 +08:00
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2008-02-04 03:56:33 +08:00
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#if TCG_TARGET_REG_BITS == 32
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2008-11-17 22:43:54 +08:00
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#define TCGV_LOW(t) (t)
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2008-02-04 03:56:33 +08:00
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#define TCGV_HIGH(t) ((t) + 1)
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#endif
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#endif /* DEBUG_TCGV */
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2009-03-10 18:29:45 +08:00
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#define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
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#define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
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2008-06-29 23:25:29 +08:00
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/* Dummy definition to avoid compiler warnings. */
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2008-11-17 22:43:54 +08:00
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#define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
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#define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
|
2008-06-29 23:25:29 +08:00
|
|
|
|
2012-12-08 05:07:17 +08:00
|
|
|
#define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
|
|
|
|
#define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
|
|
|
|
|
2008-02-01 18:05:41 +08:00
|
|
|
/* call flags */
|
2012-10-10 03:53:08 +08:00
|
|
|
/* Helper does not read globals (either directly or through an exception). It
|
|
|
|
implies TCG_CALL_NO_WRITE_GLOBALS. */
|
|
|
|
#define TCG_CALL_NO_READ_GLOBALS 0x0010
|
|
|
|
/* Helper does not write globals */
|
|
|
|
#define TCG_CALL_NO_WRITE_GLOBALS 0x0020
|
|
|
|
/* Helper can be safely suppressed if the return value is not used. */
|
|
|
|
#define TCG_CALL_NO_SIDE_EFFECTS 0x0040
|
|
|
|
|
|
|
|
/* convenience version of most used call flags */
|
|
|
|
#define TCG_CALL_NO_RWG TCG_CALL_NO_READ_GLOBALS
|
|
|
|
#define TCG_CALL_NO_WG TCG_CALL_NO_WRITE_GLOBALS
|
|
|
|
#define TCG_CALL_NO_SE TCG_CALL_NO_SIDE_EFFECTS
|
|
|
|
#define TCG_CALL_NO_RWG_SE (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
|
|
|
|
#define TCG_CALL_NO_WG_SE (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
|
|
|
|
|
2008-05-22 22:59:57 +08:00
|
|
|
/* used to align parameters */
|
2008-11-17 22:43:54 +08:00
|
|
|
#define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1)
|
2008-05-22 22:59:57 +08:00
|
|
|
#define TCG_CALL_DUMMY_ARG ((TCGArg)(-1))
|
|
|
|
|
2012-11-02 15:29:53 +08:00
|
|
|
/* Conditions. Note that these are laid out for easy manipulation by
|
|
|
|
the functions below:
|
2012-09-25 05:21:40 +08:00
|
|
|
bit 0 is used for inverting;
|
|
|
|
bit 1 is signed,
|
|
|
|
bit 2 is unsigned,
|
|
|
|
bit 3 is used with bit 0 for swapping signed/unsigned. */
|
2008-02-01 18:05:41 +08:00
|
|
|
typedef enum {
|
2012-09-25 05:21:40 +08:00
|
|
|
/* non-signed */
|
|
|
|
TCG_COND_NEVER = 0 | 0 | 0 | 0,
|
|
|
|
TCG_COND_ALWAYS = 0 | 0 | 0 | 1,
|
|
|
|
TCG_COND_EQ = 8 | 0 | 0 | 0,
|
|
|
|
TCG_COND_NE = 8 | 0 | 0 | 1,
|
|
|
|
/* signed */
|
|
|
|
TCG_COND_LT = 0 | 0 | 2 | 0,
|
|
|
|
TCG_COND_GE = 0 | 0 | 2 | 1,
|
|
|
|
TCG_COND_LE = 8 | 0 | 2 | 0,
|
|
|
|
TCG_COND_GT = 8 | 0 | 2 | 1,
|
2008-02-01 18:05:41 +08:00
|
|
|
/* unsigned */
|
2012-09-25 05:21:40 +08:00
|
|
|
TCG_COND_LTU = 0 | 4 | 0 | 0,
|
|
|
|
TCG_COND_GEU = 0 | 4 | 0 | 1,
|
|
|
|
TCG_COND_LEU = 8 | 4 | 0 | 0,
|
|
|
|
TCG_COND_GTU = 8 | 4 | 0 | 1,
|
2008-02-01 18:05:41 +08:00
|
|
|
} TCGCond;
|
|
|
|
|
2010-02-10 04:33:09 +08:00
|
|
|
/* Invert the sense of the comparison. */
|
2010-01-08 02:15:20 +08:00
|
|
|
static inline TCGCond tcg_invert_cond(TCGCond c)
|
|
|
|
{
|
|
|
|
return (TCGCond)(c ^ 1);
|
|
|
|
}
|
|
|
|
|
2010-02-10 04:33:09 +08:00
|
|
|
/* Swap the operands in a comparison. */
|
|
|
|
static inline TCGCond tcg_swap_cond(TCGCond c)
|
|
|
|
{
|
2012-09-25 05:21:40 +08:00
|
|
|
return c & 6 ? (TCGCond)(c ^ 9) : c;
|
2010-02-10 04:33:09 +08:00
|
|
|
}
|
|
|
|
|
2012-09-25 05:21:41 +08:00
|
|
|
/* Create an "unsigned" version of a "signed" comparison. */
|
2009-12-27 17:09:41 +08:00
|
|
|
static inline TCGCond tcg_unsigned_cond(TCGCond c)
|
|
|
|
{
|
2012-09-25 05:21:40 +08:00
|
|
|
return c & 2 ? (TCGCond)(c ^ 6) : c;
|
2009-12-27 17:09:41 +08:00
|
|
|
}
|
|
|
|
|
2012-09-25 05:21:41 +08:00
|
|
|
/* Must a comparison be considered unsigned? */
|
2012-09-25 05:21:39 +08:00
|
|
|
static inline bool is_unsigned_cond(TCGCond c)
|
|
|
|
{
|
2012-09-25 05:21:40 +08:00
|
|
|
return (c & 4) != 0;
|
2012-09-25 05:21:39 +08:00
|
|
|
}
|
|
|
|
|
2012-09-25 05:21:41 +08:00
|
|
|
/* Create a "high" version of a double-word comparison.
|
|
|
|
This removes equality from a LTE or GTE comparison. */
|
|
|
|
static inline TCGCond tcg_high_cond(TCGCond c)
|
|
|
|
{
|
|
|
|
switch (c) {
|
|
|
|
case TCG_COND_GE:
|
|
|
|
case TCG_COND_LE:
|
|
|
|
case TCG_COND_GEU:
|
|
|
|
case TCG_COND_LEU:
|
|
|
|
return (TCGCond)(c ^ 8);
|
|
|
|
default:
|
|
|
|
return c;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-02-01 18:05:41 +08:00
|
|
|
#define TEMP_VAL_DEAD 0
|
|
|
|
#define TEMP_VAL_REG 1
|
|
|
|
#define TEMP_VAL_MEM 2
|
|
|
|
#define TEMP_VAL_CONST 3
|
|
|
|
|
|
|
|
/* XXX: optimize memory layout */
|
|
|
|
typedef struct TCGTemp {
|
|
|
|
TCGType base_type;
|
|
|
|
TCGType type;
|
|
|
|
int val_type;
|
|
|
|
int reg;
|
|
|
|
tcg_target_long val;
|
|
|
|
int mem_reg;
|
|
|
|
tcg_target_long mem_offset;
|
|
|
|
unsigned int fixed_reg:1;
|
|
|
|
unsigned int mem_coherent:1;
|
|
|
|
unsigned int mem_allocated:1;
|
2011-04-28 23:20:26 +08:00
|
|
|
unsigned int temp_local:1; /* If true, the temp is saved across
|
2008-05-26 01:24:00 +08:00
|
|
|
basic blocks. Otherwise, it is not
|
2011-04-28 23:20:26 +08:00
|
|
|
preserved across basic blocks. */
|
2008-05-24 01:33:39 +08:00
|
|
|
unsigned int temp_allocated:1; /* never used for code gen */
|
|
|
|
/* index of next free temp of same base type, -1 if end */
|
|
|
|
int next_free_temp;
|
2008-02-01 18:05:41 +08:00
|
|
|
const char *name;
|
|
|
|
} TCGTemp;
|
|
|
|
|
|
|
|
typedef struct TCGHelperInfo {
|
2008-05-23 00:08:32 +08:00
|
|
|
tcg_target_ulong func;
|
2008-02-01 18:05:41 +08:00
|
|
|
const char *name;
|
|
|
|
} TCGHelperInfo;
|
|
|
|
|
|
|
|
typedef struct TCGContext TCGContext;
|
|
|
|
|
|
|
|
struct TCGContext {
|
|
|
|
uint8_t *pool_cur, *pool_end;
|
2012-03-02 17:22:17 +08:00
|
|
|
TCGPool *pool_first, *pool_current, *pool_first_large;
|
2008-02-01 18:05:41 +08:00
|
|
|
TCGLabel *labels;
|
|
|
|
int nb_labels;
|
|
|
|
int nb_globals;
|
|
|
|
int nb_temps;
|
2008-05-26 01:24:00 +08:00
|
|
|
/* index of free temps, -1 if none */
|
|
|
|
int first_free_temp[TCG_TYPE_COUNT * 2];
|
2008-02-01 18:05:41 +08:00
|
|
|
|
|
|
|
/* goto_tb support */
|
|
|
|
uint8_t *code_buf;
|
2012-09-17 23:28:52 +08:00
|
|
|
uintptr_t *tb_next;
|
2008-02-01 18:05:41 +08:00
|
|
|
uint16_t *tb_next_offset;
|
|
|
|
uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
|
|
|
|
|
2008-05-26 01:24:00 +08:00
|
|
|
/* liveness analysis */
|
2011-05-18 00:25:45 +08:00
|
|
|
uint16_t *op_dead_args; /* for each operation, each bit tells if the
|
|
|
|
corresponding argument is dead */
|
2012-10-10 03:53:07 +08:00
|
|
|
uint8_t *op_sync_args; /* for each operation, each bit tells if the
|
|
|
|
corresponding output argument needs to be
|
|
|
|
sync to memory. */
|
2008-05-26 01:24:00 +08:00
|
|
|
|
2008-02-01 18:05:41 +08:00
|
|
|
/* tells in which temporary a given register is. It does not take
|
|
|
|
into account fixed registers */
|
|
|
|
int reg_to_temp[TCG_TARGET_NB_REGS];
|
|
|
|
TCGRegSet reserved_regs;
|
|
|
|
tcg_target_long current_frame_offset;
|
|
|
|
tcg_target_long frame_start;
|
|
|
|
tcg_target_long frame_end;
|
|
|
|
int frame_reg;
|
|
|
|
|
|
|
|
uint8_t *code_ptr;
|
2012-10-05 02:29:02 +08:00
|
|
|
TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
|
2008-02-01 18:05:41 +08:00
|
|
|
|
|
|
|
TCGHelperInfo *helpers;
|
|
|
|
int nb_helpers;
|
|
|
|
int allocated_helpers;
|
2008-05-24 01:33:39 +08:00
|
|
|
int helpers_sorted;
|
2008-05-23 17:52:20 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_PROFILER
|
|
|
|
/* profiling info */
|
|
|
|
int64_t tb_count1;
|
|
|
|
int64_t tb_count;
|
|
|
|
int64_t op_count; /* total insn count */
|
|
|
|
int op_count_max; /* max insn per TB */
|
|
|
|
int64_t temp_count;
|
|
|
|
int temp_count_max;
|
|
|
|
int64_t del_op_count;
|
|
|
|
int64_t code_in_len;
|
|
|
|
int64_t code_out_len;
|
|
|
|
int64_t interm_time;
|
|
|
|
int64_t code_time;
|
|
|
|
int64_t la_time;
|
2012-09-06 22:47:13 +08:00
|
|
|
int64_t opt_time;
|
2008-05-23 17:52:20 +08:00
|
|
|
int64_t restore_count;
|
|
|
|
int64_t restore_time;
|
|
|
|
#endif
|
2011-03-07 05:39:53 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG_TCG
|
|
|
|
int temps_in_use;
|
2012-09-22 08:18:16 +08:00
|
|
|
int goto_tb_issue_mask;
|
2011-03-07 05:39:53 +08:00
|
|
|
#endif
|
2012-10-31 15:04:25 +08:00
|
|
|
|
2012-11-12 17:27:44 +08:00
|
|
|
uint16_t gen_opc_buf[OPC_BUF_SIZE];
|
|
|
|
TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
|
|
|
|
|
|
|
|
uint16_t *gen_opc_ptr;
|
|
|
|
TCGArg *gen_opparam_ptr;
|
2012-11-21 15:43:03 +08:00
|
|
|
target_ulong gen_opc_pc[OPC_BUF_SIZE];
|
|
|
|
uint16_t gen_opc_icount[OPC_BUF_SIZE];
|
|
|
|
uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
|
2012-11-12 17:27:44 +08:00
|
|
|
|
2013-02-01 02:47:22 +08:00
|
|
|
/* Code generation */
|
|
|
|
int code_gen_max_blocks;
|
|
|
|
uint8_t *code_gen_prologue;
|
|
|
|
uint8_t *code_gen_buffer;
|
|
|
|
size_t code_gen_buffer_size;
|
|
|
|
/* threshold to flush the translated code buffer */
|
|
|
|
size_t code_gen_buffer_max_size;
|
|
|
|
uint8_t *code_gen_ptr;
|
|
|
|
|
2013-02-01 02:47:23 +08:00
|
|
|
TBContext tb_ctx;
|
|
|
|
|
2012-10-31 15:04:25 +08:00
|
|
|
#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
|
|
|
|
/* labels info for qemu_ld/st IRs
|
|
|
|
The labels help to generate TLB miss case codes at the end of TB */
|
|
|
|
TCGLabelQemuLdst *qemu_ldst_labels;
|
|
|
|
int nb_qemu_ldst_labels;
|
|
|
|
#endif
|
2008-02-01 18:05:41 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
extern TCGContext tcg_ctx;
|
|
|
|
|
|
|
|
/* pool based memory allocation */
|
|
|
|
|
|
|
|
void *tcg_malloc_internal(TCGContext *s, int size);
|
|
|
|
void tcg_pool_reset(TCGContext *s);
|
|
|
|
void tcg_pool_delete(TCGContext *s);
|
|
|
|
|
|
|
|
static inline void *tcg_malloc(int size)
|
|
|
|
{
|
|
|
|
TCGContext *s = &tcg_ctx;
|
|
|
|
uint8_t *ptr, *ptr_end;
|
|
|
|
size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
|
|
|
|
ptr = s->pool_cur;
|
|
|
|
ptr_end = ptr + size;
|
|
|
|
if (unlikely(ptr_end > s->pool_end)) {
|
|
|
|
return tcg_malloc_internal(&tcg_ctx, size);
|
|
|
|
} else {
|
|
|
|
s->pool_cur = ptr_end;
|
|
|
|
return ptr;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void tcg_context_init(TCGContext *s);
|
2010-05-06 23:50:41 +08:00
|
|
|
void tcg_prologue_init(TCGContext *s);
|
2008-02-01 18:05:41 +08:00
|
|
|
void tcg_func_start(TCGContext *s);
|
|
|
|
|
2008-12-08 04:35:00 +08:00
|
|
|
int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf);
|
|
|
|
int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset);
|
2008-02-01 18:05:41 +08:00
|
|
|
|
|
|
|
void tcg_set_frame(TCGContext *s, int reg,
|
|
|
|
tcg_target_long start, tcg_target_long size);
|
2008-11-17 22:43:54 +08:00
|
|
|
|
|
|
|
TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
|
|
|
|
TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
|
|
|
|
const char *name);
|
|
|
|
TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
|
|
|
|
static inline TCGv_i32 tcg_temp_new_i32(void)
|
|
|
|
{
|
|
|
|
return tcg_temp_new_internal_i32(0);
|
|
|
|
}
|
|
|
|
static inline TCGv_i32 tcg_temp_local_new_i32(void)
|
|
|
|
{
|
|
|
|
return tcg_temp_new_internal_i32(1);
|
|
|
|
}
|
|
|
|
void tcg_temp_free_i32(TCGv_i32 arg);
|
|
|
|
char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
|
|
|
|
|
|
|
|
TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
|
|
|
|
TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
|
|
|
|
const char *name);
|
|
|
|
TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
|
|
|
|
static inline TCGv_i64 tcg_temp_new_i64(void)
|
2008-05-26 01:24:00 +08:00
|
|
|
{
|
2008-11-17 22:43:54 +08:00
|
|
|
return tcg_temp_new_internal_i64(0);
|
2008-05-26 01:24:00 +08:00
|
|
|
}
|
2008-11-17 22:43:54 +08:00
|
|
|
static inline TCGv_i64 tcg_temp_local_new_i64(void)
|
2008-05-26 01:24:00 +08:00
|
|
|
{
|
2008-11-17 22:43:54 +08:00
|
|
|
return tcg_temp_new_internal_i64(1);
|
2008-05-26 01:24:00 +08:00
|
|
|
}
|
2008-11-17 22:43:54 +08:00
|
|
|
void tcg_temp_free_i64(TCGv_i64 arg);
|
|
|
|
char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
|
|
|
|
|
2011-03-07 05:39:53 +08:00
|
|
|
#if defined(CONFIG_DEBUG_TCG)
|
|
|
|
/* If you call tcg_clear_temp_count() at the start of a section of
|
|
|
|
* code which is not supposed to leak any TCG temporaries, then
|
|
|
|
* calling tcg_check_temp_count() at the end of the section will
|
|
|
|
* return 1 if the section did in fact leak a temporary.
|
|
|
|
*/
|
|
|
|
void tcg_clear_temp_count(void);
|
|
|
|
int tcg_check_temp_count(void);
|
|
|
|
#else
|
|
|
|
#define tcg_clear_temp_count() do { } while (0)
|
|
|
|
#define tcg_check_temp_count() 0
|
|
|
|
#endif
|
|
|
|
|
2010-10-23 05:03:31 +08:00
|
|
|
void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
|
2008-02-01 18:05:41 +08:00
|
|
|
|
|
|
|
#define TCG_CT_ALIAS 0x80
|
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#define TCG_CT_IALIAS 0x40
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#define TCG_CT_REG 0x01
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#define TCG_CT_CONST 0x02 /* any constant of register size */
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typedef struct TCGArgConstraint {
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2008-02-04 08:37:54 +08:00
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uint16_t ct;
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uint8_t alias_index;
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2008-02-01 18:05:41 +08:00
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union {
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TCGRegSet regs;
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} u;
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} TCGArgConstraint;
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#define TCG_MAX_OP_ARGS 16
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2011-08-18 05:11:45 +08:00
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/* Bits for TCGOpDef->flags, 8 bits available. */
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enum {
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/* Instruction defines the end of a basic block. */
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TCG_OPF_BB_END = 0x01,
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/* Instruction clobbers call registers and potentially update globals. */
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TCG_OPF_CALL_CLOBBER = 0x02,
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2012-10-10 03:53:08 +08:00
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/* Instruction has side effects: it cannot be removed if its outputs
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are not used, and might trigger exceptions. */
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2011-08-18 05:11:45 +08:00
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TCG_OPF_SIDE_EFFECTS = 0x04,
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/* Instruction operands are 64-bits (otherwise 32-bits). */
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TCG_OPF_64BIT = 0x08,
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2011-08-18 05:11:46 +08:00
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/* Instruction is optional and not implemented by the host. */
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TCG_OPF_NOT_PRESENT = 0x10,
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2011-08-18 05:11:45 +08:00
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};
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2008-02-01 18:05:41 +08:00
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typedef struct TCGOpDef {
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const char *name;
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uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
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uint8_t flags;
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TCGArgConstraint *args_ct;
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int *sorted_args;
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2010-02-16 00:17:21 +08:00
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#if defined(CONFIG_DEBUG_TCG)
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int used;
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#endif
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2008-02-01 18:05:41 +08:00
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} TCGOpDef;
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2011-08-18 05:11:45 +08:00
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extern TCGOpDef tcg_op_defs[];
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2011-09-30 00:33:21 +08:00
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extern const size_t tcg_op_defs_max;
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2008-02-01 18:05:41 +08:00
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typedef struct TCGTargetOpDef {
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2010-03-20 02:12:29 +08:00
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TCGOpcode op;
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2008-02-01 18:05:41 +08:00
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const char *args_ct_str[TCG_MAX_OP_ARGS];
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} TCGTargetOpDef;
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#define tcg_abort() \
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do {\
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fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
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abort();\
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} while (0)
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2012-09-22 08:18:14 +08:00
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#ifdef CONFIG_DEBUG_TCG
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# define tcg_debug_assert(X) do { assert(X); } while (0)
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#elif QEMU_GNUC_PREREQ(4, 5)
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# define tcg_debug_assert(X) \
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do { if (!(X)) { __builtin_unreachable(); } } while (0)
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#else
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# define tcg_debug_assert(X) do { (void)(X); } while (0)
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#endif
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2008-02-01 18:05:41 +08:00
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void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
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#if TCG_TARGET_REG_BITS == 32
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2011-05-27 20:12:13 +08:00
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#define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
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#define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
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2011-12-11 00:35:31 +08:00
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#define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((tcg_target_long)(V)))
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2011-05-27 20:12:13 +08:00
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#define tcg_global_reg_new_ptr(R, N) \
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TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
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#define tcg_global_mem_new_ptr(R, O, N) \
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TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
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#define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
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#define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
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2008-02-01 18:05:41 +08:00
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#else
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2011-05-27 20:12:13 +08:00
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#define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
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#define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
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2011-12-11 00:35:31 +08:00
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#define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((tcg_target_long)(V)))
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2011-05-27 20:12:13 +08:00
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#define tcg_global_reg_new_ptr(R, N) \
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TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
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#define tcg_global_mem_new_ptr(R, O, N) \
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TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
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#define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
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#define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
|
2008-02-01 18:05:41 +08:00
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#endif
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2008-11-17 22:43:54 +08:00
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void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
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int sizemask, TCGArg ret, int nargs, TCGArg *args);
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void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
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int c, int right, int arith);
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|
2011-07-07 20:37:12 +08:00
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TCGArg *tcg_optimize(TCGContext *s, uint16_t *tcg_opc_ptr, TCGArg *args,
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TCGOpDef *tcg_op_def);
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|
2008-11-17 22:43:54 +08:00
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/* only used for debugging purposes */
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void tcg_register_helper(void *func, const char *name);
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const char *tcg_helper_get_name(TCGContext *s, void *func);
|
2012-06-04 00:35:32 +08:00
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void tcg_dump_ops(TCGContext *s);
|
2008-11-17 22:43:54 +08:00
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void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
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TCGv_i32 tcg_const_i32(int32_t val);
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TCGv_i64 tcg_const_i64(int64_t val);
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TCGv_i32 tcg_const_local_i32(int32_t val);
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|
TCGv_i64 tcg_const_local_i64(int64_t val);
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|
|
|
2013-02-23 02:10:00 +08:00
|
|
|
/**
|
|
|
|
* tcg_qemu_tb_exec:
|
|
|
|
* @env: CPUArchState * for the CPU
|
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|
|
* @tb_ptr: address of generated code for the TB to execute
|
|
|
|
*
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|
|
|
* Start executing code from a given translation block.
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|
|
* Where translation blocks have been linked, execution
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|
* may proceed from the given TB into successive ones.
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|
* Control eventually returns only when some action is needed
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|
* from the top-level loop: either control must pass to a TB
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|
|
* which has not yet been directly linked, or an asynchronous
|
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|
|
* event such as an interrupt needs handling.
|
|
|
|
*
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|
|
* The return value is a pointer to the next TB to execute
|
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|
|
* (if known; otherwise zero). This pointer is assumed to be
|
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|
|
* 4-aligned, and the bottom two bits are used to return further
|
|
|
|
* information:
|
|
|
|
* 0, 1: the link between this TB and the next is via the specified
|
|
|
|
* TB index (0 or 1). That is, we left the TB via (the equivalent
|
|
|
|
* of) "goto_tb <index>". The main loop uses this to determine
|
|
|
|
* how to link the TB just executed to the next.
|
|
|
|
* 2: we are using instruction counting code generation, and we
|
|
|
|
* did not start executing this TB because the instruction counter
|
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|
|
* would hit zero midway through it. In this case the next-TB pointer
|
|
|
|
* returned is the TB we were about to execute, and the caller must
|
|
|
|
* arrange to execute the remaining count of instructions.
|
2013-02-23 02:10:03 +08:00
|
|
|
* 3: we stopped because the CPU's exit_request flag was set
|
|
|
|
* (usually meaning that there is an interrupt that needs to be
|
|
|
|
* handled). The next-TB pointer returned is the TB we were
|
|
|
|
* about to execute when we noticed the pending exit request.
|
2013-02-23 02:10:00 +08:00
|
|
|
*
|
|
|
|
* If the bottom two bits indicate an exit-via-index then the CPU
|
|
|
|
* state is correctly synchronised and ready for execution of the next
|
|
|
|
* TB (and in particular the guest PC is the address to execute next).
|
|
|
|
* Otherwise, we gave up on execution of this TB before it started, and
|
|
|
|
* the caller must fix up the CPU state by calling cpu_pc_from_tb()
|
|
|
|
* with the next-TB pointer we return.
|
|
|
|
*
|
|
|
|
* Note that TCG targets may use a different definition of tcg_qemu_tb_exec
|
|
|
|
* to this default (which just calls the prologue.code emitted by
|
|
|
|
* tcg_target_qemu_prologue()).
|
|
|
|
*/
|
|
|
|
#define TB_EXIT_MASK 3
|
|
|
|
#define TB_EXIT_IDX0 0
|
|
|
|
#define TB_EXIT_IDX1 1
|
|
|
|
#define TB_EXIT_ICOUNT_EXPIRED 2
|
2013-02-23 02:10:03 +08:00
|
|
|
#define TB_EXIT_REQUESTED 3
|
2013-02-23 02:10:00 +08:00
|
|
|
|
2011-10-01 03:23:06 +08:00
|
|
|
#if !defined(tcg_qemu_tb_exec)
|
|
|
|
# define tcg_qemu_tb_exec(env, tb_ptr) \
|
2013-02-01 02:47:22 +08:00
|
|
|
((tcg_target_ulong (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, \
|
|
|
|
tb_ptr)
|
2008-05-31 04:56:52 +08:00
|
|
|
#endif
|
2012-03-20 03:25:11 +08:00
|
|
|
|
|
|
|
void tcg_register_jit(void *buf, size_t buf_size);
|
2012-10-31 15:04:25 +08:00
|
|
|
|
|
|
|
#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
|
|
|
|
/* Generate TB finalization at the end of block */
|
|
|
|
void tcg_out_tb_finalize(TCGContext *s);
|
|
|
|
#endif
|