This patch replaces st,stm32-spi compatible with st,stm32h7-spi SoC
specific compatible and updates the example accondingly.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds the documentation of device tree bindings
for the STM32 SPI controller.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds a DT binding documentation for the MT7622 soc.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add slave mode support to the MSIOF driver, in both PIO and DMA mode.
For now this only supports the transmission of messages with a size
that is known in advance.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
[geert: Timeout handling cleanup, spi core integration, cancellation,
rewording]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add the SPICC (SPI Communications Controller) bindings variant.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch implements consideration of the SPI_READY mode flag as
defined in spi.h. It extends the device tree bindings to support
the values defined by the reference manual for the DRCTL field.
Thus supporting edge-triggered and level-triggered bursts.
Signed-off-by: Leif Middelschulte <Leif.Middelschulte@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The property "pl022,com-mode" can only assume one of the values of
the enum ssp_mode, defined in include/linux/amba/pl022.h
List the possible numeric values and report the associated meaning.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The properties "pl022,hierarchy" and "pl022,slave-tx-disable" were
initially proposed till patch V4 [1] but then discarded in V5 [2]
when the patch set was taken over by another developer, as
explained in patch history in [3].
The above properties never landed in mainline code but were then
listed in the binding example by a following commit dc715452e9
("spi: pl022: use generic DMA slave configuration if possible")
and later on they were copy-paste in some board's DT.
Remove the nonexistent properties from the example.
Also remove a spaces-only line at the end of the file.
[1] https://lkml.org/lkml/2012/7/9/421
[2] https://lkml.org/lkml/2012/8/21/427
[3] https://lkml.org/lkml/2012/8/21/436
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add documentation for the bindings of the high speed SPI controller found
on newer bcm63xx SoCs.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add documentation for the bindings of the low speed SPI controller found
on most bcm63xx SoCs.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This driver supports the Lantiq SSC SPI controller in master
mode. This controller is found on Intel (former Lantiq) SoCs like
the Danube, Falcon, xRX200, xRX300.
The hardware uses two hardware FIFOs one for received and one for
transferred bytes. When the driver writes data into the transmit FIFO
the complete word is taken from the FIFO into a shift register. The
data from this shift register is then written to the wire. This driver
uses the interrupts signaling the status of the FIFOs and not the shift
register. It is also possible to use the interrupts for the shift
register, but they will send a signal after every word. When using the
interrupts for the shift register we get a signal when the last word is
written into the shift register and not when it is written to the wire.
After all FIFOs are empty the driver busy waits till the hardware is
not busy any more and returns the transfer status.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
In the pattern of many other devices, support a system-sleep pin
configuration.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
In the case of Renesas R-Car hardware we know that there are generations of
SoCs, e.g. Gen 2 and Gen 3. But beyond that it's not clear what the
relationship between IP blocks might be. For example, I believe that
r8a7790 is older than r8a7791 but that doesn't imply that the latter is a
descendant of the former or vice versa.
We can, however, by examining the documentation and behaviour of the
hardware at run-time observe that the current driver implementation appears
to be compatible with the IP blocks on SoCs within a given generation.
For the above reasons and convenience when enabling new SoCs a
per-generation fallback compatibility string scheme is being adopted for
drivers for Renesas SoCs.
Also:
* Deprecate renesas,sh-msiof. It seems poorly named as it is only
compatible with SH-Mobile. It also appears unused in mainline.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
This adds the devicetree bindings documentation for the SPI controller
present in the Marvell Armada 3700 SoCs.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
MSIOF in R-Car M3-W (r8a7796) is handled fine by the existing driver.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
H3 SPI has same architecture as A31 except FIFO capacity.
To configure the buffer size separately, compatible property should be
different. Optional DMA specifiers and example are added.
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Added device tree bindings documentation for BRCMSTB, NSP, NS2 iProc
SoCs supported by spi-bcm-qspi, spi-brcmstb-qspi and spi-iproc-qspi driver.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds missing commas to the spi-bus documentation of the
cs-gpio lines.
The device tree compiler fails if chip select lines are not
comma-separated. Fix the erroneous documentation by adding missing
commas.
Signed-off-by: Guenther Wutz <info@gunibert.de>
Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
Signed-off-by: Rob Herring <robh@kernel.org>
These two properties were not documented but used in the spi
dts. Add the related documentation.
Suggested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The samsung,exynos5433-spi has some peculiarities that bring the
need of creating a new compatible in the binding.
One of those is the 3-clocks controller management where the spi
is fed with three clocks: "spi", "busclkN" and "ioclk".
By adding the exynos5433-spi, we deprecate the exynos7 compatible
and discourage its use.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This documents the binding used by Alexander Shiyan's DT support for
the clps711x SPI controller.
I've left the file name to match the ARM platform port name "clps711x"
for consistency with the other bindings, even though the compatible
string refers to the later ep7309 chip.
Linux no longer supports the old clps711x and ep72xx product lines,
but we still use the name. The entire family is now discontinued
by the manufacturer.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
When the CS line is not connected, it is not needed to enable or
disable the chip selection functionality from the s3c64xx
devices in order to perform a transfer.
Set the CS controller logically always enabled already during
initialization (by writing '0' in the S3C64XX_SPI_SLAVE_SEL
register) and never disable it.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch fix spelling typos found in
Documentation/devicetree/bingings/spi.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
- Add missing verbs and periods,
- Add spaces before opening parentheses,
- Align list layout,
- Correct grammar,
- Move "cs-gpios" from the required to the optional properties
section,
- Remove spaces before tabs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
We had supported the rk3036/rk3066/rk3188/rk3228/rk3288/rk3368/rk3399
family SoCs in linux kernel.
Let's add the other SoCs, in order to a better understanding from the
rockchip spi document.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds support for the direct access mode to the Orion SPI
driver which is used on the Marvell Armada based SoCs. In this direct
mode, all data written to (or read from) a specifically mapped MBus
window (linked to one SPI chip-select on one of the SPI controllers)
will be transferred directly to the SPI bus. Without the need to control
the SPI registers in between. This can improve the SPI transfer rate in
such cases.
Both, direct-read and -write mode are supported. But only the write
mode has been tested. This mode especially benefits from the SPI direct
mode, as the data bytes are written head-to-head to the SPI bus,
without any additional addresses.
One use-case for this direct write mode is, programming a FPGA bitstream
image into the FPGA connected to the SPI bus at maximum speed.
This mode is described in chapter "22.5.2 Direct Write to SPI" in the
Marvell Armada XP Functional Spec Datasheet.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Another quiet release for SPI, almost entirely driver specific changes
with the diffstat dominated by two new drivers which are about two
thirds of it in terms of lines of code:
- New drivers for PIC32 standard and SQI controllers.
- The Cadence driver has had runtime PM support added and quite a few
fixes and cleanups.
- The flash-specific accelerated path support now has a feature query
interface.
- The pxa2xx driver has been moved to use the core DMA mapping support.
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Merge tag 'spi-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"Another quiet release for SPI, almost entirely driver specific changes
with the diffstat dominated by two new drivers which are about two
thirds of it in terms of lines of code:
- new drivers for PIC32 standard and SQI controllers
- the Cadence driver has had runtime PM support added and quite a few
fixes and cleanups
- flash-specific accelerated path support now has a feature query
interface
- the pxa2xx driver has been moved to use the core DMA mapping support"
* tag 'spi-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (48 commits)
spi: pic32-sqi: Fix linker error, undefined reference to `bad_dma_ops'
spi: dw-pci: Spelling s/paltforms/platforms/g
spi: pic32-sqi: Remove pic32_sqi_setup and pic32_sqi_cleanup
spi: Fix simple typo s/impelment/implement
spi: rockchip: potential NULL dereference on error
spi: zynqmp: disable clocks in error paths
spi: Drop unnecessary dependencies on relaxed I/O accessors
spi: qup: Add spi_master_put in remove function
spi: qup: Handle clocks in pm_runtime suspend and resume
spi: st-ssc4: Fix missing spi_master_put in spi_st_probe error paths
spi: st-ssc4: Allow compile test build
spi: omap2-mcspi: Use dma_request_chan() for requesting DMA channel
spi: davinci: Use dma_request_chan() for requesting DMA channel
spi: pic32: Fix checking return value of devm_ioremap_resource
spi: spi-fsl-dspi: Update DT binding documentation
spi: Drop duplicate code to set master->dev.parent
spi: pic32: Set proper bits_per_word_mask
spi: return error if kmap'd buffers passed to spi_map_buf()
spi: core: add hook flash_read_supported to spi_master
spi: pic32-sqi: silence array overflow warning
...
We continue ramping up platform support for 64-bit ARM machines,
with 111 individual non-merge changesets touching 21 platforms.
The LG1312 platform is completely new and is the first ARM
platform by LG that we support in the mainline kernel. Two other
SoCs got added that are updated versions of existing SoC
families, so the port mainly consists of new dts files:
- The Hisilicon Hip06/D03 is the latest server platform
from Huawei/Hisilicon, and follows the Hip05/D02 platform.
- Rockchip RK3399 follows the 32-bit RK3288 that is popular
in low-end Chromebooks and the 64-bit RK3368 that is mainly
found in chinese Android TV boxes.
The 96Boards HiKey based on the Hisilicon Hi6220 (Kirin 620)
gets a long-awaited overhaul with a lot of devices enabled in
the DT, so it should be much more usable with a mainline kernel
now. See also
https://plus.google.com/111524780435806926688/posts/PeGb2VsNhJd
A lot of work went into enabling new device drivers on existing
machines, but we also have a couple of new commercially
available machines:
- Google Pixel C laptop based on Tegra210
- Hardkernel Odroid C2 Based on Amlogic Meson GXBB (S905)
- Geekbuying GeekBox based on Rockchip RK3368
And finally, a couple of reference or development platforms
that are not end-user platforms but are used for trying out
the respective SoC platforms:
- Amlogic Meson GXBB P200 and P201 development systems
- NXP Layerscape 1043A QDS development board
- Hisilicon Hip06 D03 server board, as mentioned above
- LG1312 Reference Design
- RK3399 Evaluation Board
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Arnd Bergmann:
"We continue ramping up platform support for 64-bit ARM machines, with
111 individual non-merge changesets touching 21 platforms.
The LG1312 platform is completely new and is the first ARM platform by
LG that we support in the mainline kernel. Two other SoCs got added
that are updated versions of existing SoC families, so the port mainly
consists of new dts files:
- The Hisilicon Hip06/D03 is the latest server platform from
Huawei/Hisilicon, and follows the Hip05/D02 platform.
- Rockchip RK3399 follows the 32-bit RK3288 that is popular in
low-end Chromebooks and the 64-bit RK3368 that is mainly found in
chinese Android TV boxes.
The 96Boards HiKey based on the Hisilicon Hi6220 (Kirin 620) gets a
long-awaited overhaul with a lot of devices enabled in the DT, so it
should be much more usable with a mainline kernel now. See also
https://plus.google.com/111524780435806926688/posts/PeGb2VsNhJd
A lot of work went into enabling new device drivers on existing
machines, but we also have a couple of new commercially available
machines:
- Google Pixel C laptop based on Tegra210
- Hardkernel Odroid C2 Based on Amlogic Meson GXBB (S905)
- Geekbuying GeekBox based on Rockchip RK3368
And finally, a couple of reference or development platforms that are
not end-user platforms but are used for trying out the respective SoC
platforms:
- Amlogic Meson GXBB P200 and P201 development systems
- NXP Layerscape 1043A QDS development board
- Hisilicon Hip06 D03 server board, as mentioned above
- LG1312 Reference Design
- RK3399 Evaluation Board"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (104 commits)
arm64: dts: marvell: add XOR node for Armada 3700 SoC
dt-bindings: document rockchip rk3399-evb board
arm64: dts: rockchip: add dts file for RK3399 evaluation board
arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
dt-bindings: rockchip-dw-mshc: add description for rk3399
arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
arm64: dts: marvell: Rename armada-37xx USB node
arm64: dts: marvell: Clean up armada-3720-db
Documentation: arm64: Add Hisilicon Hip06 D03 dts binding
arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
arm64: dts: hip05: Add nor flash support
arm64: dts: hip05: fix its node without msi-cells
arm64: dts: r8a7795: Don't disable referenced optional clocks
arm64: dts: salvator-x: populate EXTALR
arm64: dts: r8a7795: enable PCIe on Salvator-X
arm64: dts: r8a7795: Add PCIe nodes
arm64: tegra: Add IOMMU node to GM20B on Tegra210
arm64: tegra: Add reference clock to GM20B on Tegra210
dt-bindings: Add documentation for GM20B GPU
dt-bindings: gk20a: Document iommus property
...
DSPI driver support the register on the controller with big endian
mode R/W. But not use the regmap API.
So update the binding documentation for "big-endian".
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
throughput.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Document Device tree bindings for the quad SPI peripheral
found on Microchip PIC32 class devices.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Acked-by: Rob Herring <rob@kernel.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Document the devicetree bindings for the SPI peripheral found
on Microchip PIC32 class devices.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Pull input updates from Dmitry Torokhov:
"The most notable item is addition of support for Synaptics RMI4
protocol which is native protocol for all current Synaptics devices
(touchscreens, touchpads). In later releases we'll switch devices
using HID and PS/2 protocol emulation to RMI4.
You will also get:
- BYD PS/2 touchpad protocol support for psmouse
- MELFAS MIP4 Touchscreen driver
- rotary encoder was moved away from legacy platform data and to
generic device properties API, devm_* API, and can now handle
encoders using more than 2 GPIOs
- Cypress touchpad driver was switched to devm_* API and device
properties
- other assorted driver fixes"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: (40 commits)
ARM: pxa/raumfeld: use PROPERTY_ENTRY_INTEGER to define props
Input: synaptics-rmi4 - using logical instead of bitwise AND
Input: powermate - fix oops with malicious USB descriptors
Input: snvs_pwrkey - fix returned value check of syscon_regmap_lookup_by_phandle()
MAINTAINERS: add devicetree bindings to Input Drivers section
Input: synaptics-rmi4 - add device tree support to the SPI transport driver
Input: synaptics-rmi4 - add SPI transport driver
Input: synaptics-rmi4 - add support for F30
Input: synaptics-rmi4 - add support for F12
Input: synaptics-rmi4 - add device tree support for 2d sensors and F11
Input: synaptics-rmi4 - add support for 2D sensors and F11
Input: synaptics-rmi4 - add device tree support for RMI4 I2C devices
Input: synaptics-rmi4 - add I2C transport driver
Input: synaptics-rmi4 - add support for Synaptics RMI4 devices
Input: ad7879 - add device tree support
Input: ad7879 - fix default x/y axis assignment
Input: ad7879 - move header to platform_data directory
Input: ts4800 - add hardware dependency
Input: cyapa - fix for losing events during device power transitions
Input: sh_keysc - remove dependency on SUPERH
...
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Merge tag 'v4.5' into next
Merge with Linux 4.5 to get PROPERTY_ENTRY_INTEGER() that is needed to
fix pxa/raumfeld rotary encoder properties.
ICP DAS LP-8841 contains a DS-1302 RTC. This driver provides an SPI
master which makes the RTC usable. The driver is not supposed to work
with anything else.
The driver uses the standard MicroWire half-duplex transfer timing.
Master output is set on low clock and sensed by the RTC on the rising
edge. Master input is set by the RTC on the trailing edge and is sensed
by the master on low clock.
Signed-off-by: Sergei Ianovich <ynvich@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add devicetree bindings for Rockchip rk3399 spi which found on
Rockchip rk3399 SoCs.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add the devicetree bindings documentation for the Analog Devices
axi-spi-engine SPI master peripheral. This is a soft-peripheral used in
FPGAs.
The external interfaces of the peripheral are:
* A memory mapped register map which is used to configure the
peripheral.
* One interrupt.
* Two clocks, one for the memory mapped register interface and one
for the SPI bus.
* A SPI master interface to which the slave devices are connected.
These interfaces are described by the devicetree bindings accordingly.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
As usual, the bulk of this release is again DT file contents.
There's a huge number of changes here, and it's challenging to give a crisp
overview of just what is in here. To start with:
New boards:
- TI-based DM3730 from LogicPD (Torpedo)
- Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
- Raspberry Pi 2 DT files
- Watchdog on Meson8b
- Veyron-mickey (ASUS Chromebit) DTS
- Rockchip rk3228 SoC and eval board
- Sigma Designs Tango4
Improvements:
- Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
- Misc new devices for Rockchip rk3036 and rk3288
- Allwinner updates for misc SoCs and systems
... and a _large_ number of other changes across the field. Devices
added to SoC DTSI and board DTS files for a number of SoC vendors, new
product boards on already-supported SoCs, cleanups and refactorings of
existing DTS/DTSI files and a bunch of other changes.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As usual, the bulk of this release is again DT file contents.
There's a huge number of changes here, and it's challenging to give a
crisp overview of just what is in here. To start with:
New boards:
- TI-based DM3730 from LogicPD (Torpedo)
- Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
- Raspberry Pi 2 DT files
- Watchdog on Meson8b
- Veyron-mickey (ASUS Chromebit) DTS
- Rockchip rk3228 SoC and eval board
- Sigma Designs Tango4
Improvements:
- Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
- Misc new devices for Rockchip rk3036 and rk3288
- Allwinner updates for misc SoCs and systems
... and a _large_ number of other changes across the field. Devices
added to SoC DTSI and board DTS files for a number of SoC vendors, new
product boards on already-supported SoCs, cleanups and refactorings of
existing DTS/DTSI files and a bunch of other changes"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits)
ARM: dts: compulab: add new board description
ARM: versatile: add the syscon LEDs to the DT
dts: vt8500: Fix errors in SDHC node for WM8505
ARM: dts: imx6q: clean up unused ipu2grp
ARM: dts: silk: Add compatible property to "partitions" node
ARM: dts: gose: Add compatible property to "partitions" node
ARM: dts: porter: Add compatible property to "partitions" node
ARM: dts: koelsch: Add compatible property to "partitions" node
ARM: dts: lager: Add compatible property to "partitions" node
ARM: dts: bockw: Add compatible property to "partitions" node
ARM: dts: meson8b: Add watchdog node
Documentation: watchdog: Add new bindings for meson8b
ARM: meson: Add status LED for Odroid-C1
ARM: dts: uniphier: fix a typo in comment block
ARM: bcm2835: Add the auxiliary clocks to the device tree.
ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT.
ARM: bcm2835: Split the DT for peripherals from the DT for the CPU
ARM: realview: set up cache correctly on the PB11MPCore
ARM: dts: Unify G2D device node with other devices on exynos4
...
This patch adds a DT binding documentation for the MT2701 soc.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add qspi memory mapped region entries for AM43xx based SoCs. Also,
update the binding documents for the controller to document this change.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
update the binding documents for the controller to document this change.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
MSIOF in SH-Mobile AG5 (sh73a0) is handled fine by the existing driver.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
cs-gpios isn't required with patch "spi: mediatek: single
device does not require cs_gpios", so modify the description.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch updates document devicetree bindings
to fix syntax error.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch updates document devicetree bindings
to support multiple devices.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This defines the spi1 and spi2 devices in the device-tree.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Commit fe78d0b769 ("spi: sh-msiof: Fix FIFO size to 64 word from
256 word") changed the default RX FIFO size on R-Car Gen2 SoCs in the
driver code, but forgot to update the DT bindings documentation.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch updates spi bindings, fixs clock usage description.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add DT bindings documentation for SPI controller driver used by
Netlogic XLP MIPS64 SoCs.
Signed-off-by: Kamlakant Patel <kamlakant.patel@broadcom.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This change documents a new property for the snps,dw-apb-ssi device,
allowing an implementer to specify either four byte or two bytes
access to the SPI controller data register.
This supports a change that unbreaks this driver on picoXcell
platforms.
Signed-off-by: Michael van der Westhuizen <michael@smart-africa.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Fix the clocks property documentation and use lower case for
hex values in the example.
Signed-off-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Rob Herring <robh@kernel.org>
Currently the pre-scaler limit is incorrect. The value differs slightly
for various devices so a single value can't be used. Using the compatible
field select the correct pre-scaler limit.
Add new compatible field value for Keystone devices to support their
unique pre-scaler limit value.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Maximum speed supported by spfi is limited to 1/4 of the spfi clock.
But in some SoCs the maximum speed supported by the spfi block can
be limited to less than 1/4 of the spfi clock. In such cases we have
to define the limit in the device tree so that the driver can pick
it up.
Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
As usual, quite a few device-tree updates in ARM land. There was ome
minor churn in DTs due to relicensing under a dual-license, and lots
of little additions of new peripherals, features etc, but nothing
really exciting to call to your attention. Some higlights, focsuing
on support for new SoCs and boards:
- AT91: new boards: Overkiz, Acme Systems' Arietta G25
- tegra: HDA support
- bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS RT-AC87U
- mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
boards, DLink DNS-327L
- OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill SL50
- ARM: added support for Juno r1 board
- sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G
- imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
Gateworks GW5510, and aristainetos2 boards
- hisilicon: hi6220 SoC support; new boards: 96boards hikey
Conflicts: None
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC DT updates from Kevin Hilman:
"As usual, quite a few device-tree updates in ARM land. There was one
minor churn in DTs due to relicensing under a dual-license, and lots
of little additions of new peripherals, features etc, but nothing
really exciting to call to your attention. Some higlights, focsuing
on support for new SoCs and boards:
- AT91: new boards: Overkiz, Acme Systems' Arietta G25
- tegra: HDA support
- bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS
RT-AC87U
- mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
boards, DLink DNS-327L
- OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill
SL50
- ARM: added support for Juno r1 board
- sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33,
Mele A1000G
- imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
Gateworks GW5510, and aristainetos2 boards
- hisilicon: hi6220 SoC support; new boards: 96boards hikey"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits)
ARM: hisi: revert changes from hisi/hip04-dt branch
ARM: nomadik: set proper compatible for accelerometer
ARM64: juno: add GPIO keys
ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes
ARM: dts: Introduce STM32F429 MCU
ARM: socfpga: dts: enable ethernet for Arria10 devkit
ARM: dts: k2l: fix the netcp range size
ARM: dts: k2e: fix the netcp range size
ARM: dts: k2hk: fix the netcp range size
ARM: dts: k2l-evm: Add device bindings for netcp driver
ARM: dts: k2e-evm: Add device bindings for netcp driver
ARM: dts: k2hk-evm: Add device bindings for netcp driver
ARM: BCM5301X: Add DT for Asus RT-AC87U
ARM: BCM5301X: add IRQ numbers for PCIe controller
ARM: BCM5301X: add NAND flash chip description
arm64: dts: Add dts files for Hisilicon Hi6220 SoC
clk: hi6220: Document devicetree bindings for hi6220 clock
arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
ARM: at91/dt: sama5d4ek: mci0 uses slot 0
ARM: at91/dt: kizbox: fix mismatch LED PWM device
...
- add new property "atmel,fifo-size"
- change "cs-gpios" to optional for SPI controller version >= 2.
Please be aware that the VERSION register can not be used to guess the
size of FIFOs. Indeed, for a given hardware version, the SPI controller
can be integrated on Atmel SoCs with different FIFO sizes. Also the
"atmel,fifo-size" property is optional as older SPI controllers don't
embed FIFO at all.
Besides, the FIFO size can not be read or guessed from other registers:
When designing the FIFO feature, no dedicated registers were added to
store this size. Unused spaces in the I/O register range are limited and
better reserved for future usages. Instead, the FIFO size of each
peripheral is documented in the programmer datasheet.
Finally, on a given SoC, there can be several instances of the SPI
controller with different FIFO sizes. This explain why we'd rather use a
dedicated DT property than use the "compatible" property.
For instance, sama5d2x SoCs come with some SPI controllers, the ones
inside Flexcoms, integrating 32 data FIFOs whereas other SPI controllers
use 16 data FIFOs. All these SPI controllers share the same IP version.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
DSPI driver has been updated and support more compatible strings.
This patch update the DT binding documentation.
Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add bindings documentation for GQSPI controller driver used by
Zynq Ultrascale+ MPSoC
Signed-off-by: Ranjit Waghmode <ranjit.waghmode@xilinx.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The commit df59fa7f4b "spi: orion: support armada extended baud
rates" made the assumptions that all the Armada SoCs supported the
same maximum frequency. However, according the hardware datasheet, the
maximum frequency supported by the Armada 370 SoC is tclk/4, for the
Armada XP, Armada 38x and Armada 39x SoCs the limitation is 50MHz and
for the Armada 375 it is tclk/15.
This patch introduces new compatible strings to handle all these
case. In order to be future proof a compatible was created for each
SoC even if currently some SoCs seem using the same IP.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
USP is a general purpose serial port in SiRFSoC, which can work as SPI.
the most data flow of USP and pure SPI is same with main differences
in registers layout.
this patch moves registers layout to private data, and use flags to
differentiate other minor differences between prima2-spi, prima2-usp
and atlas7-usp for hardware configuration.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Since commit 39a6ac11df ("spi/pl022: Devicetree support w/o platform data")
the 'num-cs' parameter cannot be passed through platform data when probing
with devicetree. Instead, it's a required devicetree property.
Fix the binding documentation so the property is properly specified.
Fixes: 39a6ac11df ("spi/pl022: Devicetree support w/o platform data")
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Mark Brown <broonie@kernel.org>
MSIOF Base Address H'E6xx can be accessed by CPU and DMAC.
MSIOF Base Address H'E7xx for DMAC was removed from H/W manual.
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
When the CONTINUE bit is set, the interrupt status we are polling to
identify if a transaction has finished can be sporadic. Even though
the transfer has finished, the interrupt status may erroneously
indicate that there is still data in the FIFO. This behaviour causes
random timeouts in large PIO transfers.
Instead of using the CONTINUE bit to control the CS lines, use the SPI
core's CS GPIO handling. Also, now that the CONTINUE bit is not being
used, we can poll for the ALLDONE interrupt to indicate transfer
completion.
Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Adding fsl,spi-cs-sck-delay and fsl,spi-sck-cs-delay properties to
support delays before and after starting the clock in a transfer.
Signed-off-by: Aaron Brice <aaron.brice@datasoft.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
We have found that we can sometimes see read failures on boards with
high-capacitance SPI lines. It seems that the controller samples the Rx
data line too early, and its register interface has an "Rx Sample Delay"
setting to fine-tune against this issue.
This patch adds a new optional device tree entry that can configure this
delay in terms of nanoseconds. The kernel will calculate the
best-fitting amount of parent clock ticks to program the controller with
based on that.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds DMA capabilities to the spi-qup driver. If DMA channels are
present, the QUP will use DMA instead of block mode for transfers to/from SPI
peripherals for transactions larger than the length of a block.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Reviewed-by: Ivan T. Ivanov <iivanov@mm-sol.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The fsl-imx-cspi binding contains language indicating compatible
strings to be used that is not valid for all supported parts
e.g. Should be "fsl,<soc>-cspi" or "fsl,<soc>-ecspi". Fix this
by enumerating the set of valid compatible strings.
The binding is also missing the clocks/clock-names properties
so document these and the two required ipg and per clocks.
Signed-off-by: Matt Porter <mporter@konsulko.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
- DT unittests for I2C probing and overlays from Pantelis Antoniou
- Remove DT unittest dependency on OF_DYNAMIC from Gaurav Minocha
- Add Tegra compatible strings missing for newer parts from Paul
Walmsley
- Various vendor prefix additions
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Merge tag 'devicetree-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull DeviceTree changes from Rob Herring:
- DT unittests for I2C probing and overlays from Pantelis Antoniou
- Remove DT unittest dependency on OF_DYNAMIC from Gaurav Minocha
- Add Tegra compatible strings missing for newer parts from Paul
Walmsley
- Various vendor prefix additions
* tag 'devicetree-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
of: Add vendor prefix for OmniVision Technologies
of: Use ovti for Omnivision
of: Add vendor prefix for Truly Semiconductors Limited
of: Add vendor prefix for Himax Technologies Inc.
of/fdt: fix sparse warning
of: unitest: Add I2C overlay unit tests.
Documentation: DT: document compatible string existence requirement
Documentation: DT bindings: add nvidia, tegra132-denver compatible string
Documentation: DT bindings: add more Tegra chip compatible strings
of: EXPORT_SYMBOL_GPL of_property_read_u64_array
of: Fix brace position for struct of_device_id definition
of/unittest: Remove obsolete code
dt-bindings: use isil prefix for Intersil in vendor-prefixes.txt
Add AD Holdings Plc. to vendor-prefixes.
dt-bindings: Add Silicon Mitus vendor prefix
Removes OF_UNITTEST dependency on OF_DYNAMIC config symbol
pinctrl: fix up device tree bindings
DT: Vendors: Add Everspin
doc: add bindings document for altera fpga manager
drivers: of: Export of_reserved_mem_device_{init,release}
Align compatible strings for several IP blocks present on Tegra chips
with the latest doctrine from the DT maintainers:
http://marc.info/?l=devicetree&m=142255654213019&w=2
The primary objective here is to avoid checkpatch warnings, per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
DT binding text files have been updated for the following IP blocks:
- PCIe
- SOR
- SoC timers
- AHB "gizmo"
- APB_MISC
- pinmux control
- UART
- PWM
- I2C
- SPI
- RTC
- PMC
- eFuse
- AHCI
- HDA
- XUSB_PADCTRL
- SDHCI
- SOC_THERM
- AHUB
- I2S
- EHCI
- USB PHY
N.B. The nvidia,tegra20-timer compatible string is removed from the
nvidia,tegra30-timer.txt documentation file because it's already
mentioned in the nvidia,tegra20-timer.txt documentation file.
This second version takes into account the following requests from
Rob Herring <robherring2@gmail.com>:
- Per-IP block patches have been combined into a single patch
- Explicit documentation about which compatible strings are actually
matched by the driver has been removed. In its place is implicit
documentation that loosely follows Rob's prescribed format:
"Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where
<chip> is tegra30, tegra132, ..." [...] "You should attempt to
document known values of <chip> if you use it"
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Dylan Reid <dgreid@chromium.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Jingchang Lu <jingchang.lu@freescale.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mikko Perttunen <mperttunen@nvidia.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Peter Hurley <peter@hurleysoftware.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Tejun Heo <tj@kernel.org>
Cc: "Terje Bergström" <tbergstrom@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-i2c@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-pwm@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
The MSIOF controller has DTDL and SYNCDL in SITMDR1 register. So,
this patch adds new properties like the following commit:
d0fb47a523
(spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFT)
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds DT documentation for the SPI portion of ST's SSC device.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Exynos7 SPI controller supports only the auto Selection of
CS toggle mode and Exynos7 SoC includes six SPI controllers.
Add support for these changes in Exynos7 SPI controller driver.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This adds documentation of device tree bindings for the Amlogic Meson
SPIFC (SPI Flash Controller).
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Synchronous Peripheral Flash Interface (SPFI) controller found
on IMG SoCs supports single, dual, and (optionally) quad mode SPI
transfers.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
In order to describe a single slave device that has no chip select line
the 'num-chipselects' property has to be <0> and the 'cs-gpios' property
doesn't need to be set.
Signed-off-by: Torsten Fleischer <torfl6749@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Armada SoC family implementation of this SPI hardware module has
extended the configuration register to allow for a wider range of SPI
clock rates. Specifically the Serial Baud Rate Pre-selection bits in the
SPI Interface Configuration Register now also use bits 6 and 7 as well.
Modify the baud rate calculation to handle these differences for the
Armada case. Potentially a baud rate can be setup using a number of
different pre-scalar and scalar combinations. This code tries all
possible pre-scalar divisors (8 in total) to try and find the most
accurate set.
This change introduces (and documents) a new device tree compatible
device name "armada-370-spi" to support this.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Enable DMA support on i.mx6. The read speed can increase from 600KB/s
to 1.2MB/s on i.mx6q. You can disable or enable dma function in dts.
If not set "dma-names" in dts, spi will use PIO mode. This patch only
validate on i.mx6, not i.mx5, but encourage ones to apply this patch
on i.mx5 since they share the same IP.
Note:
Sometime, there is a weid data in rxfifo after one full tx/rx
transfer finish by DMA on i.mx6dl, so we disable dma functhion on
i.mx6dl.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds ability to configure delay between transmission of
words over SPI bus if it's required by SPI slave devices.
New optional SPI slave property:
- ti,spi-word-delay : delay between transmission of words
(SPIFMTn.WDELAY, SPIDAT1.WDEL)
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Rockchip SPI controller works fine without DMA (aside from a few
warnings). The DMA property even implies this, saying:
DMA request names should include "tx" and "rx" if present.
Officially mark the properties as optional.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add support for MSIOF in:
- r8a7792 (R-Car V2H)
- r8a7793 (R-Car M2-N)
- r8a7794 (R-Car E2)
r8a7791 is now called "R-Car M2-W".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add support for QSPI in:
- r8a7792 (R-Car V2H)
- r8a7793 (R-Car M2-N)
- r8a7794 (R-Car E2)
r8a7791 is now called "R-Car M2-W".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
This merge window brings a good size of cleanups on various
platforms. Among the bigger ones:
* Removal of Samsung s5pc100 and s5p64xx platforms. Both of these have
lacked active support for quite a while, and after asking around nobody
showed interest in keeping them around. If needed, they could be
resurrected in the future but it's more likely that we would prefer
reintroduction of them as DT and multiplatform-enabled platforms
instead.
* OMAP4 controller code register define diet. They defined a lot of registers
that were never actually used, etc.
* Move of some of the Tegra platform code (PMC, APBIO, fuse, powergate)
to drivers/soc so it can be shared with 64-bit code. This also converts them
over to traditional driver models where possible.
* Removal of legacy gpio-samsung driver, since the last users have been
removed (moved to pinctrl)
Plus a bunch of smaller changes for various platforms that sort of
dissapear in the diffstat for the above. clps711x cleanups, shmobile
header file refactoring/moves for multiplatform friendliness, some misc
cleanups, etc.
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Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson:
"This merge window brings a good size of cleanups on various platforms.
Among the bigger ones:
- Removal of Samsung s5pc100 and s5p64xx platforms. Both of these
have lacked active support for quite a while, and after asking
around nobody showed interest in keeping them around. If needed,
they could be resurrected in the future but it's more likely that
we would prefer reintroduction of them as DT and
multiplatform-enabled platforms instead.
- OMAP4 controller code register define diet. They defined a lot of
registers that were never actually used, etc.
- Move of some of the Tegra platform code (PMC, APBIO, fuse,
powergate) to drivers/soc so it can be shared with 64-bit code.
This also converts them over to traditional driver models where
possible.
- Removal of legacy gpio-samsung driver, since the last users have
been removed (moved to pinctrl)
Plus a bunch of smaller changes for various platforms that sort of
dissapear in the diffstat for the above. clps711x cleanups, shmobile
header file refactoring/moves for multiplatform friendliness, some
misc cleanups, etc"
* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
drivers: CCI: Correct use of ! and &
video: clcd-versatile: Depend on ARM
video: fix up versatile CLCD helper move
MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
MAINTAINERS: Remove Kirkwood
ARM: tegra: Convert PMC to a driver
soc/tegra: fuse: Set up in early initcall
ARM: tegra: Always lock the CPU reset vector
ARM: tegra: Setup CPU hotplug in a pure initcall
soc/tegra: Implement runtime check for Tegra SoCs
soc/tegra: fuse: fix dummy functions
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
soc/tegra: Add efuse and apbmisc bindings
soc/tegra: Add efuse driver for Tegra
ARM: tegra: move fuse exports to soc/tegra/fuse.h
ARM: tegra: export apb dma readl/writel
ARM: tegra: Use a function to get the chip ID
ARM: tegra: Sort includes alphabetically
ARM: tegra: Move includes to include/soc/tegra
...
Currently driver supports only configuration of GPIO CS through
platform data. This patch enhances the driver to configure GPIO
CS through DT. Also update the DT binding documentation to
reflect the availability of cs-gpios.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Samsung SPI driver now uses the generic SPI "cs-gpios"
binding so update the documentation accordingly.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
[javier.martinez@collabora.co.uk: split changes and improve commit message]
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
- removing s5p64x0 SoCs and s5pc100 SoC in mainline because
no more user and if it is required next time, it will be
supported with DT.
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Merge tag 's5p-cleanup-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup 2nd version for S5P SoCs for 3.17" from Kukjin Kim:
Cleanup S5P SoCs for 3.17
- removing s5p64x0 SoCs and s5pc100 SoC in mainline because
no more user and if it is required next time, it will be
supported with DT.
* tag 's5p-cleanup-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
video: fbdev: s3c-fb: remove s5pc100 related fimd and fb codes
mtd: onenand: remove s5pc100 related onenand codes
spi: s3c64xx: remove s5pc100 related spi codes
gpio: samsung: remov s5pc100 related gpio codes
ARM: S5PC100: no more support S5PC100 SoC
video: fbdev: s3c-fb: remove s5p64x0 related fimd codes
spi: s3c64xx: remove s5p64x0 related spi codes
gpio: samsung: remove s5p64x0 related gpio codes
ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson pointed out that usually the company name is picked as
namespace prefix to specific properties. So expect "energymicro,location"
but fall back to the previously introduced name "efm32,location".
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch removes s5p64x0 related spi because of no more support for
s5p64x0 SoCs. Meanwhile, cleanup SPI DT bindings for s5p6440-spi, it
should be s5p64x0-spi instead.
Cc: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes the chip select function. Chip select should instead be
supported using GPIOs, defining the DT entry "cs-gpios", and letting the SPI
core assert/deassert the chip select as it sees fit.
The chip select control inside the controller is buggy. It is supposed to
automatically assert the chip select based on the activity in the controller,
but it is buggy and doesn't work at all. So instead we elect to use GPIOs.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds support for v1.1.1 of the SPI QUP controller.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Pull trivial tree changes from Jiri Kosina:
"Usual pile of patches from trivial tree that make the world go round"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (23 commits)
staging: go7007: remove reference to CONFIG_KMOD
aic7xxx: Remove obsolete preprocessor define
of: dma: doc fixes
doc: fix incorrect formula to calculate CommitLimit value
doc: Note need of bc in the kernel build from 3.10 onwards
mm: Fix printk typo in dmapool.c
modpost: Fix comment typo "Modules.symvers"
Kconfig.debug: Grammar s/addition/additional/
wimax: Spelling s/than/that/, wording s/destinatary/recipient/
aic7xxx: Spelling s/termnation/termination/
arm64: mm: Remove superfluous "the" in comment
of: Spelling s/anonymouns/anonymous/
dma: imx-sdma: Spelling s/determnine/determine/
ath10k: Improve grammar in comments
ath6kl: Spelling s/determnine/determine/
of: Improve grammar for of_alias_get_id() documentation
drm/exynos: Spelling s/contro/control/
radio-bcm2048.c: fix wrong overflow check
doc: printk-formats: do not mention casts for u64/s64
doc: spelling error changes
...
Amelie Delaunay