Commit Graph

2074 Commits

Author SHA1 Message Date
Anson Huang 4ef69160b3 dt-bindings: clock: imx8mq: Add SNVS clock
Add macro for the SNVS clock of the i.MX8MQ.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-22 17:00:52 +08:00
Thierry Reding 8d9a8543be dt-bindings: tegra186-gpio: Remove unused definitions
Now that all users of the old definitions have been updated to use the
Tegra186 specific prefix, remove the unused definitions.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-05-21 16:32:10 +02:00
Thomas Gleixner 1ccea77e2a treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not see http www gnu org licenses

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details [based]
  [from] [clk] [highbank] [c] you should have received a copy of the
  gnu general public license along with this program if not see http
  www gnu org licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 355 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 11:28:45 +02:00
Thomas Gleixner a636cd6c42 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4
Based on 1 normalized pattern(s):

  licensed under gplv2 or later

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 118 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190519154040.961286471@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 11:28:40 +02:00
Thomas Gleixner 1621633323 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 1
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  51 franklin street fifth floor boston ma 02110 1301 usa

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option [no]_[pad]_[ctrl] any later version this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation inc 51 franklin street fifth floor boston ma
  02110 1301 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 176 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190519154040.652910950@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 11:28:39 +02:00
Mark Brown 1c7c3237c0 Linux 5.2-rc1
-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlzh3PgeHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGnhoH/jkl4X66KuOXvGXa
 9pgFzyEa3Mhqs0j+AaJYmRyoRty1CbAfMLEWgr0JbZy56zm0PhtXOxcu56/tfdtw
 f5j8OJLDvld10imHXxUrom9zc546Ff90VTOvWmsYznszTz0rV5HLmKgVIIc7ZN8W
 6hshDOy/rviUcPAVrLKdZffzgQZlASNS7To7IBE9okT4QHEtER7dgzM/Z0VAg9R1
 guCPaN8tje4vq2Lv7+J5T9LOF1RObCbKXNADwXY1rMRK5ao3xS93eDnJ8Vn08utI
 UECIVfnYsA6pGl6v1ErCl9izx9MoTU3Crle7BRzVbrw7furvB2lJ1R4RGwqRbvcB
 HovhmHI=
 =TMir
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAlzih0UTHGJyb29uaWVA
 a2VybmVsLm9yZwAKCRAk1otyXVSH0L7OB/92a50lmgSRgsa9cfrlU5G4cq9qw32Y
 fgZpNqmMW4jjrf/oXgkletQ0jGKH8Ty/VIfoqpzDMsoHpx7tXtFG5D4QcMhO1gP9
 5Az3S0+EaIEqOYABylFrfm13k++10dLueqim4NiFX3O7i1M0R9vnzdeC/74hgcBP
 Ibl1hhCAFnRRXHDT4TLkesa/XEBaWfSH28pemogxywhASkXNkFAw7uefe5Cv+2gt
 L5gRHY2OhSVFrZzEzerG8MoG3DiLnAMRUZ72HNS5+CujNDY7d+FvgUvGxrv5f/pK
 MIKeInJ2+8p7xCbA/OLz/nUWh4Ua9Z4NcJK7BnHXfnz/hSlMgsd921u5
 =qHBg
 -----END PGP SIGNATURE-----

Merge tag 'v5.2-rc1' into asoc-5.3

Linux 5.2-rc1
2019-05-20 11:53:50 +01:00
Jerome Brunet e63b063ecd clk: meson: fix MPLL 50M binding id typo
MPLL_5OM (the capital letter o) should indeed be MPLL_50M (the number)
Fix this before it gets used.

Fixes: 25db146aa7 ("dt-bindings: clk: meson: add g12a periph clock controller bindings")
Reported-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-05-20 12:05:46 +02:00
Anson Huang 2c61a54599 dt-bindings: clock: imx8mm: Add GPIO clocks
Add macro for the GPIO clocks of the i.MX8MM.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20 11:21:35 +08:00
Linus Torvalds e8a1d70117 ARM: Device-tree updates
Besides new bindings and additional descriptions of hardware blocks for
 various SoCs and boards, the main new contents here is:
 
 SoCs:
  - Intel Agilex (SoCFPGA)
  - NXP i.MX8MM (Quad Cortex-A53 with media/graphics focus)
 
 New boards:
  - Allwinner:
   + RerVision H3-DVK (H3)
   + Oceanic 5205 5inMFD (H6)
   + Beelink GS2 (H6)
   + Orange Pi 3 (H6)
  - Rockchip:
   + Orange Pi RK3399
   + Nanopi NEO4
   + Veyron-Mighty Chromebook variant
  - Amlogic:
   + SEI Robotics SEI510
  - ST Micro:
   + stm32mp157a discovery1
   + stm32mp157c discovery2
  - NXP:
   + Eckelmann ci4x10 (i.MX6DL)
   + i.MX8MM EVK (i.MX8MM)
   + ZII i.MX7 RPU2 (i.MX7)
   + ZII SPB4 (VF610)
   + Zii Ultra (i.MX8M)
   + TQ TQMa7S (i.MX7Solo)
   + TQ TQMa7D (i.MX7Dual)
   + Kobo Aura (i.MX50)
   + Menlosystems M53 (i.MX53)j
  - Nvidia:
   + Jetson Nano (Tegra T210)
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlzc+0QPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx32MkP/RBivO4AJpznRbqULmStzZL5y24bKzlt/vO8
 6QXr95fTuqJ+0e+oNTVBN4pYMT0yrnMh4PGesEhcu5SEL0fc1kS8UPhkC45FbcLu
 KG+51oLQyiedQrFAG7aT9JdZgtqbfkeGeieJl4LOKHiXy0uNQY0i4VsxrnSeRfuA
 9Geq4sO0hwDUE8OwjZDddeURJmBulshgZtYGZRceKhO3NYRTwOYFcVsijAY2tfCu
 VE4v231bs+gCaDzD90y3HBRCmK1UdUXWQzrud44EV9seJ3yskXFU6YOuKhecXtEk
 jHjLaIZ5zss7cHjlRdkGb8B6TavBuvaQi8hTB7qScvRSWKTiUmAo3vCuyHNJZroV
 rG8g1CbYgyG8/B1KjjU/kvdYdl82z3+K27UZHoAM5lKfEvIyAlWd4gmAri/0qR1A
 LoMDYmvtsIXg7ZMnmfuLJc5luU7zUPjlXMyA/E6wZ6Q5AzDphkpfqir7/9eb8A0p
 bCiyitfy6N0jB9lm51wAKIl/0poMDDEzsH/VpVz6iziDwpoUXoL5ujTwIijQL6Li
 0dLJssBSU0ElX2GOICu5OgpVwK9aZnlMC7eG0Uq49pgvQIz8czQcTE2tv9jtGxmz
 1T0JB2ilvJnDSunnYek3xiAB1gU8I7cdwjtkMvyPho1Gqd6fFKAChvWFbSIkVdjz
 CGqrSXjF
 =lMVy
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Device-tree updates from Olof Johansson:
 "Besides new bindings and additional descriptions of hardware blocks
  for various SoCs and boards, the main new contents here is:

  SoCs:
   - Intel Agilex (SoCFPGA)
   - NXP i.MX8MM (Quad Cortex-A53 with media/graphics focus)

  New boards:
   - Allwinner:
      + RerVision H3-DVK (H3)
      + Oceanic 5205 5inMFD (H6)
      + Beelink GS2 (H6)
      + Orange Pi 3 (H6)
   - Rockchip:
      + Orange Pi RK3399
      + Nanopi NEO4
      + Veyron-Mighty Chromebook variant
   - Amlogic:
      + SEI Robotics SEI510
   - ST Micro:
      + stm32mp157a discovery1
      + stm32mp157c discovery2
   - NXP:
      + Eckelmann ci4x10 (i.MX6DL)
      + i.MX8MM EVK (i.MX8MM)
      + ZII i.MX7 RPU2 (i.MX7)
      + ZII SPB4 (VF610)
      + Zii Ultra (i.MX8M)
      + TQ TQMa7S (i.MX7Solo)
      + TQ TQMa7D (i.MX7Dual)
      + Kobo Aura (i.MX50)
      + Menlosystems M53 (i.MX53)j
   - Nvidia:
      + Jetson Nano (Tegra T210)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (593 commits)
  arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge
  arm64: dts: bitmain: Add pinctrl support for BM1880 SoC
  arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board
  arm64: dts: bitmain: Add GPIO support for BM1880 SoC
  ARM: dts: gemini: Indent DIR-685 partition table
  dt-bindings: hwmon (pwm-fan) Remove dead "cooling-*-state" properties
  ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY
  arm64: dts: msm8998: thermal: Restrict thermal zone name length to under 20
  arm64: dts: msm8998: thermal: Fix number of supported sensors
  arm64: dts: msm8998-mtp: thermal: Remove skin and battery thermal zones
  arm64: dts: exynos: Move fixed-clocks out of soc
  arm64: dts: exynos: Move pmu and timer nodes out of soc
  ARM: dts: s5pv210: Fix camera clock provider on Goni board
  ARM: dts: exynos: Properly override node to use MDMA0 on Universal C210
  ARM: dts: exynos: Move fixed-clocks out of soc on Exynos3250
  ARM: dts: exynos: Remove unneeded address/size cells from fixed-clock on Exynos3250
  ARM: dts: exynos: Move pmu and timer nodes out of soc
  arm64: dts: rockchip: fix IO domain voltage setting of APIO5 on rockpro64
  arm64: dts: db820c: Add sound card support
  arm64: dts: apq8096-db820c: Add HDMI display support
  ...
2019-05-16 08:38:17 -07:00
Linus Torvalds a455eda33f Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal
Pull thermal soc updates from Eduardo Valentin:

 - thermal core has a new devm_* API for registering cooling devices. I
   took the entire series, that is why you see changes on drivers/hwmon
   in this pull (Guenter Roeck)

 - rockchip thermal driver gains support to PX30 SoC (Elaine Zhang)

 - the generic-adc thermal driver now considers the lookup table DT
   property as optional (Jean-Francois Dagenais)

 - Refactoring of tsens thermal driver (Amit Kucheria)

 - Cleanups on cpu cooling driver (Daniel Lezcano)

 - broadcom thermal driver dropped support to ACPI (Srinath Mannam)

 - tegra thermal driver gains support to OC hw throttle and GPU throtle
   (Wei Ni)

 - Fixes in several thermal drivers.

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal: (59 commits)
  hwmon: (pwm-fan) Use devm_thermal_of_cooling_device_register
  hwmon: (npcm750-pwm-fan) Use devm_thermal_of_cooling_device_register
  hwmon: (mlxreg-fan) Use devm_thermal_of_cooling_device_register
  hwmon: (gpio-fan) Use devm_thermal_of_cooling_device_register
  hwmon: (aspeed-pwm-tacho) Use devm_thermal_of_cooling_device_register
  thermal: rcar_gen3_thermal: Fix to show correct trip points number
  thermal: rcar_thermal: update calculation formula for R-Car Gen3 SoCs
  thermal: cpu_cooling: Actually trace CPU load in thermal_power_cpu_get_power
  thermal: rockchip: Support the PX30 SoC in thermal driver
  dt-bindings: rockchip-thermal: Support the PX30 SoC compatible
  thermal: rockchip: fix up the tsadc pinctrl setting error
  thermal: broadcom: Remove ACPI support
  thermal: Fix build error of missing devm_ioremap_resource on UM
  thermal/drivers/cpu_cooling: Remove pointless field
  thermal/drivers/cpu_cooling: Add Software Package Data Exchange (SPDX)
  thermal/drivers/cpu_cooling: Fixup the header and copyright
  thermal/drivers/cpu_cooling: Remove pointless test in power2state()
  thermal: rcar_gen3_thermal: disable interrupt in .remove
  thermal: rcar_gen3_thermal: fix interrupt type
  thermal: Introduce devm_thermal_of_cooling_device_register
  ...
2019-05-16 07:56:57 -07:00
Jerome Brunet e35f5ad6a9
ASoC: meson: add tohdmitx DT bindings
Add the bindings and the related documentation for the audio hdmitx
control glue of the Amlogic g12a SoC family

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-16 12:13:27 +01:00
Wei Ni 7d8ac6b282 of: Add bindings of gpu hw throttle for Tegra soctherm
Add "nvidia,gpu-throt-level" property to set gpu hw
throttle level.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2019-05-13 20:35:33 -07:00
Linus Torvalds ea5aee6d97 We have a couple new features and changes in the core clk framework this time
around because we've finally gotten around to fixing some long standing issues.
 There's still work to do though, so this PR is largely laying down the
 foundation for all the driver changes to come in the next merge window.
 
 The first problem we're alleviating is how parents of clks are specified. With
 the new method, we should see lots of drivers migrate away from the current
 design of string comparisons on the entire clk tree to a more direct method
 where they can use clk_hw pointers or more localized names specified in DT or
 via clkdev. This should reduce our reliance on string comparisons for all the
 topology description logic that we've been using for years and hopefully speed
 some things up while avoiding problems we have with generating clk names.
 
 Beyond that we also got rid of the CLK_IS_BASIC flag because it wasn't really
 helping anyone and we introduced big-endian versions of the basic clk types so
 that we can get rid of clk_{readl,writel}(). Both of these are things that
 driver developers have tried to use over the years that I typically bat away
 during code reviews because they're not useful. It's great to see these two
 things go away so maintainers can save time not worrying about these things.
 
 On the driver side we got the usual collection of new SoC support and
 non-critical fixes and updates to existing code. The big topics that stand out
 are the new driver support for Mediatek MT8183 and MT8516 SoCs, Amlogic Meson8b
 and G12a SoCs, and the SiFive FU540 SoC. The other patches in the driver pile
 are mostly fixes for things that are being used for the first time or additions
 for clks that couldn't be tested before because there wasn't a consumer driver
 that exercised them. Details are below and also in the sub-maintainer tags.
 
 Core:
  - Remove clk_readl() and introduce BE versions of basic clk types
  - Rewrite how clk parents can be specified to allow DT/clkdev lookups
  - Removal of the CLK_IS_BASIC clk flag
  - Framework documentation updates and fixes
 
 New Drivers:
  - Support for STM32F769
  - AT91 sam9x60 PMC support
  - SiFive FU540 PRCI and PLL support
  - Qualcomm QCS404 CDSP clk support
  - Qualcomm QCS404 Turing clk support
  - Mediatek MT8183 clock support
  - Mediatek MT8516 clock support
  - Milbeaut M10V clk controller support
  - Support for Cirrus Logic Lochnagar clks
 
 Updates:
  - Rework AT91 sckc DT bindings
  - Fix slow RC oscillator issue on sama5d3
  - Mark UFS clk as critical on Hi-Silicon hi3660 SoCs
  - Various static analysis fixes/finds and const markings
  - Video Engine (ECLK) support on Aspeed SoCs
  - Xilinx ZynqMP Versal platform support
  - Convert Xilinx ZynqMP driver to be struct oriented
  - Fixes for Rockchip rk3328 and rk3288 SoCs
  - Sub-type for Rockchip SoCs where mux and divider aren't a single register
  - Remove SNVS clock from i.MX7UPL clock driver and bindings
  - Improve i.MX5 clock driver for i.MX50 support
  - Addition of ADC clock definition for Exynos 5410 SoC (Odroid XU)
  - Export a new clock for the MBUS controller on the A13
  - Allwinner H6 fixes to support a finer clocking of the video and VPU engines
  - Add g12a support in the Amlogic axg audio clock controller
  - Add missing PCI USB clock on Rensas RZ/N1
  - Add Z2 (Cortex-A53) clocks on Rensas R-Car E3 and RZ/G2E
  - A new helper DIV64_U64_ROUND_CLOSEST() in <linux/math64.h>
  - VPU and Video Decoder clocks on Amlogic Meson8b
  - Finally remove the wrong ABP Meson8b clock id
  - Add Video Decoder, PCIe PLL, and CPU Clocks on Amlogic G12A
  - Re-expose SAR_ADC_SEL and CTS_OSCIN on Amlogic G12A AO clock controller
  - Un-expose some Amlogic AXG-Audio input clocks IDs
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlzUabQRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSUMmBAAr0WrvWa3s1Ue+lPfmehcAfeI2NkBPC/E
 uhKD+vHBil/Aha33tFTPtVjsZiaMuUETNGPppEUUrHgu4K3UMJZl0iYql6XNVP77
 OObIM5wqXoJ5Yv1e1G0p7X/Qztx7UxEtPwbXJ/9kNN2t6yzg4y8vD2cmXgV5KzHp
 yRUDFNbH9JEyWFbrPhPjD3Bk1PCwdmXNFQg/uYk79g3c84js9MCbWvIqVEuU3vps
 3/9lsDkhbp/flrSOA7D1eloQ6aPXdkLsFzDkJ+6mCA3zxsW/i2N38ZKVDTYG/5rx
 USh3Z0Vyd0f9pKlQqwe1tyr2PBJrYWTtcPBSDcdr4BI1209xseFe4TaqHw1IRKcB
 uYX0gtNTTcgx+8Znvp9y+hE8DhbVNpZvblZuab+rbfb/Gte2wC5/zvzEAz1EqPap
 43VYdi3JR9iWGsC/r4+5OdVFRgWmXFsn5ysQRLkRgE41fKRn7joGHhPS5xDTI0l/
 1rA/8Oh0GMAcSOQ0aSBtavmMCsyJJTjG7s6MpqiO5u/DHnb4MB1Jd0rEWNIjiVmJ
 cqS8II+EbaLWZgt9r3W7ePhkfpHlLw+c4mwI9lRF7Zo67Rz9lrlt1l9YxPnJHewN
 uTRn2ch5W90Jr289wymDNQZGGvCyr+nxKYlSd+kXjlH6poDn6bxYdKHgJexDYmZR
 NVylbizS6lg=
 =/uso
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk framework updates from Stephen Boyd:
 "We have a couple new features and changes in the core clk framework
  this time around because we've finally gotten around to fixing some
  long standing issues. There's still work to do though, so this pull
  request is largely laying down the foundation for all the driver
  changes to come in the next merge window.

  The first problem we're alleviating is how parents of clks are
  specified. With the new method, we should see lots of drivers migrate
  away from the current design of string comparisons on the entire clk
  tree to a more direct method where they can use clk_hw pointers or
  more localized names specified in DT or via clkdev. This should reduce
  our reliance on string comparisons for all the topology description
  logic that we've been using for years and hopefully speed some things
  up while avoiding problems we have with generating clk names.

  Beyond that we also got rid of the CLK_IS_BASIC flag because it wasn't
  really helping anyone and we introduced big-endian versions of the
  basic clk types so that we can get rid of clk_{readl,writel}(). Both
  of these are things that driver developers have tried to use over the
  years that I typically bat away during code reviews because they're
  not useful. It's great to see these two things go away so maintainers
  can save time not worrying about these things.

  On the driver side we got the usual collection of new SoC support and
  non-critical fixes and updates to existing code. The big topics that
  stand out are the new driver support for Mediatek MT8183 and MT8516
  SoCs, Amlogic Meson8b and G12a SoCs, and the SiFive FU540 SoC. The
  other patches in the driver pile are mostly fixes for things that are
  being used for the first time or additions for clks that couldn't be
  tested before because there wasn't a consumer driver that exercised
  them. Details are below and also in the sub-maintainer tags.

  Core:
   - Remove clk_readl() and introduce BE versions of basic clk types
   - Rewrite how clk parents can be specified to allow DT/clkdev lookups
   - Removal of the CLK_IS_BASIC clk flag
   - Framework documentation updates and fixes

  New Drivers:
   - Support for STM32F769
   - AT91 sam9x60 PMC support
   - SiFive FU540 PRCI and PLL support
   - Qualcomm QCS404 CDSP clk support
   - Qualcomm QCS404 Turing clk support
   - Mediatek MT8183 clock support
   - Mediatek MT8516 clock support
   - Milbeaut M10V clk controller support
   - Support for Cirrus Logic Lochnagar clks

  Updates:
   - Rework AT91 sckc DT bindings
   - Fix slow RC oscillator issue on sama5d3
   - Mark UFS clk as critical on Hi-Silicon hi3660 SoCs
   - Various static analysis fixes/finds and const markings
   - Video Engine (ECLK) support on Aspeed SoCs
   - Xilinx ZynqMP Versal platform support
   - Convert Xilinx ZynqMP driver to be struct oriented
   - Fixes for Rockchip rk3328 and rk3288 SoCs
   - Sub-type for Rockchip SoCs where mux and divider aren't a single register
   - Remove SNVS clock from i.MX7UPL clock driver and bindings
   - Improve i.MX5 clock driver for i.MX50 support
   - Addition of ADC clock definition for Exynos 5410 SoC (Odroid XU)
   - Export a new clock for the MBUS controller on the A13
   - Allwinner H6 fixes to support a finer clocking of the video and VPU engines
   - Add g12a support in the Amlogic axg audio clock controller
   - Add missing PCI USB clock on Rensas RZ/N1
   - Add Z2 (Cortex-A53) clocks on Rensas R-Car E3 and RZ/G2E
   - A new helper DIV64_U64_ROUND_CLOSEST() in <linux/math64.h>
   - VPU and Video Decoder clocks on Amlogic Meson8b
   - Finally remove the wrong ABP Meson8b clock id
   - Add Video Decoder, PCIe PLL, and CPU Clocks on Amlogic G12A
   - Re-expose SAR_ADC_SEL and CTS_OSCIN on Amlogic G12A AO clock controller
   - Un-expose some Amlogic AXG-Audio input clocks IDs"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (172 commits)
  clk: Cache core in clk_fetch_parent_index() without names
  clk: imx: correct pfdv2 gate_bit/vld_bit operations
  clk: sifive: add a driver for the SiFive FU540 PRCI IP block
  clk: analogbits: add Wide-Range PLL library
  clk: imx: clk-pllv3: mark expected switch fall-throughs
  clk: imx8mq: Add dsi_ipg_div
  clk: imx: pllv4: add fractional-N pll support
  clk: sunxi-ng: Use the correct style for SPDX License Identifier
  clk: sprd: Use the correct style for SPDX License Identifier
  clk: renesas: Use the correct style for SPDX License Identifier
  clk: qcom: Use the correct style for SPDX License Identifier
  clk: davinci: Use the correct style for SPDX License Identifier
  clk: actions: Use the correct style for SPDX License Identifier
  clk: imx: keep uart clock on during system boot
  clk: imx: correct i.MX7D AV PLL num/denom offset
  dt-bindings: clk: add documentation for the SiFive PRCI driver
  clk: stm32mp1: Add ddrperfm clock
  clk: Remove CLK_IS_BASIC clk flag
  clock: milbeaut: Add Milbeaut M10V clock controller
  dt-bindings: clock: milbeaut: add Milbeaut clock description
  ...
2019-05-09 14:50:09 -07:00
Linus Torvalds fe460a6df6 Pin control changes for v5.2:
Nex drivers:
 - New driver for Bitmain BM1880 pin controller
 - New driver for Mediatek MT8516
 - New driver for Cirrus Logich Lochnagar PMIC pins
 
 Updates:
 - Incremental development on Renesas SH-PFC
 - Incremental development on Intel pin controller and some
   particular updates for Cedarfork.
 - Pin configuration support in Allwinner SunXi drivers
 - Suspend/resume support in the NXP/Freescale i.MX8MQ driver
 - Support for more packaging of the ST Micro STM32
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc0ouWAAoJEEEQszewGV1zGe0P/jo3cOjcU1pZ1KUMWOBPdh4p
 7Ks3sjjDPpJ5JB8Vv9piXhlglZQMixh2PFsmsWYN35CP+4but1BJ9x2NqAOrKEnY
 3IJcaXxjyYLyqMlYTCLNLHcMca1Ku9KcGHMX0/5JKpM84qfrOMQmjzv9RMC9UcFb
 3AAZgDHKGdu6kqs6nm5l62z5bg+GKTzjuOZ+a+YsiOLHRHz2loGdP7egZy6VtmuQ
 L1bFibfJX6Nexmh/TF0iceX82385aPfU8AMbxdhfMUEI3OJqR4gtSEVOxzW1FJaA
 +Ursxeess7QiAyyStOTszccOsJJe6ZjThU25s5kVLPygx0+kv2Z94Vvyb+ii1yU+
 UWk1zbOcYkd1mPAA6NGgzrpLgUUrL8Wzz45OwZKFxLWHjNRB2vDI6p8ABL+TRlXA
 cHOSpszHbAh/oqEZ45WmqFC0S011xmniOSqHuGHxanKAYKQjdaxO/rHtWkrgsEAJ
 NybpV67Ar2UtW2/3VqQHV97FcPzXoUMorn1qFs8aZeFxkqjnEMXP4zCgujLeJNn7
 Aa8Q9pWAOspMaudD96BUNsbjavn8PLRtzkOGRtL/Hfzfnt03SDTHUcrlxrwQr1fq
 dpw1bn2XIOjWwgzyrYXJhQAVOADuRks7wSVAP+/Vg2Gke8XmzAJ4x9tiLKDy7oyE
 DReRSj47xF01ns2AY9Bu
 =ovk5
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "It is pretty calm and chill in pin control for the moment. Just
  incremental development.

  There is an odd patch to the Super-H architecture, it's coming from
  the maintainers so should be fine.

  Summary:

  New drivers:
   - Bitmain BM1880 pin controller
   - Mediatek MT8516
   - Cirrus Logich Lochnagar PMIC pins

  Updates:
   - Incremental development on Renesas SH-PFC
   - Incremental development on Intel pin controller and some particular
     updates for Cedarfork.
   - Pin configuration support in Allwinner SunXi drivers
   - Suspend/resume support in the NXP/Freescale i.MX8MQ driver
   - Support for more packaging of the ST Micro STM32"

* tag 'pinctrl-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
  pinctrl: mcp23s08: Do not complain about unsupported params
  pinctrl: Rework Kconfig dependency for BM1880 pinctrl driver
  MAINTAINERS: Add entry for BM1880 pinctrl
  pinctrl: Add pinctrl support for BM1880 SoC
  dt-bindings: pinctrl: Add BM1880 pinctrl binding
  pinctrl: stm32: check irq controller availability at probe
  pinctrl: mediatek: Add MT8516 Pinctrl driver
  pinctrl: zte: fix leaked of_node references
  pinctrl: intel: Increase readability of intel_gpio_update_pad_mode()
  pinctrl: intel: Retain HOSTSW_OWN for requested gpio pin
  pinctrl: pistachio: fix leaked of_node references
  pinctrl: sunxi: Support I/O bias voltage setting on H6
  pinctrl: sunxi: Prepare for alternative bias voltage setting methods
  pinctrl: st: fix leaked of_node references
  pinctrl: samsung: fix leaked of_node references
  pinctrl: stm32: align stm32mp157 pin names
  pinctrl: stm32: add package information for stm32mp157c
  pinctrl: stm32: introduce package support
  dt-bindings: pinctrl: stm32: add new entry for package information
  pinctrl: imx8mq: Add suspend/resume ops
  ...
2019-05-08 10:23:54 -07:00
Linus Torvalds 132d68d37d USB/PHY patches for 5.2-rc1
Here is the big set of USB and PHY driver patches for 5.2-rc1
 
 There is the usual set of:
 	- USB gadget updates
 	- PHY driver updates and additions
 	- USB serial driver updates and fixes
 	- typec updates and new chips supported
 	- mtu3 driver updates
 	- xhci driver updates
 	- other tiny driver updates
 
 Nothing really interesting, just constant forward progress.
 
 All of these have been in linux-next for a while with no reported
 issues.  The usb-gadget and usb-serial trees were merged a bit "late",
 but both of them had been in linux-next before they got merged here last
 Friday.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXNKuwg8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymRUgCfa8Ri7KrCaBR5NHQcLhbdrX90ToQAmgNw7vpo
 fqt0XpNM0CSa9O/gOr79
 =8HFh
 -----END PGP SIGNATURE-----

Merge tag 'usb-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/PHY updates from Greg KH:
 "Here is the big set of USB and PHY driver patches for 5.2-rc1

  There is the usual set of:

   - USB gadget updates

   - PHY driver updates and additions

   - USB serial driver updates and fixes

   - typec updates and new chips supported

   - mtu3 driver updates

   - xhci driver updates

   - other tiny driver updates

  Nothing really interesting, just constant forward progress.

  All of these have been in linux-next for a while with no reported
  issues. The usb-gadget and usb-serial trees were merged a bit "late",
  but both of them had been in linux-next before they got merged here
  last Friday"

* tag 'usb-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (206 commits)
  USB: serial: f81232: implement break control
  USB: serial: f81232: add high baud rate support
  USB: serial: f81232: clear overrun flag
  USB: serial: f81232: fix interrupt worker not stop
  usb: dwc3: Rename DWC3_DCTL_LPM_ERRATA
  usb: dwc3: Fix default lpm_nyet_threshold value
  usb: dwc3: debug: Print GET_STATUS(device) tracepoint
  usb: dwc3: Do core validation early on probe
  usb: dwc3: gadget: Set lpm_capable
  usb: gadget: atmel: tie wake lock to running clock
  usb: gadget: atmel: support USB suspend
  usb: gadget: atmel_usba_udc: simplify setting of interrupt-enabled mask
  dwc2: gadget: Fix completed transfer size calculation in DDMA
  usb: dwc2: Set lpm mode parameters depend on HW configuration
  usb: dwc2: Fix channel disable flow
  usb: dwc2: Set actual frame number for completed ISOC transfer
  usb: gadget: do not use __constant_cpu_to_le16
  usb: dwc2: gadget: Increase descriptors count for ISOC's
  usb: introduce usb_ep_type_string() function
  usb: dwc3: move synchronize_irq() out of the spinlock protected block
  ...
2019-05-08 10:03:52 -07:00
Stephen Boyd ff060019f4 Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next
- Support for STM32F769
 - Rework AT91 sckc DT bindings
 - Fix slow RC oscillator issue on sama5d3
 - AT91 sam9x60 PMC support
 - SiFive FU540 PRCI and PLL support

* clk-stm32f4:
  clk: stm32mp1: Add ddrperfm clock
  clk: stm32: Introduce clocks of STM32F769 board

* clk-tegra:
  clk: tegra: divider: Mark Memory Controller clock as read-only
  clk: tegra: emc: Replace BUG() with WARN_ONCE()
  clk: tegra: emc: Fix EMC max-rate clamping
  clk: tegra: emc: Support multiple RAM codes
  clk: tegra: emc: Don't enable EMC clock manually
  clk: tegra124: Remove lock-enable bit from PLLM
  clk: tegra: Fix PLLM programming on Tegra124+ when PMC overrides divider
  clk: tegra: Don't enable already enabled PLLs

* clk-at91:
  clk: at91: Mark struct clk_range as const
  clk: at91: add sam9x60 pmc driver
  dt-bindings: clk: at91: add bindings for SAM9X60 pmc
  clk: at91: add sam9x60 PLL driver
  clk: at91: master: Add sam9x60 support
  clk: at91: usb: Add sam9x60 support
  clk: at91: allow configuring generated PCR layout
  clk: at91: allow configuring peripheral PCR layout
  clk: at91: sckc: handle different RC startup time
  clk: at91: modernize sckc binding
  dt-bindings: clock: at91: new sckc bindings

* clk-sifive-fu540:
  clk: sifive: add a driver for the SiFive FU540 PRCI IP block
  clk: analogbits: add Wide-Range PLL library
  dt-bindings: clk: add documentation for the SiFive PRCI driver

* clk-spdx:
  clk: sunxi-ng: Use the correct style for SPDX License Identifier
  clk: sprd: Use the correct style for SPDX License Identifier
  clk: renesas: Use the correct style for SPDX License Identifier
  clk: qcom: Use the correct style for SPDX License Identifier
  clk: davinci: Use the correct style for SPDX License Identifier
  clk: actions: Use the correct style for SPDX License Identifier
2019-05-07 11:45:29 -07:00
Stephen Boyd 5816b74581 Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' and 'clk-qoriq' into clk-next
- Mark UFS clk as critical on Hi-Silicon hi3660 SoCs
 - Support for Cirrus Logic Lochnagar clks

* clk-hisi:
  clk: hi3660: Mark clk_gate_ufs_subsys as critical

* clk-lochnagar:
  clk: lochnagar: Add support for the Cirrus Logic Lochnagar
  clk: lochnagar: Add initial binding documentation

* clk-allwinner:
  clk: sunxi-ng: sun5i: Export the MBUS clock
  clk: sunxi-ng: a83t: Add pll-video0 as parent of csi-mclk
  clk: sunxi-ng: h6: Allow video & vpu clocks to change parent rate
  clk: sunxi-ng: h6: Preset hdmi-cec clock parent
  clk: sunxi: Add Kconfig options
  clk: sunxi-ng: f1c100s: fix USB PHY gate bit offset
  clk: sunxi-ng: Allow DE clock to set parent rate

* clk-rockchip:
  clk: rockchip: undo several noc and special clocks as critical on rk3288
  clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type
  clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288
  clk: rockchip: Limit use of USB PHY clock to USB on rk3288
  clk: rockchip: Fix video codec clocks on rk3288
  clk: rockchip: Make rkpwm a critical clock on rk3288
  clk: rockchip: fix wrong clock definitions for rk3328

* clk-qoriq:
  clk: qoriq: increase array size of cmux_to_group
  dt-bindings: qoriq-clock: Add ls1028a chip compatible string
  clk: qoriq: Add ls1028a clock configuration
  clk: qoriq: add more PLL divider clocks support
  dt-bindings: qoriq-clock: add more PLL divider clocks support
2019-05-07 11:45:13 -07:00
Stephen Boyd 7e9c62bdb4 Merge branches 'clk-sa', 'clk-aspeed', 'clk-samsung', 'clk-ingenic' and 'clk-zynq' into clk-next
- Various static analysis fixes/finds
 - Video Engine (ECLK) support on Aspeed SoCs
 - Xilinx ZynqMP Versal platform support
 - Convert Xilinx ZynqMP driver to be struct oriented

* clk-sa:
  clk: mvebu: fix spelling mistake "gatable" -> "gateable"
  clk: ux500: add range to usleep_range
  clk: tegra: Make tegra_clk_super_mux_ops static
  clk: davinci: cfgchip: use PTR_ERR_OR_ZERO in da8xx_cfgchip_register_div4p5

* clk-aspeed:
  clk: Aspeed: Setup video engine clocking

* clk-samsung:
  clk: samsung: exynos5410: Add gate clock for ADC
  clk: samsung: dt-bindings: Add ADC clock ID to Exynos5410
  clk: samsung: dt-bindings: Put CLK_UART3 in order

* clk-ingenic:
  clk: ingenic: jz4725b: Add UDC PHY clock
  dt-bindings: clock: jz4725b-cgu: Add UDC PHY clock

* clk-zynq:
  clk: zynqmp: use structs for clk query responses
  clk: zynqmp: fix check for fractional clock
  clk: zynqmp: do not export zynqmp_clk_register_* functions
  clk: zynqmp: fix kerneldoc of __zynqmp_clock_get_parents
  drivers: clk: Update clock driver to handle clock attribute
  drivers: clk: zynqmp: Allow zero divisor value
2019-05-07 11:44:56 -07:00
Stephen Boyd f6111b9d79 Merge branches 'clk-doc', 'clk-more-critical', 'clk-meson' and 'clk-basic-be' into clk-next
- Remove clk_readl() and introduce BE versions of basic clk types

* clk-doc:
  clk: Drop duplicate clk_register() documentation
  clk: Document and simplify clk_core_get_rate_nolock()
  clk: Remove 'flags' member of struct clk_fixed_rate
  clk: nxp: Drop 'flags' on fixed_rate clk macro
  clk: Document __clk_mux_determine_rate()
  clk: Document CLK_MUX_READ_ONLY mux flag
  clk: Document deprecated things
  clk: Collapse gpio clk kerneldoc

* clk-more-critical:
  clk: highbank: Convert to CLK_IS_CRITICAL

* clk-meson: (21 commits)
  clk: meson: axg-audio: add g12a support
  clk: meson: axg-audio: don't register inputs in the onecell data
  clk: meson: axg_audio: replace prefix axg by aud
  dt-bindings: clk: axg-audio: add g12a support
  clk: meson: meson8b: add the video decoder clock trees
  clk: meson: meson8b: add the VPU clock trees
  clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2
  clk: meson: meson8b: use a separate clock table for Meson8m2
  dt-bindings: clock: meson8b: export the video decoder clocks
  clk: meson-g12a: add video decoder clocks
  dt-bindings: clock: meson8b: export the VPU clock
  clk: meson-g12a: add PCIE PLL clocks
  dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN
  clk: meson-pll: add reduced specific clk_ops for G12A PCIe PLL
  dt-bindings: clock: meson8b: drop the "ABP" clock definition
  clk: meson: g12a: add cpu clocks
  dt-bindings: clk: g12a-clkc: add VDEC clock IDs
  dt-bindings: clock: axg-audio: unexpose controller inputs
  dt-bindings: clk: g12a-clkc: add PCIE PLL clock ID
  clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id
  ...

* clk-basic-be:
  clk: core: replace clk_{readl,writel} with {readl,writel}
  clk: core: remove powerpc special handling
  powerpc/512x: mark clocks as big endian
  clk: mux: add explicit big endian support
  clk: multiplier: add explicit big endian support
  clk: gate: add explicit big endian support
  clk: fractional-divider: add explicit big endian support
  clk: divider: add explicit big endian support
2019-05-07 11:44:42 -07:00
Stephen Boyd 2ed3b9103a Merge branches 'clk-renesas', 'clk-qcom', 'clk-mtk', 'clk-milbeaut' and 'clk-imx' into clk-next
- Qualcomm QCS404 CDSP clk support
 - Qualcomm QCS404 Turing clk support
 - Mediatek MT8183 clock support
 - Mediatek MT8516 clock support
 - Milbeaut M10V clk controller support

* clk-renesas:
  clk: renesas: rcar-gen3: Remove unused variable
  clk: renesas: rcar-gen3: Fix cpg_sd_clock_round_rate() return value
  clk: renesas: r8a77980: Fix RPC-IF module clock's parent
  clk: renesas: rcar-gen3: Rename DRIF clocks
  clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC
  clk: renesas: rcar-gen3: Correct parent clock of SYS-DMAC
  clk: renesas: rcar-gen3: Correct parent clock of HS-USB
  clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCI
  clk: renesas: r8a774c0: Add Z2 clock
  clk: renesas: r8a77990: Add Z2 clock
  clk: renesas: rcar-gen3: Support Z and Z2 clocks with high frequency parents
  math64: New DIV64_U64_ROUND_CLOSEST helper
  clk: renesas: rcar-gen3: Remove CLK_TYPE_GEN3_Z2
  clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset
  clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor
  clk: renesas: r9a06g032: Add missing PCI USB clock
  clk: renesas: r7s9210: Always use readl()
  clk: renesas: rcar-gen3: Pass name/offset to cpg_sd_clk_register()

* clk-qcom:
  clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998
  clk: qcom: Add QCS404 TuringCC
  clk: qcom: branch: Add AON clock ops
  dt-bindings: clock: Introduce Qualcomm Turing Clock controller
  clk: qcom: gcc-qcs404: Add CDSP related clocks and resets

* clk-mtk:
  clk: mediatek: add clock driver for MT8516
  dt-bindings: mediatek: apmixedsys: add support for MT8516
  dt-bindings: mediatek: infracfg: add support for MT8516
  dt-bindings: mediatek: topckgen: add support for MT8516
  clk: mediatek: Allow changing PLL rate when it is off
  clk: mediatek: Add MT8183 clock support
  clk: mediatek: Add configurable pcw_chg_reg to mtk_pll_data
  clk: mediatek: Add dt-bindings for MT8183 clocks
  dt-bindings: ARM: Mediatek: Document bindings for MT8183
  clk: mediatek: Add configurable pcwibits and fmin to mtk_pll_data
  clk: mediatek: Add new clkmux register API
  clk: mediatek: Disable tuner_en before change PLL rate

* clk-milbeaut:
  clock: milbeaut: Add Milbeaut M10V clock controller
  dt-bindings: clock: milbeaut: add Milbeaut clock description

* clk-imx:
  clk: imx: correct pfdv2 gate_bit/vld_bit operations
  clk: imx: clk-pllv3: mark expected switch fall-throughs
  clk: imx8mq: Add dsi_ipg_div
  clk: imx: pllv4: add fractional-N pll support
  clk: imx: keep uart clock on during system boot
  clk: imx: correct i.MX7D AV PLL num/denom offset
  clk: imx6sll: Fix mispelling uart4_serial as serail
  clk: imx: pll14xx: drop unused variable
  clk: imx: rename clk-imx51-imx53.c to clk-imx5.c
  clk: imx5: Fix i.MX50 ESDHC clock registers
  clk: imx5: Fix i.MX50 mainbus clock registers
  clk: imx: Remove unused imx_get_clk_hw_fixed
  dt-bindings: clock: imx7ulp: remove SNVS clock
  clk: imx7ulp: remove snvs clock
2019-05-07 11:44:21 -07:00
Greg Kroah-Hartman 12456e509b Merge 5.1-rc7 into usb-next
We need this to make the usb-gadget branch merge cleaner.  And for
testing to keep from hitting the same issues already fixed.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-03 18:03:47 +02:00
Olof Johansson b45da609a0 i.MX DT bindings update for 5.2:
- Add vendor prefix for TQ Systems GmbH, Rakuten Kobo and Menlo Systems
    GmbH.
  - Add DT schema for SoC i.MX8MM and i.MX50, and board ZII VF610, VF610
    SPB4, i.MX7 RPU2, i.MX7S TQ MBa7, M53 Menlo and Eckelmann ci4x10.
  - Update imx-scu bindings on resource table and general interrupt
    support.
  - Add bindings for i.MX MMDC memory controller.
  - Update i.MX7D ADC bindings to add missing '#io-channel-cells'
    property.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJcvm+bAAoJEFBXWFqHsHzOXNwH/1j1FWhg2wQ62qg/KAGfE2F7
 dppWD6ZP+f59+x9yb2SJAo6NIKMJt1J08vqkEzZGxkm/KWhmKbEseV3aY8VqZ7xJ
 03EhbaFBwyI1uaJe1lNsFlwFU41UeRMahDtxzYh2prTS7fvQHRAAj52HiiFoBR/l
 tjMENxCJD0fkTe9MPAp9kYOxYV7Fm2UuSpAV/8PvbjgR4M7mOg5E/k6eClHs890X
 dp9fy3/NI+Y6u+gRj9zpNR4Vhaw5UWnd6hLbaq9DRbcWTUwrw7qrQcRdV6yOTAMw
 wNKw3fCSUDOamkjOs+XqcBfHuVdxpaMi3/LWD8AwFgTIZCn1A94Kb9JwczY0lKg=
 =lvhK
 -----END PGP SIGNATURE-----

Merge tag 'imx-bindings-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX DT bindings update for 5.2:
 - Add vendor prefix for TQ Systems GmbH, Rakuten Kobo and Menlo Systems
   GmbH.
 - Add DT schema for SoC i.MX8MM and i.MX50, and board ZII VF610, VF610
   SPB4, i.MX7 RPU2, i.MX7S TQ MBa7, M53 Menlo and Eckelmann ci4x10.
 - Update imx-scu bindings on resource table and general interrupt
   support.
 - Add bindings for i.MX MMDC memory controller.
 - Update i.MX7D ADC bindings to add missing '#io-channel-cells'
   property.

* tag 'imx-bindings-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: iio: imx7d-adc: Add #io-channel-cells to required
  dt-bindings: arm: fsl: Add support for ZII i.MX7 RPU2 board
  dt-bindings: arm: fsl: Add devicetree binding for M53 Menlo board.
  dt-bindings: fsl: scu: add general interrupt support
  dt-bindings: arm: fsl: Add i.MX50 based boards
  dt-bindings: Add vendor prefix for Rakuten Kobo, Inc.
  dt-bindings: arm: add TQ boards
  dt-bindings: add vendor prefix for TQ Systems GmbH
  dt-bindings: arm: fsl: Add support for ZII VF610 SPB4
  dt-bindings: arm: fsl: Add supported ZII VF610 boards to DT schema
  dt-bindings: arm: imx: Add the soc binding for imx8mm
  dt-bindings: arm: fsl: Add devicetree binding for Eckelmann ci4x10
  dt-bindings: memory-controllers: freescale: add MMDC binding doc
  of: Add vendor prefix for Menlo Systems GmbH
  bindings: fsl-imx-sdma: Document fsl,imx8mq-sdma compatbile string
  dt-bindings: firmware: imx-scu: add new resources to scu resource table
  dt-bindings: firmware: imx-scu: remove unused resources from scu resource table

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-28 12:50:38 -07:00
Olof Johansson 1e67323721 arm64: dts: Amlogic updates for v5.2, round 2
- add display/gfx support for G12a boards
 - enable USB for g12a boards
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAly8ghgACgkQWTcYmtP7
 xmXqyg/9HtVrO5aNLEmGi3l/YySSH7fSp5BNnvTzlT8SpB1vBAKLXWjemVss2XVE
 QEE7d1UyUoXwgE4GoAyguuuj0Ov+JwYRTQb+OZKliALPlHfQQkklN8FKVMnDzEz7
 u1ivVqmoXzwqW32NW3a24AyGLgQXgJi2+ctAZSGNd+pLydwANLCB+Ffc1I4fTmW0
 kwLnqBgyVMxhbgRw6Blj9nh+ZlQOLwktpiMfrOwIpV0WLT3LZdRMrY1M/SnP+4+B
 Pq2BEzBAaHC5cNjQ3TjEj+nckXnrncJ0V6DepT+UIOC8L61rsb/tQAx8ecVVoHcW
 TTsQ3fewNcqIrKLRFpyNpXEAEAzlciwpV8lDczY5fLv5/j0MHiRSwBctj1pcK+CF
 Rsl2NygGZv0SuU0hDsDfEzVGLPjD1VYVGSJezWaaNzhjLw4sDUylBsKOcMNui4fW
 IUT3ahdjtvp03xjlGWAd1NI/MkYuu3RxJ2wR28vPEUGu2JEVpI8PtkR1FVqRIwBU
 Qd20x3bAn76zxMSWrsmDiTAa0+HMqjUbhzyeJxKPV5ON5k7RbmADrQ2rvxx+E4Uj
 FR3S6iulwaXDxIrvKZvTJDX3Myf2EL0bck5/XlKrD/B8tN5dCBgySA+SGHLhIiwZ
 XpCQmP6nLzZayeU4TX7jvAQdbhmR5GYCpO7SsIFTz7fJr6Vb8lM=
 =T6Im
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-dt64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

arm64: dts: Amlogic updates for v5.2, round 2
- add display/gfx support for G12a boards
- enable USB for g12a boards

* tag 'amlogic-dt64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (26 commits)
  arm64: dts: meson-g12a-u200: Add support for Video Display
  arm64: dts: meson-g12a-sei510: Add support for Video Display
  arm64: dts: meson-g12a-x96-max: Add support for Video Display
  arm64: dts: meson-g12a: Add AO-CEC nodes
  arm64: dts: meson-g12a: Add VPU and HDMI related nodes
  arm64: dts: meson-g12a-x96-max: Enable USB
  arm64: dts: meson-g12a-u200: Enable USB
  arm64: dts: meson-g12a-sei510: Enable USB
  arm64: dts: meson-g12a-sei510: Add ADC Key and BT support
  arm64: dts: meson-g12a-u200: add regulators
  arm64: dts: meson: g12a: Add mali-g31 gpu node
  arm64: dts: meson: g12a: Add G12A USB nodes
  arm64: dts: meson: g12a: Add SAR ADC node
  dt-bindings: power: amlogic, meson-gx-pwrc: Add G12A compatible
  arm64: dts: meson-gxm: Add Mali-T820 node
  dt-bindings: gpu: mali-midgard: Add resets property
  dt-bindings: clock: meson8b: export the video decoder clocks
  dt-bindings: clock: meson8b: export the VPU clock
  dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN
  dt-bindings: clock: meson8b: drop the "ABP" clock definition
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-28 12:50:02 -07:00
Olof Johansson ea1b42170f Renesas ARM Based SoC DT Bindings Updates for v5.2
* R-Car M3-N (r8a77965) SoC
   - Remove non-existent A3IR power domain
 
 * Add vendor prefix for Silicon Linux
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAly521wACgkQ189kaWo3
 T771vhAAjLwe/q0/d0bLpWOmIPieWcXrtp6yhpSnV5adGWvdL3NqCeNb4P/MMEwm
 wpGSgPb2WfDpSOTc9rqId9J/QzCvXUyuTdl63tFIUxQbA3lyow+YtpgGKic1zHA1
 baAgsypQIhnMal27ggKcDQaViJR+mXDVYnk/l8059vNKT7RbWAOspCqZ3Bj2caDG
 CJcIVDOqUG/P+4Ybpj0WSsoB/wEsuP1BGdZJAZ3EhrLP+QMWSHnWaJC+tHLq7IMo
 8xgOnqeEfh3qNLnFrAcNM8NID11PQm6xRT4xIXhE9lqXlwISxk7+6z9NlStlEA9S
 JTeEE1bqov2b+MXkLVV6DOa0y54YVSk+T4Ap+al0aX5O+IjNXY8GZyFMIb4VuvJW
 m34vRUxnTUbL5q/DCwwQ0uD/DZWDLKkF/KOru0I+LGDV+oA+5rawXqykM66rnZ3V
 5qzdNkizVTGV2GHfgaoZRksiZ0RZJOzqgRAIsXzgFcaxEn5o9uVe2UVneb5+pYtr
 6OP5J7ksEBU/VVAThpoX0mVWhjM/IWph/DDSSslotGwLYeUzSjqHixopOclXHukV
 6JiUKnOe/Q1IuIIRy+xoDrK7wmzC15rKqkNmK4nWJP+WmmCtXlkn2Nsqybq2tiF0
 R2KhjAGszN0/SBw6/3PhyEc3pW0m01BL2jzKJ2nTTMJeUu3RgkY=
 =8e0v
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-bindings-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt

Renesas ARM Based SoC DT Bindings Updates for v5.2

* R-Car M3-N (r8a77965) SoC
  - Remove non-existent A3IR power domain

* Add vendor prefix for Silicon Linux

* tag 'renesas-dt-bindings-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  dt-bindings: power: r8a77965: Remove non-existent A3IR power domain
  dt-bindings: Add vendor prefix for Silicon Linux.

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-28 12:46:39 -07:00
Olof Johansson 7996313656 Add am335x pinmux defines and start using them
This series of changes adds a new pinmux instance defines for am335x,
 and a new AM33XX_PADCONF macro. And then the rest of the series updates
 the dts files to use it.
 
 The reasons for doing this is the pinmux configuration has been hard to
 use and read. And we need to do this for eventually for moving to use
 values.
 
 This change is done one machine at a time, and can be easily reverted
 as needed in case of unexpected trouble. The old macro is still working,
 and we're planning to keep it around until we eventually change to use
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAly18IoRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXPwQA//ajq5abErjoCtPQrf/4bv9NdZQcBkRaHa
 k4pZ8hgWvLQYzNDZirQhe174UUCUUIdc7yppRYzgjqYmWLvNHSs4ax9SeBKn1bHd
 40gZMzmJeHByRNjK1WHHUBLXtuMRIbOk7k4Lcgqi3en1a9jHnJaq0h/Xde69nrWz
 rjcewWEbZeqYvIRZJDv17vbY3DY6gebP3DQzKLEX89vTfMJF0vgTm6YVskhW1Jtx
 3Coj/M5e3//gDRBD8bpLdOac1irQe2+MMFMh4GH9ctF9/ZK45cXKz3p8j+em0YgJ
 yYXimAFqVY0lQuFNC6L/PfsQ8YDSuVTHqTS6vajZvqoDB4wMsYjw8ivag5S0NpqV
 baaft1SyQ1x7YeuKny/jSZ+1vYIe2Omms45Dc3JYLX2EltLDDEzriPpohIcqetOp
 XJfxAEFbAU9Mk1tMSS8hvpoj9ezodQz3tYS8Mwc15Dg2SDfT7yya1kDowOpVa9sn
 MKvFZ5jIfYdq3es/vDm9sa0qunmQBX1iM5Jzp1u+GUYa5p7kTcojCd++FoR7/do5
 R2V96N8NaxUTATCEpMCxCJsSYeQrc4ZmnUWBHRVntQJrPxolTwRpH3yEWMBFN4l1
 7XU56mEkDzXQMnHJbrzOyNWa/iAmYqUJXU9WbvrmMOv3ZMro7NqIl5mD46XkBBBK
 8BzayzP1QRg=
 =QimO
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.2/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Add am335x pinmux defines and start using them

This series of changes adds a new pinmux instance defines for am335x,
and a new AM33XX_PADCONF macro. And then the rest of the series updates
the dts files to use it.

The reasons for doing this is the pinmux configuration has been hard to
use and read. And we need to do this for eventually for moving to use
values.

This change is done one machine at a time, and can be easily reverted
as needed in case of unexpected trouble. The old macro is still working,
and we're planning to keep it around until we eventually change to use

* tag 'omap-for-v5.2/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (38 commits)
  ARM: dts: am335x: wega: Replaced register offsets with defines
  ARM: dts: am335x: sl50: Replaced register offsets with defines
  ARM: dts: am335x: shc: Replaced register offsets with defines
  ARM: dts: am335x: sbc-t335: Replaced register offsets with defines
  ARM: dts: am335x: sancloud-bbe: Replaced register offsets with defines
  ARM: dts: am335x: phycore-som: Replaced register offsets with defines
  ARM: dts: am335x: pepper: Replaced register offsets with defines
  ARM: dts: am335x: pdu001: Replaced register offsets with defines
  ARM: dts: am335x: pcm-953: Replaced register offsets with defines
  ARM: dts: am335x: osd335x-common: Replaced register offsets with defines
  ARM: dts: am335x: osd3358-sm-red: Replaced register offsets with defines
  ARM: dts: am335x: nano: Replaced register offsets with defines
  ARM: dts: am335x: moxa-uc-8100-me-t: Replaced register offsets with defines
  ARM: dts: am335x: moxa-uc-2101: Replaced register offsets with defines
  ARM: dts: am335x: moxa-uc-2100-common: Replaced register offsets with defines
  ARM: dts: am335x: lxm: Replaced register offsets with defines
  ARM: dts: am335x: igep0033: Replaced register offsets with defines
  ARM: dts: am335x: icev2: Replaced register offsets with defines
  ARM: dts: am335x: evmsk: Replaced register offsets with defines
  ARM: dts: am335x: evm: Replaced register offsets with defines
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-28 12:38:35 -07:00
Fabien Parent 699480d062 dt-bindings: mediatek: apmixedsys: add support for MT8516
Add binding documentation of apmixedsys for MT8516 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 14:35:29 -07:00
Fabien Parent eb2814bc60 dt-bindings: mediatek: infracfg: add support for MT8516
Add binding documentation of infracfg for MT8516 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 14:34:34 -07:00
Fabien Parent 67ea15169b dt-bindings: mediatek: topckgen: add support for MT8516
Add binding documentation of topckgen for MT8516 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 14:32:51 -07:00
Gabriel Fernandez 936289f047 clk: stm32: Introduce clocks of STM32F769 board
STM32F769 clocks are derived from STM32746 clocks.
main differences are:
- new source clock for SAI1 and SAI2 (HSI or HSE)
- Add DFSDM & DSI clocks

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 11:46:36 -07:00
Alexandre Torgue 966d9b928f dt-bindings: pinctrl: stm32: add new entry for package information
Add "st,package" entry. Possibles values are:
-STM32MP_PKG_AA for LFBGA448 (18*18) package
-STM32MP_PKG_AB for LFBGA354 (16*16) package
-STM32MP_PKG_AC for TFBGA361 (12*12) package
-STM32MP_PKG_AD for TFBGA257 (10*10) package

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-23 10:46:37 +02:00
Greg Kroah-Hartman 817de6b859 Merge 5.1-rc6 into staging-next
We want the fixes in here as well as this resolves an iio driver merge
issue.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-21 23:18:44 +02:00
Kishon Vijay Abraham I 4e0ae876f7 dt-bindings: phy: ti: Add dt binding documentation for SERDES in AM654x SoC
AM654x has two SERDES instances. Each instance has three input clocks
(left input, externel reference clock and right input) and two output
clocks (left output and right output) in addition to a PLL mux clock
which the SERDES uses for Clock Multiplier Unit (CMU refclock).
The PLL mux clock can select from one of the three input clocks.
The right output can select between left input and external reference
clock while the left output can select between the right input and
external reference clock.

The left and right input reference clock of SERDES0 and SERDES1
respectively are connected to the SoC clock. In the case of two lane
SERDES personality card, the left input of SERDES1 is connected to
the right output of SERDES0 in a chained fashion.

See section "Reference Clock Distribution" of AM65x Sitara Processors
TRM (SPRUID7 – April 2018) for more details.

Add dt-binding documentation in order to represent all these different
configurations in device tree.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17 14:13:18 +05:30
Kevin Hilman 55fbc7287e Merge branch 'reset/meson-g12a' of git://git.pengutronix.de/pza/linux into v5.2/dt64
* 'reset/meson-g12a' of git://git.pengutronix.de/pza/linux:
  dt-bindings: reset: meson-g12a: Add missing USB2 PHY resets
2019-04-15 15:43:03 -07:00
Paul Cercueil 93dc07f8b0 dt-bindings: clock: jz4725b-cgu: Add UDC PHY clock
Add macro for the UDC PHY clock of the JZ4725B.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-11 13:40:58 -07:00
Bjorn Andersson 5f19c6e936 dt-bindings: clock: Introduce Qualcomm Turing Clock controller
Add devicetree binding for the turing clock controller found in QCS404.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-11 13:34:10 -07:00
Bjorn Andersson 8bc7a04bb7 clk: qcom: gcc-qcs404: Add CDSP related clocks and resets
Add the clocks and resets need in order to control the Turing
remoteproc.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-11 13:32:20 -07:00
Weiyi Lu d90240bc07 clk: mediatek: Add dt-bindings for MT8183 clocks
Add MT8183 clock dt-bindings, include topckgen, apmixedsys,
infracfg, mcucfg and subsystem clocks.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-11 13:15:39 -07:00
Maxime Ripard c77cebac96
clk: sunxi-ng: sun5i: Export the MBUS clock
The MBUS clock is used by the MBUS controller, so let's export it so that
we can use it in our DT node.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-10 16:33:01 +02:00
Paul Walmsley 6ec4bae178
dt-bindings: clock: sifive: add FU540-C000 PRCI clock constants
Add preprocessor macros for the important PRCI output clocks
that are needed by both the FU540 PRCI driver and DT data.
Details are available in the FU540 manual in Chapter 7 of

    https://static.dev.sifive.com/FU540-C000-v1.0.pdf

Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-04-09 20:36:40 -07:00
Christina Quast f1ff9be765 ARM: dts: am33xx: Added AM33XX_PADCONF macro
AM33XX_PADCONF takes three instead of two parameters, to make
future changes to #pinctrl-cells easier.

For old boards which are not mainlined, we left the AM33XX_IOPAD
macro.

Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08 10:01:51 -07:00
Christina Quast 7ebd1ea798 ARM: dts: am33xx: Added macros for numeric pinmux addresses
The values are extraced from the "AM335x SitaraTM Processors Technical
Reference Manual", Section 9.3.1 CONTROL_MODULE Registers, based on the
file autogenerated by TI PinMux.

Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08 10:01:50 -07:00
Jerome Brunet 8554926b3f dt-bindings: clk: axg-audio: add g12a support
Add a new compatible string and additional clock ids for audio clock
controller of the g12a SoC family.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190329160649.31603-2-jbrunet@baylibre.com
2019-04-08 09:57:13 +02:00
Patrick Havelange 023e41632e dt-bindings: iio/temperature: Add thermocouple types (and doc)
This patch introduces common thermocouple types used by various
temperature sensors. Also a brief documentation explaining this
"thermocouple-type" property.

Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-04-04 20:21:01 +01:00
Martin Blumenstingl 77a725ff7a dt-bindings: clock: meson8b: export the video decoder clocks
Export the four video decoder clocks so they can be used by the video
decoder driver:
- VDEC_1
- VDEC_HCODEC
- VDEC_2
- VDEC_HEVC

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190324151423.19063-2-martin.blumenstingl@googlemail.com
2019-04-01 10:45:11 +02:00
Martin Blumenstingl ba1ce88efa dt-bindings: clock: meson8b: export the VPU clock
The VPU clock is an input the the "VPU" (Video Processing Unit), which is
one of the components of the display controller.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190324151104.18397-2-martin.blumenstingl@googlemail.com
2019-04-01 10:45:11 +02:00
Neil Armstrong 133bb341b9 dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN
When submitted v2 of the G12A AO-CLK IDs, the CLKID_AO_CTS_OSCIN was moved
to the internal non-exported bindings, but this clock is necessary for
the second AO-CEC-B module since it embeds the 32768Hz dual-divider
clock generator unlike the AO-CEC-A module.

Export it back to the public bindings.

Fixes: be3d960b0a ("dt-bindings: clk: add G12A AO Clock and Reset Bindings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20190321092010.14382-1-narmstrong@baylibre.com
2019-04-01 10:45:11 +02:00
Martin Blumenstingl 23e9ae2826 dt-bindings: clock: meson8b: drop the "ABP" clock definition
Commit 8e1dd17c8b ("dt-bindings: clock: meson8b: export the CPU post
dividers") added a new clock ID "CLKID_ABP" which contains a typo. This
was fixed by adding a new (typo-free) #define CLKID_APB in
commit 40d08f774c ("dt-bindings: clock: meson8b: add APB clock
definition").
Now that the new #define is used by the driver we can remove the old
one (because the old one is not used anywhere).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190319214123.27219-2-martin.blumenstingl@googlemail.com
2019-04-01 10:45:11 +02:00
Maxime Jourdan 1947890795 dt-bindings: clk: g12a-clkc: add VDEC clock IDs
Expose the three clocks related to the video decoder.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190319101138.27520-2-mjourdan@baylibre.com
2019-04-01 10:45:11 +02:00
Jerome Brunet e4c1e95fac dt-bindings: clock: axg-audio: unexpose controller inputs
Remove the bindings ID of the clock input of the controller. These
clocks are purely internal to the controller, exposing them was a
mistake. Actually, these should not even be in the provider and have
IDs to begin with.

Unexpose these IDs before:
 * someone starts using them (even if there no valid reason to do so)
 * the actual clocks are removed. The fact that they exist is just the
   result of an ugly hack. This will be resolved in CCF when we can
   reference DT directly in parent table.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Maxime Jourdan <mjourdan@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190213095835.17448-1-jbrunet@baylibre.com
2019-04-01 10:45:11 +02:00
Neil Armstrong a6256b3a92 dt-bindings: reset: meson-g12a: Add missing USB2 PHY resets
The G12A Documentation lacked these 2 reset lines, but they are present and
used for each USB 2 PHYs.

Add them to the dt-bindings for the upcoming USB support.

Fixes: dbfc54534d ("dt-bindings: reset: meson: add g12a bindings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-03-25 16:22:10 +01:00
Krzysztof Kozlowski c52c6857de clk: samsung: dt-bindings: Add ADC clock ID to Exynos5410
Add ID for TSADC clock to Exynos5410.  Choose the same value of ID as in
Exynos5420 to make it simpler/compatible in future (although clock
driver code is not shared).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-03-22 12:41:57 +01:00
Krzysztof Kozlowski 9d8e8f045a clk: samsung: dt-bindings: Put CLK_UART3 in order
Order the CLK_UART3 by ID.  No change in functionality.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-03-22 12:41:57 +01:00
Anson Huang d058fb60d5 dt-bindings: clock: imx7ulp: remove SNVS clock
Since i.MX7ULP B0 chip, SNVS module is moved into M4
domain, so remove it from Linux clock table.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-20 16:00:03 +08:00
Neil Armstrong 17750f5218 dt-bindings: clk: g12a-clkc: add PCIE PLL clock ID
Add a clock ID for the reference clock feeding the USB3+PCIe Combo PHY.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190307141455.23879-3-narmstrong@baylibre.com
2019-03-19 21:11:25 +01:00
Neil Armstrong dc6276f576 clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id
When submitted v2 of the G12A AO-CLK IDs, the SAR_ADC_SEL ID was moved
to the internal non-exported bindings, but this clock is necessary and
mandatory for the SAR ADC bindings.

Export it back to the public bindings.

Fixes: be3d960b0a ("dt-bindings: clk: add G12A AO Clock and Reset Bindings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190304105358.4987-1-narmstrong@baylibre.com
2019-03-19 21:10:21 +01:00
Neil Armstrong 58b5c8acba clk: meson-g12a: add cpu clock bindings
Add Amlogic G12A Family CPU clocks bindings, only export CPU_CLK since
it should be the only ID used.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190304131129.7762-2-narmstrong@baylibre.com
2019-03-19 21:08:03 +01:00
Anson Huang 0f8e231712 dt-bindings: firmware: imx-scu: add new resources to scu resource table
Add new resources as below according to latest system
controller firmware for new features:

	IMX_SC_R_PERF
	IMX_SC_R_OCRAM
	IMX_SC_R_DMA_5_CH0
	IMX_SC_R_DMA_5_CH1
	IMX_SC_R_DMA_5_CH2
	IMX_SC_R_DMA_5_CH3
	IMX_SC_R_ATTESTATION

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-19 16:46:37 +08:00
Anson Huang 9613163a28 dt-bindings: firmware: imx-scu: remove unused resources from scu resource table
Removes below resources which were defined during
pre-silicon phase and the real silicons do NOT have
them, they have never been used, latest system
controller firmware also removed them:

	IMX_SC_R_DC_0_CAPTURE0
	IMX_SC_R_DC_0_CAPTURE1
	IMX_SC_R_DC_0_INTEGRAL0
	IMX_SC_R_DC_0_INTEGRAL1
	IMX_SC_R_DC_0_FRAC1
	IMX_SC_R_DC_1_CAPTURE0
	IMX_SC_R_DC_1_CAPTURE1
	IMX_SC_R_DC_1_INTEGRAL0
	IMX_SC_R_DC_1_INTEGRAL1
	IMX_SC_R_DC_1_FRAC1
	IMX_SC_R_GPU_3_PID0
	IMX_SC_R_M4_0_SIM
	IMX_SC_R_M4_0_WDOG
	IMX_SC_R_M4_1_SIM
	IMX_SC_R_M4_1_WDOG

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-19 16:46:36 +08:00
Jolly Shah 31a2d5113e include: dt-binding: clock: Rename zynqmp header file
Rename file name of ZynqMP clk dt-bindings to align with
file name of reset and power dt-bindings.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-18 13:41:17 +01:00
Geert Uytterhoeven 3961d355df dt-bindings: power: r8a77965: Remove non-existent A3IR power domain
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the A3IR power domain on R-Car M3-N, as this SoC does not have
an Image Processing Unit (IMP-X5).

As of commit d8c6557bc9 ("arm64: dts: renesas: r8a77965: Remove
non-existent IPMMU-IR"), this definition is no longer used from DT, and
thus can be removed.

Fixes: a527709b78 ("soc: renesas: rcar-sysc: Add R-Car M3-N support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-18 10:33:58 +01:00
Linus Torvalds dc2535be1f We have a fairly balanced mix of clk driver updates and clk framework
updates this time around. It's the usual pile of new drivers for new
 hardware out there and the normal small fixes and updates, but then we
 have some core framework changes too.
 
 In the core framework, we introduce support for a clk_get_optional() API
 to get clks that may not always be populated and a way to devm manage clkdev
 lookups registered by provider drivers. We also do some refactoring to simplify
 the interface between clkdev and the common clk framework so we can reuse the DT
 parsing and clk_get() path in provider drivers in the future. This work will
 continue in the next few cycles while we convert how providers specify clk
 parents.
 
 On the driver side, the biggest part of the dirstat is the Amlogic clk driver
 that got support for the G12A SoC. It dominates with almost half the overall
 diff, while the second largest part of the diff is in the i.MX clk driver
 that gained support for imx8mm SoCs. After that, we have the Actions Semiconductor
 and Qualcomm drivers rounding out the big part of the dirstat because they both
 got new hardware support for SoCs. The rest is just various updates and non-critical
 fixes for existing drivers.
 
 Core:
  - Convert a few clk bindings to JSON schema format
  - Add a {devm_}clk_get_optional() API
  - Add devm_clk_hw_register_clkdev() API to manage clkdev lookups
  - Start rewriting clk parent registration and supporting device links
    by moving around code that supports clk_get() and DT parsing of the
    'clocks' property
 
 New Drivers:
  - Add Qualcomm MSM8998 RPM managed clks
  - IPA clk support on Qualcomm RPMh clk controllers
  - Actions Semi S500 SoC clk support
  - Support for fixed rate clks populated from an MMIO register
  - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car V3H
  - Add TMU (timer) clocks on Renesas RZ/G2E
  - Add Amlogic G12A Always-On Clock Controller
  - Add 32k clock generation for Amlogic AXG
  - Add support for the Mali GPU clocks on Amlogic Meson8
  - Add Amlogic G12A EE clock controller driver
  - Add missing CANFD clocks on Renesas RZ/G2M and RZ/G2E
  - Add i.MX8MM SoC clk driver support
 
 Removed Drivers:
  - Remove clps711x driver as the board support is gone
 
 Updates:
  - 3rd ECO fix for Mediatek MT2712 SoCs
  - Updates for Qualcomm MSM8998 GCC clks
  - Random static analysis fixes for clk drivers
  - Support for sleeping gpios in the clk-gpio type
  - Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.)
  - Split LCDC into two clks on the Marvell MMP2 SoC
  - Various DT of_node refcount fixes
  - Get rid of CLK_IS_BASIC from TI code (yay!)
  - TI Autoidle clk support
  - Fix Amlogic Meson8 APB clock ID name
  - Claim input clocks through DT for Amlogic AXG and GXBB
  - Correct the DU (display unit) parent clock on Renesas RZ/G2E
  - Exynos5433 IMEM CMU crypto clk support (SlimSS)
  - Fix for the PLL-MIPI on the Allwinner A23
  - Fix Rockchip rk3328 PLL rate calculation
  - Add SET_RATE_PARENT flag on display clk of Rockhip rk3066
  - i.MX SCU clk driver clk_set_parent() and cpufreq support
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlyIK9URHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSUtIA//SRHcUJBuF7bgLs0GWDL/C0WwQf90bgLn
 83jMUX9MCIS+/RBEUi/Xf9psGVaW3YPEAiRcYUeI1YIZhCrdZHp2YGClKOpXaXth
 vgM7Je+6Say+7ru6J9eHqhbEgx2e+HqT4shxK5I5J0SqMFgdugim4pthk+Lr/WL0
 bMdNHTERZUFrIId10RxuCH7D72nhkwiRkwNDfWjASKoH3spXLKC1vl/wbS5QDE1O
 eXA9OwkonSyrBKX7zMeQiks6f7HWoJO7ei05Twv4CD9UEeS17KmB6mkbmT3GPAuq
 dWbLOnt7I80fMnthKLIR0IWtJuCvPv3jXgP+Fin+e4wutNCnuduHIVc2XeQYmDaX
 rbo/20q4DarL2AaakuowXA7UJ75zYfxPkwgpwcYZ/QW9yzT6QMfynAYekjJGTdt3
 6VootYAwYIsh1VMGZIQLs23AaNYayDy0QWx/prxnEi95lK/+zjqVySPYC/rWe7XQ
 rUrO6YY0YxRdf5uVHneIfIJGs5F/Q8DgdLXp4tf2Ud2YF1bZ0UQOUKehxwM0rxRX
 F9P6iP6mHUuUPMa9rDlwSmgQXDdqH7E5IbXdSPjEFBogBfmhJfVKAo1EyaZgUytZ
 Y42qG/P3fGGfegfWTRAoaDRJn/+HfEmtREdgQ8JO14xlZwRDb/M43IEiQP4zGwlc
 f/OuWu3O9xA=
 =D4Bv
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk subsystem updates from Stephen Boyd:
 "We have a fairly balanced mix of clk driver updates and clk framework
  updates this time around. It's the usual pile of new drivers for new
  hardware out there and the normal small fixes and updates, but then we
  have some core framework changes too.

  In the core framework, we introduce support for a clk_get_optional()
  API to get clks that may not always be populated and a way to devm
  manage clkdev lookups registered by provider drivers. We also do some
  refactoring to simplify the interface between clkdev and the common
  clk framework so we can reuse the DT parsing and clk_get() path in
  provider drivers in the future. This work will continue in the next
  few cycles while we convert how providers specify clk parents.

  On the driver side, the biggest part of the dirstat is the Amlogic clk
  driver that got support for the G12A SoC. It dominates with almost
  half the overall diff, while the second largest part of the diff is in
  the i.MX clk driver that gained support for imx8mm SoCs. After that,
  we have the Actions Semiconductor and Qualcomm drivers rounding out
  the big part of the dirstat because they both got new hardware support
  for SoCs. The rest is just various updates and non-critical fixes for
  existing drivers.

  Core:
   - Convert a few clk bindings to JSON schema format
   - Add a {devm_}clk_get_optional() API
   - Add devm_clk_hw_register_clkdev() API to manage clkdev lookups
   - Start rewriting clk parent registration and supporting device links
     by moving around code that supports clk_get() and DT parsing of the
     'clocks' property

  New Drivers:
   - Add Qualcomm MSM8998 RPM managed clks
   - IPA clk support on Qualcomm RPMh clk controllers
   - Actions Semi S500 SoC clk support
   - Support for fixed rate clks populated from an MMIO register
   - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car V3H
   - Add TMU (timer) clocks on Renesas RZ/G2E
   - Add Amlogic G12A Always-On Clock Controller
   - Add 32k clock generation for Amlogic AXG
   - Add support for the Mali GPU clocks on Amlogic Meson8
   - Add Amlogic G12A EE clock controller driver
   - Add missing CANFD clocks on Renesas RZ/G2M and RZ/G2E
   - Add i.MX8MM SoC clk driver support

  Removed Drivers:
   - Remove clps711x driver as the board support is gone

  Updates:
   - 3rd ECO fix for Mediatek MT2712 SoCs
   - Updates for Qualcomm MSM8998 GCC clks
   - Random static analysis fixes for clk drivers
   - Support for sleeping gpios in the clk-gpio type
   - Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.)
   - Split LCDC into two clks on the Marvell MMP2 SoC
   - Various DT of_node refcount fixes
   - Get rid of CLK_IS_BASIC from TI code (yay!)
   - TI Autoidle clk support
   - Fix Amlogic Meson8 APB clock ID name
   - Claim input clocks through DT for Amlogic AXG and GXBB
   - Correct the DU (display unit) parent clock on Renesas RZ/G2E
   - Exynos5433 IMEM CMU crypto clk support (SlimSS)
   - Fix for the PLL-MIPI on the Allwinner A23
   - Fix Rockchip rk3328 PLL rate calculation
   - Add SET_RATE_PARENT flag on display clk of Rockhip rk3066
   - i.MX SCU clk driver clk_set_parent() and cpufreq support"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
  dt-bindings: clock: imx8mq: Fix numbering overlaps and gaps
  clk: ti: clkctrl: Fix clkdm_name regression for TI_CLK_CLKCTRL_COMPAT
  clk: fixup default index for of_clk_get_by_name()
  clk: Move of_clk_*() APIs into clk.c from clkdev.c
  clk: Inform the core about consumer devices
  clk: Introduce of_clk_get_hw_from_clkspec()
  clk: core: clarify the check for runtime PM
  clk: Combine __clk_get() and __clk_create_clk()
  clk: imx8mq: add GPIO clocks to clock tree
  clk: mediatek: correct cpu clock name for MT8173 SoC
  clk: imx: Refactor entire sccg pll clk
  clk: imx: scu: add cpu frequency scaling support
  clk: mediatek: Mark bus and DRAM related clocks as critical
  clk: mediatek: Add flags to mtk_gate
  clk: mediatek: Add MUX_FLAGS macro
  clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks
  clk: ingenic: Remove set but not used variable 'enable'
  clk: at91: programmable: remove unneeded register read
  clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel
  clk: mediatek: add MUX_GATE_FLAGS_2
  ...
2019-03-14 08:46:17 -07:00
Abel Vesa 010d5166bb dt-bindings: clock: imx8mq: Fix numbering overlaps and gaps
IMX8MQ_CLK_USB_PHY_REF changes from 163 to 153, this way removing the gap.
All the following clock ids are now decreased by 10 to keep the numbering
right. Doing this, the IMX8MQ_CLK_CSI2_CORE is not overlapped with
IMX8MQ_CLK_GPT1 anymore. IMX8MQ_CLK_GPT1_ROOT changes from 193 to 183 and
all the following ids are updated accordingly.

Reported-by: Patrick Wildt <patrick@blueri.se>
Fixes: 1cf3817b ("dt-bindings: Add binding for i.MX8MQ CCM")
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-03-12 13:40:10 -07:00
Linus Torvalds cf0240a755 This is the bulk of pin control changes for the v5.1 kernel cycle.
No core changes.
 
 New drivers:
 
 - NXP (ex Freescale) i.MX 8QM driver.
 
 - NXP (ex Freescale) i.MX 8MM driver.
 
 - AT91 SAM9X60 subdriver.
 
 Improvements:
 
 - Support for external interrups (EINT) on Mediatek virtual GPIOs.
 
 - Make BCM2835 pin config fully generic.
 
 - Lots of Renesas SH-PFC incremental improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJchil8AAoJEEEQszewGV1zTCcP/AurT3InBO4nVdN9UMuoDL7P
 gx3SALULapc4+M1NUoRw+w+z5fvjd0gGdPXZeyhX1E9kXxLmWBmBf6tl0MO2YYPC
 UWbSnBaWIOOli0f4k+GKVF8LKqD0z0e/YqX4mG7UI3OLJzcJgm7OL9uXN3Gh7tIP
 Pa6CGbv0aRDkZpWUD2ZTpSPCRYGT57roVq//d7V7s+0lveS97pQuMv43YlS5L2my
 JOOhHNG33bgi4lS/ZOP81G16oOrVaoupXuX7E+AvgG6vxr5965Fi+qoGLkxIuYOm
 jtrzuNY98eL2m9b505VYdNmD7ouBhG6CKFb4njpOvjkkqNUXOaGV53wlEuEYRUNz
 bsp0596+dlOcW7wl11r6YI4Kyn2wQJFql1AwS8A4dEtbuboGrDy16N3adr1SkIGZ
 4ESN8xydcC7CAgUGXks+AgDj9vYwOs4apylJDW5tMk4K0LIsEYsDkbNeS9hwDYIH
 ZlbQe9N2loB6qQbX3c3D3/sIhKj2VB4elONSwOW10M8OJdJwp8h44UyMZ3TIEHIT
 7Gu9pw5vobXbccKCSjqkYYflaHMmjwZUtLqDZws818sbe/xgDxONbRqloZCLV39Y
 kmwRGbbE5WtNAM0X+ABwMG3Lm77wxCFKCjJwLHH79qqt4kSBynEKXQ4D/coG/Hln
 6idanzKEPiIBJ+6QLdbQ
 =EfXK
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is a calm cycle, not much happened this time around: not even
  much incremental development. Some three new drivers, that is all.

  No core changes.

  New drivers:

   - NXP (ex Freescale) i.MX 8QM driver.

   - NXP (ex Freescale) i.MX 8MM driver.

   - AT91 SAM9X60 subdriver.

  Improvements:

   - Support for external interrups (EINT) on Mediatek virtual GPIOs.

   - Make BCM2835 pin config fully generic.

   - Lots of Renesas SH-PFC incremental improvements"

* tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (70 commits)
  pinctrl: imx: fix scu link errors
  dt-bindings: pinctrl: Document the i.MX50 IOMUXC binding
  pinctrl: qcom: spmi-gpio: Reorder debug print
  pinctrl: nomadik: fix possible object reference leak
  pinctrl: stm32: return error upon hwspinlock failure
  pinctrl: stm32: fix memory leak issue
  pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions
  pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions
  pinctrl: sh-pfc: Validate fixed-size field widths at build time
  pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups
  pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group
  pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group
  pinctrl: sh-pfc: emev2: Add missing pinmux functions
  pinctrl: sunxi: Support I/O bias voltage setting on A80
  pinctrl: ingenic: Add LCD pins for the JZ4725B SoC
  pinctrl: samsung: Remove legacy API for handling external wakeup interrupts mask
  pinctrl: bcm2835: Direct GPIO config changes to generic pinctrl
  pinctrl: bcm2835: declare pin config as generic
  pinctrl: qcom: qcs404: Drop unused UFS_RESET macro
  dt-bindings: add documentation for slew rate
  ...
2019-03-11 11:12:50 -07:00
Stephen Boyd fea0b0850a Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-rockchip' into clk-next
- Convert a few clk bindings to JSON schema format
 - 3rd ECO fix for Mediatek MT2712 SoCs

* clk-typo:
  clk: samsung: fix typo

* clk-json-schema:
  dt-bindings: clock: Convert fixed-factor-clock to json-schema
  dt-bindings: clock: Convert fixed-clock binding to json-schema

* clk-mtk-2712-eco:
  clk: mediatek: update clock driver of MT2712
  dt-bindings: clock: add clock for MT2712

* clk-rockchip:
  clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks
  clk: rockchip: fix frac settings of GPLL clock for rk3328
2019-03-08 10:34:22 -08:00
Stephen Boyd efb1e0b071 Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk-crit' and 'clk-mtk' into clk-next
* clk-ingenic:
  clk: ingenic: Remove set but not used variable 'enable'
  clk: ingenic: Fix doc of ingenic_cgu_div_info
  clk: ingenic: Fix round_rate misbehaving with non-integer dividers
  clk: ingenic: jz4740: Fix gating of UDC clock

* clk-mtk-mux:
  clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel
  clk: mediatek: add MUX_GATE_FLAGS_2

* clk-qcom-sdm845-pcie:
  clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks

* clk-mtk-crit:
  clk: mediatek: Mark bus and DRAM related clocks as critical
  clk: mediatek: Add flags to mtk_gate
  clk: mediatek: Add MUX_FLAGS macro

* clk-mtk:
  clk: mediatek: correct cpu clock name for MT8173 SoC
2019-03-08 10:29:30 -08:00
Stephen Boyd 75f486c015 Merge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and 'clk-SA-fixes' into clk-next
- Updates for qcom MSM8998 GCC clks
 - qcom MSM8998 RPM managed clks
 - Random static analysis fixes for clk drivers

* clk-qcom-msm8998:
  clk: qcom: Make common clk_hw registrations
  clk: qcom: smd: Add support for MSM8998 rpm clocks
  clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998
  clk: qcom: Add missing freq for usb30_master_clk on 8998
  clk: qcom: Add CLK_SET_RATE_PARENT for 8998 branch clocks

* clk-fractional-parent:
  clk: fractional-divider: check parent rate only if flag is set

* clk-x86-mv:
  clk: x86: Move clk-lpss.h to platform_data/x86

* clk-SA-fixes:
  clk: mediatek: fix platform_no_drv_owner.cocci warnings
  clk: tegra: dfll: Fix debugfs_simple_attr.cocci warnings
  clk: qoriq: Improve an error message
2019-03-08 10:29:15 -08:00
Stephen Boyd 461ea6ab2c Merge branches 'clk-qcom-rpmh', 'clk-gpio-sleep', 'clk-stm32mp1', 'clk-qcom-qcs404' and 'clk-actions-s500' into clk-next
- IPA clk support on Qualcomm RPMh clk controllers
 - Support sleeping gpios in clk-gpio type
 - Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.)
 - Actions Semi S500 SoC clk support

* clk-qcom-rpmh:
  clk: qcom: clk-rpmh: Add IPA clock support

* clk-gpio-sleep:
  clk: clk-gpio: add support for sleeping GPIOs in gpio-gate-clk

* clk-stm32mp1:
  dt-bindings: clock: remove unused definition for stm32mp1
  clk: stm32mp1: fix bit width of hse_rtc divider
  clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flag
  clk: stm32mp1: fix HSI divider flag
  clk: stm32mp1: fix mcu divider table
  clk: stm32mp1: set ck_csi as critical clock
  clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocks
  clk: stm32mp1: parent clocks update

* clk-qcom-qcs404:
  clk: qcom: gcc-qcs404: Add cfg_offset for blsp1_uart3 clock
  clk: qcom: clk-rcg2: Introduce a cfg offset for RCGs
  clk: qcom: remove empty lines in clk-rcg.h

* clk-actions-s500:
  clk: actions: Add clock driver for S500 SoC
  dt-bindings: clock: Add DT bindings for Actions Semi S500 CMU
  clk: actions: Add configurable PLL delay
2019-03-08 10:27:52 -08:00
Stephen Boyd e7faa095cb Merge branches 'clk-imx', 'clk-samsung', 'clk-ti', 'clk-uniphier-gear' and 'clk-mmp2-lcdc' into clk-next
- Split LCDC into two clks on the Marvell MMP2 SoC

* clk-imx:
  clk: imx8mq: add GPIO clocks to clock tree
  clk: imx: Refactor entire sccg pll clk
  clk: imx: scu: add cpu frequency scaling support
  clk: imx: imx8mm: Mark init function __init
  clk: imx8mq: Add the missing ARM clock
  dt-bindings: imx8mq-clock: Add the missing ARM clock
  clk: imx: imx8mq: Fix the rate propagation for arm pll
  clk: imx8mq: Add support for the CLKO1 clock
  clk: imx8mq: Fix the CLKO2 source select list
  clk: imx8mq: Add missing M4 clocks
  clk: imx: Add clock driver support for imx8mm
  dt-bindings: imx: Add clock binding doc for imx8mm
  clk: imx: Add PLLs driver for imx8mm soc
  clk: imx5: add imx5_SCC2_IPG_GATE
  clk: imx: scu: add set parent support
  clk: imx: scu: add fallback compatible string support
  clk: imx8mq: Make parent names arrays const pointers
  clk: imx: Make parents const pointer in mux wrappers
  clk: imx: Make parent_names const pointer in composite-8m

* clk-samsung:
  clk: samsung: s3c2443: Mark expected switch fall-through
  clk: samsung: exynos5: Fix kfree() of const memory on setting driver_override
  clk: samsung: exynos5: Fix possible NULL pointer exception on platform_device_alloc() failure
  clk: samsung: exynos5433: Add selected IMEM clocks
  clk: samsung: dt-bindings: Document Exynos5433 IMEM CMU
  clk: samsung: exynos5433: Fix name typo in sssx
  clk: samsung: exynos5433: Fix definition of CLK_ACLK_IMEM_{200, 266} clocks
  clk: samsung: dt-bindings: Add Exynos5433 IMEM CMU clock IDs

* clk-ti:
  clk: clk-twl6040: Fix imprecise external abort for pdmclk
  ARM: OMAP2+: hwmod: disable ick autoidling when a hwmod requires that
  clk: ti: check clock type before doing autoidle ops
  clk: ti: add a usecount for autoidle
  clk: ti: generalize the init sequence of clk_hw_omap clocks
  clk: ti: remove usage of CLK_IS_BASIC
  clk: ti: add new API for checking if a provided clock is an OMAP clock
  clk: ti: move clk_hw_omap list handling under generic part of the driver

* clk-uniphier-gear:
  clk: uniphier: Fix update register for CPU-gear

* clk-mmp2-lcdc:
  clk: mmp2: separate LCDC peripheral clk form the display clock
  dt-bindings: marvell,mmp2: Add clock id for the LCDC clock
2019-03-08 10:27:40 -08:00
Stephen Boyd 3f8e7e7247 Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', 'clk-meson' and 'clk-renesas' into clk-next
- Add a {devm_}clk_get_optional() API
 - Add devm_clk_hw_register_clkdev() API to manage clkdev lookups

* clk-optional:
  clk: Add (devm_)clk_get_optional() functions
  clk: Add comment about __of_clk_get_by_name() error values

* clk-devm-clkdev-register:
  clk: clk-st: avoid clkdev lookup leak at remove
  clk: clk-max77686: Clean clkdev lookup leak and use devm
  clkdev: add managed clkdev lookup registration

* clk-allwinner:
  clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it

* clk-meson: (22 commits)
  clk: meson: meson8b: fix the naming of the APB clocks
  dt-bindings: clock: meson8b: add APB clock definition
  clk: meson: Add G12A AO Clock + Reset Controller
  dt-bindings: clk: add G12A AO Clock and Reset Bindings
  clk: meson: factorise meson64 peripheral clock controller drivers
  clk: meson: g12a: add peripheral clock controller
  dt-bindings: clk: meson: add g12a periph clock controller bindings
  clk: meson: pll: update driver for the g12a
  clk: meson: rework and clean drivers dependencies
  clk: meson: axg-audio does not require syscon
  clk: meson: use CONFIG_ARCH_MESON to enter meson clk directory
  clk: export some clk_hw function symbols for module drivers
  clk: meson: ao-clkc: claim clock controller input clocks from DT
  clk: meson: axg: claim clock controller input clock from DT
  clk: meson: gxbb: claim clock controller input clock from DT
  clk: meson: meson8b: add the GPU clock tree
  clk: meson: meson8b: use a separate clock table for Meson8
  clk: meson: axg-ao: add 32k generation subtree
  clk: meson: gxbb-ao: replace cec-32k with the dual divider
  clk: meson: add dual divider clock driver
  ...

* clk-renesas:
  clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK
  clk: renesas: r8a774c0: Fix LAST_DT_CORE_CLK
  clk: renesas: r8a774c0: Add TMU clock
  clk: renesas: r8a77980: Add RPC clocks
  clk: renesas: rcar-gen3: Add RPC clocks
  clk: renesas: rcar-gen3: Add spinlock
  clk: renesas: rcar-gen3: Factor out cpg_reg_modify()
  clk: renesas: r8a774c0: Correct parent clock of DU
  clk: renesas: r8a774a1: Add missing CANFD clock
  clk: renesas: r8a774c0: Add missing CANFD clock
2019-03-08 10:27:21 -08:00
Linus Torvalds 3601fe43e8 This is the bulk of GPIO changes for the v5.1 cycle:
Core changes:
 
 - The big change this time around is the irqchip handling in
   the qualcomm pin controllers, closely coupled with the
   gpiochip. This rework, in a classic fall-between-the-chairs
   fashion has been sidestepped for too long. The Qualcomm
   IRQchips using the SPMI and SSBI transport mechanisms have
   been rewritten to use hierarchical irqchip. This creates
   the base from which I intend to gradually pull support for
   hierarchical irqchips into the gpiolib irqchip helpers to
   cut down on duplicate code. We have too many hacks in the
   kernel because people have been working around the missing
   hierarchical irqchip for years, and once it was there,
   noone understood it for a while. We are now slowly adapting
   to using it. This is why this pull requests include changes
   to MFD, SPMI, IRQchip core and some ARM Device Trees
   pertaining to the Qualcomm chip family. Since Qualcomm have
   so many chips and such large deployments it is paramount
   that this platform gets this right, and now it (hopefully)
   does.
 
 - Core support for pull-up and pull-down configuration, also
   from the device tree. When a simple GPIO chip support a
   "off or on" pull-up or pull-down resistor, we provide a
   way to set this up using machine descriptors or device tree.
   If more elaborate control of pull up/down (such as
   resistance shunt setting) is required, drivers should be
   phased over to use pin control. We do not yet provide a
   userspace ABI for this pull up-down setting but I suspect
   the makers are going to ask for it soon enough. PCA953x
   is the first user of this new API.
 
 - The GPIO mockup driver has been revamped after some
   discussion improving the IRQ simulator in the process.
   The idea is to make it possible to use the mockup for
   both testing and virtual prototyping, e.g. when you do
   not yet have a GPIO expander to play with but really
   want to get something to develop code around before
   hardware is available. It's neat. The blackbox testing
   usecase is currently making its way into kernelci.
 
 - ACPI GPIO core preserves non direction flags when updating
   flags.
 
 - A new device core helper for devm_platform_ioremap_resource()
   is funneled through the GPIO tree with Greg's ACK.
 
 New drivers:
 
 - TQ-Systems QTMX86 GPIO controllers (using port-mapped
   I/O)
 
 - Gateworks PLD GPIO driver (vaccumed up from OpenWrt)
 
 - AMD G-Series PCH (Platform Controller Hub) GPIO driver.
 
 - Fintek F81804 & F81966 subvariants.
 
 - PCA953x now supports NXP PCAL6416.
 
 Driver improvements:
 
 - IRQ support on the Nintendo Wii (Hollywood) GPIO.
 
 - get_direction() support for the MVEBU driver.
 
 - Set the right output level on SAMA5D2.
 
 - Drop the unused irq trigger setting on the Spreadtrum
   driver.
 
 - Wakeup support for PCA953x.
 
 - A slew of cleanups in the various Intel drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJcgoLEAAoJEEEQszewGV1zjBAP/3OmTFGv49PFmJwSx+PlLiYf
 V6/UPaQzq81CGSMtHxbS51TyP9Id7PCfsacbuFYutzn0D1efvl7jrkb8qJ6fVvCM
 bl/i6q8ipRTPzAf1hD3QCgCe3BXCA064/OcPrz987oIvI3bJQXsmBjBSXHWr4Cwa
 WfB5DX/afn9TK3XHhMQGfw5f0d+TtnKAs90RTTVKiz9Ow8eFYZJOhgPkvhCR3Gi9
 YJIzIAiwhHZ7/zauo4JAYFU/O/Z3YEC5zeLne2ItebzNooRkSxdz0c9Hs7HlCZmU
 930Uv9jNN89N3vPqpZzAHtPvwDOmAILMWvKy9xRSp+eoIukarRJgF7ALPk7QWxK1
 yy+tGj4dXBQ6tI8W3wUN1WgjNpii3K1HbJ+1LQVQL2/q9o+3YXXqmjdjuw7C8YYV
 5ystNrUppkgfIIciHL4lhqw3wKJJhVEAns2V245hIitoShT+RvIg8GQbGZmWlQFd
 YsHbynqHL9iwfRNv26kEqZXZOo/4D1t6Scw+OPVyba2Wyttf+qbmg+XaYMqFaxYW
 mfydvdtymeCOUIPJMzw58KGPUTXJ4UPLENyayXNUHokr1a8VO8OIthY7zwi0CpvJ
 IcsAY9zoGxvfbRV922mlIsw3oOBcM2IN2lC9sY469ZVnjBrdC3rsQpIBZr+Vzz8i
 YlUfXLSGSyuUZUz//2eG
 =VoVC
 -----END PGP SIGNATURE-----

Merge tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v5.1 cycle:

  Core changes:

   - The big change this time around is the irqchip handling in the
     qualcomm pin controllers, closely coupled with the gpiochip. This
     rework, in a classic fall-between-the-chairs fashion has been
     sidestepped for too long.

     The Qualcomm IRQchips using the SPMI and SSBI transport mechanisms
     have been rewritten to use hierarchical irqchip. This creates the
     base from which I intend to gradually pull support for hierarchical
     irqchips into the gpiolib irqchip helpers to cut down on duplicate
     code.

     We have too many hacks in the kernel because people have been
     working around the missing hierarchical irqchip for years, and once
     it was there, noone understood it for a while. We are now slowly
     adapting to using it.

     This is why this pull requests include changes to MFD, SPMI,
     IRQchip core and some ARM Device Trees pertaining to the Qualcomm
     chip family. Since Qualcomm have so many chips and such large
     deployments it is paramount that this platform gets this right, and
     now it (hopefully) does.

   - Core support for pull-up and pull-down configuration, also from the
     device tree. When a simple GPIO chip supports an "off or on" pull-up
     or pull-down resistor, we provide a way to set this up using
     machine descriptors or device tree.

     If more elaborate control of pull up/down (such as resistance shunt
     setting) is required, drivers should be phased over to use pin
     control. We do not yet provide a userspace ABI for this pull
     up-down setting but I suspect the makers are going to ask for it
     soon enough. PCA953x is the first user of this new API.

   - The GPIO mockup driver has been revamped after some discussion
     improving the IRQ simulator in the process.

     The idea is to make it possible to use the mockup for both testing
     and virtual prototyping, e.g. when you do not yet have a GPIO
     expander to play with but really want to get something to develop
     code around before hardware is available. It's neat. The blackbox
     testing usecase is currently making its way into kernelci.

   - ACPI GPIO core preserves non direction flags when updating flags.

   - A new device core helper for devm_platform_ioremap_resource() is
     funneled through the GPIO tree with Greg's ACK.

  New drivers:

   - TQ-Systems QTMX86 GPIO controllers (using port-mapped I/O)

   - Gateworks PLD GPIO driver (vaccumed up from OpenWrt)

   - AMD G-Series PCH (Platform Controller Hub) GPIO driver.

   - Fintek F81804 & F81966 subvariants.

   - PCA953x now supports NXP PCAL6416.

  Driver improvements:

   - IRQ support on the Nintendo Wii (Hollywood) GPIO.

   - get_direction() support for the MVEBU driver.

   - Set the right output level on SAMA5D2.

   - Drop the unused irq trigger setting on the Spreadtrum driver.

   - Wakeup support for PCA953x.

   - A slew of cleanups in the various Intel drivers"

* tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (110 commits)
  gpio: gpio-omap: fix level interrupt idling
  gpio: amd-fch: Set proper output level for direction_output
  x86: apuv2: remove unused variable
  gpio: pca953x: Use PCA_LATCH_INT
  platform/x86: fix PCENGINES_APU2 Kconfig warning
  gpio: pca953x: Fix dereference of irq data in shutdown
  gpio: amd-fch: Fix type error found by sparse
  gpio: amd-fch: Drop const from resource
  gpio: mxc: add check to return defer probe if clock tree NOT ready
  gpio: ftgpio: Register per-instance irqchip
  gpio: ixp4xx: Add DT bindings
  x86: pcengines apuv2 gpio/leds/keys platform driver
  gpio: AMD G-Series PCH gpio driver
  drivers: depend on HAS_IOMEM for devm_platform_ioremap_resource()
  gpio: tqmx86: Set proper output level for direction_output
  gpio: sprd: Change to use SoC compatible string
  gpio: sprd: Use SoC compatible string instead of wildcard string
  gpio: of: Handle both enable-gpio{,s}
  gpio: of: Restrict enable-gpio quirk to regulator-gpio
  gpio: davinci: use devm_platform_ioremap_resource()
  ...
2019-03-08 10:09:53 -08:00
Linus Torvalds cf2e8c544c - New Drivers
- Add STMPE ADC Input driver
    - Add STMicroelectronics STPMIC1 Parent driver
    - Add STMicroelectronics STPMIC1 OnKey Misc driver
    - Add STMicroelectronics STPMIC1 Watchdog driver
    - Add Cirrus Logic Lochnagar Parent driver
    - Add TQ-Systems TQMX86 Parent driver
 
  - New Device Support
    - Add support for ADC to STMPE
 
  - New (or moved) Functionality
    - Move Lightbar functionality to its own driver; cros_ec_lightbar
    - Move VBC functionality to its own driver; cros_ec_vbc
    - Move VBC functionality to its own driver; cros_ec_vbc
    - Move DebugFS functionality to its own driver; cros_ec_debugfs
    - Move SYSFS functionality to its own driver; cros_ec_sysfs
    - Add support for input voltage options; tps65218
 
  - Fix-ups
    - Use devm_* managed resources; cros_ec
    - Device Tree documentation; stmpe, aspeed-lpc, lochnagar
    - Trivial Clean-ups; stmpe
    - Rip out broken modular code; aat2870-core, adp5520, as3711,
          db8500-prcmu, htc-i2cpld, max8925-core, rc5t583, sta2x11-mfd,
 	 syscon, tps65090, tps65910, tps68470 tps80031, wm831x-spi,
 	 wm831x-i2c, wm831x-core, wm8350-i2c, wm8350-core, wm8400-core
    - Kconfig fixups; INTEL_SOC_PMIC
    - Improve error path; sm501, sec-core
    - Use struct_size() helper; sm501
    - Constify; at91-usart
    - Use pointers instead of copying data; at91-usart
    - Deliver proper return value; cros_ec_dev
    - Trivial formatting/whitespace; sec-core
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAlyA5j4ACgkQUa+KL4f8
 d2EAyw/+N7N77ex5Ryxmyn61SWvgTL221tj+olw6RqC92Vfw6S2ZFP1CsM/E7tZb
 qCLYkkJSgBLKoOCI5OLiXsvWCPjyLU33nG/oS0SSiMJ1Fp9M0h7uRnOtOio3z31i
 w9MJAvEY3RN8I1bRGMO6aWUtT0q3AzHNtdl+7BqAkjjeXiUE0lGd5eARRS1zRWSa
 ki0OzUkJeszPk+6E6N0K+BQZxcL3cBEsR8ZAif903cMEbqsJIv4nmif4b5D63BKH
 PtOLn+6HVMG4bzqRRytVhcO/z2uj2jlLCHH9wBnyd4b7SoLFuz15yN5DhD4bKLt7
 0UMqiBlC2MeaTv3wyKjeNPQtaMY7zJNUpdFly1PHAYR4oy5kbqk2IAv30N/zRfPK
 zLmWWq7DYdazBxSSGKmpGEW63Dkr/MQY2oj4nUlcank/X0K7LvmXv7kIxp9jJhA5
 bE76f77uHneHvq5OTc5CZtaYNqZbE6tO8rqZ2QlfCqa0M8VxbcrYiym0fQFJBdsH
 eFtaTG162ssZq1npV759c4/2E3zQ3EW+rj89/AWp8ViJULQLyPY2nUYddx+w04Se
 kSdgYCvMI5byvF+Tuq/CbUWz7kyca3D+EFiYTkzIfrZr+4yiG2VO8wEO1knkEUVo
 9X/wnAD5hQJePEM8CyPZrnirndB0W6SAvSmRZlF/OAbuCBz1DkQ=
 =tUge
 -----END PGP SIGNATURE-----

Merge tag 'mfd-next-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Drivers:
   - Add STMPE ADC Input driver
   - Add STMicroelectronics STPMIC1 Parent driver
   - Add STMicroelectronics STPMIC1 OnKey Misc driver
   - Add STMicroelectronics STPMIC1 Watchdog driver
   - Add Cirrus Logic Lochnagar Parent driver
   - Add TQ-Systems TQMX86 Parent driver

  New Device Support:
   - Add support for ADC to STMPE

  New (or moved) Functionality:
   - Move Lightbar functionality to its own driver; cros_ec_lightbar
   - Move VBC functionality to its own driver; cros_ec_vbc
   - Move VBC functionality to its own driver; cros_ec_vbc
   - Move DebugFS functionality to its own driver; cros_ec_debugfs
   - Move SYSFS functionality to its own driver; cros_ec_sysfs
   - Add support for input voltage options; tps65218

  Fixes:
   - Use devm_* managed resources; cros_ec
   - Device Tree documentation; stmpe, aspeed-lpc, lochnagar
   - Trivial Clean-ups; stmpe
   - Rip out broken modular code; aat2870-core, adp5520, as3711,
         db8500-prcmu, htc-i2cpld, max8925-core, rc5t583, sta2x11-mfd,
	 syscon, tps65090, tps65910, tps68470 tps80031, wm831x-spi,
	 wm831x-i2c, wm831x-core, wm8350-i2c, wm8350-core, wm8400-core
   - Kconfig fixups; INTEL_SOC_PMIC
   - Improve error path; sm501, sec-core
   - Use struct_size() helper; sm501
   - Constify; at91-usart
   - Use pointers instead of copying data; at91-usart
   - Deliver proper return value; cros_ec_dev
   - Trivial formatting/whitespace; sec-core"

* tag 'mfd-next-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (53 commits)
  mfd: mxs-lradc: Mark expected switch fall-through
  mfd: sec-core: Cleanup formatting to a consistent style
  mfd: tqmx86: IO controller with I2C, Wachdog and GPIO
  mfd: intel-lpss: Move linux/pm.h to the local header
  mfd: cros_ec_dev: Return number of bytes read with CROS_EC_DEV_IOCRDMEM
  mfd: tps68470: Drop unused MODULE_DEVICE_TABLE
  mfd: at91-usart: No need to copy mfd_cell in probe
  mfd: at91-usart: Constify at91_usart_spi_subdev and at91_usart_serial_subdev
  mfd: lochnagar: Add support for the Cirrus Logic Lochnagar
  mfd: lochnagar: Add initial binding documentation
  dt-bindings: mfd: aspeed-lpc: Make parameter optional
  mfd: sec-core: Return gracefully instead of BUG() if device cannot match
  mfd: sm501: Use struct_size() in devm_kzalloc()
  mfd: sm501: Fix potential NULL pointer dereference
  mfd: Kconfig: Fix I2C_DESIGNWARE_PLATFORM dependencies
  mfd: tps65218.c: Add input voltage options
  mfd: wm8400-core: Make it explicitly non-modular
  mfd: wm8350-core: Drop unused module infrastructure from non-modular code
  mfd: wm8350-i2c: Make it explicitly non-modular
  mfd: wm831x-core: Drop unused module infrastructure from non-modular code
  ...
2019-03-08 10:02:58 -08:00
Linus Torvalds e266ca36da Staging/IIO patches for 5.1-rc1
Here is the big staging/iio driver pull request for 5.1-rc1.
 
 Lots of good IIO driver updates and cleanups in here as always.
 Combined with the removal of the xgifb driver, we have a net "loss" of
 over 9000 lines in the pull request, always a nice thing.
 
 As the outreachy application process is currently happening, there are
 loads of tiny checkpatch cleanup fixes all over the staging tree, which
 accounts for the majority of the fixups.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXH+gLQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymBiQCeJpoBhG+W3r+kP8w65ZY8qU+/liIAn0Tkl4/k
 IX1dQzCsEpO1jA8AHj6n
 =7wCH
 -----END PGP SIGNATURE-----

Merge tag 'staging-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging/IIO updates from Greg KH:
 "Here is the big staging/iio driver pull request for 5.1-rc1.

  Lots of good IIO driver updates and cleanups in here as always.
  Combined with the removal of the xgifb driver, we have a net "loss" of
  over 9000 lines in the pull request, always a nice thing.

  As the outreachy application process is currently happening, there are
  loads of tiny checkpatch cleanup fixes all over the staging tree,
  which accounts for the majority of the fixups"

* tag 'staging-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (341 commits)
  staging: mt7621-dma: remove license boilerplate text
  staging: mt7621-dma: add SPDX GPL-2.0+ license identifier
  Staging: ks7010: Replace typecast to int
  Staging: vt6655: Align a static function declaration
  staging: speakup: fix line over 80 characters.
  staging: mt7621-eth: Remove license boilerplate text
  staging: mt7621-eth: Add SPDX license identifier
  staging: ks7010: removed custom Michael MIC implementation.
  staging: rtl8192e: Fix space and suspect issue
  Staging: vt6655: Modify comment style of SPDX License Identifier
  Staging: vt6655: Modify comment style for SPDX-License-Identifier
  Staging: vt6655: Align a function declaration
  Staging: vt6655: Alignment of function declaration
  staging: rtl8712: Fix indentation issue
  staging: wilc1000: fix incorrent type in initializer
  staging: rtl8188eu: remove unused P2P_PRIVATE_IOCTL_SET_LEN
  staging: rtl8188eu: remove unused enum P2P_PROTO_WK_ID
  staging: rtl8723bs: Remove duplicated include from drv_types.h
  Staging: vt6655: Alignment should match open parenthesis
  staging: erofs: fix mis-acted TAIL merging behavior
  ...
2019-03-06 16:29:27 -08:00
Linus Torvalds 45763bf4bc Char/Misc driver patches for 5.1-rc1
Here is the big char/misc driver patch pull request for 5.1-rc1.
 
 The largest thing by far is the new habanalabs driver for their AI
 accelerator chip.  For now it is in the drivers/misc directory but will
 probably move to a new directory soon along with other drivers of this
 type.
 
 Other than that, just the usual set of individual driver updates and
 fixes.  There's an "odd" merge in here from the DRM tree that they asked
 me to do as the MEI driver is starting to interact with the i915 driver,
 and it needed some coordination.  All of those patches have been
 properly acked by the relevant subsystem maintainers.
 
 All of these have been in linux-next with no reported issues, most for
 quite some time.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXH+dPQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ym1fACgvpZAxjNzoRQJ6f06tc8ujtPk9rUAnR+tCtrZ
 9e3l7H76oe33o96Qjhor
 =8A2k
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big char/misc driver patch pull request for 5.1-rc1.

  The largest thing by far is the new habanalabs driver for their AI
  accelerator chip. For now it is in the drivers/misc directory but will
  probably move to a new directory soon along with other drivers of this
  type.

  Other than that, just the usual set of individual driver updates and
  fixes. There's an "odd" merge in here from the DRM tree that they
  asked me to do as the MEI driver is starting to interact with the i915
  driver, and it needed some coordination. All of those patches have
  been properly acked by the relevant subsystem maintainers.

  All of these have been in linux-next with no reported issues, most for
  quite some time"

* tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (219 commits)
  habanalabs: adjust Kconfig to fix build errors
  habanalabs: use %px instead of %p in error print
  habanalabs: use do_div for 64-bit divisions
  intel_th: gth: Fix an off-by-one in output unassigning
  habanalabs: fix little-endian<->cpu conversion warnings
  habanalabs: use NULL to initialize array of pointers
  habanalabs: fix little-endian<->cpu conversion warnings
  habanalabs: soft-reset device if context-switch fails
  habanalabs: print pointer using %p
  habanalabs: fix memory leak with CBs with unaligned size
  habanalabs: return correct error code on MMU mapping failure
  habanalabs: add comments in uapi/misc/habanalabs.h
  habanalabs: extend QMAN0 job timeout
  habanalabs: set DMA0 completion to SOB 1007
  habanalabs: fix validation of WREG32 to DMA completion
  habanalabs: fix mmu cache registers init
  habanalabs: disable CPU access on timeouts
  habanalabs: add MMU DRAM default page mapping
  habanalabs: Dissociate RAZWI info from event types
  misc/habanalabs: adjust Kconfig to fix build errors
  ...
2019-03-06 14:18:59 -08:00
Linus Torvalds 384d11fa0e ARM: SoC driver updates for 5.1
As usual, the drivers/tee and drivers/reset subsystems get merged
 here, with the expected set of smaller updates and some new hardware
 support. The tee subsystem now supports device drivers to be attached
 to a tee, the first example here is a random number driver with its
 implementation in the secure world.
 
 Three new power domain drivers get added for specific chip families:
  - Broadcom BCM283x chips (used in Raspberry Pi)
  - Qualcomm Snapdragon phone chips
  - Xilinx ZynqMP FPGA SoCs
 
 One new driver is added to talk to the BPMP firmware on NVIDIA
 Tegra210
 
 Existing drivers are extended for new SoC variants from NXP,
 NVIDIA, Amlogic and Qualcomm.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJcfpKpAAoJEGCrR//JCVInMpYQANwKKWOTm5NHqtf7/ZKBzx6/
 Yk7Jj8QLGKrHScnuBZSBvTwv5Cc5O5Ye+tAuGVArOoD2ktXlLZmHZ/ZPFAudT3di
 aFYbA44RNhv+O/xOmToDCCjSHm176hwUY0Cs5bFnfx6TcMsdOYIQIG+XQKx/a9zg
 3ZBEv7wZqcBArLc0X2Z2/uiVrEIh3wWwXytvw+8TG8ifUfpbDxRUxDlj1JRDpjMu
 yX4q8JDhdQvi2FTXbXcEHTdQ6RT11svPM/YxQDxfULRK9aNKf4GZJ4QlwZy+SO7N
 cEFxDd4ML/iJ1LjalvtXGkR0xrw9/gOlO3vbB9Uw3EngBDUSQfHmqJet10a14l8q
 KcToe3teIB+Z1R+plrt+h5UDJTbVibgZXhU6wIdkDgtF6oTyg1moIbTqNKHgcA3b
 HLJv4gFejeluQzJ/3dZHBnkvJo1XFAvGFmFXle0bmJRFtDx73CKnf6MA9N82l2/x
 nTn4LTxXIJVKWTWAs1qkrFyIx1gOrpGhiHPQ2JiOPMZLstz3Sr6tiJuWOr+1Ex4/
 UlZsD/CrRb+SbPBonpkD+bvzSR+j0M72A7hGmfZcDzainciWgunyXglUlzO/MT24
 C6p4R9MZ2Fffoe8pESppabRNUItp8gNsNGI7CY1IK8pgpxLrujw8OnqykpV0VETo
 As+6dZrHfPNSuI7udJi5
 =+DOl
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "As usual, the drivers/tee and drivers/reset subsystems get merged
  here, with the expected set of smaller updates and some new hardware
  support. The tee subsystem now supports device drivers to be attached
  to a tee, the first example here is a random number driver with its
  implementation in the secure world.

  Three new power domain drivers get added for specific chip families:
   - Broadcom BCM283x chips (used in Raspberry Pi)
   - Qualcomm Snapdragon phone chips
   - Xilinx ZynqMP FPGA SoCs

  One new driver is added to talk to the BPMP firmware on NVIDIA
  Tegra210

  Existing drivers are extended for new SoC variants from NXP, NVIDIA,
  Amlogic and Qualcomm"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits)
  tee: optee: update optee_msg.h and optee_smc.h to dual license
  tee: add cancellation support to client interface
  dpaa2-eth: configure the cache stashing amount on a queue
  soc: fsl: dpio: configure cache stashing destination
  soc: fsl: dpio: enable frame data cache stashing per software portal
  soc: fsl: guts: make fsl_guts_get_svr() static
  hwrng: make symbol 'optee_rng_id_table' static
  tee: optee: Fix unsigned comparison with less than zero
  hwrng: Fix unsigned comparison with less than zero
  tee: fix possible error pointer ctx dereferencing
  hwrng: optee: Initialize some structs using memset instead of braces
  tee: optee: Initialize some structs using memset instead of braces
  soc: fsl: dpio: fix memory leak of a struct qbman on error exit path
  clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static
  soc: qcom: llcc-slice: Fix typos
  qcom: soc: llcc-slice: Consolidate some code
  qcom: soc: llcc-slice: Clear the global drv_data pointer on error
  drivers: soc: xilinx: Add ZynqMP power domain driver
  firmware: xilinx: Add APIs to control node status/power
  dt-bindings: power: Add ZynqMP power domain bindings
  ...
2019-03-06 09:41:12 -08:00
Linus Torvalds 6ad63dec9c ARM: SoC device tree updates for 5.1
This is a smaller update than the past few times, but with just over
 500 non-merge changesets still dwarfes the rest of the SoC tree.
 
 Three new SoC platforms get added, each one a follow-up to an existing
 product, and added here in combination with a reference platform:
 
  - Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging processor
    https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html
 
  - Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for
    Rich Graphics Applications".
    https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html
 
  - NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC
    https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X
 
 These are actual commercial products we now support with an in-kernel
 device tree source file:
 
  - Bosch Guardian is a product made by Bosch Power
    Tools GmbH, based on the Texas Instruments AM335x chip
 
  - Winterland IceBoard is a Texas Instruments AM3874 based
    machine used in telescopes at the south pole and elsewhere, see commit
    d031773169 for some pointers:
 
  - Inspur on5263m5 is an x86 server platform with an Aspeed
    ast2500 baseboard management controller. This is for running on
    the BMC.
 
  - Zodiac Digital Tapping Unit, apparently a kind of ethernet
    switch used in airplanes.
 
  - Phicomm K3 is a WiFi router based on Broadcom bcm47094
 
  - Methode Electronics uDPU FTTdp distribution point unit
 
  - X96 Max, a generic TV box based on Amlogic G12a (S905X2)
 
  - NVIDIA Shield TV (Darcy) based on Tegra210
 
 And then there are several new SBC, evaluation, development or modular
 systems that we add:
 
  - Three new Rockchips rk3399 based boards:
     - FriendlyElec NanoPC-T4 and NanoPi M4
     - Radxa ROCK Pi 4
 
  - Five new i.MX6 family SoM modules and boards for industrial
    products:
     - Logic PD i.MX6QD SoM and evaluation baseboad
     - Y Soft IOTA Draco/Hydra/Ursa family boards based on i.MX6DL
     - Phytec phyCORE i.MX6 UltraLite SoM and evaluation module
 
  - MYIR Tech MYD-LPC4357 development based on the NXP lpc4357
    microcontroller
 
  - Chameleon96, an Intel/Altera Cyclone5 based FPGA development
    system in 96boards form factor
 
  - Arm Fixed Virtual Platforms(FVP) Base RevC, a purely
    virtual platform for corresponding to the latest "fast model"
 
  - Another Raspberry Pi variant: Model 3 A+, supported both
    in 32-bit and 64-bit mode.
 
  - Oxalis Evalkit V100 based on NXP Layerscape LS1012a,
    in 96Boards enterprise form factor
 
  - Elgin RV1108 R1 development board based on 32-bit Rockchips RV1108
 
 For already supported boards and SoCs, we often add support for new
 devices after merging the drivers. This time, the largest changes include
 updates for
 
  - STMicroelectronics stm32mp1, which was now formally
    launched last week
 
  - Qualcomm Snapdragon 845, a high-end phone and low-end laptop chip
 
  - Action Semi S700
 
  - TI AM654x, their recently merged 64-bit SoC from the OMAP family
 
  - Various Amlogic Meson SoCs
 
  - Mediatek MT2712
 
  - NVIDIA Tegra186 and Tegra210
 
  - The ancient NXP lpc32xx family
 
  - Samsung s5pv210, used in some older mobile phones
 
 Many other chips see smaller updates and bugfixes beyond that.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJcf9c1AAoJEGCrR//JCVInvl8QAIgmK09QZr3VAD5WnKSoWwiX
 GP1+qgmr/cbIF9X+Kt/0Y2E+oIi9uxu7v5iwpYf0inzV4QOKwy9LvpeInd7s07bf
 hSPMN0wZ9bV5Ylk0YtlvGvOQTqys9oweeSEkHfjQ8Jm7aFkaRXQ1dt23d8KLILoB
 8GKk9A4ncn1AB1vu6xBqeqBiaQiqhMjb9paWkmjYrjhP22hHlVyGlMd8cwfG+A5a
 5Ft4lWkzvgrXPMwZgrCGU233OV5UHrn2A8ohiIUN5J6aSWxu8eMEryU+MF0poidl
 malJ+AHl2mK83YN3wYemxy/lEJzAW4PrjCVgY2bRDqwlOnI3+d+z7rVSfuMCzSKs
 TDTbv9VqPJhsZFr/GIkvB3iwnYfvP/mXrzM7gbw7rQqthEKOy+3HtZwmHAKF4QNK
 TT4wyngC/CwiyULEwtPCjbxZ/7yal6sygllioCo+M2OHeattIQEnqi/Yvc0vx/th
 th9Pepf26jUp/ZJNlxk0XDyBMPhUf6sHUvh7a+y6l6ZxZ6avbFdGPeJrQe5HF2Sp
 KM7BH3w/CpoNRSKs37mR7JpNdYNDSonItgaIm5xVJZk+Wr/BWgtcr6BbGD/vlT7N
 kIDDinyhczhvhpTmWs6QZdZNQmf6bASzTVeFv2+ES+kXt/AKhv0O5N4Pw/oU+VBv
 pD5+7YjjA0fMKcYae3gs
 =1goV
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC device tree updates from Arnd Bergmann:
 "This is a smaller update than the past few times, but with just over
  500 non-merge changesets still dwarfes the rest of the SoC tree.

  Three new SoC platforms get added, each one a follow-up to an existing
  product, and added here in combination with a reference platform:

   - Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging
     processor:

       https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html

   - Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for Rich Graphics
     Applications":

       https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html

   - NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC:

       https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X

  These are actual commercial products we now support with an in-kernel
  device tree source file:

   - Bosch Guardian is a product made by Bosch Power Tools GmbH, based
     on the Texas Instruments AM335x chip

   - Winterland IceBoard is a Texas Instruments AM3874 based machine
     used in telescopes at the south pole and elsewhere, see commit
     d031773169 for some pointers:

   - Inspur on5263m5 is an x86 server platform with an Aspeed ast2500
     baseboard management controller. This is for running on the BMC.

   - Zodiac Digital Tapping Unit, apparently a kind of ethernet switch
     used in airplanes.

   - Phicomm K3 is a WiFi router based on Broadcom bcm47094

   - Methode Electronics uDPU FTTdp distribution point unit

   - X96 Max, a generic TV box based on Amlogic G12a (S905X2)

   - NVIDIA Shield TV (Darcy) based on Tegra210

  And then there are several new SBC, evaluation, development or modular
  systems that we add:

   - Three new Rockchips rk3399 based boards:
       - FriendlyElec NanoPC-T4 and NanoPi M4
       - Radxa ROCK Pi 4

   - Five new i.MX6 family SoM modules and boards for industrial
     products:
       - Logic PD i.MX6QD SoM and evaluation baseboad
       - Y Soft IOTA Draco/Hydra/Ursa family boards based on i.MX6DL
       - Phytec phyCORE i.MX6 UltraLite SoM and evaluation module

   - MYIR Tech MYD-LPC4357 development based on the NXP lpc4357
     microcontroller

   - Chameleon96, an Intel/Altera Cyclone5 based FPGA development system
     in 96boards form factor

   - Arm Fixed Virtual Platforms(FVP) Base RevC, a purely virtual
     platform for corresponding to the latest "fast model"

   - Another Raspberry Pi variant: Model 3 A+, supported both in 32-bit
     and 64-bit mode.

   - Oxalis Evalkit V100 based on NXP Layerscape LS1012a, in 96Boards
     enterprise form factor

   - Elgin RV1108 R1 development board based on 32-bit Rockchips RV1108

  For already supported boards and SoCs, we often add support for new
  devices after merging the drivers. This time, the largest changes
  include updates for

   - STMicroelectronics stm32mp1, which was now formally launched last
     week

   - Qualcomm Snapdragon 845, a high-end phone and low-end laptop chip

   - Action Semi S700

   - TI AM654x, their recently merged 64-bit SoC from the OMAP family

   - Various Amlogic Meson SoCs

   - Mediatek MT2712

   - NVIDIA Tegra186 and Tegra210

   - The ancient NXP lpc32xx family

   - Samsung s5pv210, used in some older mobile phones

  Many other chips see smaller updates and bugfixes beyond that"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (506 commits)
  ARM: dts: exynos: Fix max voltage for buck8 regulator on Odroid XU3/XU4
  dt-bindings: net: ti: deprecate cpsw-phy-sel bindings
  ARM: dts: am335x: switch to use phy-gmii-sel
  ARM: dts: am4372: switch to use phy-gmii-sel
  ARM: dts: dm814x: switch to use phy-gmii-sel
  ARM: dts: dra7: switch to use phy-gmii-sel
  arch: arm: dts: kirkwood-rd88f6281: Remove disabled marvell,dsa reference
  ARM: dts: exynos: Add support for secondary DAI to Odroid XU4
  ARM: dts: exynos: Add support for secondary DAI to Odroid XU3
  ARM: dts: exynos: Disable ARM PMU on Odroid XU3-lite
  ARM: dts: exynos: Add stdout path property to Arndale board
  ARM: dts: exynos: Add minimal clkout parameters to Exynos3250 PMU
  ARM: dts: exynos: Enable ADC on Odroid HC1
  arm64: dts: sprd: Remove wildcard compatible string
  arm64: dts: sprd: Add SC27XX fuel gauge device
  arm64: dts: sprd: Add SC2731 charger device
  arm64: dts: sprd: Add ADC calibration support
  arm64: dts: sprd: Remove PMIC INTC irq trigger type
  arm64: dts: rockchip: Enable tsadc device on rock960
  ARM: dts: rockchip: add chosen node on veyron devices
  ...
2019-03-06 09:36:37 -08:00
Linus Torvalds aebbfafc74 ARM: SoC platform updates for 5.1
The APM X-Gene platform is now maintained by folks from Ampere
 computing that took over the product line a while ago, this gets
 reflected in the MAINTAINERS file.
 
 Cleanups continue on the older mach-davinci and mach-pxa platform,
 to get them to be more like the modern ones. For pxa, we
 now remove the Raumfeld platform code as it now works with
 device tree based booting.
 
 i.MX adds a couple new features for the i.MX7ULP SoC
 
 Mediatek gains support for a new SoC: MT7629 is a new wireless
 router platform, following MT7623.
 
 Aside from those, there are the usual minor cleanups and bugfixes
 across several platforms.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJcf+c8AAoJEGCrR//JCVInuUsQAK+F+7hrfkwCSLXzqVIPMYC1
 hFV11s7bgbHfzkSa6ZyFC0uuT737dZjJrOdvZOXFJ2VxDscxI62mj56jCrF8tr1x
 BQqIiDLGU55mLTkPiVtmVi8p79IXz2G/1dBeYrfyj/xec6DsjVkO1Cm2itQ3vg5Q
 ZM8DRmIxsKsUv6YSGRfwVNXso9jOh+LPxlfrGL5ijdHgzDxRr7gO+B+jxgx9Sf6s
 DNLj6M8L8DFo528eHp2pJNBL21pMywAaIrDELUJyg5P3XnDX18F8CjbSRgm7OG1+
 hkdmML9qQlpOjokPJ9eeitX2e+tvKoXLn+N9kq12Pn4fkvJpKlOVnZmU+Le/3By+
 agX7hE2A21nsZuoHQjq16QoO4X9mDee7tcDMzGwTrSq1M18m2dEJW57vivda0qKN
 wNJC3qwLmh2/wfxNpO2wS29hQni7cIrFgRvUPsB/u8KvzITbQ/PMGApNV+Kf7BiO
 mZjH8X+0IkX0veS11KLsFUCbq4ezpPCNxbul2mMIVcTIV0Oz6mQXNHAecNxCCqMk
 GAgi48+9KYNszG01Xqx++x79BFnIoUJp3+gIGIa8rTvdSSsF8DlQlSzXufD9Sb2h
 CS+M8kvgfymUrjaKZNyR5ouI1ae1Q16pbapkpS4B6ucoc4Qbqz2POiSVhex+eU/N
 IrEAFEhRg7iQ9NHUaWlx
 =vxwd
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "The APM X-Gene platform is now maintained by folks from Ampere
  computing that took over the product line a while ago, this gets
  reflected in the MAINTAINERS file.

  Cleanups continue on the older mach-davinci and mach-pxa platform, to
  get them to be more like the modern ones. For pxa, we now remove the
  Raumfeld platform code as it now works with device tree based booting.

  i.MX adds a couple new features for the i.MX7ULP SoC

  Mediatek gains support for a new SoC: MT7629 is a new wireless router
  platform, following MT7623.

  Aside from those, there are the usual minor cleanups and bugfixes
  across several platforms"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (49 commits)
  MAINTAINERS: Update Ampere email address
  usb: ohci-da8xx: remove unused callbacks from platform data
  ARM: davinci: da830-evm: remove legacy usb helpers
  ARM: davinci: omapl138-hawk: remove legacy usb helpers
  usb: ohci-da8xx: add vbus and overcurrent gpios
  ARM: davinci: da830-evm: use gpio lookup entries for usb gpios
  ARM: davinci: omapl138-hawk: use gpio lookup entries for usb gpios
  usb: ohci-da8xx: add a helper pointer to &pdev->dev
  usb: ohci-da8xx: add a new line after local variables
  arm64: meson: enable g12a clock controller
  MAINTAINERS: Add entry for uDPU board
  ARM: davinci: da850-evm: use GPIO hogs instead of the legacy API
  arm: mediatek: add MT7629 smp bring up code
  Revert "ARM: mediatek: add MT7623a smp bringup code"
  dt-bindings: soc: fix typo of MT8173 power dt-bindings
  ARM: meson: remove COMMON_CLK_AMLOGIC selection
  arm64: meson: remove COMMON_CLK_AMLOGIC selection
  ARM: lpc32xx: remove platform data of ARM PL111 LCD controller
  ARM: lpc32xx: remove platform data of ARM PL180 SD/MMC controller
  ARM: lpc32xx: Use kmemdup to replace duplicating its implementation
  ...
2019-03-06 09:33:05 -08:00
Linus Torvalds d9862cfbe2 Here's the main MIPS pull request for v5.1:
- Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
   (GINVT) instructions, allowing for more efficient TLB maintenance when
   running on a CPU such as the I6500 that supports these.
 
 - Enable huge page support for MIPS64r6.
 
 - Optimize post-DMA cache sync by removing that code entirely for kernel
   configurations in which we know it won't be needed.
 
 - The number of pages allocated for interrupt stacks is now calculated
   correctly, where before we would wastefully allocate too much memory
   in some configurations.
 
 - The ath79 platform migrates to devicetree.
 
 - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.
 
 - The ingenic/jz4740 platform gains support for appended devicetrees.
 
 - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
   cleanups as do various pieces of core architecture code.
 -----BEGIN PGP SIGNATURE-----
 
 iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXH3BQxUccGF1bC5idXJ0
 b25AbWlwcy5jb20ACgkQPqefrLV1AN1+4wD+Oh4JTfZN/NEOQMlrSkXxjEHqjX3u
 1Y6CiiPCs+q2UnYBANb+ic+ZH5MnvJxxmcvlYI2q3rIh4b8TDriip4KMUTUP
 =Sw9X
 -----END PGP SIGNATURE-----

Merge tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Paul Burton:

 - Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
   (GINVT) instructions, allowing for more efficient TLB maintenance
   when running on a CPU such as the I6500 that supports these.

 - Enable huge page support for MIPS64r6.

 - Optimize post-DMA cache sync by removing that code entirely for
   kernel configurations in which we know it won't be needed.

 - The number of pages allocated for interrupt stacks is now calculated
   correctly, where before we would wastefully allocate too much memory
   in some configurations.

 - The ath79 platform migrates to devicetree.

 - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.

 - The ingenic/jz4740 platform gains support for appended devicetrees.

 - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
   cleanups as do various pieces of core architecture code.

* tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (66 commits)
  MIPS: lantiq: Remove separate GPHY Firmware loader
  MIPS: ingenic: Add support for appended devicetree
  MIPS: SGI-IP27: rework HUB interrupts
  MIPS: SGI-IP27: do boot CPU init later
  MIPS: SGI-IP27: do xtalk scanning later
  MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output
  MIPS: SGI-IP27: clean up bridge access and header files
  MIPS: SGI-IP27: get rid of volatile and hubreg_t
  MIPS: irq: Allocate accurate order pages for irq stack
  MIPS: dma-noncoherent: Remove bogus condition in dma_sync_phys()
  MIPS: eBPF: Remove REG_32BIT_ZERO_EX
  MIPS: eBPF: Always return sign extended 32b values
  MIPS: CM: Fix indentation
  MIPS: BCM47XX: Fix/improve Buffalo WHR-G54S support
  MIPS: OCTEON: program rx/tx-delay always from DT
  MIPS: OCTEON: delete board-specific link status
  MIPS: OCTEON: don't lie about interface type of CN3005 board
  MIPS: OCTEON: warn if deprecated link status is being used
  MIPS: OCTEON: add fixed-link nodes to in-kernel device tree
  MIPS: Delete unused flush_cache_sigtramp()
  ...
2019-03-05 11:28:25 -08:00
Anson Huang 0c91c11c7d clk: imx8mq: add GPIO clocks to clock tree
i.MX8MQ has clock gate for each GPIO bank, add them
into clock tree for GPIO driver to manage.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-28 10:28:28 -08:00
Seiya Wang 64f4466c88 clk: mediatek: correct cpu clock name for MT8173 SoC
Correct cpu clock name from ca57 to ca72 since MT8173 does use cortex-a72.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-26 10:17:40 -08:00
Edgar Bernardi Righi 0c8c53e033 dt-bindings: clock: Add DT bindings for Actions Semi S500 CMU
Add devicetree bindings for Actions Semi S500 Clock Management Unit.

Signed-off-by: Edgar Bernardi Righi <edgar.righi@lsitec.org.br>
[Mani: Documented S500 CMU compatible]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Fix SPDX comment style in header file]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-22 00:01:08 -08:00
Gabriel Fernandez 585fc46bd4 dt-bindings: clock: remove unused definition for stm32mp1
A copy of LTDC_PX and ETHCK_K (LTDC_K and ETHMAC_K) was introduced in
stm32mp1 dt-bindings file by mistake.
These bindings are not used and shouldn't be use to be conform with
convention name of the stm32mp1 clock IP.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 14:16:27 -08:00
David Dai 04053f4d23 clk: qcom: clk-rpmh: Add IPA clock support
The clk-rpmh driver only supports on and off RPMh clock resources. Let's
extend the driver by adding support for clocks that are managed by a
different type of RPMh resource known as Bus Clock Manager(BCM). The BCM
is a configurable shared resource aggregator that scales performance
based on a set of frequency points. The Qualcomm IP Accelerator (IPA)
clock is an example of a resource that is managed by the BCM and this a
requirement from the IPA driver in order to scale its core clock.

Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 13:57:55 -08:00
Lubomir Rintel ed11aff3ee dt-bindings: marvell,mmp2: Add clock id for the LCDC clock
The peripheral clock is required for access the the LCDC registers. It
is in fact separate from the "AXI clock" that is optionally used to
generate the pixel clock and as such requires a separate clock id.

Link: https://lists.freedesktop.org/archives/dri-devel/2019-January/203975.html
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 13:52:00 -08:00
Abel Vesa 45a359e80d dt-bindings: imx8mq-clock: Add the missing ARM clock
Add the missing ARM clock which will be used by cpufreq

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
[sboyd@kernel.org: Fixed numbering in dt header]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 12:56:52 -08:00
Fabio Estevam 202ce5afe5 clk: imx8mq: Add support for the CLKO1 clock
Add the entry for the CLKO1 clock.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 12:56:52 -08:00
Bai Ping 037a474f61 dt-bindings: imx: Add clock binding doc for imx8mm
Add the clock binding doc for i.MX8MM.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 12:41:16 -08:00
Michael Grzeschik 9b15cffbf2 clk: imx5: add imx5_SCC2_IPG_GATE
This adds the missing clock for the SCC2 peripheral unit.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 12:41:16 -08:00
Linus Walleij 8fab3d713c gpio updates for v5.1
- support for a new variant of pca953x
 - documentation fix from Wolfram
 - some tegra186 name changes
 - two minor fixes for madera and altera-a10sr
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAlxleLcACgkQEacuoBRx
 13I45Q//YMGUYzkMjOL+lp2DYnnVhVNqrF4hoLjinWVrnhZ6gqu88RgV2Cea4Pta
 oxVxnSsE8LK7kY8VZ8tcBmIqLLkQAJdSVtqkeSoZF2vhWBAbE9ZaSOYb17SIkSXK
 Ok16lZgZ+ZWOM5EjEvuRpB/qYGjX2glD5/Y2Kl7+wsX1W6U2pXasP0IjhcvDU8mJ
 NXNgfkr6kluMUqHJyqKo8eT/P3Hdv0CK9GsN2vGyfJenCdTSd7EC6KuhWAivi+fG
 /lf1bVuc2cCiXjxdSOXx+Yz7SjNe56viTaqnn/K6OlfLgErjKnRW+AxPkTZXNtDi
 pfMMpPXiwPcbQR2wrXG/7OMmJ1kUsfWoIUCx5RDwhF1KbEQVqgaSITLylk+4Yp/3
 eM0fYsQ+KvOdAnWKSgfxBhaaiO7z5XDdrnkSHBDoiBrm07BqBgK/v3Rivzf2GMEv
 QvM4OBfThS9I8skV5BaOBRDfHZs4N0EU/vhsW9gt50urtlSM0vSYx6kdMq/8R0k4
 NkJT43u+1vi5koMljBAsZYZiyXOQ2B+PlfpTMfMu+93QH8wlu9mOt1r3YTQyA1Xf
 jiOK8M2yQKP5g7RuPM6MtMsqlZKDM5nAlSf7S280Z3+vBd+LaELbXvT2/JL5ViGU
 hfH/gaNwUGUYd8EsWvfhHVdPAAecDCwxfKyKEnFGhMrtunTgwfI=
 =nV64
 -----END PGP SIGNATURE-----

Merge tag 'gpio-v5.1-updates-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel

gpio updates for v5.1

- support for a new variant of pca953x
- documentation fix from Wolfram
- some tegra186 name changes
- two minor fixes for madera and altera-a10sr
2019-02-17 21:59:33 +01:00
Arnd Bergmann d0e1f79ad3 Merge tag 'v5.0-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/fixes
mt8173: minor typo in scpsys header file
mt7629: add smp bringup code
mt7623a: delete unused smp bringup code

* tag 'v5.0-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  arm: mediatek: add MT7629 smp bring up code
  Revert "ARM: mediatek: add MT7623a smp bringup code"
  dt-bindings: soc: fix typo of MT8173 power dt-bindings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 20:38:17 +01:00
Arnd Bergmann 187b4ac7df This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
for 5.1, please pull the following:
 
 - Stefan updates the BCM2835 SoC driver with downstream properties and
   uses that to implement a reboot notifier to tell the VC4 firmware when
   Linux on the ARM CPU is rebooting
 
 - Eric adds a proper power domain driver for the BCM283x SoCs and
   updates a bunch of drivers to have a better and clearer Device Tree
   definition to support power domains/breaking up of functionality. This
   requires converting the existing watchdog driver into a MFD and then
   breaking up the functionality into separate drivers and finally
   updating the DTS files to leverage the power domains information.
 
 - Wei provides a fix for making a symbol static
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlxV0IYACgkQh9CWnEQH
 BwQIHA//TL12EfHws6C64EKspqsg9NE5/+K3HRRJbgwtuBQ/n6oYBMyJx+6x6Nwc
 7QjuCkZ/VWKxy0Fn+ToGnX0JgrQL5kND3Cm0d8cyZ0VJ6juppizyAa1YkFplShSr
 l0XlYaJo1HrB3hBd/+YbGZnLp9flbii5d3MIcy8ZoWmN7zLeHnQbHaf8jcbJC+Iw
 Mal8ojk2ru0rMimMQieTiPzWwiec08wtSIYs2590rOVWFyhGIn/KmHqpG6iYjdwj
 oQbr86R0jMPCb/g3SXRttxW8wFbtYdmILdkzhOaEd4JyJEwUCNDciM3E04OyE9VN
 fNMc1l0zh7dfyo9bFRpgS6AAxYQVj3led+B1NGtpnjDPybVWU10gipGdgFt9UPRE
 pJnS1LcPbAJ1FdbcYFU0TsiViWLZehm2cbc4rPYvqKp1Y+82FJZTYyu0GmBOUwB6
 jpM5ZVvET8k3nw6ImeE3jjT3kBfF31u552+iO4RQvKHRm/GBMtyTDrFZVUwgqMFE
 NEKnj3/VLSCxP3dnQImw1ro2493piZNdlBEs6mAugFUGqcb+40KOtOOpWiGMFH7h
 BZN0kj128ryG/YCVKDOnZSbYRLhpxc1VcVYJ3rYJgn8mrFFmNo/fjDgaRogrJN/s
 LmCiSIqsmuy8f36/IWd+aHk6ex5yskJe7x5M/7tlmz03oXg1viQ=
 =t5+u
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
for 5.1, please pull the following:

- Stefan updates the BCM2835 SoC driver with downstream properties and
  uses that to implement a reboot notifier to tell the VC4 firmware when
  Linux on the ARM CPU is rebooting

- Eric adds a proper power domain driver for the BCM283x SoCs and
  updates a bunch of drivers to have a better and clearer Device Tree
  definition to support power domains/breaking up of functionality. This
  requires converting the existing watchdog driver into a MFD and then
  breaking up the functionality into separate drivers and finally
  updating the DTS files to leverage the power domains information.

- Wei provides a fix for making a symbol static

* tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux:
  ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware.
  ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4)
  soc: bcm: bcm2835-pm: Make local symbol static
  soc: bcm: Make PM driver default for BCM2835
  soc: bcm: bcm2835-pm: Add support for power domains under a new binding.
  bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD.
  dt-bindings: soc: Add a new binding for the BCM2835 PM node. (v4)
  firmware: raspberrypi: notify VC4 firmware of a reboot
  soc: bcm2835: sync firmware properties with downstream

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 18:01:17 +01:00
Arnd Bergmann 405bcfff17 Qualcomm ARM Based Driver Updates for v5.1
* Add Qualcomm RPMh power domain driver and related changes
 * Fix issues with sleep/wake sets and batch API in RPMh
 * Update MAINTAINERS Qualcomm entry
 * Fixup RMTFS-mem sysfs and uevents
 * Fix error handling in GSBI
 * Add SMD-RPM compatible entry for SDM660
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJcV75tAAoJEFKiBbHx2RXV3ZcQAJ4xdmg0eVXrzu4ltl/ZbF7m
 walu7pGtLF7lIXJoJZWgpzS6SAmDQAMG++pp6zP6+3t6fB8heSNVBImgo2l6fHzr
 KEHoH1PFhrdZwyOhswE/5n5CZBOb4xrL+m94NufDh7Yv8h5ukC8DH3xE9PFsoh4A
 GnDc6qkHByNJKuNxlKKASq6VRMqzpnys2Ibzs6G5/6UDzvnEAYj5VoHLLCjsh6r+
 +bKusJPUZKujyLU85rbtpEjO1HxHiOq7TJI5FZ8dta+iXSyIc/2nM9InTgr68ATq
 VN7mOtclMEiVN8uQaXN0D/FWK3JYBIY5Mvd8zYzzkE+NDj0tnZDZoLjK2VnTX9o+
 nORX7vQc/JmBayLcMaBZ/ZB+i2lsg37ziFCZaZiP9GYR1DAvm3yLfaxbWmkVKbGq
 lhf/dR7qyXKjIP8rPO2qp4sCKww2RbkDa2p+xnQ2/psjvpgkmy4lcfIhw5HWonQR
 eJ1UgoLsdQf/Xi6cKKmuzbdQsmZGr95sTHh06Gw1yeMRGuoXTHSNYx5epLdwJmD5
 OWcIwh+sfZdmKUhMB/895EFpRuK/+L07N+n48DYaaU4CHXcowp80Ng5V6FnEnEWm
 tI9oKt3N2kAYQAPlgpb3azTtAmB+yAcaYGrNQXzd7nYLnLma40qCR0Nx8bMXCjeq
 sgRdF06ATCQDbBruztw3
 =CcrU
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers

Qualcomm ARM Based Driver Updates for v5.1

* Add Qualcomm RPMh power domain driver and related changes
* Fix issues with sleep/wake sets and batch API in RPMh
* Update MAINTAINERS Qualcomm entry
* Fixup RMTFS-mem sysfs and uevents
* Fix error handling in GSBI
* Add SMD-RPM compatible entry for SDM660

* tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  soc: qcom: smd-rpm: Add sdm660 compatible
  soc: qcom: gsbi: Fix error handling in gsbi_probe()
  soc: qcom: rpmh: Avoid accessing freed memory from batch API
  drivers: qcom: rpmh: avoid sending sleep/wake sets immediately
  soc: qcom: rmtfs-mem: Make sysfs attributes world-readable
  soc: qcom: rmtfs-mem: Add class to enable uevents
  soc: qcom: update config dependencies for QCOM_RPMPD
  soc: qcom: rpmpd: Drop family A RPM dependency
  MAINTAINERS: update list of qcom drivers
  soc: qcom: rpmhpd: Mark mx as a parent for cx
  soc: qcom: rpmhpd: Add RPMh power domain driver
  soc: qcom: rpmpd: Add support for get/set performance state
  soc: qcom: rpmpd: Add a Power domain driver to model corners
  dt-bindings: power: Add qcom rpm power domain driver bindings
  OPP: Add support for parsing the 'opp-level' property
  dt-bindings: opp: Introduce opp-level bindings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 18:00:05 +01:00
Arnd Bergmann 6f2185f8e3 Reset controller changes for v5.1
This adds the include/linux/reset directory to MAINTAINERS for reset
 specific headers and adds headers for sunxi and socfpga in there to
 get rid of a few extern function declarations.
 There is a new reset driver for the Broadcom STB reset controller and
 the i.MX7 system reset controller driver is extended to support i.MX8MQ
 as well. Finally, there is a new header with reset id constants for
 the Meson G12A SoC, which has a reset controller identical to Meson AXG
 and thus can reuse its driver and DT bindings.
 -----BEGIN PGP SIGNATURE-----
 
 iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCXF2yeRcccC56YWJlbEBw
 ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwH8jAP9OQaMl5llVXuHSFOwiqkJ2I09p
 oROxu3dI/A4q7d5T8QD/Xuo4piSAdoT5YZyHp16NUafW3L1//wqTvxk0ubeTsgA=
 =EIyo
 -----END PGP SIGNATURE-----

Merge tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux into arm/drivers

Reset controller changes for v5.1

This adds the include/linux/reset directory to MAINTAINERS for reset
specific headers and adds headers for sunxi and socfpga in there to
get rid of a few extern function declarations.
There is a new reset driver for the Broadcom STB reset controller and
the i.MX7 system reset controller driver is extended to support i.MX8MQ
as well. Finally, there is a new header with reset id constants for
the Meson G12A SoC, which has a reset controller identical to Meson AXG
and thus can reuse its driver and DT bindings.

* tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux:
  dt-bindings: reset: meson: add g12a bindings
  reset: imx7: Add support for i.MX8MQ IP block variant
  reset: imx7: Add plubming to support multiple IP variants
  reset: Add Broadcom STB SW_INIT reset controller driver
  dt-bindings: reset: Add document for Broadcom STB reset controller
  reset: socfpga: declare socfpga_reset_init in a header file
  reset: sunxi: declare sun6i_reset_init in a header file
  MAINTAINERS: use include/linux/reset for reset controller related headers
  dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 17:21:32 +01:00
Arnd Bergmann 59f527dd7a arm64: zynqmp: SoC changes for v5.1
- Extend firmware interface with reset, nvmem,
   power management and power domain support
 
 - Add reset, nvmem driver, power management and
   power domain drivers
 -
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlxixLEACgkQykllyylKDCEduwCeLkIFr48uJ/5Fv1X16gitcrOk
 F38An2wbsk21xkWQpfzCFdUrpPbT0u4t
 =GOP8
 -----END PGP SIGNATURE-----

Merge tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx into arm/drivers

arm64: zynqmp: SoC changes for v5.1

- Extend firmware interface with reset, nvmem,
  power management and power domain support

- Add reset, nvmem driver, power management and
  power domain drivers
-

* tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx:
  drivers: soc: xilinx: Add ZynqMP power domain driver
  firmware: xilinx: Add APIs to control node status/power
  dt-bindings: power: Add ZynqMP power domain bindings
  drivers: soc: xilinx: Add ZynqMP PM driver
  firmware: xilinx: Implement ZynqMP power management APIs
  dt-bindings: soc: Add ZynqMP PM bindings
  nvmem: zynqmp: Added zynqmp nvmem firmware driver
  dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver
  firmware: xilinx: Add zynqmp_pm_get_chipid() API
  reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller.
  dt-bindings: reset: Add bindings for ZynqMP reset driver
  firmware: xilinx: Add reset API's

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 17:16:45 +01:00
Arnd Bergmann 550a43b310 Renesas ARM Based SoC DT Updates for v5.1
* R-Car H2 (r8a7790) based Stout board
   - Convert to new LVDS DT bindings
 
 * R-Car H1 (r8a7779) and M1A (r8a7778) SoCs
   - Describe HSCIF0/1 devices in DT
 
 * RZ/G1M (r8a7743) SoC
   - Correct sort order of the RWDT node
   - Remove aliases: should be defined in board rather than SoC DT if needed
   - Remove generic compatible string from iic3: it is not compatible
 
 * RZ/G1N (r8a7744) SoC
   - Describe LVDS and DU devices in DT
   - Correct sort order of VSP and MSIOF noces
 
 * RZ/G1C (r8a7747) based iWave SBC
   - Enable RTC
 
 * RZ/A2M (r7s9210) SoC and EVB
   - Initial support
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlxdXz4ACgkQ189kaWo3
 T75wbBAAqOyXvMCt7lGsov4i0e/lqSFl13uHv83Mk+PVvvT48H2g/ItitGDq4GYr
 ItAYBRF66XcAKJbA30e4OvAk+yB0Y3iMT8KIR4Nca5ls9rn6NwbyBugZ65mizKEk
 vIoA1sGpsWUrK0yxmGoIx9C6aX9qsh82ivdMpvwb1Kzy5oO59GCgJ9d/d+Q2KwvG
 rycEPQwHLFIIijoNr0IH3ZiXhyfeEabGHg/EK/FVxJJNgQLjFW0ZogsZ/a49ptoZ
 YZqEc2w13a+rWFTg7059UbzPNjJCq0/2lYRPthWTz9KzUyFgSZ+2GvawdoFSvBZ5
 cf+6+qZkgkVvs00yajd6Q2t9IcyjeVmU+GBHFSO65wDRJknDN8sE1v/qHaAr0+Bm
 My8Th55Tzak/d+6Zb6xP95kTiaUDpWQrjntMvg3AewiAcjDJasBSsU9EDBlEDh3W
 VaQVkyyHtWwfiS0qFf4u0Rfgb2DIBYLvXzslipyZnsKih14+rC/S6N3j8rykrOoE
 DTjh7Hi4k4xYwqwNFrg9lvGCoAG4aZddyat9SYfgTs65OmG7huyTH5vqtsmB3kN0
 0a33nQ8xt24TH6wSHGB17GXeR9JEluqHC0Do9bbis1B6QiSBvcY+Ne1LtFN8O5sH
 RNEcoqU1cCLVHvbRJL/3Y5bwYF22f0GvbMxO/vgdmcz2DSxbuL0=
 =q0l0
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt

Renesas ARM Based SoC DT Updates for v5.1

* R-Car H2 (r8a7790) based Stout board
  - Convert to new LVDS DT bindings

* R-Car H1 (r8a7779) and M1A (r8a7778) SoCs
  - Describe HSCIF0/1 devices in DT

* RZ/G1M (r8a7743) SoC
  - Correct sort order of the RWDT node
  - Remove aliases: should be defined in board rather than SoC DT if needed
  - Remove generic compatible string from iic3: it is not compatible

* RZ/G1N (r8a7744) SoC
  - Describe LVDS and DU devices in DT
  - Correct sort order of VSP and MSIOF noces

* RZ/G1C (r8a7747) based iWave SBC
  - Enable RTC

* RZ/A2M (r7s9210) SoC and EVB
  - Initial support

* tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: dts: r8a7744: Add LVDS support
  ARM: dts: r8a7744: Add DU support
  ARM: dts: r7s9210-rza2mevb: Add support for RZ/A2M EVB
  ARM: dts: r7s9210: Initial SoC device tree
  ARM: dts: r8a7779: Add HSCIF0/1 device nodes
  ARM: dts: r8a7778: Add HSCIF0/1 support
  ARM: dts: r8a7743: Fix sorting of rwdt node
  ARM: dts: r8a7743: Remove aliases from SoC dtsi
  ARM: dts: r8a7743: Remove generic compatible string from iic3
  ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes
  ARM: dts: iwg23s-sbc: Enable RTC
  ARM: dts: stout: Convert to new LVDS DT bindings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:48:52 +01:00
Martin Blumenstingl 40d08f774c dt-bindings: clock: meson8b: add APB clock definition
Commit 8e1dd17c8b ("dt-bindings: clock: meson8b: export the CPU
post dividers") added a clock with the name "ABP". The actual name of
this clock is "APB".

Add a new #define with the same ID but the correct name. The old #define
will be dropped in a follow-up patch because each commit in the tree
must compile on it's own (the old #define is still used by the clock
controller driver).

Fixes: 8e1dd17c8b ("dt-bindings: clock: meson8b: export the CPU post dividers")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190210222603.6404-2-martin.blumenstingl@googlemail.com
2019-02-13 09:50:16 +01:00
Neil Armstrong be3d960b0a dt-bindings: clk: add G12A AO Clock and Reset Bindings
Add bindings for the Amlogic G12A AO Clock and Reset controllers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190212162859.20743-2-narmstrong@baylibre.com
2019-02-13 09:49:17 +01:00
Thomas Petazzoni ede033e1e8 dt-bindings: gpio: document the new pull-up/pull-down flags
This commit extends the flags that can be used in GPIO specifiers to
indicate if a pull-up resistor or pull-down resistor should be
enabled.

While some pinctrl DT bindings already offer the capability of
configuring pull-up/pull-down resistors at the pin level, a number of
simple GPIO controllers don't have any pinmuxing capability, and
therefore do not rely on the pinctrl DT bindings.

Such simple GPIO controllers however sometimes allow to configure
pull-up and pull-down resistors on a per-pin basis, and whether such
resistors should be enabled or not is a highly board-specific HW
characteristic.

By using two additional bits of the GPIO flag specifier, we can easily
allow the Device Tree to describe which GPIOs should have their
pull-up or pull-down resistors enabled. Even though the two options
are mutually exclusive, we still need two bits to encode at least
three states: no pull-up/pull-down, pull-up, pull-down.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-02-13 09:07:43 +01:00
Greg Kroah-Hartman 277c8e8b81 Second set of new device support, features and cleanup for IIO in the 5.1 cycle.
There are a few late breaking fixes in here that weren't worth trying to
 rush into 5.0 as they have been with us for quite a while.
 
 New device support
 * ad7476
   - add support for TI ADS786X parts that are compatible with this Analog
     Devices driver. Good to see some simple devices are so similar.
 * Ingenic jz47xx SoC ADCs
   - new driver and bindings
 * Plantower PMS7003 partical sensor
   - new driver and bindings including vendor prefix.
 * TI DAC7612
   - new driver and bindings for this dual DAC.
 
 New features
 * ad7768-1
   - Sampling frequency control
 * bmi160
   - Data ready trigger support, including open-drain dt binding.
 
 Cleanup / minor fixes.
 * Analog Device DACs
   - Fix some inconsistent licenses.  These are only ones where there were
     two different license marked in the same file, and hence were previously
     unclear.
 * ads124s08
   - Spelling fix.
 * adxl345
   - Parameter alignement tidy up.
 * bmi160
   - SPDX
   - correct a note on the types of supported interrupts which was too strict.
   - use iio_pollfunc_store_time to grab an earlier timestamp.
   - use if (ret) instead of if (ret < 0) to be consistent whilst simplifying
     some handling where ret was effectively getting written to 0 even though
     it was always already 0.
 * exynos_adc
   - Fix a null pointer dereference on unbind.
   - Fix number of channels on Exynos4x12 devices to be 4 rather than 8.
 * lpc32xx-adc
   - Move DT bindings doc out of staging. Oops, I missed this one when
     moving the driver.
   - SPDX.
 * npcm-adc
   - drop documentation of reset node as going to be done differently.
     It's a new driver this cycle so no need to support the previous
     binding going forwards.
 * sps30
   - Fix an issue with a loop timeout test that meant it would never identify
     a timeout.
   - Mark deliberate switch fall throughs.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAlxjNmgRHGppYzIzQGtl
 cm5lbC5vcmcACgkQVIU0mcT0FogooQ/9HDDuw4hrYJqH2cdUtKV29+a+kvMtrC1i
 X9+VstbMQNLo4DM3lYKi4VOeh6P5htRrD9ZJ4I2lh6PfnABjr3lb1AequlxwWNQZ
 9EHEY3BA0G33757LQEkqxl7h8Cqvo2y6Wl6OcUund0jP+h3F3EYkI4XWNcq5Yht4
 uWTkyTRYVZqFnlXGvfPz+53tEZ6p5RijbhOdYcL8R/0yWYzZzgzut7eYZn8Qn+mR
 LzSCBoEyAOUELYyRoczY2EkEO+u8H7lcU43i5TPPKji/c+w4OXu2ktuGVucXaHBs
 E1NLp0psLdqR2ef8fNYTs3FO2kxI7jV5qMlR91Sa2lDRyPhYeMF+JYBQlpqm5H2U
 xp8WwFrfT4KZ1yvioNeW+aNlPOd6ljDMg1z/iLWpAcUqx65QArmogL64m/Fc5GQD
 jrYzw68FO6fqKh3ik7VdPKIUS0p3Dz8BdWOqvI68+C/Mr/TgML51frf1NVbdd36L
 qgzMN6N53bykwN2w51O0Af4U3ZednN7BDDFkUbucutoglU+K8yRjFj583wM8QYsG
 GOZ3sPVZm+ItWCGc7nTJowe6+EQNgo/md3IEmmZNPrfWPHoMEebqnNcOuqcYvIlj
 wXgsJBNlWyQp5bqE9LmgClwAaWkXIoUvjUHt0cK5043ueLrYaGJ698sg0N/UO0JC
 T0/PJEMjLPE=
 =Se+F
 -----END PGP SIGNATURE-----

Merge tag 'iio-for-5.1b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

Second set of new device support, features and cleanup for IIO in the 5.1 cycle.

There are a few late breaking fixes in here that weren't worth trying to
rush into 5.0 as they have been with us for quite a while.

New device support
* ad7476
  - add support for TI ADS786X parts that are compatible with this Analog
    Devices driver. Good to see some simple devices are so similar.
* Ingenic jz47xx SoC ADCs
  - new driver and bindings
* Plantower PMS7003 partical sensor
  - new driver and bindings including vendor prefix.
* TI DAC7612
  - new driver and bindings for this dual DAC.

New features
* ad7768-1
  - Sampling frequency control
* bmi160
  - Data ready trigger support, including open-drain dt binding.

Cleanup / minor fixes.
* Analog Device DACs
  - Fix some inconsistent licenses.  These are only ones where there were
    two different license marked in the same file, and hence were previously
    unclear.
* ads124s08
  - Spelling fix.
* adxl345
  - Parameter alignement tidy up.
* bmi160
  - SPDX
  - correct a note on the types of supported interrupts which was too strict.
  - use iio_pollfunc_store_time to grab an earlier timestamp.
  - use if (ret) instead of if (ret < 0) to be consistent whilst simplifying
    some handling where ret was effectively getting written to 0 even though
    it was always already 0.
* exynos_adc
  - Fix a null pointer dereference on unbind.
  - Fix number of channels on Exynos4x12 devices to be 4 rather than 8.
* lpc32xx-adc
  - Move DT bindings doc out of staging. Oops, I missed this one when
    moving the driver.
  - SPDX.
* npcm-adc
  - drop documentation of reset node as going to be done differently.
    It's a new driver this cycle so no need to support the previous
    binding going forwards.
* sps30
  - Fix an issue with a loop timeout test that meant it would never identify
    a timeout.
  - Mark deliberate switch fall throughs.

* tag 'iio-for-5.1b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (26 commits)
  iio: adc: exynos-adc: Use proper number of channels for Exynos4x12
  dt-binding: iio: remove rst node from NPCM ADC document
  dt-bindings: iio: chemical: pms7003: add device tree support
  dt-bindings: add Plantower to the vendor prefixes
  iio: chemical: add support for Plantower PMS7003 sensor
  iio:chemical:sps30 Supress some switch fallthrough warnings.
  iio:adc:lpc32xx use SPDX-License-Identifier
  dt-bindings: iio: adc: move lpc32xx-adc out of staging
  iio: adc: ads124s08: fix spelling mistake "converions" -> "conversions"
  iio: adc: exynos-adc: Fix NULL pointer exception on unbind
  iio: chemical: sps30: fix a loop timeout test
  iio:accel:adxl345: Change alignment to match paranthesis
  iio:dac:dac7612: device tree bindings
  iio:dac:ti-dac7612: Add driver for Texas Instruments DAC7612
  iio: adc: ad7476: Add support for TI ADS786X ADCs
  iio: adc: ad7768-1: Add support for setting the sampling frequency
  drivers: iio: dac: Fix wrong license for ADI drivers
  IIO: add Ingenic JZ47xx ADC driver.
  dt-bindings: iio/adc: Add bindings for Ingenic JZ47xx SoCs ADC.
  dt-bindings: iio/adc: Add docs for Ingenic JZ47xx SoCs ADC.
  ...
2019-02-13 08:24:50 +01:00
Rajan Vaja 8fd27fb4cf dt-bindings: power: Add ZynqMP power domain bindings
Add documentation to describe ZynqMP power domain bindings.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-12 13:36:26 +01:00
Linus Walleij e65372124c Linux 5.0-rc6
-----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlxgqNUeHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGwsoH+OVXu0NQofwTvVru
 8lgF3BSDG2mhf7mxbBBlBizGVy9jnjRNGCFMC+Jq8IwiFLwprja/G27kaDTkpuF1
 PHC3yfjKvjTeUP5aNdHlmxv6j1sSJfZl0y46DQal4UeTG/Giq8TFTi+Tbz7Wb/WV
 yCx4Lr8okAwTuNhnL8ojUCVIpd3c8QsyR9v6nEQ14Mj+MvEbokyTkMJV0bzOrM38
 JOB+/X1XY4JPZ6o3MoXrBca3bxbAJzMneq+9CWw1U5eiIG3msg4a+Ua3++RQMDNr
 8BP0yCZ6wo32S8uu0PI6HrZaBnLYi5g9Wh7Q7yc0mn1Uh1zWFykA6TtqK90agJeR
 A6Ktjw==
 =scY4
 -----END PGP SIGNATURE-----

Merge tag 'v5.0-rc6' into devel

Linux 5.0-rc6
2019-02-11 09:17:23 +01:00
Greg Kroah-Hartman 5c07488d99 Merge 5.0-rc6 into char-misc-next
We need the char-misc fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-02-11 09:05:58 +01:00
Artur Rojek 7cf74d515b dt-bindings: iio/adc: Add bindings for Ingenic JZ47xx SoCs ADC.
Add device tree bindings for the ADC controller on JZ47xx SoCs,
used by the ingenic-adc driver.

Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-02-09 15:39:24 +00:00
Linus Torvalds 46c291e277 ARM: SoC fixes for linux-5.0
This is a bit larger than normal, as we had not managed to send out
 a pull request before traveling for a week without my signing key.
 
 There are multiple code fixes for older bugs, all of which should
 get backported into stable kernels:
 
 - tango: one fix for multiplatform configurations broken on other
   platforms when tango is enabled
 - arm_scmi: device unregistration fix
 - iop32x: fix kernel oops from extraneous __init annotation
 - pxa: remove a double kfree
 - fsl qbman: close an interrupt clearing race
 
 The rest is the usual collection of smaller fixes for device tree
 files, on the renesas, allwinner, meson, omap, davinci, qualcomm
 and imx platforms. Some of these are for compile-time warnings,
 most are for board specific functionality that fails to work
 because of incorrect settings.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJcXg9kAAoJEGCrR//JCVInM/UP/1ikwMujrB33oT41l21KFvlw
 yrP3ji9Cyr6Ag8WCtgFYDXWw6uNW1eFYov8E4y8UKc16TSWWSvGmmIFM5K3OOtLe
 qAJrXTXCTBV2lGiWLIMlYQLAFav7H2CBgMLkRVLek1q7s6rV+hqV5hxfcAs6l2w7
 G5Qe8pwuGuZ2qINTs7OdLizd+JAmMeIuPQHGhrZnEupiy+44hHgbrIacXPhwX4Ff
 s5MwGON4H3pL1PtVIXlWo5nQwHyF+mkbSzn1RwmKpsQ4wK0vP3LgUURlvc945JNo
 zA5C/eCO6xFv7LCvBsuw515eEfI74K/9PDPr7txDz8TePjusPMv5zrYkb+jUhFhm
 dELhd8dmh50chXXgHVggRbIjYCpOJeVqm9aeYVvHyKOTNmVohGDc06To/0hFHljw
 1kgX4r2hUduTex0wwFks22TfcXr/cQzarXqyV6lRP5K/4IoU8MJCp4QLYXQK7HYY
 K9644aSaCTRGfRMbvVXYeykRgilEWT1wG8oREAH+PTWNIb47rqi/ByXitIrLkIWh
 Lnefj6bB863E0lPson03sBksylDRaluSeT5lVyjHzJsHwVLt2haqtaI892SZhUy1
 /oR60CMkGuRhmwi4ASCCbr20E+sa/LDNUVC6+d/xs9+Bc/54GEKxS11ffthMUoO0
 3EpgCZDHno+PMSIRkzPN
 =koHS
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "This is a bit larger than normal, as we had not managed to send out a
  pull request before traveling for a week without my signing key.

  There are multiple code fixes for older bugs, all of which should get
  backported into stable kernels:

   - tango: one fix for multiplatform configurations broken on other
     platforms when tango is enabled

   - arm_scmi: device unregistration fix

   - iop32x: fix kernel oops from extraneous __init annotation

   - pxa: remove a double kfree

   - fsl qbman: close an interrupt clearing race

  The rest is the usual collection of smaller fixes for device tree
  files, on the renesas, allwinner, meson, omap, davinci, qualcomm and
  imx platforms.

  Some of these are for compile-time warnings, most are for board
  specific functionality that fails to work because of incorrect
  settings"

* tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (30 commits)
  ARM: tango: Improve ARCH_MULTIPLATFORM compatibility
  firmware: arm_scmi: provide the mandatory device release callback
  ARM: iop32x/n2100: fix PCI IRQ mapping
  arm64: dts: add msm8996 compatible to gicv3
  ARM: dts: am335x-shc.dts: fix wrong cd pin level
  ARM: dts: n900: fix mmc1 card detect gpio polarity
  ARM: dts: omap3-gta04: Fix graph_port warning
  ARM: pxa: ssp: unneeded to free devm_ allocated data
  ARM: dts: r8a7743: Convert to new LVDS DT bindings
  soc: fsl: qbman: avoid race in clearing QMan interrupt
  arm64: dts: renesas: r8a77965: Enable DMA for SCIF2
  arm64: dts: renesas: r8a7796: Enable DMA for SCIF2
  arm64: dts: renesas: r8a774a1: Enable DMA for SCIF2
  ARM: dts: da850: fix interrupt numbers for clocksource
  dt-bindings: imx8mq: Number clocks consecutively
  arm64: dts: meson: Fix mmc cd-gpios polarity
  ARM: dts: imx6sx: correct backward compatible of gpt
  ARM: dts: imx: replace gpio-key,wakeup with wakeup-source property
  ARM: dts: vf610-bk4: fix incorrect #address-cells for dspi3
  ARM: dts: meson8m2: mxiii-plus: mark the SD card detection GPIO active-low
  ...
2019-02-08 16:23:41 -08:00
Jerome Brunet dbfc54534d dt-bindings: reset: meson: add g12a bindings
Add device tree bindings for the reset controller of g12a SoC family.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-02-08 17:31:33 +01:00
Claudiu Beznea 64e21add8c pinctrl: at91: add slewrate support for SAM9X60
Add slew rate support for SAM9X60 pin controller.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-02-08 13:07:03 +01:00
Weiyi Lu cd10b9343d dt-bindings: soc: fix typo of MT8173 power dt-bindings
fix incorrect IC name that will affect the MT8183 power dt-bindings

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-02-07 16:34:46 +01:00
Charles Keepax fdc98f070b mfd: lochnagar: Add initial binding documentation
Lochnagar is an evaluation and development board for Cirrus
Logic Smart CODEC and Amp devices. It allows the connection of
most Cirrus Logic devices on mini-cards, as well as allowing
connection of various application processor systems to provide a
full evaluation platform. This driver supports the board
controller chip on the Lochnagar board.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-07 10:43:55 +00:00
Weiyi Lu c3424f59a0 dt-bindings: clock: add clock for MT2712
Add new clock according to 3rd ECO design change.
It's the parent clock of audio clock mux.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-05 13:27:56 -08:00
Jian Hu 25db146aa7 dt-bindings: clk: meson: add g12a periph clock controller bindings
Add new clock controller compatible and dt-bindings header for the
Everything-Else domain of the g12a SoC

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190201145345.6795-3-jbrunet@baylibre.com
2019-02-04 09:52:11 +01:00
Kamil Konieczny b80a40c659 clk: samsung: exynos5433: Fix name typo in sssx
Fix typo in sssx name, there should be three letters 's'.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-02-01 14:36:47 +01:00
Kamil Konieczny 7403e48d7a clk: samsung: dt-bindings: Add Exynos5433 IMEM CMU clock IDs
Add DT bindings to describe the IMEM CMU clocks for the SlimSSS
(Slim Security SubSystem).

Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by:  Chanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited commit description]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-02-01 14:36:47 +01:00
Lee Jones fa56a62d01 Merge branches 'ib-mfd-iio-input-5.1', 'ib-mfd-input-watchdog-5.1' and 'ib-mfd-platform-5.1' into ibs-for-mfd-merged 2019-02-01 08:20:04 +00:00
Linus Torvalds 5b4746a031 Mostly driver fixes, but there's a core framework fix in here too.
- Revert the commits that introduce clk management for the SP
    clk on MMP2 SoCs (used for OLPC). Turns out it wasn't a good
    idea and there isn't any need to manage this clk, it just causes
    more headaches.
 
  - A performance regression that went unnoticed for many years where
    we would traverse the entire clk tree looking for a clk by name
    when we already have the pointer to said clk that we're looking
    for
 
  - A parent linkage fix for the qcom SDM845 clk driver
 
  - An i.MX clk driver rate miscalculation fix where order of operations
    were messed up
 
  - One error handling fix from the static checkers
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlxTiOIRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSU+3Q/6Au7lVXMD2V/TTKFoj1f/lMSfqBTAFJWD
 MV8obDsBglYFQVOLvMEDPauzK9JJx4diBmWNhAjPalonSsRIXS+UBhtEseknJ79u
 G48aGSZbtJYcfc7JYaQbZShyulJ6361waKQrMPMnOvGdXy/9osQYawtq7KdHxDRN
 Ac0Fq0O+vXcRuA3F4Xb/HEih6RtuArPA6HYAelU5luiKK9kVkn6DzPyGq6/MsDaf
 W83HdWMllSTA8w5Pgq/n9S9pvuiJNikpZA9dRZhr59tdnQBI5RKQq7UrBh0ts/XU
 XmDthCAk4omss+QjsrYIdX/8vCGqhSM7zkdY7pZvia/n6Kd/nnF65Wpq22KAqSmw
 FXfzncpVxXBuTLy67dD/dxxRiiR9nbvmcxXJiNIaqepyZZojqgwQ6YzuD/oy5DKy
 efQ+YuVYbTz8qmpMldhIOcjrmQ7rQ3+dpXJxxSgcfv5lOpMRr+erg6L+d2BnS064
 /EzLwqW6kpuEtnDlc3Pue29u/REbawQ2k37LXcEUuEyVpctiw4y+3+pcKZAt9Uh3
 eq3UoDl+aSFuyBD/UNgB3JFGcHM4ipbCj6PcQ4FHban0b+rMxCM7spMunc1Ec2jZ
 cf/BeN0YE0Y1kYy5ArfSp1B1iuNLvfGnwV5dUKKoXDD5Fkryt9Nz8dUaYfqEWrGN
 uvTJXtU1E/Q=
 =G4M9
 -----END PGP SIGNATURE-----

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "Mostly driver fixes, but there's a core framework fix in here too:

   - Revert the commits that introduce clk management for the SP clk on
     MMP2 SoCs (used for OLPC). Turns out it wasn't a good idea and
     there isn't any need to manage this clk, it just causes more
     headaches.

   - A performance regression that went unnoticed for many years where
     we would traverse the entire clk tree looking for a clk by name
     when we already have the pointer to said clk that we're looking for

   - A parent linkage fix for the qcom SDM845 clk driver

   - An i.MX clk driver rate miscalculation fix where order of
     operations were messed up

   - One error handling fix from the static checkers"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: qcom: gcc: Use active only source for CPUSS clocks
  clk: ti: Fix error handling in ti_clk_parse_divider_data()
  clk: imx: Fix fractional clock set rate computation
  clk: Remove global clk traversal on fetch parent index
  Revert "dt-bindings: marvell,mmp2: Add clock id for the SP clock"
  Revert "clk: mmp2: add SP clock"
  Revert "Input: olpc_apsp - enable the SP clock"
2019-01-31 23:22:57 -08:00
Arnd Bergmann 3673a91c07 Merge tag 'imx-fixes-5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.0, 2nd round:

It contains a single fix for i.MX8MQ clock numbers, removing the
duplicate use of 232 and numbering the clocks consecutively.

* tag 'imx-fixes-5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: imx8mq: Number clocks consecutively

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-30 11:34:38 +01:00
Nava kishore Manne 3f1b66be4a dt-bindings: reset: Add bindings for ZynqMP reset driver
Add documentation to describe Xilinx ZynqMP reset driver
bindings.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-29 14:07:10 +01:00
Andrey Smirnov 4cab5bf616 dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs
The driver now supports i.MX8MQ, so update bindings accordingly.

Cc: p.zabel@pengutronix.de
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: cphealy@gmail.com
Cc: l.stach@pengutronix.de
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-01-28 11:16:04 +01:00
Greg Kroah-Hartman fdddcfd9c9 Merge 5.0-rc4 into char-misc-next
We need the char-misc fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-28 08:13:52 +01:00
Lubomir Rintel 401fbb34f5 Revert "dt-bindings: marvell,mmp2: Add clock id for the SP clock"
It seems that the kernel has no business managing this clock: once the SP
clock is disabled, it's not sufficient to just enable it in order to bring
the SP core back up.

Pretty sure nothing ever used this and it's safe to remove.

This reverts commit e8a2c77914.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-01-24 10:55:33 -08:00
Rajendra Nayak c6e6eff4d4 dt-bindings: power: Add qcom rpm power domain driver bindings
Add DT bindings to describe the rpm/rpmh power domains found on Qualcomm
Technologies, Inc. SoCs. These power domains communicate a performance
state to RPM/RPMh, which then translates it into corresponding voltage on a
PMIC rail.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-01-22 15:06:12 -06:00
Felix Fietkau 6810ed320e
MIPS: ath79: export switch MDIO reference clock
On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz
clock. If that feature is not used, it defaults to the main reference
clock, like on all other SoC.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
2019-01-22 11:17:22 -08:00
Felix Fietkau 9b56e0d0cc
MIPS: ath79: add helpers for setting clocks and expose the ref clock
Preparation for transitioning the legacy clock setup code over
to OF.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
2019-01-22 11:17:21 -08:00
David Dai b5d2f74107 interconnect: qcom: Add sdm845 interconnect provider driver
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.

Signed-off-by: David Dai <daidavid1@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22 13:37:25 +01:00
Fabrizio Castro 9d034e151b clk: renesas: r8a774a1: Add missing CANFD clock
This patch adds the missing CANFD clock to the r8a774a1 specific
clock driver.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-01-21 14:01:57 +01:00
Fabrizio Castro 2a6efbc6da clk: renesas: r8a774c0: Add missing CANFD clock
This patch adds the missing CANFD clock to the r8a774c0 specific
clock driver.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-01-21 13:50:40 +01:00
Ulrich Hecht adbb78e110 ARM: dts: r8a7778: Add HSCIF0/1 support
Add HSCIF0/1 clocks and device nodes, based on Rev. 1.00 of the R-Car
M1A datasheet.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
[geert: Squashed two patches]
[geert: Correct HSCIF1 module clock index]
[geert: Correct reg properties for non-LPAE]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-17 14:15:57 +01:00
Jerome Brunet 3705add0b7 dt-bindings: reset: meson-axg: fix SPDX license id
As reported, the SPDX license id is not placed correctly and the variant
of the BSD License used should be specified.

Fixes: c16292578f ("dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset Controller")
Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-01-16 12:50:27 -06:00
Pascal PAILLET-LME 3eafbd3a77 dt-bindings: mfd: Document STPMIC1
STPMIC1 is a PMIC from STMicroelectronics. The STPMIC1 integrates 10
regulators, 3 power switches, a watchdog and an input for a power on key.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-01-16 13:59:12 +00:00
Guido Günther c5b11ee9f1 dt-bindings: imx8mq: Number clocks consecutively
This fixes a duplicate use of 232 and numbers the clocks without holes.

Fixes: 1cf3817bf1 ("dt-bindings: Add binding for i.MX8MQ CCM")
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-16 21:27:02 +08:00
Jeffrey Hugo 6131dc8121 clk: qcom: smd: Add support for MSM8998 rpm clocks
Add rpm smd clocks, PMIC and bus clocks which are required on MSM8998
for clients to vote on.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-01-09 11:46:42 -08:00
Eric Anholt 670c672608 soc: bcm: bcm2835-pm: Add support for power domains under a new binding.
This provides a free software alternative to raspberrypi-power.c's
firmware calls to manage power domains.  It also exposes a reset line,
where previously the vc4 driver had to try to force power off the
domain in order to trigger a reset.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
2019-01-09 16:55:09 +01:00
Jerome Brunet 83d0ea237b dt-bindings: clk: meson: add ao slow clock path ids
Add the CLKIDs for the slow clock generation path

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20181221160239.26265-2-jbrunet@baylibre.com
2019-01-07 15:18:59 +01:00
Linus Torvalds 645ff1e8e7 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull input updates from Dmitry Torokhov:
 "A tiny pull request this merge window unfortunately, should get more
  material in for the next release:

   - new driver for Raspberry Pi's touchscreen (firmware interface)

   - miscellaneous input driver fixes"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
  Input: elan_i2c - add ACPI ID for touchpad in ASUS Aspire F5-573G
  Input: atmel_mxt_ts - don't try to free unallocated kernel memory
  Input: drv2667 - fix indentation issues
  Input: touchscreen - fix coding style issue
  Input: add official Raspberry Pi's touchscreen driver
  Input: nomadik-ske-keypad - fix a loop timeout test
  Input: rotary-encoder - don't log EPROBE_DEFER to kernel log
  Input: olpc_apsp - remove set but not used variable 'np'
  Input: olpc_apsp - enable the SP clock
  Input: olpc_apsp - check FIFO status on open(), not probe()
  Input: olpc_apsp - drop CONFIG_OLPC dependency
  clk: mmp2: add SP clock
  dt-bindings: marvell,mmp2: Add clock id for the SP clock
  Input: ad7879 - drop platform data support
2019-01-02 18:56:59 -08:00
Linus Torvalds 0f2107daec One more patch to generalize a set of DT binding defines now before -rc1
comes out. This way the SoC DTS files can use the proper defines from a
 stable tag.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCgAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlwmdjIRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSX8Iw//RZ3fJWCV5HdYO938SRl8mdn+kKc+8bfO
 Ng6abLS7hV79oB8G5sapYxS5BaoHw9O59NM2wldu+9vtM1s3cPlvPXJN60NQMHrA
 9Bv8r5xOARKzcyou+0vCtWOVL0xt92KKU4fuPCgdP62OkeNppUeZqpoeVILZyOsz
 txfNX1CN6WdxPHWG4mxted8i1sX873EAdLsE+n8zEchfPk0ADZ/TEfKDlqHV9wAB
 XgFzk8W/ZyKg2zlNCwWIUBIk9IlqRUTnPArA9bzAgxMO6x0DT7W5LSgEHN0nk2kl
 uhLDjxcXUtQKic14hzlnBHDN+aSaCtrdUsoxxlgoyyq+cDh8eC9keh4DsBu32nBk
 ETQ00DteZWaPSMuqphQ6rOye3X/ff42cQREZCxo5anuUt2ekgwdCiS64XU/id+tk
 1YdTGgiwiZTBZCTlvWqvoOpU2OannD7c2dEML9X7evM0H35f2KjNFODtWEDedDSg
 BFyP62gFs7063Pdz02wUdS37m6iC2WDbZioSUw+NJjSnnX4N4Uz7zI/Xh2AhwLwT
 9bECXexsg2qUTSFbEvLsTTasE551bSqOJ5VzJuDwTL6OdmeLYEv+H+ZY5z/8lYkF
 gLx2rfo63P/2YljkVjKFxValu3jDUbt26ePEa0J9N4WK17CS28L6BXnC7TdEqNhP
 +Hs380jUFXw=
 =mZr0
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull more clk updates from Stephen Boyd:
 "One more patch to generalize a set of DT binding defines now before
  -rc1 comes out.

  This way the SoC DTS files can use the proper defines from a stable
  tag"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: imx8qxp: make the name of clock ID generic
2019-01-02 18:45:50 -08:00
Linus Torvalds 35ddb06a46 - Introduce device-managed registration devm_mbox_controller_un/register and convert drivers to use it
- Introduce flush api to support clients that must busy-wait in atomic context
 - Support multiple controllers per device
 - Hi3660: a bugfix and constify ops structure
 - TI-MsgMgr: off by one bugfix.
 - BCM: switch to spdx license
 - Tegra-HSP: support for shared mailboxes and suspend/resume.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAlwsSx4ACgkQf9lkf8eY
 P5V7VBAAkYp05XY1IsH5x1nSqhFb+cco0pv0kwO3Sr+IhYgC3i5aD2JMtIGu3N34
 8lFrNXbrodDFsY37dAd8YDP4zoJ6LGmB9Z7brjuce/Mlgj63Z7EV5R+PW6UC/thP
 ul9RVM3d0YoRfutHz0p8+0vgB2d90Npng6f1XhNBwniWNtzFm1QoDl/rr5QI/126
 tdgpuC/79fl1ymuzrBxMx7Yn5LG4P5B834gip16qiKlhaawL98nmWoF0EyIFwSMN
 Oo4yxpiMPsLC1Jt9EygXOHyybt1WSgCGlKV0fk6iiugR2YmDfVaiASq8e1gBN9W8
 8ILFxEFkfbR4uat3fDErymGmdQrt0pFeSBnwej30JS/GTASz5i0XAIfpVYL113t9
 WzsMR8YZGW3hk1Z+ZXJhecszYhDg4GAfew2kADqmdBeG6JX8eBn0wYFRFYjYPsXR
 idrsWkuzYmNXUaFg10Un3OgVwmpnhB7QmiKXTeqpWkcYlrI8MiljwAK+wXh2/23S
 vxM+hdbKLQ++0m6iMz/9HE3b5LJlJtXwz5UDagWvgr6t0UTxviPK7xpjvgvRlUny
 OYd2UuC0X3dHWWflST6eWR4hWqc96KHLsTAn3X9nm+S41ijZHU+MS3B/F1Z5R1LS
 tU3V0JK5Q+61Va5brSr7/XO3TEy+5n1jWl92SGnayFuqnVaXZyQ=
 =b4QB
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v4.21' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - Introduce device-managed registration
   devm_mbox_controller_un/register and convert drivers to use it

 - Introduce flush api to support clients that must busy-wait in atomic
   context

 - Support multiple controllers per device

 - Hi3660: a bugfix and constify ops structure

 - TI-MsgMgr: off by one bugfix.

 - BCM: switch to spdx license

 - Tegra-HSP: support for shared mailboxes and suspend/resume.

* tag 'mailbox-v4.21' of git://git.linaro.org/landing-teams/working/fujitsu/integration: (30 commits)
  mailbox: tegra-hsp: Use device-managed registration API
  mailbox: tegra-hsp: use devm_kstrdup_const()
  mailbox: tegra-hsp: Add suspend/resume support
  mailbox: tegra-hsp: Add support for shared mailboxes
  dt-bindings: tegra186-hsp: Add shared mailboxes
  mailbox: Allow multiple controllers per device
  mailbox: Support blocking transfers in atomic context
  mailbox: ti-msgmgr: Use device-managed registration API
  mailbox: stm32-ipcc: Use device-managed registration API
  mailbox: rockchip: Use device-managed registration API
  mailbox: qcom-apcs: Use device-managed registration API
  mailbox: platform-mhu: Use device-managed registration API
  mailbox: omap: Use device-managed registration API
  mailbox: mtk-cmdq: Remove needless devm_kfree() calls
  mailbox: mtk-cmdq: Use device-managed registration API
  mailbox: xgene-slimpro: Use device-managed registration API
  mailbox: sti: Use device-managed registration API
  mailbox: altera: Use device-managed registration API
  mailbox: imx: Use device-managed registration API
  mailbox: hi6220: Use device-managed registration API
  ...
2019-01-02 18:41:38 -08:00
Linus Torvalds 78e8696c23 dmaengine-4.21-rc1
dmaengine updates for v4.21-rc1
 
  - New driver for UniPhier MIO DMA controller
  - Remove R-Mobile APE6 support
  - Sprd driver updates and support for cyclic link-list
  - Remove dma_slave_config direction usage from rest of drivers
  - Minor updates to dmatest, dw-dmac, zynqmp and bcm dma drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJcKipaAAoJEHwUBw8lI4NH87kQAJF5tSQzvh4alAwntJ+rNZfw
 bgiUW29f7PxEzEGDsTBuFsw9zPhGxPnwtXzLm2iSDBGqkEcwKc+yretuX3Pgkce+
 IpPkCBGcfXptSJxFz4XxBi3HCkZ+jlhy33pH+hkW/tA4SIcA+VJjfQLePiY3sVMO
 1QUFDaL9NEyEfgJTmUShaPvCiz+3OHjY/3LAMlbLqQer4C9zC3iyvZIf9lvPQQnt
 qJaFuEiqlhw6eOAGw+2frMYDEV57QEiRgghBZyFm5RxG19XCcPkVV9id22rz5TQb
 +mQXhyaLvDiztWf71dFlXW2nW8mjewcjNU4h5g3RTyLA7fpLNcpMyZY2WizIADVS
 x6a7/HSrDjD4CN6pGDmRi8vvqkTAEDCsrfUM6K43rAsoZzU5elVJwOv4m8WB3CCF
 pRlUwFi6ENt8Ov8CWgCCaY0/Bzj1FgjN3BY87amBsI9wF4fkpCPNdWw34a6lg1Kf
 SzyPty8Z+i+6rtKps7Mh9VOZI2tryPJzyAWrcOCDWQoiR/RWzgC3y6SuwCdiyaDf
 8hFV4xnB0oVJ8vsTjF1AgxVwEsqQ7TVTIsLAns6jEnTC5FAnOLd0iwh56a+rw+lR
 7e1iuQYllZ1rdMi+r5gWG4OCsZehmZgCqc250om51tzA1SDVDQ3bbx8clxZeha80
 AKr5MVrIVp7riYFEICvp
 =+pTt
 -----END PGP SIGNATURE-----

Merge tag 'dmaengine-4.21-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:
 "This includes a new driver, removes R-Mobile APE6 as it is no longer
  used, sprd cyclic dma support, last batch of dma_slave_config
  direction removal and random updates to bunch of drivers.

  Summary:
   - New driver for UniPhier MIO DMA controller
   - Remove R-Mobile APE6 support
   - Sprd driver updates and support for cyclic link-list
   - Remove dma_slave_config direction usage from rest of drivers
   - Minor updates to dmatest, dw-dmac, zynqmp and bcm dma drivers"

* tag 'dmaengine-4.21-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (48 commits)
  dmaengine: qcom_hidma: convert to DEFINE_SHOW_ATTRIBUTE
  dmaengine: pxa: remove DBGFS_FUNC_DECL()
  dmaengine: mic_x100_dma: convert to DEFINE_SHOW_ATTRIBUTE
  dmaengine: amba-pl08x: convert to DEFINE_SHOW_ATTRIBUTE
  dmaengine: Documentation: Add documentation for multi chan testing
  dmaengine: dmatest: Add transfer_size parameter
  dmaengine: dmatest: Add alignment parameter
  dmaengine: dmatest: Use fixed point div to calculate iops
  dmaengine: dmatest: Add support for multi channel testing
  dmaengine: rcar-dmac: Document R8A774C0 bindings
  dt-bindings: dmaengine: usb-dmac: Add binding for r8a774c0
  dmaengine: zynqmp_dma: replace spin_lock_bh with spin_lock_irqsave
  dmaengine: sprd: Add me as one of the module authors
  dmaengine: sprd: Support DMA 2-stage transfer mode
  dmaengine: sprd: Support DMA link-list cyclic callback
  dmaengine: sprd: Set cur_desc as NULL when free or terminate one dma channel
  dmaengine: sprd: Fix the last link-list configuration
  dmaengine: sprd: Get transfer residue depending on the transfer direction
  dmaengine: sprd: Remove direction usage from struct dma_slave_config
  dmaengine: dmatest: fix a small memory leak in dmatest_func()
  ...
2019-01-01 15:45:48 -08:00
Linus Torvalds c9bef4a651 Pin control bulk changes for the v4.21 kernel cycle:
No core changes this time.
 
 New drivers:
 
 - NXP (ex Freescale) i.MX 8 QXP SoC driver.
 
 - Mediatek MT6797 SoC driver.
 
 - Mediatek MT7629 SoC driver.
 
 - Actions Semiconductor S700 SoC driver.
 
 - Renesas RZ/A2 SoC driver.
 
 - Allwinner sunxi suniv F1C100 SoC driver.
 
 - Qualcomm PMS405 PMIC driver.
 
 - Microsemi Ocelot Jaguar2 SoC driver.
 
 Improvements:
 
 - Some RT improvements (using raw spinlocks where appropriate).
 
 - A lot of new pin sets on the Renesas PFC pin controllers.
 
 - GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
   chips, and Xway.
 
 - Major modernization of the Intel pin control drivers.
 
 - STM32 pin control driver will now synchronize usage of pins
   with another CPU using a hardware spinlock.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJcKN2qAAoJEEEQszewGV1zK5wP/2QbrvH8eW+mF9YD+1fr11Sp
 oCe52C7n1YMKt5R6vSFyLtqPYDehCP9gTS0Zlbz4HKyTe2E9OIuigrmg+1uQwxWp
 GSvxmMx9QFlNqUcWOvc90DYDfOh5ZPVIsP16k3DIlodVsQlSu4O4KF0pJseRyuSh
 PVn/MjPrGtyTB2TJzO/Oj3sadHhVRzTb6Zlk7uk5hak6ys5AYHetBHhuxAcicFv4
 OGwEOvaV5DiTO5wbbyNSmkF5NI+ApV2o4DRRNTXC+mJJSPCpQxFskLTmHu9wYKmE
 /p6Gp9dtxSS3QLA4NXsY+IrFJsU1q261gEvIsFa2upW5j7T8bLzRAzoFG+/dil6t
 k5GDnx8t7qSPXLme8/nJlX40O2CJs4sXKwCQY4vjsySW31ryqBMm4JNSQKTxe9Ma
 1RrZ7UR+P6IwupUsEYZkcneuu+oGMNYpbDG48R2utgECY4KN17wUjjZHkYHZNiDi
 Yk/CMkOXXuZnAZGfmaj8R9yjkjFZMZAqOYDJcruMzLFjAkw6fCmFipZLoSIN4+sJ
 u4RERrbsF+e5PY4BOfxYw5NIzTl60AQquttj//RJyLQDsQ/HMU9jaovW6E3JQytO
 NgU9RtEwrtK50ef5OYS4EtTlNi2B3arU83noI/oX3R52SoAIdMTHtVMgyECm3dMg
 XeLn9x2Ffy7a4PRruLoy
 =cm6m
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "We have no core changes but lots of incremental development in drivers
  all over the place: Renesas, NXP, Mediatek and Actions Semiconductor
  keep churning out new SoCs.

  I have some subtree maintainers for Renesas and Intel helping out to
  keep down the load, it's been working smoothly (Samsung also have a
  subtree but it was not used this cycle.)

  New drivers:

   - NXP (ex Freescale) i.MX 8 QXP SoC driver.

   - Mediatek MT6797 SoC driver.

   - Mediatek MT7629 SoC driver.

   - Actions Semiconductor S700 SoC driver.

   - Renesas RZ/A2 SoC driver.

   - Allwinner sunxi suniv F1C100 SoC driver.

   - Qualcomm PMS405 PMIC driver.

   - Microsemi Ocelot Jaguar2 SoC driver.

  Improvements:

   - Some RT improvements (using raw spinlocks where appropriate).

   - A lot of new pin sets on the Renesas PFC pin controllers.

   - GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
     chips, and Xway.

   - Major modernization of the Intel pin control drivers.

   - STM32 pin control driver will now synchronize usage of pins with
     another CPU using a hardware spinlock"

* tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (145 commits)
  dt-bindings: arm: fsl-scu: add imx8qm pinctrl support
  pinctrl: freescale: Break dependency on SOC_IMX8MQ for i.MX8MQ
  pinctrl: imx-scu: Depend on IMX_SCU
  pinctrl: ocelot: Add dependency on HAS_IOMEM
  pinctrl: ocelot: add MSCC Jaguar2 support
  pinctrl: bcm: ns: support updated DT binding as syscon subnode
  dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon
  MAINTAINERS: merge at91 pinctrl entries
  pinctrl: imx8qxp: break the dependency on SOC_IMX8QXP
  pinctrl: uniphier: constify uniphier_pinctrl_socdata
  pinctrl: mediatek: improve Kconfig dependencies
  pinctrl: msm: mark PM functions as __maybe_unused
  dt-bindings: pinctrl: sunxi: Add supply properties
  pinctrl: meson: meson8b: add the missing GPIO_GROUPs for BOOT and CARD
  pinctrl: meson: meson8: add the missing GPIO_GROUPs for BOOT and CARD
  pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
  pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
  pinctrl: meson: meson8b: fix the GPIO function for the GPIOAO pins
  pinctrl: meson: meson8: fix the GPIO function for the GPIOAO pins
  pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length
  ...
2019-01-01 13:19:16 -08:00
Linus Torvalds b7badd1d7a ARM: Device-tree updates
As usual, this is where the bulk of our changes end up landing each
 merge window.
 
 The individual updates are too many to enumerate, many many platforms
 have seen additions of device descriptions such that they are
 functionally more complete (in fact, this is often the bulk of updates
 we see).
 
 Instead I've mostly focused on highlighting the new platforms below as
 they are introduced. Sometimes the introduction is of mostly a fragment,
 that later gets filled in on later releases, and in some cases it's
 near-complete platform support. The latter is more common for derivative
 platforms that already has similar support in-tree.
 
 Two SoCs are slight outliers from the usual range of additions. Allwinner
 support for F1C100s, a quite old SoC (ARMv5-based) shipping in the
 Lychee Pi Nano platform. At the other end is NXP Layerscape LX2160A,
 a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O aimed at
 infrastructure/networking.
 
 TI updates stick out in the diff stats too, in particular because they
 have moved the description of their L4 on-chip interconnect to devicetree,
 which opens up for removal of even more of their platform-specific
 'hwmod' description tables over the next few releases.
 
 SoCs:
  - Qualcomm QCS404 (4x Cortex-A53)
  - Allwinner T3 (rebranded R40) and f1c100s (armv5)
  - NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4)
  - NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72)
 
 New platforms:
  - Rockchip: Gru Scarlet (RK3188 Tablet)
  - Amlogic: Phicomm N1 (S905D), Libretech S805-AC
  - Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708)
  - Qualcomm: QCS404 base platform and EVB
  - Qualcomm: Remove of Arrow SD600
  - PXA: First PXA3xx DT board: Raumfeld
  - Aspeed: Facebook Backpack-CMM BMC
  - Renesas iWave G20D-Q7 (RZ/G1N)
  - Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s)
  - Allwinner Emlid Neutis N5, Mapleboard MP130
  - Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE)
  - i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
  - VF610: Liebherr's BK4 device, ZII SCU4 AIB board
  - i.MX7D PICO Hobbit baseboard
  - i.MX7ULP EVK board
  - NXP LX2160AQDS and LX2160ARDB boards
 
 Other:
  - Coresight binding updates across the board
  - CPU cooling maps updates across the board
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlwqgVYPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3ybAQAKAhd7XI5oY/wgdZZmxwcX+p7sU6LXeIlpWU
 XsPN1c14KU0siQv/znVA5OpF+fgn9eRqfWnMoDPlvdScTq07FM2NBmOJfVJYDPJa
 uvsll5m+84FCYanIR//YybS0tCM0b0BHoHo2DoyIxWeAwmw7BBVslddBdNg6R7hG
 S9rU9rUeqfCj7HbcPLqVn0DecMtEe7R8zmDtG1CSMqrhncifmoV4gtUnbYAg0GGT
 cSvj/zT8A1j0oJcU2Upl/Fr+7WJ7XB9pnku91nUOSXLv5VkyctLGomKq5F7O2/Xs
 2DhpH2yKwQt7S7TDiDd0jy64Of6+Xup35wEHevCeKrzGXcVRqqHwCkanLz9FdjVt
 yg4UrI/P1nY7h4ifZPplgigv+kA+IjRGiMrTRIEgSE5YK9U5AYkgembTWksRDikd
 5EpeJcMj2tBv4SDellNNtzh6GGTPBf3GJw3P9uRuxnQY/T31N2eX0XGeRikL+Lzf
 9nbQdJealmql3rCa5oFEJwSxrSaAv/ub7/294kPdEmXj8+3qUuH3hZAZOI9LSXGW
 GCuxsgccB2GF1M48x48/QpHgxb93okyXmndONZnU8uN8ba0zS4b8QLwvIY5rqv5Z
 kqD1VPBQf9kGVyzDyABRjFmGCDJcoOJf4QrzvNk9+xo8fXVk1xNtxu4MUsHvc2lS
 cU2RYWm/
 =sFVi
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM Device-tree updates from Olof Johansson:
 "As usual, this is where the bulk of our changes end up landing each
  merge window.

  The individual updates are too many to enumerate, many many platforms
  have seen additions of device descriptions such that they are
  functionally more complete (in fact, this is often the bulk of updates
  we see).

  Instead I've mostly focused on highlighting the new platforms below as
  they are introduced. Sometimes the introduction is of mostly a
  fragment, that later gets filled in on later releases, and in some
  cases it's near-complete platform support. The latter is more common
  for derivative platforms that already has similar support in-tree.

  Two SoCs are slight outliers from the usual range of additions.
  Allwinner support for F1C100s, a quite old SoC (ARMv5-based) shipping
  in the Lychee Pi Nano platform. At the other end is NXP Layerscape
  LX2160A, a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O
  aimed at infrastructure/networking.

  TI updates stick out in the diff stats too, in particular because they
  have moved the description of their L4 on-chip interconnect to
  devicetree, which opens up for removal of even more of their
  platform-specific 'hwmod' description tables over the next few
  releases.

  SoCs:
   - Qualcomm QCS404 (4x Cortex-A53)
   - Allwinner T3 (rebranded R40) and f1c100s (armv5)
   - NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4)
   - NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72)

  New platforms:
   - Rockchip: Gru Scarlet (RK3188 Tablet)
   - Amlogic: Phicomm N1 (S905D), Libretech S805-AC
   - Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708)
   - Qualcomm: QCS404 base platform and EVB
   - Qualcomm: Remove of Arrow SD600
   - PXA: First PXA3xx DT board: Raumfeld
   - Aspeed: Facebook Backpack-CMM BMC
   - Renesas iWave G20D-Q7 (RZ/G1N)
   - Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s)
   - Allwinner Emlid Neutis N5, Mapleboard MP130
   - Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE)
   - i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
   - VF610: Liebherr's BK4 device, ZII SCU4 AIB board
   - i.MX7D PICO Hobbit baseboard
   - i.MX7ULP EVK board
   - NXP LX2160AQDS and LX2160ARDB boards

  Other:
   - Coresight binding updates across the board
   - CPU cooling maps updates across the board"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (648 commits)
  ARM: dts: suniv: Fix improper bindings include patch
  ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards
  arm64: dts: allwinner: a64: bananapi-m64: Add Bluetooth device node
  ARM: dts: suniv: Fix improper bindings include patch
  arm64: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
  arm64: dts: Remove unused properties from FSL QSPI driver nodes
  ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
  ARM: dts: imx6sx-sdb: Fix the reg properties for the FSL QSPI nodes
  ARM: dts: Remove unused properties from FSL QSPI driver nodes
  arm64: dts: ti: k3-am654: Enable main domain McSPI0
  arm64: dts: ti: k3-am654: Add McSPI DT nodes
  arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes
  arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM
  arm64: dts: ti: k3-am65-main: Add ECAP PWM node
  arm64: dts: ti: k3-am654-base-board: Add I2C nodes
  arm64: dts: ti: am654-base-board: Add pinmux for main uart0
  arm64: dts: ti: k3-am65: Add pinctrl regions
  dt-bindings: pinctrl: k3: Introduce pinmux definitions
  ARM: dts: exynos: Specify I2S assigned clocks in proper node
  ARM: dts: exynos: Add missing CPUs in cooling maps for Odroid X2
  ...
2018-12-31 17:36:02 -08:00
Linus Torvalds d36377c6eb ARM: SoC driver updates
Misc driver updates for platforms, many of them power related.
 
  - Rockchip adds power domain support for rk3066 and rk3188
  - Amlogic adds a power measurement driver
  - Allwinner adds SRAM support for three platforms (F1C100, H5, A64 C1)
  - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7
  - Broadcom fixes suspend/resume with Thumb2 kernels, and improves
    stability of a handful of firmware/platform interfaces
  - PXA completes their conversion to dmaengine framework
  - Renesas does a bunch of PM cleanups across many platforms
  - Tegra adds support for suspend/resume on T186/T194, which includes
    some driver cleanups and addition of wake events
  - Tegra also adds a driver for memory controller (EMC) on Tegra2
  - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in GPC
  - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60
 
  + misc cleanups across several platforms
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlwqd4APHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3HXoP/icWJTGrbf9R6T7r0RWB3xeV8ouTPMM8YM5C
 6wD4LkkjgZ16Hz/ellJ0Oug77LdnJ/ZI7jH2u0IcKRXr4sL94hEo11jAJLLtCHpt
 rGiItMuEDMhNFcAK/yREI6FtRqjNZhsTuR+gkcjzMnGLCaTA1+RwQNdugH0hh0fF
 z8C6tjN+fRIeS0wInBzR/402GcgRU0DIJrr0kmklS0u6tc2QW24ffv8ymvMiVO46
 l8VemmdxVZsBU2iehraPy6mSXsyTm04dNTuHnrIw3nE3kTJF7jMvpqI/euU1eZl6
 6EzrrCym8nC66IlqhHMBB427PK8sRqJTqwqSXO6e90AqiK4H2bMovXKiob/Psq+e
 yWqPOrAr8YBLqTgauvCzVm/xneT5rZM4N0BYhOk172Uk52qenNWDnqHj41A4CMSM
 /id3L1cHs5nf2qwuMncXvLX+Y2vO2n6cMmF8cDRLu592OBZRcVepUM0xoaSdZScv
 LJsP3jH3RRcY3L2rf7bY2Mitp48bDgZMZdw/viSHsFS+SVr225uNFALFDQ9kNEoZ
 2d9i9IvC7xOMhdVAX03U7DuRcpKXBPcv+arA57PiVvR4M1HeU7VvD4ayP5loVX2J
 GoDIKiPQitAsOKzyPyZ5Jw04lxio3xZbrbmmVzEH8uKWIV5omdiMnSrFsEfduRCT
 rU+Mqe2j
 =yEX2
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Misc driver updates for platforms, many of them power related.

   - Rockchip adds power domain support for rk3066 and rk3188

   - Amlogic adds a power measurement driver

   - Allwinner adds SRAM support for three platforms (F1C100, H5, A64
     C1)

   - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7

   - Broadcom fixes suspend/resume with Thumb2 kernels, and improves
     stability of a handful of firmware/platform interfaces

   - PXA completes their conversion to dmaengine framework

   - Renesas does a bunch of PM cleanups across many platforms

   - Tegra adds support for suspend/resume on T186/T194, which includes
     some driver cleanups and addition of wake events

   - Tegra also adds a driver for memory controller (EMC) on Tegra2

   - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in
     GPC

   - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60

  and misc cleanups across several platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
  ARM: at91: add support in soc driver for new SAM9X60
  ARM: at91: add support in soc driver for LPDDR2 SiP
  memory: omap-gpmc: Use of_node_name_eq for node name comparisons
  bus: ti-sysc: Check for no-reset and no-idle flags at the child level
  ARM: OMAP2+: Check also the first dts child for hwmod flags
  soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency
  soc: imx: gpc: Increase GPC_CLK_MAX to 7
  soc: renesas: rcar-sysc: Fix power domain control after system resume
  soc: renesas: rcar-sysc: Merge PM Domain registration and linking
  soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers
  soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
  dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1
  dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
  dt-bindings: sram: Add Allwinner suniv F1C100s
  soc: sunxi: sram: Add support for the H5 SoC system control
  soc: sunxi: sram: Enable EMAC clock access for H3 variant
  soc: imx: gpcv2: add support for i.MX8MQ SoC
  soc: imx: gpcv2: move register access table to domain data
  soc: imx: gpcv2: prefix i.MX7 specific defines
  dmaengine: pxa: make the filter function internal
  ...
2018-12-31 17:32:35 -08:00
Linus Torvalds 24dc83635f This is the bulk of GPIO changes for the v4.21 kernel series:
Core changes:
 
 - Some core changes are already in outside of this pull
   request as they came through the regulator tree, most
   notably devm_gpiod_unhinge() that removes devres refcount
   management from a GPIO descriptor. This is needed in
   subsystems such as regulators where the regulator core
   need to take over the reference counting and lifecycle
   management for a GPIO descriptor.
 
 - We dropped devm_gpiochip_remove() and devm_gpio_chip_match()
   as nothing needs it. We can bring it back if need be.
 
 - Add a global TODO so people see where we are going. This
   helps setting the direction now that we are two GPIO
   maintainers.
 
 - Handle the MMC CD/WP properties in the device tree core.
   (The bulk of patches activating this code is already
   merged through the MMC/SD tree.)
 
 - Augment gpiochip_request_own_desc() to pass a flag so
   we as gpiochips can request lines as active low or open
   drain etc even from ourselves.
 
 New drivers:
 
 - New driver for Cadence GPIO blocks.
 
 - New driver for Atmel SAMA5D2 PIOBU GPIO lines.
 
 Driver improvements:
 
 - A major refactoring of the PCA953x driver - this driver has
   been around for ages, and is now modernized to reduce code
   duplication that has stacked up and is using regmap to read
   write and cache registers.
 
 - Intel drivers are now maintained in a separate tree and
   start with a round of cleanups and unifications.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJcJJcmAAoJEEEQszewGV1zdCoQAMSLPh+4QdYLFS3ZmnsPvZkg
 Zkz94RVT+uLLmHpR8XBl0wl4mmYCiwB50IwsXwlvJGceSXjCn6hLg9BZBP5hFMCb
 yFk3fgXQSh7TOnpjgbCWSssCjpejQ0cOb/2nWHz5s/fbYKYlh3VXckW9hhW+R+b3
 6+Mno1SzmBkpVVQ21ISlZeLoNDynkCW6DfjiKMuHAyxzxa0oZ9Qid+tnVDnQM4rD
 rCnvYLuvxlXw97W+LI7AU9KoCITdO+2M/0dtGVEEYKfHseRReSy2Oo3nlqCglygX
 cNkBe9RYU1CJdas1P/c18wjDAqWp/pbugzHDkYF5Y3tBtB2rQSftjtnQngiVMXMt
 De7ejPvL7/OLECvI2WUD6y9NAduw/HE4FO8BBdn0gP/a9svJpVZ993yPd3F9n7EZ
 ZIBpycDZVtkcE7dwQgek17bFILRY5nBBMB9oCLL2wk48qdmjpcAbxVfGSsYOe6wO
 +cZRZuj/eR3i9gHRugfFx7Evoc7l4erihTpES/YAy3De1s3uV8KjT4zE7Jh+M9LW
 GM797BcXJJeb5toC7HZ/G2UAVMyWEhY0n7PGG616CS8IrzmzIZpJOL9kUVOWPb0F
 9CPt6qhVbUl9rxp1H/Z3TxvYqIw6icn/z5YewZxLU1zaBlpE3jc7PhZb5hOGnFUf
 /DWwe4n99JsjHTrGx1ra
 =05LW
 -----END PGP SIGNATURE-----

Merge tag 'gpio-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.21 kernel series.

  Core changes:

   - Some core changes are already in outside of this pull request as
     they came through the regulator tree, most notably
     devm_gpiod_unhinge() that removes devres refcount management from a
     GPIO descriptor. This is needed in subsystems such as regulators
     where the regulator core need to take over the reference counting
     and lifecycle management for a GPIO descriptor.

   - We dropped devm_gpiochip_remove() and devm_gpio_chip_match() as
     nothing needs it. We can bring it back if need be.

   - Add a global TODO so people see where we are going. This helps
     setting the direction now that we are two GPIO maintainers.

   - Handle the MMC CD/WP properties in the device tree core. (The bulk
     of patches activating this code is already merged through the
     MMC/SD tree.)

   - Augment gpiochip_request_own_desc() to pass a flag so we as
     gpiochips can request lines as active low or open drain etc even
     from ourselves.

  New drivers:

   - New driver for Cadence GPIO blocks.

   - New driver for Atmel SAMA5D2 PIOBU GPIO lines.

  Driver improvements:

   - A major refactoring of the PCA953x driver - this driver has been
     around for ages, and is now modernized to reduce code duplication
     that has stacked up and is using regmap to read write and cache
     registers.

   - Intel drivers are now maintained in a separate tree and start with
     a round of cleanups and unifications"

* tag 'gpio-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (99 commits)
  gpio: sama5d2-piobu: Depend on OF_GPIO
  gpio: Add Cadence GPIO driver
  dt-bindings: gpio: Add bindings for Cadence GPIO
  gpiolib-acpi: remove unused variable 'err', cleans up build warning
  gpio: mxs: read pin level directly instead of using .get
  gpio: aspeed: remove duplicated statement
  gpio: add driver for SAMA5D2 PIOBU pins
  dt-bindings: arm: atmel: describe SECUMOD usage as a GPIO controller
  gpio/mmc/of: Respect polarity in the device tree
  dt-bindings: gpio: rcar: Add r8a774c0 (RZ/G2E) support
  memory: omap-gpmc: Get the header of the enum
  ARM: omap1: Fix new user of gpiochip_request_own_desc()
  gpio: pca953x: Add regmap dependency for PCA953x driver
  gpio: raspberrypi-exp: decrease refcount on firmware dt node
  gpiolib: Fix return value of gpio_to_desc() stub if !GPIOLIB
  gpio: pca953x: Restore registers after suspend/resume cycle
  gpio: pca953x: Zap single use of pca953x_read_single()
  gpio: pca953x: Zap ad-hoc reg_output cache
  gpio: pca953x: Zap ad-hoc reg_direction cache
  gpio: pca953x: Perform basic regmap conversion
  ...
2018-12-28 20:00:21 -08:00
Aisheng Dong 08972760d3 clk: imx8qxp: make the name of clock ID generic
SCU clock can be used in a similar way by IMX8QXP and IMX8QM SoCs.
Let's make the name of clock ID generic to allow other SoCs to reuse
the common part.

This patch only changes the clock id name and file name, so no
functional change.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-28 10:43:57 -08:00
Aisheng Dong 88cc9fc41c dt-bindings: arm: fsl-scu: add imx8qm pinctrl support
Update binding doc to support imx8qm pinctrl.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-27 10:42:11 +01:00
Linus Torvalds 1fbb2dc6f0 This round is dominated by NXP's i.MX clk drivers. We gained support for two or
three i.MX SoCs in here and that mostly means a lot of driver code and data.
 Beyond that platform, there are some new Mediatek, Amlogic, and Qualcomm clk
 drivers added in here, and then we get to the long tail of driver updates and
 non-critical fixes all around, including code for vendors such as Renesas,
 Rockchip, Nvidia, and Allwinner. Overall, the driver updates look normal.
 
 Beyond the usual driver updates we have an update to make registering OF based
 clk providers a little simpler when they're devices created as a child of a
 device backed by a node in DT. Drivers don't have to jump through hoops to
 unregister the provider upon driver removal anymore because the API does the
 right thing and uses the parent device DT node.
 
 Core:
  - Make devm_of_clk_add_hw_provider() use parent dt node if necessary
  - Various SPDX taggings
  - Mark clk_ops const when possible
 
 New Drivers:
  - NXP i.MX7ULP SoC clock support
  - NXP i.MX8QXP SoC clock support
  - NXP i.MX8MQ SoC clock support
  - NXP QorIQ T1023 SoC support
  - Qualcomm SDM845 audio subsystem clks
  - Qualcomm SDM845 GPU clck controllers
  - Qualcomm QCS404 RPM clk support
  - Mediatek MT7629 SoC clk controllers
  - Allwinner F1c100s SoC clocks
  - Allwinner H6 display engine clocks
  - Amlogic GX video clocks
  - Support for Amlogic meson8b CPU frequency scaling
  - Amlogic Meson8b CPU post-divider clocks
 
 Updates:
  - Proper suspend/resume on VersaClock5
  - Shrink code some with DEFINE_SHOW_ATTRIBUTE()
  - Register fixes for Rockchip rk3188 and rk3328
  - One new critical clock for Rockchip rk3188 and a fixed clock id (double used number)
  - New clock id for Rockchip rk3328
  - Amlogic Meson8/Meson8b video clock support
  - Amlogic got a clk-input helper and used it for the axg-audio clock driver
  - Sigma Delta modulation for the Allwinner A33 audio clocks
  - Support for CPEX (timer) clocks on various Renesas R-Car Gen3 and RZ/G2 SoCs
  - Support for SDHI HS400 clocks on early revisions of Renesas R-Car H3 and M3-W
  - Support for SDHI and USB clocks on Renesas RZ/A2
  - Support for RPC (SPI Multi I/O Bus Controller) clocks on Renesas R-Car V3M
  - Qualcomm MSM8998 GCC driver improvements (resets, drop unused clks, etc.)
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCgAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlwZeqgRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSU7qA/8C7p4EL36zkFFHhF6wh9+CiLIcTt1OKEu
 ePgTo0UP9Q94BzHy0SOZhwV6w6yqeOfTXCAYZWdV2UcNKyPDPlIMZPkxrNbH5twq
 kptjuBS1FqnnMgfusUP88bUrhQ5hUGEaKaC4iCDK7s0YI4nBfVB28G5ZMbFTSE5L
 hrIufRfZ0aQWQw6y8aGI4qDtUeg09s6cEwFw8cA+vArAJ+2hwv0zjFGMxQskNJ6N
 JubPopVCWuP+jsqMrGP48Rg4BphSQ97h4B65Uj0BNPQ4HTIMLVvXX6Pr8sRGvKiO
 IMsNQq+fS+ECmdcV7IUzSv14cX2mLCb9XWgfCnWEK67/Ny3deaurtzF0qloWnrtv
 kFSDE4df5cJkMkK2HZF8/e0/qn0FbGP6/wDSwfdhuVuJPmfdF5m552TtQuehNHey
 YNy/pIY4sCh0zCkeU212TFKvAaRLd8qVqh2nikn3Cs7ik0G5Bhv2GAqQmIGJEh6g
 f3n/WLTzVUqFksPC5KRZHu/1UIe4sz8i14AZXmxvCyH8buLSznhoniB0wwRrQdLL
 VcJ2ia4b4e4JBJg1A5b9IqfEliJBNUV0UZTakduXBnThBpXQeH0t6YesXNaPqKaM
 qJKvaQbNk0FNFsIO4GHxwrmujrf8SrHdhWuf/rh5O6mfOiXnNTzFcLZ59+nx86Bh
 3sUFruRiDx8=
 =iNvu
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This round is dominated by NXP's i.MX clk drivers. We gained support
  for two or three i.MX SoCs in here and that mostly means a lot of
  driver code and data.

  Beyond that platform, there are some new Mediatek, Amlogic, and
  Qualcomm clk drivers added in here, and then we get to the long tail
  of driver updates and non-critical fixes all around, including code
  for vendors such as Renesas, Rockchip, Nvidia, and Allwinner. Overall,
  the driver updates look normal.

  Apart from the usual driver updates we have an update to make
  registering OF based clk providers a little simpler when they're
  devices created as a child of a device backed by a node in DT. Drivers
  don't have to jump through hoops to unregister the provider upon
  driver removal anymore because the API does the right thing and uses
  the parent device DT node.

  Summary:

  Core:
   - Make devm_of_clk_add_hw_provider() use parent dt node if necessary
   - Various SPDX taggings
   - Mark clk_ops const when possible

  New Drivers:
   - NXP i.MX7ULP SoC clock support
   - NXP i.MX8QXP SoC clock support
   - NXP i.MX8MQ SoC clock support
   - NXP QorIQ T1023 SoC support
   - Qualcomm SDM845 audio subsystem clks
   - Qualcomm SDM845 GPU clck controllers
   - Qualcomm QCS404 RPM clk support
   - Mediatek MT7629 SoC clk controllers
   - Allwinner F1c100s SoC clocks
   - Allwinner H6 display engine clocks
   - Amlogic GX video clocks
   - Support for Amlogic meson8b CPU frequency scaling
   - Amlogic Meson8b CPU post-divider clocks

  Updates:
   - Proper suspend/resume on VersaClock5
   - Shrink code some with DEFINE_SHOW_ATTRIBUTE()
   - Register fixes for Rockchip rk3188 and rk3328
   - One new critical clock for Rockchip rk3188 and a fixed clock id
     (double used number)
   - New clock id for Rockchip rk3328
   - Amlogic Meson8/Meson8b video clock support
   - Amlogic got a clk-input helper and used it for the axg-audio clock
     driver
   - Sigma Delta modulation for the Allwinner A33 audio clocks
   - Support for CPEX (timer) clocks on various Renesas R-Car Gen3 and
     RZ/G2 SoCs
   - Support for SDHI HS400 clocks on early revisions of Renesas R-Car
     H3 and M3-W
   - Support for SDHI and USB clocks on Renesas RZ/A2
   - Support for RPC (SPI Multi I/O Bus Controller) clocks on Renesas
     R-Car V3M
   - Qualcomm MSM8998 GCC driver improvements (resets, drop unused clks,
     etc)"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (172 commits)
  clk: imx: imx7ulp: add arm hsrun mode clocks support
  dt-bindings: clock: imx7ulp: add HSRUN mode related clocks
  clk: Use of_node_name_eq for node name comparisons
  clk: vc5: Add suspend/resume support
  clk: qcom: Drop unused 8998 clock
  clk: qcom: Leave mmss noc on for 8998
  clk: tegra: Return the exact clock rate from clk_round_rate
  clk: tegra30: Use Tegra CPU powergate helper function
  soc/tegra: pmc: Drop SMP dependency from CPU APIs
  clk: tegra: Fix maximum audio sync clock for Tegra124/210
  clk: tegra: get rid of duplicate defines
  clk: imx: add imx8qxp lpcg driver
  clk: imx: add lpcg clock support
  clk: imx: add imx8qxp clk driver
  clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant
  clk: imx: add scu clock common part
  clk: imx: add configuration option for mmio clks
  dt-bindings: clock: add imx8qxp lpcg clock binding
  dt-bindings: clock: imx8qxp: add SCU clock IDs
  clk: qcom: Add missing msm8998 resets
  ...
2018-12-25 14:57:37 -08:00
Linus Torvalds 79f20778fb regulator: Updates for v4.20
This has been a very busy release for the core, some fixes, one large new
 feature and a big bit of refactoring to update the GPIO API:
 
  - Support for coupled regulators from Dmitry Osipenko based on a prior
    attempt by Maciej Purski, allowing us to handle situations where the
    voltages on two regulators can't be too far apart from each other.
  - Conversion of the GPIO support in both drivers and the core to use
    GPIO descriptors rather than numbers, part of the overall project to
    remove GPIO numbers.
  - Support for standby mode suspend states from Andrei Stefanescu.
  - New drivers for Allwinner AXP209, Cirrus Logic Lochnagar and
    Microchip MPC16502.
 -----BEGIN PGP SIGNATURE-----
 
 iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAlwhKkcTHGJyb29uaWVA
 a2VybmVsLm9yZwAKCRAk1otyXVSH0DFfB/91/ECmybKTP+RvwUTZ0rrqFFs2C9Vl
 76vH242exyJuzv44inWi9gOcXFDn7c9hf7Vl4Jd5UVP53Nzm5I8ZwExQsxax9BsN
 hltlX01UpRAmHNkMNrnJH6YAntD3EicYGSUDjohkWItIDqpMAjhWpx/yGXTEjBir
 gvkV51bF3qAYQe0g6MmK3KeVw96QPNjUhoPbsqbpaXaF6fmyOVzMiFrffJGmUAyM
 J5qRv3OhsZiZy2/zxNLkUI6y4XKDEaFJ3RhSKoUwItGyKQt2saXMoJGyEEWm2b6X
 coTm0ZQk+EU+b659lDHErTM4YUx7p7tQt3VM09NoMD8B261TdZ0y99Oh
 =8Rxt
 -----END PGP SIGNATURE-----

Merge tag 'regulator-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator

Pull regulator updates from Mark Brown:
 "This has been a very busy release for the core, some fixes, one large
  new feature and a big bit of refactoring to update the GPIO API:

   - Support for coupled regulators from Dmitry Osipenko based on a
     prior attempt by Maciej Purski, allowing us to handle situations
     where the voltages on two regulators can't be too far apart from
     each other.

   - Conversion of the GPIO support in both drivers and the core to use
     GPIO descriptors rather than numbers, part of the overall project
     to remove GPIO numbers.

   - Support for standby mode suspend states from Andrei Stefanescu.

   - New drivers for Allwinner AXP209, Cirrus Logic Lochnagar and
     Microchip MPC16502"

* tag 'regulator-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (90 commits)
  regulator: tps65910: fix a missing check of return value
  regulator: mcp16502: Select REGMAP_I2C to fix build error
  regulator: convert to DEFINE_SHOW_ATTRIBUTE
  regulator: mcp16502: Fix missing n_voltages setting
  regulator: mcp16502: Use #ifdef CONFIG_PM_SLEEP around mcp16502_suspend/resume_noirq
  regulator: mcp16502: code cleanup
  regulator: act8945a-regulator: make symbol act8945a_pm static
  drivers/regulator: fix a missing check of return value
  regulator: act8945a-regulator: fix 'defined but not used' compiler warning
  regulator: axp20x: fix set_ramp_delay for AXP209/dcdc2
  regulator: mcp16502: add support for suspend
  mfd: axp20x: use explicit bit defines
  mfd: axp20x: Clean up included headers
  regulator: dts: enable soft-start and ramp delay for the OLinuXino Lime2
  dt-bindings: mfd: axp20x: Add software based soft_start for AXP209 LDO3
  regulator: axp20x: add software based soft_start for AXP209 LDO3
  dt-bindings: mfd: axp20x: add support for regulator-ramp-delay for AXP209
  regulator: axp20x: add support for set_ramp_delay for AXP209
  mfd: axp20x: name voltage ramping define properly
  regulator: mcp16502: add regulator driver for MCP16502
  ...
2018-12-25 14:38:31 -08:00
Linus Torvalds 8e61e7b5c4 sound updates for 4.21
There are no intensive changes in both ALSA and ASoC core parts while
 rather most of changes are a bunch of driver fixes and updates.
 A large diff pattern appears in ASoC TI part which now merges both
 OMAP and DaVinci stuff, but the rest spreads allover the places.
 
 Note that this pull request includes also some updates for LED trigger
 and platform drivers for mute LEDs, appearing in the diffstat as well.
 
 Some highlights:
 
 ASoC:
 - Preparatory work for merging the audio-graph and audio-graph-scu
   cards
 - A merge of TI OMAP and DaVinci directories, as both product lines
   get merged together.  Also including a few architecture changes as
   well.
 - Major cleanups of the Maxim MAX9867 driver
 - Small fixes for tablets & co with Intel BYT/CHT chips
 - Lots of rsnd updates as usual
 - Support for Asahi Kaesi AKM4118, AMD ACP3x, Intel platforms with
   RT5660, Meson AXG S/PDIF inputs, several Qualcomm IPs and Xilinx I2S
   controllers
 
 HD-audio:
 - Introduce audio-mute LED trigger for replacing the former hackish
   dynamic binding
 - Huawei WMI hotkey and mute LED support
 - Refactoring of PM code and display power controls
 - Headset button support in the generic jack code
 - A few updates for Tegra
 - Fixups for HP EliteBook and ASUS UX391UA
 - Lots of updates for Intel ASoC HD-audio, including the improved DSP
   detection and the fallback binding from ASoC SST to legacy HD-audio
   controller drivers
 
 Others:
 - Updates for FireWire TASCAM and Fireface devices, some other fixes
 - A few potential Spectre v1 fixes that are all trivial
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAlwbbCIOHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE+RoQ//TNKliUP3bOv4BdnSmUHcCSAP3st96Ror5lC+
 RZ103UyjlCsfa7hSPfH7/4WHAjk7wXYdazjA3m2swsxsbcjPMW4uBIBJlegQNM/9
 PmNt4y60UgdgMCT/uu10BlEO8GsqBkRpxFYHtUJ3Lq6h9ECa+VDLazNjK9jABItK
 BVG668/LZp0le94cnJsLICmZ7fwKpAvi58hOsgOJLrPP4gzSGTj1gJXw/yyZ99QC
 MPLVj1PruXq1l8zfxM+MUuOa7hayafx64bCbftlITPonWfEr7OvBCQ7Vf9HqzJIJ
 OzEXAclVSc89R7RQT2omPiRKC7AyL85M9PCkpTtXh2D7DGXw9CFj5IDL6eIC4Ip4
 sycArLOo6LA8ZYu45zCiY3rfh9Hx0Zn2qHz3qJeQtBrv5XYULuf6ZNwq6xJDEUz/
 jxS558wSGHYWAyjv/IaPha1+JD6Us7zkSQgum+/qqnYYnYlDyxXnBatj4HzWZP/M
 Khuhj+k+Y8UXK1MbRiekVCGIwCHGf3cUv4H7tq+qpEzvJZwTFnOBh7/twVL8gN96
 x4ozZogaiaenZwlEZlkzowAMBBYMYb537Y+Y5suxzWGz3HN/Z8raaL8GTkIIB/BO
 bNprJtPR8GJLfdu8NE++dUR2VuHfMnWat+frXk0eAsWutoviRyB4JLCRppfpgrA/
 vDhIreU=
 =SG61
 -----END PGP SIGNATURE-----

Merge tag 'sound-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "There are no intensive changes in both ALSA and ASoC core parts while
  rather most of changes are a bunch of driver fixes and updates. A
  large diff pattern appears in ASoC TI part which now merges both OMAP
  and DaVinci stuff, but the rest spreads allover the places.

  Note that this pull request includes also some updates for LED trigger
  and platform drivers for mute LEDs, appearing in the diffstat as well.

  Some highlights:

  ASoC:
   - Preparatory work for merging the audio-graph and audio-graph-scu
     cards
   - A merge of TI OMAP and DaVinci directories, as both product lines
     get merged together. Also including a few architecture changes as
     well.
   - Major cleanups of the Maxim MAX9867 driver
   - Small fixes for tablets & co with Intel BYT/CHT chips
   - Lots of rsnd updates as usual
   - Support for Asahi Kaesi AKM4118, AMD ACP3x, Intel platforms with
     RT5660, Meson AXG S/PDIF inputs, several Qualcomm IPs and Xilinx
     I2S controllers

  HD-audio:
   - Introduce audio-mute LED trigger for replacing the former hackish
     dynamic binding
   - Huawei WMI hotkey and mute LED support
   - Refactoring of PM code and display power controls
   - Headset button support in the generic jack code
   - A few updates for Tegra
   - Fixups for HP EliteBook and ASUS UX391UA
   - Lots of updates for Intel ASoC HD-audio, including the improved DSP
     detection and the fallback binding from ASoC SST to legacy HD-audio
     controller drivers

  Others:
   - Updates for FireWire TASCAM and Fireface devices, some other fixes
   - A few potential Spectre v1 fixes that are all trivial"

* tag 'sound-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (280 commits)
  ALSA: HD-Audio: SKL+: force HDaudio legacy or SKL+ driver selection
  ALSA: HD-Audio: SKL+: abort probe if DSP is present and Skylake driver selected
  ALSA: HDA: export process_unsol_events()
  ALSA: hda/realtek: Enable audio jacks of ASUS UX391UA with ALC294
  ALSA: bebob: fix model-id of unit for Apogee Ensemble
  ALSA: emu10k1: Fix potential Spectre v1 vulnerabilities
  ALSA: rme9652: Fix potential Spectre v1 vulnerability
  ASoC: ti: Kconfig: Remove the deprecated options
  ARM: davinci_all_defconfig: Update the audio options
  ARM: omap1_defconfig: Do not select ASoC by default
  ARM: omap2plus_defconfig: Update the audio options
  ARM: davinci: dm365-evm: Update for the new ASoC Kcofnig options
  ARM: OMAP2: Update for new MCBSP Kconfig option
  ARM: OMAP1: Makefile: Update for new MCBSP Kconfig option
  MAINTAINERS: Add entry for sound/soc/ti and update the OMAP audio support
  ASoC: ti: Merge davinci and omap directories
  ALSA: hda: add mute LED support for HP EliteBook 840 G4
  ALSA: fireface: code refactoring to handle model-specific registers
  ALSA: fireface: add support for packet streaming on Fireface 800
  ALSA: fireface: allocate isochronous resources in mode-specific implementation
  ...
2018-12-25 13:19:10 -08:00
Mikko Perttunen fed8b7e366 dt-bindings: tegra186-hsp: Add shared mailboxes
Shared mailboxes are a mechanism to transport data from one processor in
the system to another. They are bidirectional links with both a producer
and a consumer. Interrupts are used to let the consumer know when data
was written to the mailbox by the producer, and to let the producer know
when the consumer has read the data from the mailbox. These interrupts
are mapped to one or more "shared interrupts". Typically each processor
in the system owns one of these shared interrupts.

Add documentation to the device tree bindings about how clients can use
mailbox specifiers to request a specific shared mailbox and select which
direction they drive. Also document how to specify the shared interrupts
in addition to the existing doorbell interrupt.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 22:31:26 -06:00
Arnd Bergmann 10f9d7fd56 AM65x DT changes for 4.21. Includes:
- Pinctrl support
 - I2C support
 - ECAP PWM support
 - Power domain handling for UARTs
 - McSPI support
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCAAuFiEEtQ6szHmfiBT7fujkyvq9MXlQGhEFAlwTdrAQHHQta3Jpc3Rv
 QHRpLmNvbQAKCRDK+r0xeVAaEc2MEACH5s+PG7jESFPKiHDWcQcUwHibBkby8bDU
 WaDwEUpwiNfwG4QnBkeDMiiMGr4afUzWtgXIKkA/AttrMVvt7vU+NTuD5K3XT5mo
 gc4kTZ5DWxo5IJuwUqXKSH9eu/TSoGH8xJam/acGAPdzlyFZfbrpjyOPEKa8rUBO
 r/KAHBoGPCxoS+ycYQr+HUYG7iicngQOiXhPM412zxAJLtFh+Gfup77EY0EgRgWT
 PZaqo6j6G/FY0ryQZSDI3h0Zm3oSeHGB9+CRv5WsVBcMGFEef1zSReLBufzMs6on
 66h0JeRuxEIhnRAuxZk4CzgCdYHtrSP2cZlxLQ4PG1NJ2bFMX5yvdke6sIzeM5EZ
 3fMZDK2+dT0Z+uGBjO0JY05J768sys/ud0KkNx0HjzcZxLQo1d+P6azF6cg78spg
 xtIzSqii1++KgCIDGnZ4FAmtD1aP2IH2TUbU5OO5pbVFxz3lDf6B2OJBOOjfmWYa
 7QcCHV8GFi3TQpT1nLMGUKpi6PFjym7J5e5TWLck5hZVEqq65doBq6dx36Di8cNJ
 RpGe0OZo/y+8EOqntVafLU67pIuLbIUDWVsRFKFMhx04Dpw9UozCXep8YiQbNOn1
 t0c/fED2HfPovWV0Tb/IHgjkU/NCxJJlNm7MMTVVcVumecc/SLSgjMEJzRh7b5bt
 1A6++3yLIQ==
 =wUbp
 -----END PGP SIGNATURE-----

Merge tag 'am654-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into next/dt

AM65x DT changes for 4.21. Includes:

- Pinctrl support
- I2C support
- ECAP PWM support
- Power domain handling for UARTs
- McSPI support

* tag 'am654-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: ti: k3-am654: Enable main domain McSPI0
  arm64: dts: ti: k3-am654: Add McSPI DT nodes
  arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes
  arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM
  arm64: dts: ti: k3-am65-main: Add ECAP PWM node
  arm64: dts: ti: k3-am654-base-board: Add I2C nodes
  arm64: dts: ti: am654-base-board: Add pinmux for main uart0
  arm64: dts: ti: k3-am65: Add pinctrl regions
  dt-bindings: pinctrl: k3: Introduce pinmux definitions
  arm64: dts: ti: k3-am654: Fix wakeup_uart reg address

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-12-20 16:37:44 +01:00
Stephen Boyd b677574bdf Merge branch 'clk-imx7ulp' into clk-next
* clk-imx7ulp:
  clk: imx: imx7ulp: add arm hsrun mode clocks support
  dt-bindings: clock: imx7ulp: add HSRUN mode related clocks
2018-12-14 14:03:38 -08:00
Anson Huang 401371fb59 dt-bindings: clock: imx7ulp: add HSRUN mode related clocks
There are HSRUN mode clock mux and divider in SCG1 module,
and SMC1 can control i.MX7ULP CPU to run in RUN mode or
HSRUN mode, the mode switch bits are actually a clock mux,
add these clocks for clock driver and dtb to use.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-14 14:03:11 -08:00
Stephen Boyd 44a6951777 Merge branch 'clk-qcom-8998-resets' into clk-next
- Add resets and make Qualcomm MSM8998 GCC driver more functional

* clk-qcom-8998-resets:
  clk: qcom: Drop unused 8998 clock
  clk: qcom: Leave mmss noc on for 8998
  clk: qcom: Add missing msm8998 resets
  clk: qcom: gcc-msm8998: Add clkref clocks
  clk: qcom: gcc-msm8998: Disable halt check of UFS clocks
  clk: qcom: gcc-msm8998: Drop hmss_dvm and lpass_at
  clk: qcom: Enumerate remaining msm8998 resets
  clk: qcom: Add xo dummy clk on msm8998
  clk: qcom: Fix MSM8998 resets
2018-12-14 13:42:00 -08:00
Stephen Boyd 58c05c823b Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp' and 'clk-imx8mq' into clk-next
- NXP i.MX7ULP SoC clock support
 - Support for i.MX8QXP SoC clocks
 - Support for NXP i.MX8MQ clock controllers

* clk-imx7ulp:
  clk: imx: add imx7ulp clk driver
  clk: imx: implement new clk_hw based APIs
  clk: imx: make mux parent strings const
  dt-bindings: clock: add imx7ulp clock binding doc
  clk: imx: add imx7ulp composite clk support
  clk: imx: add pfdv2 support
  clk: imx: add pllv4 support
  clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support
  clk: imx: add gatable clock divider support

* clk-imx6-fixes:
  clk: imx6q: handle ENET PLL bypass
  clk: imx6q: optionally get CCM inputs via standard clock handles
  clk: imx6q: reset exclusive gates on init

* clk-imx-fixes:
  clk: imx6q: add DCICx clocks gate
  clk: imx6sl: ensure MMDC CH0 handshake is bypassed
  clk: imx7d: remove UART1 clock setting

* clk-imx8qxp:
  clk: imx: add imx8qxp lpcg driver
  clk: imx: add lpcg clock support
  clk: imx: add imx8qxp clk driver
  clk: imx: add scu clock common part
  clk: imx: add configuration option for mmio clks
  dt-bindings: clock: add imx8qxp lpcg clock binding
  dt-bindings: clock: imx8qxp: add SCU clock IDs
  firmware: imx: add pm svc headfile
  dt-bindings: fsl: scu: update power domain binding
  firmware: imx: remove resource id enums
  dt-bindings: imx: add scu resource id headfile

* clk-imx8mq:
  clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant
  clk: imx: remove redundant initialization of ret to zero
  clk: imx: Add SCCG PLL type
  clk: imx: Add fractional PLL output clock
  clk: imx: Add clock driver for i.MX8MQ CCM
  clk: imx: Add imx composite clock
  dt-bindings: Add binding for i.MX8MQ CCM
2018-12-14 13:34:47 -08:00
Stephen Boyd ffe05540d1 Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and 'clk-rockchip' into clk-next
* clk-renesas:
  clk: renesas: rcar-gen3: Add HS400 quirk for SD clock
  clk: renesas: rcar-gen3: Add documentation for SD clocks
  clk: renesas: rcar-gen3: Set state when registering SD clocks
  clk: renesas: r8a77995: Simplify PLL3 multiplier/divider
  clk: renesas: r8a77995: Add missing CPEX clock
  clk: renesas: r8a77995: Remove non-existent SSP clocks
  clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks
  clk: renesas: r8a77995: Correct parent clock of DU
  clk: renesas: r8a77990: Correct parent clock of DU
  clk: renesas: r8a77970: Add CPEX clock
  clk: renesas: r8a77965: Add CPEX clock
  clk: renesas: r8a7796: Add CPEX clock
  clk: renesas: r8a7795: Add CPEX clock
  clk: renesas: r8a774a1: Add CPEX clock
  dt-bindings: clock: r8a7796: Remove CSIREF clock
  dt-bindings: clock: r8a7795: Remove CSIREF clock
  clk: renesas: Mark rza2_cpg_clk_register static
  clk: renesas: r7s9210: Add USB clocks
  clk: renesas: r8a77970: Add RPC clocks
  clk: renesas: r7s9210: Add SDHI clocks

* clk-allwinner:
  clk: sunxi-ng: a64: Allow parent change for VE clock
  clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks
  clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: h3: Allow parent change for ve clock
  clk: sunxi-ng: add support for suniv F1C100s SoC
  dt-bindings: clock: Add Allwinner suniv F1C100s CCU
  clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent
  clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output
  clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: a64: Fix gate bit of DSI DPHY
  clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I
  clk: sunxi-ng: Add support for H6 DE3 clocks
  dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description
  clk: sunxi-ng: h6: Set video PLLs limits
  clk: sunxi-ng: Use u64 for calculation of NM rate
  clk: sunxi-ng: Adjust MP clock parent rate when allowed
  clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width
  clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock

* clk-tegra:
  clk: tegra: Return the exact clock rate from clk_round_rate
  clk: tegra30: Use Tegra CPU powergate helper function
  soc/tegra: pmc: Drop SMP dependency from CPU APIs
  clk: tegra: Fix maximum audio sync clock for Tegra124/210
  clk: tegra: get rid of duplicate defines
  clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC
  clk: tegra20: Turn EMC clock gate into divider

* clk-meson: (25 commits)
  clk: meson: axg-audio: use the clk input helper function
  clk: meson: add clk-input helper function
  clk: meson: Mark some things static
  clk: meson: meson8b: add the read-only video clock trees
  clk: meson: meson8b: add the fractional divider for vid_pll_dco
  clk: meson: meson8b: fix the offset of vid_pll_dco's N value
  clk: meson: Fix GXL HDMI PLL fractional bits width
  clk: meson: meson8b: add the CPU clock post divider clocks
  clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3
  clk: meson: clk-regmap: add read-only gate ops
  clk: meson: meson8b: allow changing the CPU clock tree
  clk: meson: meson8b: run from the XTAL when changing the CPU frequency
  clk: meson: meson8b: add support for more M/N values in sys_pll
  clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL
  clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel
  clk: meson: clk-pll: check if the clock is already enabled
  clk: meson: meson8b: fix the width of the cpu_scale_div clock
  clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_table
  clk: meson: meson8b: use the HHI syscon if available
  dt-bindings: clock: meson8b: use the registers from the HHI syscon
  ...

* clk-rockchip:
  clk: rockchip: add clock-id to gate of ACODEC for rk3328
  clk: rockchip: add clock ID of ACODEC for rk3328
  clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328
  clk: rockchip: fix I2S1 clock gate register for rk3328
  clk: rockchip: make rk3188 hclk_vio_bus critical
  clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering
  clk: rockchip: fix rk3188 sclk_smc gate data
  clk: rockchip: fix typo in rk3188 spdif_frac parent
2018-12-14 13:34:00 -08:00
Stephen Boyd 1a501c8def Merge branches 'clk-managed-registration', 'clk-spdx', 'clk-remove-basic' and 'clk-ops-const' into clk-next
- Make devm_of_clk_add_hw_provider() use parent dt node if necessary
 - Various SPDX taggings
 - Mark clk_ops const when possible

* clk-managed-registration:
  clk: bd718x7: Initial support for ROHM bd71837/bd71847 PMIC clock
  clk: apcs-msm8916: simplify probe cleanup by using devm
  clk: clk-twl6040: Free of_provider at remove
  clk: rk808: use managed version of of_provider registration
  clk: clk-hi655x: Free of_provider at remove
  clk: of-provider: look at parent if registered device has no provider info
  clk: Add kerneldoc to managed of-provider interfaces

* clk-spdx:
  clk: Tag basic clk types with SPDX
  clk: Tag clk core files with SPDX
  clk: bcm2835: Switch to SPDX identifier

* clk-remove-basic:
  clk: Loongson1: Remove usage of CLK_IS_BASIC
  clk: samsung: s3c2410: Remove usage of CLK_IS_BASIC
  clk: versatile: sp810: Remove usage of CLK_IS_BASIC
  clk: hisilicon: Remove usage of CLK_IS_BASIC
  clk: h8300: Remove usage of CLK_IS_BASIC
  clk: axm5516: Remove usage of CLK_IS_BASIC
  clk: st: Remove usage of CLK_IS_BASIC
  clk: renesas: Remove usage of CLK_IS_BASIC

* clk-ops-const:
  clk: s2mps11: constify clk_ops structure
  clk: pxa: constify clk_ops structures
  clk: pistachio: constify clk_ops structures
  clk: palmas: constify clk_ops structure
  clk: max77686: constify clk_ops structure
2018-12-14 13:33:44 -08:00
Stephen Boyd 3315fe5faf Merge branch 'clk-qcom-sdm845-lpass' into clk-next
- Qualcomm SDM845 audio subsystem clks

* clk-qcom-sdm845-lpass:
  clk: qcom: Add lpass clock controller driver for SDM845
  dt-bindings: clock: Introduce QCOM LPASS clock bindings
  dt-bindings: clock: Update GCC bindings for protected-clocks
2018-12-14 13:27:53 -08:00
Stephen Boyd f4ad7fba06 Merge branches 'clk-qcom-kconfig', 'clk-qcom-gpucc', 'clk-qcom-qcs404-rpm', 'clk-qcom-spi' and 'clk-qcom-videocc-binding' into clk-next
- Qualcomm SDM845 GPU clock controllers
 - Qualcomm QCS404 RPM clk support

* clk-qcom-kconfig:
  clk: qcom: Move to menuconfig and reduce lines

* clk-qcom-gpucc:
  dt-bindings: clock: qcom: Fix the xo parent in gpucc example
  clk: qcom: gpu_cc_gmu_clk_src has 5 parents, not 6
  clk: qcom: Add a dummy enable function for GX gdsc
  clk: qcom: gdsc: Don't override existing gdsc pd functions
  clk: qcom: Add graphics clock controller driver for SDM845
  dt-bindings: clock: Introduce QCOM Graphics clock bindings

* clk-qcom-qcs404-rpm:
  clk: qcom: smd: Add support for QCS404 rpm clocks

* clk-qcom-spi:
  clk: qcom: msm8916: Additional clock rates for spi

* clk-qcom-videocc-binding:
  dt-bindings: clock: Require #reset-cells in sdm845-videocc
2018-12-14 13:27:11 -08:00
Rohit kumar 76119509d2
ASoC: qdsp6: dt-bindings: Add q6afe display_port dt binding
This patch adds bindings required for DISPLAY_PORT_RX
port on AFE.

Signed-off-by: Rohit kumar <rohitkr@codeaurora.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-14 12:48:48 +00:00
Vignesh R fc66393ab5 dt-bindings: pinctrl: k3: Introduce pinmux definitions
The dt-bindings header for TI K3 AM6 SoCs define a set of macros for
defining pinmux configs in human readable form, instead of raw-coded
hex values.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-12-14 09:56:43 +02:00
Aisheng Dong 0f5ab411f5 dt-bindings: clock: add imx8qxp lpcg clock binding
The Low-Power Clock Gate (LPCG) modules contain a local programming
model to control the clock gates for the peripherals. An LPCG module
is used to locally gate the clocks for the associated peripheral.

Note:
This level of clock gating is provided after the clocks are generated
by the SCU resources and clock controls. Thus even if the clock is
enabled by these control bits, it might still not be running based
on the base resource.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-13 22:12:46 -08:00
Aisheng Dong 8cecda9164 dt-bindings: clock: imx8qxp: add SCU clock IDs
Add IMX8QXP SCU clock IDs.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-13 22:12:46 -08:00
Olof Johansson e3154317a0 i.MX drivers change for 4.21:
- A series from Aisheng that improves SCU power domain bindings by
    defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain
    driver support on top of it.
  - A series from Lucas that updates gpcv2 driver for scalability and
    adds i.MX8MQ support into the driver.
  - Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power
    domain on imx6sx has 7 clocks.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJcDbkEAAoJEFBXWFqHsHzO1C4H/05Khi/tWF6xZNMw7C4Q6wf6
 WIFhB73tTLxZ8W0n8gIS+Y2YKFw6+dy8J/ZpkFBpe+f6rqVsyTzUvGB+6Ii3Nomu
 V2juCn8XaHfv32FfaPBCelnitcpgFrnEvXYS6u8mSEt1DSu8rK2y2yMcnrkdcurq
 Jy9eAYjUrdXYGsH9uw36mco7q25I5wSnXOLzZ0SLXSqB//a9YlzPKGRmQqF0uQ3t
 K8uT5PwqEBrjNAP6sTvSzMf6vSeXD5MGqrEvd/LnGp6IPwx7R+z4Y+HUw/RtTIdg
 rP1hAt3PLDD7Ibk+GHH5q/M2+9fI2dn2y44JXGOlQvqdmoLVg1vCpTLEj8OioFU=
 =/3Mg
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers

i.MX drivers change for 4.21:
 - A series from Aisheng that improves SCU power domain bindings by
   defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain
   driver support on top of it.
 - A series from Lucas that updates gpcv2 driver for scalability and
   adds i.MX8MQ support into the driver.
 - Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power
   domain on imx6sx has 7 clocks.

* tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: gpc: Increase GPC_CLK_MAX to 7
  soc: imx: gpcv2: add support for i.MX8MQ SoC
  soc: imx: gpcv2: move register access table to domain data
  soc: imx: gpcv2: prefix i.MX7 specific defines
  firmware: imx: add SCU power domain driver
  firmware: imx: add pm svc headfile
  dt-bindings: fsl: scu: update power domain binding
  firmware: imx: remove resource id enums
  dt-bindings: imx: add scu resource id headfile

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-12-12 13:33:06 -08:00
Olof Johansson 48ff08dd9a Renesas ARM Based SoC Drivers Updates for v4.21
SYSC Driver:
 * Common
   - Fix power domain control after system resume
   - Merge PM Domain registration and linking
   - Remove rcar_sysc_power_{down,up}() helpers
 * R-Car E3 (r8a77990) SoC
   - Fix initialization order of 3DG-{A,B}
 * R-Car V3H (r8a77980) SoC
   - Correct A3VIP[012] power domain hierarchy
   - Correct names of A2DP[01] power domains
 * R-Car V3M (r8a77970) SoC
   - Correct names of A2DP/A2CN power domains
   - emove non-existent CR7 power domain
 * R-Car M3-N (r8a77965) SoC
   - Remove non-existent A3IR power domain
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlwJlSMACgkQ189kaWo3
 T75d6A/5AY8yOPpAjVCS4H21JY4X5AyQaIzrQ776Ya9K8JrqL3f5GcNk1PsRiJFr
 wOKwAIIYBQlD3uv5yT2zTUymAU2jDwqLiAQk2mHSLzsTi2MC7FhJZr6eybsMvt5/
 BUtWKrl+L6fTmFBKgNznhJqdV54m16cOLFRsNPcgKccMtYhHG0cQqumERfaLzXiW
 JLu6gpzlx4TLHPMzdLqldHAmM65Y+33BUPU/+SIF0vjNCeQonz2HLgHJ9zh0gvr6
 StN+nArJ3/bVqCsgMdkTtc+hWGTShkC+ndyC/C6kDtRARZZplf7MfRYl2MLNvW3s
 o9kJa0kwC71Y11QHpWBxbWKYh+SrlGcubummrGH60i4PQoinS8PyneLbQ/pz9P4H
 CfaaO4Vj6NuGaVecKy7deaVFL77ojS50pTg0ebFkyiOP0Cu3uWYgLQfm15WKpnDl
 jc4JTAJYCsk5OMScwvBVxplob4XL+BQ79iOdS0spuqlJUVwcClqfwBXvp5RHFfAn
 WoVqyEbzUZ6yXoxwElSP28BGx4C89Fk4okhf4IZKkprIVGjrO3e+Z5kCKeLZ+45r
 QsG83DM8ilgSfafVUzgwwJS3he532sHGTimMtpMqIFkJiUOK7tebtsNNeNJ4OdlP
 xBMllTaYnXTx9EG7iNU7tmqskLACy1s3cbut1W/H7B3n8Cep3ZA=
 =zQF+
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Renesas ARM Based SoC Drivers Updates for v4.21

SYSC Driver:
* Common
  - Fix power domain control after system resume
  - Merge PM Domain registration and linking
  - Remove rcar_sysc_power_{down,up}() helpers
* R-Car E3 (r8a77990) SoC
  - Fix initialization order of 3DG-{A,B}
* R-Car V3H (r8a77980) SoC
  - Correct A3VIP[012] power domain hierarchy
  - Correct names of A2DP[01] power domains
* R-Car V3M (r8a77970) SoC
  - Correct names of A2DP/A2CN power domains
  - emove non-existent CR7 power domain
* R-Car M3-N (r8a77965) SoC
  - Remove non-existent A3IR power domain

* tag 'renesas-drivers-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: rcar-sysc: Fix power domain control after system resume
  soc: renesas: rcar-sysc: Merge PM Domain registration and linking
  soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers
  soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
  soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchy
  soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domains
  soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains
  soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain
  soc: renesas: r8a77965-sysc: Remove non-existent A3IR power domain

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-12-12 13:27:40 -08:00
Olof Johansson ac3e0be697 ARM: dts: Amlogic updates for v4.21, round 2
Highlights
 - add CPU OPP tables
 - timers: add global timer and TWD
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlwOzBgACgkQWTcYmtP7
 xmXT1g/+LyEr7VDCf+AQOGMdkpQ/kivF6YoDmlj2wEO5v2qb1FpZIGfHsddDG+hZ
 mHDjsNDFowNODrzc3wmOJ5AfidGnZxgr9Thsm6ZDoMErgVfMeiBPJ7IjjbIGU8Zr
 a8hyBpOqrtR5gxeDg13jkRh+lxC+DFe6CjsF34JN3lwrUmfuzQNDAHWeXyKRiK0L
 fWcBFjd1kXYajWzRYDqqLfwpIxZH1YcQx5aREaCd5izV6mOBpJ6J3Jv2kSbBN1ld
 LOL+iPUFlhU5EvT0gaxT/Tr6SAws0XR3Rt1/ZwMt5GCM3vmvP4A/OJHcj0Gmk3EI
 UDH0utrtsPS7Gx+J7yG7jfEcxt1bUZ7KM8TbFw+Axf4wfWYZ4S3aWQfXfVPfDNtB
 zJWbZ2Q449lFqYyeS+UQVrsyLpTxLFQkohlHhJ0mq5sQdA3ARSyoxqOb6z4fOP0K
 vpYTKpmalS+EfINXkbBruxuJfZirJHO2LB94dy71OCoS4qCGN3ZFvWebpL/Fjwnx
 jiWHEdmWdo61X4mLplLm1fS0x1sdGgS/1OsiKutPiZlXmgK1kMYhRn83ZW5vbb2P
 RwsX0zlZWRy1lJ1go19CcMCFE5OXJ4ZxRv5ADakHYFg4rpx4EoMPkBPgNUbWW4WW
 bxy/STU3D+F8uhj5sf1uV1sc832mnGELic1A9DPGbG0L7/pdbQo=
 =qoPa
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

ARM: dts: Amlogic updates for v4.21, round 2

Highlights
- add CPU OPP tables
- timers: add global timer and TWD

* tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson: meson8b: add the CPU OPP tables
  ARM: dts: meson: meson8: add the CPU OPP table
  ARM: dts: meson8b: add the Cortex-A5 global timer
  ARM: dts: meson8b: add the ARM TWD timer
  ARM: dts: meson8: add the Cortex-A9 global timer
  ARM: dts: meson8: add the ARM TWD timer
  ARM: dts: meson: group the Cortex-A5 / Cortex-A9 peripherals
  dt-bindings: clock: meson8b: export the CPU post dividers

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-12-12 13:02:51 -08:00
Olof Johansson fafda335f8 i.MX7ULP device tree for 4.21:
- It includes the initial device tree for i.MX7ULP SoC and EVK board
    support.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJcDd7aAAoJEFBXWFqHsHzOgNEIAKc4dqYzWmfJTMnJGO+Bb1Rc
 BPkENpRWk6rWVBuxXwN4MTupXIgj96bBHWsg3kplgcthMRAl2wgomHTpNWXk8R9m
 Fn6sH9yIoeqr+xs6BzzQ8COrFBXg8CEZgKLgy+9nhfFi3xNf6pN6IQLgqrGF17MC
 zFH+sM0rqlh1l3BfHXMuwHvbhw+ms6Qo6z68OGSXmu0bUPThm2FV/Akivqp+INSI
 CeFyZ8RMTkEKVSkFEryZaprKgqlIYW2Kl54yeALjvG03mtn1onaZKqsNV7YonYMC
 X+mZPLnwjBUnLi2HbKrStmTR0ePQjg5x1tMT+Eco7Cjj4h6H6uBu0IYMi4PiN7o=
 =aOId
 -----END PGP SIGNATURE-----

Merge tag 'imx7ulp-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

i.MX7ULP device tree for 4.21:
 - It includes the initial device tree for i.MX7ULP SoC and EVK board
   support.

* tag 'imx7ulp-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx: add imx7ulp evk support
  ARM: dts: imx: add common imx7ulp dtsi support
  dt-bindings: fsl: add imx7ulp pm related components bindings
  dt-bindings: fsl: add compatible for imx7ulp evk
  clk: imx: add imx7ulp clk driver
  clk: imx: implement new clk_hw based APIs
  clk: imx: make mux parent strings const
  dt-bindings: clock: add imx7ulp clock binding doc
  clk: imx: add imx7ulp composite clk support
  clk: imx: add pfdv2 support
  clk: imx: add pllv4 support
  clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support
  clk: imx: add gatable clock divider support

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-12-12 12:56:36 -08:00
Boris Brezillon 7482d6ecc6
regulator: act8945a-regulator: Implement PM functionalities
The regulator supports a dedicated suspend mode.
Implement the appropriate ->set_suspend_xx() hooks, add support for
->set_mode(), and provide basic PM ops functionalities to setup the
regulator in a suspend state when the system is entering suspend.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
[claudiu.beznea@microchip.com: remove shutdown function, use dev_pm_ops,
 fix checkpatch warning, adapt commit message, add LDO modes support,
 move modes constants to active-semi,8945a-regulator.h, remove rdevs from
 struct act8945a_pmic, add op_mode to act8945a_pmic]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-12 16:59:04 +00:00
Jeffrey Hugo a1697aba27 clk: qcom: Add missing msm8998 resets
commit c0cb7c7e71 ("clk: qcom: Enumerate remaining msm8998 resets")
missed two USB2 resets.  Add them.

Fixes: c0cb7c7e71 ("clk: qcom: Enumerate remaining msm8998 resets")
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-11 13:25:24 -08:00
Olof Johansson 44a26c894b dt-bindings: Changes for v4.21-rc1
This contains a few cleanups of and additions to existing device tree
 bindings, such as XUSB, EMC, PMC and thermal.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlwKfkQTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoapRD/0dpJfxARsf0gH8vzO2MSQrUFaXFxPF
 9C86G5RzoVGTbEXwLQoOH9k73Cup+eyjnlMcMXHHTkuINJhi5Bil+6lyztCa/P/n
 4z5mZeMfv7LZaHq+/nUHSD0qjzSkz5ZaKdEXTZNijb4hjQE7x5zphOrYd4OLNrOF
 1nfhHkLjmTW77cJCkG+70OQ4MP+hBQg8sHcbDrfTD5bweVb3ZcD7Bp81w4gKLrdk
 K4/DYxHBfzL2Y6JCgVtvHfgrWkw3cfOzznnfuHkC37OvYSVFdgkpkSNr6V+a+dQ1
 AcCJ5RIyZsSSVatQT9j/QexE/eLYQUvCN/hM1VG1hZv3QFnGpTgTuF1zEw3v4rjF
 dN7a8OC2jkmaueQIFFHPiUgpq16FL4Tixu8DKDrU+KHmM9JJZC4PgP+5N+NdVGmq
 VAEjHUIgbKSToyePdic24MCuJ8TCWB75IWVw9zPLmcmQiJMTzWVwLuiEnd3/dYuW
 pqgrj31e30BJQ6Sgs1nKKrg6MRS0RNjaelTXhJP07P7IMgtec7xEhDlZQY6SQssV
 Us8M2IYSRiUocynykJCeNCkve22X2Cmtc2q68jsWhKDf/HZM8fgjbatetNDJNfFz
 Zr48QSyIGcp0Uba+M0LpeIHDDasgtE/YUjkNOOHc7cap2yK45L0/5E/iosXA3H1m
 VAI1vmcNJFTmcw==
 =3PUd
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.21-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

dt-bindings: Changes for v4.21-rc1

This contains a few cleanups of and additions to existing device tree
bindings, such as XUSB, EMC, PMC and thermal.

* tag 'tegra-for-4.21-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: tegra186-pmc: Add interrupt controller properties
  dt-bindings: thermal: tegra-bpmp: Add Tegra194 support
  dt: bindings: Move tegra20-emc binding to memory-controllers directory
  dt: bindings: tegra20-emc: Document clock property
  dt: bindings: tegra20-emc: Document interrupt property
  dt-bindings: usb: xhci-tegra: Add power-domain details

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-12-11 08:05:17 -08:00
Anson Huang 929914946f clk: imx6q: add DCICx clocks gate
On i.MX6QP/i.MX6Q/i.MX6DL, there are DCIC1/DCIC2 clocks
gate in CCM_CCGR0 register, add them into clock tree for
clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-10 11:34:50 -08:00
Thierry Reding 25fbc9e8d3 dt-bindings: tegra186-gpio: Add Tegra186 specific prefix
Subsequent generations of Tegra, such as Tegra194, contain a completely
different set of GPIOs. In order to clarify that the Tegra186 defines
are indeed specific to Tegra186, change the prefix from TEGRA_ to
TEGRA186_.

Note that for now we need to keep the old definitions in place to avoid
breaking compilation in file that use this header. Once all users have
been converted to use the new defines, the old ones can be removed.

Also note that this is only a naming change and doesn't affect device
tree ABI.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-07 11:07:12 +01:00
Bjorn Andersson 30bc0b9881 clk: qcom: gcc-msm8998: Add clkref clocks
Add clkref clocks for usb3, hdmi, ufs, pcie, and usb2. They are all
sourced off CXO_IN, so parent them off "xo" until a proper link to the
rpmcc can be described in DT.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-05 15:57:49 -08:00
Jeffrey Hugo c0cb7c7e71 clk: qcom: Enumerate remaining msm8998 resets
The current list of defined resets is incomplete compared to what the
hardware implements.  Enumerate the remaining resets according to the
hardware documentation.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-05 15:57:01 -08:00
Lucas Stach 685efffe37 soc: imx: gpcv2: add support for i.MX8MQ SoC
The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the
GPCv2 on the i.MX7, but only controls more power domains with a
different mapping.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-05 08:50:36 +08:00
Geert Uytterhoeven 6155bfa32c clk: renesas: r8a77995: Add missing CPEX clock
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) added
the CPEX clock on R-Car D3.  This clock can be selected as a clock
source for CMT1 (Compare Match Timer Type 1).

Add the missing clock to the DT bindings header, and implement support
for it in the clock driver.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
2018-12-04 10:30:05 +01:00
Geert Uytterhoeven 846dbb405b clk: renesas: r8a77995: Remove non-existent SSP clocks
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and
Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as
this SoC does not have a Stream and Security Processor.

As these definitions were never used, they can just be removed.
The freed slots in the DT bindings header must not be reused, though.

Fixes: 714c53aa2e ("clk: renesas: Add r8a77995 CPG Core Clock Definitions")
Fixes: d71e851d82 ("clk: renesas: cpg-mssr: Add R8A77995 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
2018-12-04 10:30:02 +01:00
Geert Uytterhoeven 4584738e13 dt-bindings: clock: r8a7796: Remove CSIREF clock
The R-Car Gen3 HardWare Manual Errata for Rev. 0.52 (Nov 30, 2016)
removed the CSI reference clock on R-Car M3-W.

As this definition was never used, it can just be removed.
The freed slot in the DT bindings header must not be reused, though.

Fixes: 972610fb23 ("clk: renesas: Add r8a7796 CPG Core Clock Definitions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
2018-12-04 10:29:35 +01:00
Geert Uytterhoeven 4102a9edf9 dt-bindings: clock: r8a7795: Remove CSIREF clock
The R-Car Gen3 HardWare Manual Errata for Rev. 0.52 (Nov 30, 2016)
removed the CSI reference clock on R-Car H3.

As this definition was never used, it can just be removed.
The freed slot in the DT bindings header must not be reused, though.

Fixes: 9d0c3c6820 ("clk: shmobile: Add r8a7795 CPG Core Clock Definitions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
2018-12-04 10:29:30 +01:00
Mesih Kilinc 3d737ddbe7
dt-bindings: clock: Add Allwinner suniv F1C100s CCU
Add compatiple string for Allwinner suniv F1C100s CCU.
Add clock and reset definitions.

Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-04 08:41:13 +01:00
Olof Johansson e5734bebed This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes
for 4.21, please pull the following changes:
 
 - James fixes the firmware interface after a commit changed the use of
   VLA and broke large transfers
 
 - Stefan adds a timeout check for Raspberry Pi firmware transactions and
   updates a bunch of SoC/firmware files to use SPDX tags
 
 - Wolfram switches the GISB bus arbiter to use dev_get_drvdata()
 
 - Yangtao provides a fix for a reference leak due to a call to
   of_find_node_by_path()
 
 - Florian fixes the CPU re-entry point out of S3 suspend with kernels
   built in Thumb2 mode
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlwC0o4ACgkQh9CWnEQH
 BwSYfxAA0AmUWIJ65Tp+UyfmKXI4ufa7Rznf7x3pJs788Fulz1Q/158oifIBHZY9
 p6wc9MOFGk0uPc4HN4eVYXuUnQ1liJ6YfWPDj+rBvk9IVOZCKjRSbiELeSjEMeTy
 J/nC/N69rIkwkOaTNFne8SNdKba/DMgsYTLz+p0WOyktO50AAcrG4qL1avx/7QnM
 TjpUkQ1wKsLJZftJCUSSOcMCnSTuBpcAlRickacuFnoDi+S3QZ1Ub0rtDFP+fjb/
 AHfV7jIsVJUuiWcKFrLLWFrR3lGC0Z7AB/w/EE1a8SiDfDC/dgXzZTP6j40aWL4c
 aYOQZI4zmrqiajEIjTOk1lV/+yp8CD+qkQ3F5WHAUi/vRTI8UiCYGw6UgsfLyi5s
 TE4c35HWgQs4HOmcYuzYV+7TWQ0+cwodGqom0M8As28W+/G0kw7VkmyHJw0F28Bh
 2UlOETpUzKv+k+xwa17+FcT897uLGnE97N9g96BoO9EuTramBGTzKShRezC5M9Dj
 7/ie8v0IY6UWasSFncT39g8P//oz/Xo5KnlPNUPYBU0Vt9aAQUCJ+O75rgPXWcYn
 n1qmauBiCQBv4j8JkHLxpiZEYSSBulE7/DoWt+U7A5OJQmrchi9vW2QSWPWuax3c
 1DwOmo5S4M0mPveL+2v28kLfioL4qov1aEYtO/6xshGMzrCm4OQ=
 =yGiB
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-4.21/drivers' of https://github.com/Broadcom/stblinux into next/drivers

This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes
for 4.21, please pull the following changes:

- James fixes the firmware interface after a commit changed the use of
  VLA and broke large transfers

- Stefan adds a timeout check for Raspberry Pi firmware transactions and
  updates a bunch of SoC/firmware files to use SPDX tags

- Wolfram switches the GISB bus arbiter to use dev_get_drvdata()

- Yangtao provides a fix for a reference leak due to a call to
  of_find_node_by_path()

- Florian fixes the CPU re-entry point out of S3 suspend with kernels
  built in Thumb2 mode

* tag 'arm-soc/for-4.21/drivers' of https://github.com/Broadcom/stblinux:
  soc: bcm: brcmstb: Don't leak device tree node reference
  firmware: raspberrypi: Switch to SPDX identifier
  firmware: raspberrypi: Fix firmware calls with large buffers
  soc: bcm: Switch raspberrypi-power to SPDX identifier
  firmware: raspberrypi: Define timeout for transactions
  bus: brcmstb_gisb: simplify getting .driver_data
  soc: bcm: brcmstb: Fix re-entry point with a THUMB2_KERNEL

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-12-03 13:06:27 -08:00
A.s. Dong eb299e4d57 dt-bindings: clock: add imx7ulp clock binding doc
i.MX7ULP Clock functions are under joint control of the System
Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
modules, and Core Mode Controller (CMC)1 blocks

Note IMX7ULP has two clock domains: M4 and A7. This binding doc
is only for A7 clock domain.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Anson Huang <Anson.Huang@nxp.com>
Cc: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-03 11:31:36 -08:00
Dhaval Shah 83268fa6b4 media: xilinx: Use SPDX-License-Identifier
SPDX-License-Identifier is used for the Xilinx Video IP and
related drivers.

[Added drivers/media/platform/xilinx/Kconfig]
[Added drivers/media/platform/xilinx/Makefile]
[Added include/dt-bindings/media/xilinx-vip.h]

Signed-off-by: Dhaval Shah <dhaval23031987@gmail.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
2018-12-03 13:40:05 -05:00
Lucas Stach 1cf3817bf1 dt-bindings: Add binding for i.MX8MQ CCM
This adds the binding for the i.MX8MQ Clock Controller Module.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-03 10:12:50 -08:00
Taniya Das 8ff1a156cb dt-bindings: clock: Introduce QCOM LPASS clock bindings
Add device tree bindings for Low Power Audio subsystem clock controller for
Qualcomm Technology Inc's SDM845 SoCs.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-03 09:25:01 -08:00
Geert Uytterhoeven 160bfa7c72 soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchy
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A3VIP power domain on R-Car V3H to A3VIP0, and clarified the
power domain hierarchy for the A3VIP[012] power domains.

As the definition for the A3VIP0 domain is not yet used from DT, it can
just be renamed.

Fixes: 7755b40d07 ("dt-bindings: power: add R8A77980 SYSC power domain definitions")
Fixes: 41d6d8bd8a ("soc: renesas: rcar-sysc: add R8A77980 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:30 +01:00
Geert Uytterhoeven 97473bc85b soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domains
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2PD0 and A2DP0 power domains on R-Car V3H to A2DP0 resp.
A2DP1.

As these definitions are not yet used from DT, they can just be renamed.

Fixes: 7755b40d07 ("dt-bindings: power: add R8A77980 SYSC power domain definitions")
Fixes: 41d6d8bd8a ("soc: renesas: rcar-sysc: add R8A77980 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:30 +01:00
Geert Uytterhoeven b5eb730e03 soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2IR2 and A2IR3 power domains on R-Car V3M to A2DP resp.
A2CN.

As these definitions are not yet used from DT, they can just be renamed.

While at it, fix the indentation of the A3IR definition.

Fixes: 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC power domain definitions")
Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:30 +01:00
Geert Uytterhoeven da3e1c57ca soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the CR7 power domain on R-Car V3M, as this SoC does not have an
ARM Cortex-R7 Realtime Core.

As this definition was never used from DT, it can just be removed.

Fixes: 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC power domain definitions")
Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:29 +01:00
Ryder Lee 3b5e748615 clk: mediatek: add clock support for MT7629 SoC
Add all supported clocks exported from every susbystem found on MT7629 SoC.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-29 22:52:05 -08:00
Amit Nischal e431c92188 dt-bindings: clock: Introduce QCOM Graphics clock bindings
Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SDM845 SoCs.

Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Add input clocks property]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-27 16:24:44 -08:00
Thierry Reding 34e8b809bf dt-bindings: thermal: tegra-bpmp: Add Tegra194 support
The thermal controller implementation on Tegra194 is very similar to the
implementation on Tegra186. Add a compatible string for the new
generation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-27 18:41:23 +01:00
Heiko Stuebner e690d1b0dd Merge branch 'v4.21-shared/clkids' into v4.21-clk/next 2018-11-26 14:20:55 +01:00
Katsuhiro Suzuki 02bee9e545 clk: rockchip: add clock ID of ACODEC for rk3328
This patch adds clock ID of audio CODEC (ACODEC) for rk3328.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-11-26 14:20:37 +01:00
Linus Walleij 84d49fff23 pinctrl: sh-pfc: Updates for v4.21
- Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
   - Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
   - Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
   - Add QSPI pin groups on R-Car V3M and V3H,
   - Add VIN and CAN(FD) pin groups on R-Car M3-N,
   - Add I2C[035] pin groups on R-Car H3 and M3-W,
   - Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
   - Small cleanups,
   - Maintainership updates.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCW/fATQAKCRCKwlD9ZEnx
 cEcRAPoCtfqfL82fb4Yj6zTrwD8dpy2TVpRYT95YRNuPegcWZwEAxpv4bUNVAMQJ
 Wj6GYkhMTuGBaaUJzNGJclD7u7nJcgc=
 =YGuc
 -----END PGP SIGNATURE-----

Merge tag 'sh-pfc-for-v4.21-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.21

  - Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
  - Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
  - Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
  - Add QSPI pin groups on R-Car V3M and V3H,
  - Add VIN and CAN(FD) pin groups on R-Car M3-N,
  - Add I2C[035] pin groups on R-Car H3 and M3-W,
  - Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
  - Small cleanups,
  - Maintainership updates.
2018-11-25 23:53:01 +01:00
Christian Lamparter 538098281c dt-bindings: dmaengine: dw-dmac: add protection control property
This patch for the DesignWare AHB Central
Direct Memory Access Controller adds the dma
protection control property:
	"snps,dma-protection-control"

as well as the properties specific values defines into
a new include file: include/dt-bindings/dma/dw-dmac.h

Note: The protection control signals are one-to-one
mapped to the AHB HPROT[1:3] signals for this controller.
The HPROT0 (Data Access) is always hardwired to 1.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2018-11-24 20:07:22 +05:30
Neil Armstrong f95e6ca628 dt-bindings: clk: meson-gxbb: Add Video clock bindings
Add the video clock bindings covering all the video graphics pipeline
and the HDMI controller.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: http://lkml.kernel.org/r/1541516257-16157-4-git-send-email-narmstrong@baylibre.com
2018-11-23 15:11:56 +01:00
Martin Blumenstingl 8e1dd17c8b dt-bindings: clock: meson8b: export the CPU post dividers
There are four CPU clock post dividers:
- ABP
- PERIPH (used as input for the ARM global timer and ARM TWD timer)
- AXI
- L2 DRAM

Export these so we can use them in .dts files.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20181122214017.25643-2-martin.blumenstingl@googlemail.com
2018-11-23 15:11:55 +01:00
Chris Brandt 94693b7b83 dt-bindings: pinctrl: Add RZ/A2 pinctrl and GPIO
Add device tree binding documentation and header file for Renesas R7S9210
(RZ/A2) SoCs.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-11-23 09:29:24 +01:00
Katsuhiro Suzuki df7b1f2e0a clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328
This patch fixes mistakes in HCLK_I2S1_8CH for running I2S1
successfully.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-11-19 14:42:04 +01:00
Stefan Wahren a62c36775b pinctrl: bcm2835: Switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.

Cc: Simon Arlott <simon@arlott.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-16 23:13:03 +01:00
Lubomir Rintel e8a2c77914 dt-bindings: marvell,mmp2: Add clock id for the SP clock
This is the clock for the "security processor" core.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2018-11-15 11:14:35 -08:00
Manivannan Sadhasivam 95d2f00657 dt-bindings: pinctrl: Add devicetree bindings for MT6797 SoC Pinctrl
Add devicetree bindings for Mediatek MT6797 SoC Pin Controller.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-15 11:03:56 +01:00
Stefan Wahren e1098e5915 clk: bcm2835: Switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.

Cc: Simon Arlott <simon@arlott.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-14 14:42:45 -08:00
Stefan Wahren bb661b7088 soc: bcm: Switch raspberrypi-power to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.

Cc: Alexander Aring <aring@mojatatu.com>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-11-14 21:04:47 +01:00
A.s. Dong d4ea45e8a6 dt-bindings: imx: add scu resource id headfile
SCU firmware uses resource id to provide services. Every device on
a SCU based system has a resource id. Exported it in device tree to
allow service bindings to use it. e.g. power domain.

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-11-14 09:20:34 +08:00
Taniya Das eaeee28db2 clk: qcom: smd: Add support for QCS404 rpm clocks
Add rpm smd clocks, PMIC and bus clocks which are required on QCS404
for clients to vote on.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Anu Ramanathan <anur@codeaurora.org>
[bjorn: Dropped cxo, voter clocks and static initialization]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-06 09:47:37 -08:00
Jernej Skrabec b9f9e9b8e4
dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description
This commit adds necessary description and dt includes for H6 DE3 clock.
It is very similar to others, but memory region has some additional
registers not found in DE2.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-11-05 10:22:02 +01:00
Heiko Stuebner 2e99be2874 dt-bindings: add power-domain header for RK3066 SoCs
Add rk3066 power-domains as described by the TRM.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-11-05 09:39:29 +01:00
Heiko Stuebner a9beb0a21c dt-bindings: add power-domain header for RK3188 SoCs
Add rk3188 power-domains as described by the TRM.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-11-05 09:39:26 +01:00
A.s. Dong 623f788d0e pinctrl: imx: add imx8qxp driver
MX8QXP contains a system controller that is responsible for controlling
the pad setting of the IPs that are present. Communication between the
host processor running an OS and the system controller happens through
a SCU protocol. This patch adds the SCU based MX8QXP pinctrl driver.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-05 09:33:32 +01:00
Linus Torvalds 519f64bf15 This time it looks like a quieter release cycle in the clk tree. I guess that's
because of summer time holidays/vacations. The biggest change in the diffstat
 is in the Qualcomm clk driver, where they got support for CPUs and handful of
 SoCs. After that, the at91 driver got a major rewrite for newer DT bindings
 that should make things easier going forward and the TI code moved to a
 clockdomain based design. The long tail is mostly small driver updates for
 newer clks and some simpler SoC clock drivers such as the Hisilicon and imx
 support.
 
 In the core framework, we only have two small changes this time. One is a new
 clk API to get all clks for a device with the bulk clk APIs. This allows
 drivers that don't care about doing anything besides turning on all the clks to
 just clk_get() them all and turn them on. The other change is the beginning of
 a way to support save and restore of clk settings in the clk framework. TI is
 the only user right now, but we will want to expand upon this design in the
 future to support more save and restore of clk registers.  At least this gets
 us started and works well enough for one SoC, but there's more work in the
 future.
 
 Core:
  - clk_bulk_get_all() API and friends to get all the clks for a device
  - Basic clk state save/restore hooks
 
 New Drivers:
  - Renesas RZ/A2 (R7S9210) SoC, including early clocks
  - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs
  - Rensas RZ/G2M (r8a774a1) SoC
  - Qualcomm Krait CPU clk support
  - Qualcomm QCS404 GCC support
  - Qualcomm SDM660 GCC support
  - Qualcomm SDM845 camera clock controller
  - Ingenic jz4725b CGU
  - Hisilicon 3670 SoC support
  - TI SCI clks on K3 SoCs
  - iMX6 MMDC clks
  - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs
 
 Updates:
  - Rework at91 PMC clock driver for new DT bindings
  - Nvidia Tegra clk driver MBIST workaround fix
  - S2RAM support for Marvell mvebu periph clks
  - Use updated printk format for OF node names
  - Fix TI code to only search DT subnodes
  - Various static analysis finds
  - Tag various drivers with SPDX license tags
  - Support dynamic frequency switching (DFS) on qcom SDM845 GCC
  - Only use s2mps11 dt-binding defines instead of redefining them in the driver
  - Add some more missing clks to qcom MSM8996 GCC
  - Quad SPI clks on qcom SDM845
  - Add support for CMT timer clocks on R-Car V3H
  - Add support for SHDI and various timer clocks on R-Car V3M
  - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs
  - Amlogic clk-pll driver improvements and updates
  - Amlogic axg audio controller system clocks
  - Register Amlogic meson8b clock controller early
  - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N
  - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers
  - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC
  - Remove obsoleted Exynos4212 ISP clock definitions
  - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design
  - TI RTC+DDR sleep mode support for clock save/restore
  - Allwinner A64 display engine support and fixes
  - Allwinner A83t display engine support and fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlvY4ysRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSVaDBAA3Wv/rsCn4FJ2ZgIWYWQqr69lAWDcBVVe
 4nNbFqzEmRoml8e+XOfVFwnbsai4B5ALVxyMnRlkDyxQ5TFQtF957U12Pf8upPa5
 R447YBt4tw40NCj8u5KNAaBmYYHdmXXDvsBPXyQn+1iy/9R8Is8AcDmv+D2ucuJF
 PPBXOwb+2CstUQhuwlXyvsAw/tqq/rJDVyAZVJUoqXJwlNMjr76V0m0ZXHN6NcyC
 F2SfnzIO4srRteTeKXVFcMU/3uHC3zofEfammSJjGZkk4WHULuPpkD17RMEyBul1
 Ju1S1nzGiKvYME/mmbIcRPNcpry65EVo/wn6IjAcG2m4GaWSq3F6qIttnoc6dnra
 R2VylIEy7HnNcAf8fkQdkd/l+h/TDp3iVrXg0p/rRxRk4Jlc86n2PWO6jtsZv4S+
 NySeRhTb51KrTl72J76LP+dfDWdbeZfkAqr0Qx6QM04OznVYSTHlnQaeM1Nx2SZR
 5+k126NdxDp7xgoJNfq18wzufrlefjuRTg2Kck1YuFuhV4Fjmq7ZC81bSSaakYPh
 /t073TcSZ+VfEYP5hVsl/pjMdFzHcj8pbavhs0UNIYLQNXe494Bm9PyYJOzQKnwz
 Zpbf7V6eplh8J1I03VI8RHviNp340iv2hhz9vp4mNP1vIhgdNiz7R2gn5sLSoFt+
 vei0J0vEzCA=
 =V5aK
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This time it looks like a quieter release cycle in the clk tree. I
  guess that's because of summer time holidays/vacations. The biggest
  change in the diffstat is in the Qualcomm clk driver, where they got
  support for CPUs and handful of SoCs. After that, the at91 driver got
  a major rewrite for newer DT bindings that should make things easier
  going forward and the TI code moved to a clockdomain based design.

  The long tail is mostly small driver updates for newer clks and some
  simpler SoC clock drivers such as the Hisilicon and imx support.

  In the core framework, we only have two small changes this time.

  One is a new clk API to get all clks for a device with the bulk clk
  APIs. This allows drivers that don't care about doing anything besides
  turning on all the clks to just clk_get() them all and turn them on.

  The other change is the beginning of a way to support save and restore
  of clk settings in the clk framework. TI is the only user right now,
  but we will want to expand upon this design in the future to support
  more save and restore of clk registers. At least this gets us started
  and works well enough for one SoC, but there's more work in the
  future.

  Core:
   - clk_bulk_get_all() API and friends to get all the clks for a device
   - Basic clk state save/restore hooks

  New Drivers:
   - Renesas RZ/A2 (R7S9210) SoC, including early clocks
   - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs
   - Rensas RZ/G2M (r8a774a1) SoC
   - Qualcomm Krait CPU clk support
   - Qualcomm QCS404 GCC support
   - Qualcomm SDM660 GCC support
   - Qualcomm SDM845 camera clock controller
   - Ingenic jz4725b CGU
   - Hisilicon 3670 SoC support
   - TI SCI clks on K3 SoCs
   - iMX6 MMDC clks
   - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs

  Updates:
   - Rework at91 PMC clock driver for new DT bindings
   - Nvidia Tegra clk driver MBIST workaround fix
   - S2RAM support for Marvell mvebu periph clks
   - Use updated printk format for OF node names
   - Fix TI code to only search DT subnodes
   - Various static analysis finds
   - Tag various drivers with SPDX license tags
   - Support dynamic frequency switching (DFS) on qcom SDM845 GCC
   - Only use s2mps11 dt-binding defines instead of redefining them in the driver
   - Add some more missing clks to qcom MSM8996 GCC
   - Quad SPI clks on qcom SDM845
   - Add support for CMT timer clocks on R-Car V3H
   - Add support for SHDI and various timer clocks on R-Car V3M
   - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs
   - Amlogic clk-pll driver improvements and updates
   - Amlogic axg audio controller system clocks
   - Register Amlogic meson8b clock controller early
   - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N
   - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers
   - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC
   - Remove obsoleted Exynos4212 ISP clock definitions
   - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design
   - TI RTC+DDR sleep mode support for clock save/restore
   - Allwinner A64 display engine support and fixes
   - Allwinner A83t display engine support and fixes"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (186 commits)
  clk: qcom: Remove unused arrays in SDM845 GCC
  clk: fixed-rate: fix of_node_get-put imbalance
  clk: s2mps11: Add used attribute to s2mps11_dt_match
  clk: qcom: gcc-sdm660: Add MODULE_LICENSE
  clk: qcom: Add safe switch hook for krait mux clocks
  dt-bindings: clock: Document qcom,krait-cc
  clk: qcom: Add Krait clock controller driver
  dt-bindings: arm: Document qcom,kpss-gcc
  clk: qcom: Add KPSS ACC/GCC driver
  clk: qcom: Add support for Krait clocks
  clk: qcom: Add IPQ806X's HFPLLs
  clk: qcom: Add MSM8960/APQ8064's HFPLLs
  dt-bindings: clock: Document qcom,hfpll
  clk: qcom: Add HFPLL driver
  clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
  ARM: Add Krait L2 register accessor functions
  clk: imx6q: add mmdc0 ipg clock
  clk: imx6sl: add mmdc ipg clocks
  clk: imx6sll: add mmdc1 ipg clock
  clk: imx6sx: add mmdc1 ipg clock
  ...
2018-10-31 11:08:30 -07:00
Linus Torvalds b22b6beae6 ARM: SoC driver updates for 4.17
The most noteworthy SoC driver changes this time include:
 
 - The TEE subsystem gains an in-kernel interface to access the TEE
   from device drivers.
 
 - The reset controller subsystem gains a driver for the Qualcomm
   Snapdragon 845 Power Domain Controller.
 
 - The Xilinx Zynq platform now has a firmware interface for its
   platform management unit. This contains a firmware "ioctl" interface
   that was a little controversial at first, but the version we merged
   solved that by not exposing arbitrary firmware calls to user space.
 
 - The Amlogic Meson platform gains a "canvas" driver that is used
   for video processing and shared between different high-level drivers.
 
 The rest is more of the usual, mostly related to SoC specific power
 management support and core drivers in drivers/soc:
 
 - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
   features related to power and reset control.
 
 - The Mediatek mt8183 and mt6765 SoC platforms gain support for
   their respective power management chips.
 
 - A new driver for NXP i.MX8, which need a firmware interface for
   power management.
 
 - The SCPI firmware interface now contains support estimating power
   usage of performance states
 
 - The NVIDIA Tegra "pmc" driver gains a few new features, in particular
   a pinctrl interface for configuring the pads.
 
 - Lots of small changes for Qualcomm, in particular the "smem"
   device driver.
 
 - Some cleanups for the TI OMAP series related to their sysc
   controller.
 
 Additional cleanups and bugfixes in SoC specific drivers include the
 Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJb1zEhAAoJEGCrR//JCVInnYQP/1pPXWsR/DV4COf4kGJFSAFn
 EfHXJM1vKtb7AWl6SClpHFlUMt+fvL+dzDNJ9aeRr2GjcuWfzKDcrBM1ZvM70I31
 C1Oc3b6OXEERCozDpRg/Vt8OpIvvWnVpaVffS9E5y6KqF8KZ0UbpWIxUJ87ik44D
 UvNXYOU/LUGPxR1UFm5rm2zWF4i+rBvqnpVaXbeOsXsLElzxXVfv2ymhhqIpo2ws
 o6e00DSjUImg8hLL4HCGFs2EX1KSD+oFzYaOHIE0/DEaiOnxVOpMSRhX2tZ+tRRb
 DekbjL+wz5gOAKJTQfQ2sNNkOuK8WFqmE5G0RJ0iYPXuNsB/17UNb2bhTJeqGdcD
 dqCQBLQuDUD2iHJ/d4RK5Kx3a8h2X63n5bdefgF5UX/2RBpXwFk1QtHr8X0DuY8c
 o/dPGFNBOn3egzMyXrD5VEtnaTwK1Y6/h09qfuOOF1ZuYDmELKRkWMV9l8dIsvd8
 ANjaw5B8MOUAf8DccBmPgUGu0XLCDyuFGqNVd9Kj5u3az+tyggIsgkEjWg1pxTv0
 7dDDyv4Ara1V1HVDZ23l3CgmYCZQx2R/vdpX/DjuDPGEHGjZ5s2TW8P6oegdxtIh
 LcTonNoTsRYzMrGD/aqhG/8fYsAScXePa3CLKl1Hrl+wFVV0XcaggH23GwD/k+7S
 eDBrEzLkOTxM+WXvsvKY
 =c/PQ
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "The most noteworthy SoC driver changes this time include:

   - The TEE subsystem gains an in-kernel interface to access the TEE
     from device drivers.

   - The reset controller subsystem gains a driver for the Qualcomm
     Snapdragon 845 Power Domain Controller.

   - The Xilinx Zynq platform now has a firmware interface for its
     platform management unit. This contains a firmware "ioctl"
     interface that was a little controversial at first, but the version
     we merged solved that by not exposing arbitrary firmware calls to
     user space.

   - The Amlogic Meson platform gains a "canvas" driver that is used for
     video processing and shared between different high-level drivers.

  The rest is more of the usual, mostly related to SoC specific power
  management support and core drivers in drivers/soc:

   - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
     features related to power and reset control.

   - The Mediatek mt8183 and mt6765 SoC platforms gain support for their
     respective power management chips.

   - A new driver for NXP i.MX8, which need a firmware interface for
     power management.

   - The SCPI firmware interface now contains support estimating power
     usage of performance states

   - The NVIDIA Tegra "pmc" driver gains a few new features, in
     particular a pinctrl interface for configuring the pads.

   - Lots of small changes for Qualcomm, in particular the "smem" device
     driver.

   - Some cleanups for the TI OMAP series related to their sysc
     controller.

  Additional cleanups and bugfixes in SoC specific drivers include the
  Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits)
  firmware: tegra: bpmp: Implement suspend/resume support
  drivers: clk: Add ZynqMP clock driver
  dt-bindings: clock: Add bindings for ZynqMP clock driver
  firmware: xilinx: Add zynqmp IOCTL API for device control
  Documentation: xilinx: Add documentation for eemi APIs
  MAINTAINERS: imx: include drivers/firmware/imx path
  firmware: imx: add misc svc support
  firmware: imx: add SCU firmware driver support
  reset: Fix potential use-after-free in __of_reset_control_get()
  dt-bindings: arm: fsl: add scu binding doc
  soc: fsl: qbman: add interrupt coalesce changing APIs
  soc: fsl: bman_portals: defer probe after bman's probe
  soc: fsl: qbman: Use last response to determine valid bit
  soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan
  soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers
  soc: fsl: qbman: Check if CPU is offline when initializing portals
  reset: qcom: PDC Global (Power Domain Controller) reset controller
  dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
  reset: Grammar s/more then once/more than once/
  bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
  ...
2018-10-29 15:16:01 -07:00
Linus Torvalds 93335e5911 ARM: SoC device tree updates for 4.20
There are close to 800 indivudal changesets in this branch again, which
 feels like a lot. There are particularly many changes for the NVIDIA
 Tegra platform this time, in fact more than it has seen in the two years
 since the v4.9 merge window. Aside from this, it's been fairly normal,
 with lots of changes going into Renesas R-CAR, NXP i.MX, Allwinner Sunxi,
 Samsung Exynos, and TI OMAP.
 
 Most of the changes are for adding new features into existing boards,
 for brevity I'm only mentioning completely new machines and SoCs here.
 For the first time I think we have (slightly) more new 64-bit hardware
 than 32-bit:
 
 Two boards get added for TI OMAP: Moxa UC-2101 is an industrial
 computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5
 is a minor variation of the motherboards of the GTA04 phone, see
 https://shop.goldelico.com/wiki.php?page=GTA04A5
 
 Clearfog is a nice little board for quad-core
 Marvell Armada 8040 network processor, see
 https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/
 
 Two additional server boards come with the Aspeed baseboard management
 controllers: Stardragon4800 is an arm64 reference platform made by HXT
 (based on Qualcomm's server chips), and TiogaPass is an Open Compute
 mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in
 the BMC.
 
 NXP i.MX usually sees a lot of new boards each release. This time there
 we only add one minor variant: ConnectCore 6UL SBC Pro uses the same
 SoM design as the ConnectCore 6UL SBC Express added later. However,
 there is a new chip, the i.MX6ULZ, which is an even smaller variant
 of the i.MX6ULL, with features removed. There is also support for the
 reference board design, the i.MX6ULZ 14x14 EVK.
 
 A new Raspberry Pi variant gets added, this one is the CM3 compute module
 based on bcm2837, it was launched in early 2017 but only now added to
 the kernel, both as 32-bit and as 64-bit files, as we tend to do for
 Raspberry Pi.
 
 On the Allwinner side, everything is again about cheap development
 boards, usually of the "Fruit Pi" variety. The new ones this time
 are:
 Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/
 Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/
 Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts
 Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html
 The last one of these is now a 64-bit version of the earlier Banana
 Pi M2+ H3, with the same board layout.
 
 Similarly, for Rockchips, get get another variant of the 32-bit
 Asus Tinker board, the model 'S' based on rk3288, and three now
 boards based on the popular RK3399 chip:
 ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/
 Rock960: https://www.96boards.org/product/rock960/
 RockPro64: https://www.pine64.org/?page_id=61454
 These are all quite powerful boards with lots of RAM and I/O, and
 the RK3399 is the same chip used in several Chromebooks.  Finally,
 we get support for the PX30 (aka rk3326) chip, which is based on the
 low-end 64-bit Cortex-A35 CPU core. So far, only the evaluation board
 is supported.
 
 One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is based
 on the MT7622 WiFi router platform, and the first product I've seen with
 a 64-bit Mediatek chip in that market: http://www.banana-pi.org/r64.html
 
 For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370
 development board, which are similar to the Hi3660 and Hikey 360
 respectively, but add support for an NPU.
 
 Amlogic gets initial support for the Meson-G12A chip (S905D2),
 another quad-core Cortex-A53 SoC, and its evaluation platform.
 On the 32-bit side, we gain support for an actual end-user product,
 the Endless Computers Endless Mini based on Meson8b (S805), see
 https://endlessos.com/computers/
 
 Qualcomm adds support for their MSM8998 SoC and evaluation platform. This
 chip is commonly known as the Snapdragon 835, and is used in high-end
 phones as well as low-end laptops.
 
 For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added,
 but no boards for this one. However, we do add boards for the previously
 added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the M3NULCB
 Starter Kit Pro.
 
 While we have lots of DT changes for NVIDIA to update the existing files,
 the only board that gets added is the Toradex Colibri T20 on Colibri
 Evaluation Board for the old Tegra2.
 
 Synaptics add support for their AS370 SoC, which is part of the (formerly
 Marvell) Berlin line of set-top-box chips used e.g.  in the various Google
 Chromecast. Only the .dtsi gets added at this point, no actual machines.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJb1224AAoJEGCrR//JCVIn9uYP/jLMoGkVQRS5L9sRjOci1l5b
 EHl8veJ+uNJaTStp5XAZk90MoBcSdXtnISSEiR7a3qKJw1mYfgAWyPtQCttRFUCo
 rDp4GJpJ96TBg1tyt5Lop3V9eIYbCh9epf2foKTTdpRiX022AFk1031jvnh2Teuy
 fKA2VNeoyyOZqxh0ysJq7G8kWt8PTQTKXDebYPWEbsu0AFmqQ84lz7oGNdPk0GPm
 krtQIO6rh+sJR/8wWGYfnTYAIOk6jNrPhiyjEcyu+x2525rwKxJNKVY8P9PuNhrl
 hzqld1dPtb3gfdcxWxZUznHmVUGkVEIa1QNC6csSmLzuxqJJE0/J5u2P8lIfrhVI
 c5C8r3eaTxFM0s5uKhNhhewlJ6uiDhUQy13AG0JXteujP23BGObYstnV10pJrH75
 xq7uSUiU04v95MocPjodJ2I7dIlAoFCd6ELnsmD/mz743gY9AZ6DHaOBMMwIzK3H
 EQifF5E/4PWOjBx7fonumBm0LebPjWGmv4CNyCK5Q93ylK7U/kFDdjiNjNhyks5E
 CVQBFhA7sshKJQRDOiaofMxOfKJHeKGU2PR7yGRpT3YWQD/apIL/elG4qUNjLX46
 2Dwdgq8nDdbY2SzPwwy7ncTtyDRYcsFCtScT5slu1I1UxIhwEYJurzCKDM4jJNZb
 Cg2D7a+AlZ8N5Vsr1ldV
 =yaED
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree updates from Arnd Bergmann:
 "There are close to 800 indivudal changesets in this branch again,
  which feels like a lot. There are particularly many changes for the
  NVIDIA Tegra platform this time, in fact more than it has seen in the
  two years since the v4.9 merge window. Aside from this, it's been
  fairly normal, with lots of changes going into Renesas R-CAR, NXP
  i.MX, Allwinner Sunxi, Samsung Exynos, and TI OMAP.

  Most of the changes are for adding new features into existing boards,
  for brevity I'm only mentioning completely new machines and SoCs here.
  For the first time I think we have (slightly) more new 64-bit hardware
  than 32-bit:

  Two boards get added for TI OMAP: Moxa UC-2101 is an industrial
  computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5 is a
  minor variation of the motherboards of the GTA04 phone, see
  https://shop.goldelico.com/wiki.php?page=GTA04A5

  Clearfog is a nice little board for quad-core Marvell Armada 8040
  network processor, see
  https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/

  Two additional server boards come with the Aspeed baseboard management
  controllers: Stardragon4800 is an arm64 reference platform made by HXT
  (based on Qualcomm's server chips), and TiogaPass is an Open Compute
  mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in the
  BMC.

  NXP i.MX usually sees a lot of new boards each release. This time
  there we only add one minor variant: ConnectCore 6UL SBC Pro uses the
  same SoM design as the ConnectCore 6UL SBC Express added later.
  However, there is a new chip, the i.MX6ULZ, which is an even smaller
  variant of the i.MX6ULL, with features removed. There is also support
  for the reference board design, the i.MX6ULZ 14x14 EVK.

  A new Raspberry Pi variant gets added, this one is the CM3 compute
  module based on bcm2837, it was launched in early 2017 but only now
  added to the kernel, both as 32-bit and as 64-bit files, as we tend to
  do for Raspberry Pi.

  On the Allwinner side, everything is again about cheap development
  boards, usually of the "Fruit Pi" variety. The new ones this time are:
   - Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/
   - Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/
   - Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts
   - Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html
  The last one of these is now a 64-bit version of the earlier Banana Pi
  M2+ H3, with the same board layout.

  Similarly, for Rockchips, get get another variant of the 32-bit Asus
  Tinker board, the model 'S' based on rk3288, and three now boards
  based on the popular RK3399 chip:
   - ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/
   - Rock960: https://www.96boards.org/product/rock960/
   - RockPro64: https://www.pine64.org/?page_id=61454
  These are all quite powerful boards with lots of RAM and I/O, and the
  RK3399 is the same chip used in several Chromebooks. Finally, we get
  support for the PX30 (aka rk3326) chip, which is based on the low-end
  64-bit Cortex-A35 CPU core. So far, only the evaluation board is
  supported.

  One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is
  based on the MT7622 WiFi router platform, and the first product I've
  seen with a 64-bit Mediatek chip in that market:
  http://www.banana-pi.org/r64.html

  For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370
  development board, which are similar to the Hi3660 and Hikey 360
  respectively, but add support for an NPU.

  Amlogic gets initial support for the Meson-G12A chip (S905D2), another
  quad-core Cortex-A53 SoC, and its evaluation platform. On the 32-bit
  side, we gain support for an actual end-user product, the Endless
  Computers Endless Mini based on Meson8b (S805), see
  https://endlessos.com/computers/

  Qualcomm adds support for their MSM8998 SoC and evaluation platform.
  This chip is commonly known as the Snapdragon 835, and is used in
  high-end phones as well as low-end laptops.

  For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added,
  but no boards for this one. However, we do add boards for the
  previously added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the
  M3NULCB Starter Kit Pro.

  While we have lots of DT changes for NVIDIA to update the existing
  files, the only board that gets added is the Toradex Colibri T20 on
  Colibri Evaluation Board for the old Tegra2.

  Synaptics add support for their AS370 SoC, which is part of the
  (formerly Marvell) Berlin line of set-top-box chips used e.g. in the
  various Google Chromecast. Only the .dtsi gets added at this point, no
  actual machines"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (721 commits)
  ARM: dts: socfgpa: remove ethernet aliases from dtsi
  arm64: dts: stratix10: add ethernet aliases
  dt-bindings: mediatek: Add bindig for MT7623 IOMMU and SMI
  dt-bindings: mediatek: Add JPEG Decoder binding for MT7623
  dt-bindings: iommu: mediatek: Add binding for MT7623
  dt-bindings: clock: mediatek: add support for MT7623
  ARM: dts: mvebu: armada-385-db-88f6820-amc: auto-detect nand ECC properites
  ARM: dts: da850-lego-ev3: slow down A/DC as much as possible
  ARM: dts: da850-evm: Enable tca6416 on baseboard
  arm64: dts: uniphier: Add USB2 PHY nodes
  arm64: dts: uniphier: Add USB3 controller nodes
  ARM: dts: uniphier: Add USB2 PHY nodes
  ARM: dts: uniphier: Add USB3 controller nodes
  arm64: dts: meson-axg: s400: disable emmc
  arm64: dts: meson-axg: s400: add missing emmc pwrseq
  arm64: dts: clearfog-gt-8k: add PCIe slot description
  ARM: dts: at91: sama5d4_xplained: even nand memory partitions
  ARM: dts: at91: sama5d3_xplained: even nand memory partitions
  ARM: dts: at91: at91sam9x5cm: even nand memory partitions
  ARM: dts: at91: sama5d2_ptc_ek: fix bootloader env offsets
  ...
2018-10-29 15:05:20 -07:00
Linus Torvalds 738b04fba1 Staging/IIO patches for 4.20-rc1
Here is the big staging and IIO driver pull request for 4.20-rc1.
 
 There are lots of things here, we ended up adding more lines than
 removing, thanks to a large influx of Comedi National Instrument device
 support.  Someday soon we need to get comedi out of staging...
 
 Other than the comedi drivers, the "big" things here are:
   - new iio drivers
   - delete dgnc driver (no one used it and no one had the hardware
     anymore)
   - vbox driver updates and fixes
   - erofs fixes
   - tons and tons of tiny checkpatch fixes for almost all staging
     drivers
 
 All of these have been in linux-next, with the last few happening a bit
 "late" due to them getting stuck on my laptop during travel to the
 Mantainers summit.
 
 When merging with your tree, there will be 2 merge conflicts, both files
 will be simple to resolve, just delete them :)
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCW9bSGA8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+yk5eACfYp73m9tLO22rnBcXJ73bWAYSTOMAn2GEL4Nc
 LZBXs8QvvJIwfqmi7ofn
 =UWJn
 -----END PGP SIGNATURE-----

Merge tag 'staging-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging/IIO driver updates from Greg KH:
 "Here is the big staging and IIO driver pull request for 4.20-rc1.

  There are lots of things here, we ended up adding more lines than
  removing, thanks to a large influx of Comedi National Instrument
  device support. Someday soon we need to get comedi out of staging...

  Other than the comedi drivers, the "big" things here are:

   - new iio drivers

   - delete dgnc driver (no one used it and no one had the hardware
     anymore)

   - vbox driver updates and fixes

   - erofs fixes

   - tons and tons of tiny checkpatch fixes for almost all staging
     drivers

  All of these have been in linux-next, with the last few happening a
  bit "late" due to them getting stuck on my laptop during travel to the
  Mantainers summit"

* tag 'staging-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (690 commits)
  staging: gasket: Fix sparse "incorrect type in assignment" warnings.
  staging: gasket: remove debug logs for callback invocation
  staging: gasket: remove debug logs in page table mapping calls
  staging: rtl8188eu: core: Use sizeof(*p) instead of sizeof(struct P) for memory allocation
  staging: ks7010: Remove extra blank line
  staging: gasket: Remove extra blank line
  staging: media: davinci_vpfe: Fix spelling mistake in enum
  staging: speakup: Add a pair of braces
  staging: wlan-ng: Replace long int with long
  staging: MAINTAINERS: remove obsolete IPX staging directory
  staging: MAINTAINERS: remove NCP filesystem entry
  staging: rtl8188eu: cleanup comparsions to false
  staging: gasket: Update device virtual address comment
  staging: gasket: sysfs: fix attribute release comment
  staging: gasket: apex: fix sysfs_show
  staging: gasket: page_table: simplify gasket_components_to_dev_address
  staging: gasket: page_table: fix comment in components_to_dev_address
  staging: gasket: page table: fixup error path allocating coherent mem
  staging: gasket: page_table: rearrange gasket_page_table_entry
  staging: gasket: page_table: remove unnecessary PTE status set to free
  ...
2018-10-29 10:38:10 -07:00
Linus Torvalds b27186abb3 Devicetree updates for 4.20:
- Sync dtc with upstream version v1.4.7-14-gc86da84d30e4
 
 - Work to get rid of direct accesses to struct device_node name and
   type pointers in preparation for removing them. New helpers for
   parsing DT cpu nodes and conversions to use the helpers. printk
   conversions to %pOFn for printing DT node names. Most went thru
   subystem trees, so this is the remainder.
 
 - Fixes to DT child node lookups to actually be restricted to child
   nodes instead of treewide.
 
 - Refactoring of dtb targets out of arch code. This makes the support
   more uniform and enables building all dtbs on c6x, microblaze, and
   powerpc.
 
 - Various DT binding updates for Renesas r8a7744 SoC
 
 - Vendor prefixes for Facebook, OLPC
 
 - Restructuring of some ARM binding docs moving some peripheral bindings
   out of board/SoC binding files
 
 - New "secure-chosen" binding for secure world settings on ARM
 
 - Dual licensing of 2 DT IRQ binding headers
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAlvTKWYQHHJvYmhAa2Vy
 bmVsLm9yZwAKCRD6+121jbxhw8J5EACMAnrTxWQmXfQXOZEVxztcFavH6LP8mh2e
 7FZIZ38jzHXXvl81tAg1nBhzFUU/qtvqW8NDCZ9OBxKvp6PFDNhWu241ZodSB1Kw
 MZWy2A9QC+qbHYCC+SB5gOT0+Py3v7LNCBa5/TxhbFd35THJM8X0FP7gmcCGX593
 9Ml1rqawT4mK5XmCpczT0cXxyC4TgVtpfDWZH2KgJTR/kwXVQlOQOGZ8a1y/wrt7
 8TLIe7Qy4SFRzjhwbSta1PUehyYfe4uTSsXIJ84kMvNMxinLXQtvd7t9TfsK8p/R
 WjYUneJskVjtxVrMQfdV4MxyFL1YEt2mYcr0PMKIWxMCgGDAZsHPoUZmjyh/PrCI
 uiZtEHn3fXpUZAV/xEHHNirJxYyQfHGiksAT+lPrUXYYLCcZ3ZmqiTEYhGoQAfH5
 CQPMuxA6yXxp6bov6zJwZSTZtkXciju8aQRhUhlxIfHTqezmGYeql/bnWd+InNuR
 upANLZBh6D2jTWzDyobconkCCLlVkSqDoqOx725mMl6hIcdH9d2jVX7hwRf077VI
 5i3CyPSJOkSOLSdB8bAPYfBoaDtH2bthxieUrkkSbIjbwHO1H6a2lxPeG/zah0a3
 ePMGhi7J84UM4VpJEi000cP+bhPumJtJrG7zxP7ldXdfAF436sQ6KRptlcpLpj5i
 IwMhUQNH+g==
 =335v
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull Devicetree updates from Rob Herring:
 "A bit bigger than normal as I've been busy this cycle.

  There's a few things with dependencies and a few things subsystem
  maintainers didn't pick up, so I'm taking them thru my tree.

  The fixes from Johan didn't get into linux-next, but they've been
  waiting for some time now and they are what's left of what subsystem
  maintainers didn't pick up.

  Summary:

   - Sync dtc with upstream version v1.4.7-14-gc86da84d30e4

   - Work to get rid of direct accesses to struct device_node name and
     type pointers in preparation for removing them. New helpers for
     parsing DT cpu nodes and conversions to use the helpers. printk
     conversions to %pOFn for printing DT node names. Most went thru
     subystem trees, so this is the remainder.

   - Fixes to DT child node lookups to actually be restricted to child
     nodes instead of treewide.

   - Refactoring of dtb targets out of arch code. This makes the support
     more uniform and enables building all dtbs on c6x, microblaze, and
     powerpc.

   - Various DT binding updates for Renesas r8a7744 SoC

   - Vendor prefixes for Facebook, OLPC

   - Restructuring of some ARM binding docs moving some peripheral
     bindings out of board/SoC binding files

   - New "secure-chosen" binding for secure world settings on ARM

   - Dual licensing of 2 DT IRQ binding headers"

* tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
  ARM: dt: relicense two DT binding IRQ headers
  power: supply: twl4030-charger: fix OF sibling-node lookup
  NFC: nfcmrvl_uart: fix OF child-node lookup
  net: stmmac: dwmac-sun8i: fix OF child-node lookup
  net: bcmgenet: fix OF child-node lookup
  drm/msm: fix OF child-node lookup
  drm/mediatek: fix OF sibling-node lookup
  of: Add missing exports of node name compare functions
  dt-bindings: Add OLPC vendor prefix
  dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus
  dt-bindings: thermal: samsung: Add SPDX license identifier
  dt-bindings: clock: samsung: Add SPDX license identifiers
  dt-bindings: timer: ostm: Add R7S9210 support
  dt-bindings: phy: rcar-gen2: Add r8a7744 support
  dt-bindings: can: rcar_can: Add r8a7744 support
  dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support
  dt-bindings: watchdog: renesas-wdt: Document r8a7744 support
  dt-bindings: thermal: rcar: Add device tree support for r8a7744
  Documentation: dt: Add binding for /secure-chosen/stdout-path
  dt-bindings: arm: zte: Move sysctrl bindings to their own doc
  ...
2018-10-26 12:09:58 -07:00
Linus Torvalds 9703fc8caf USB/PHY patches for 4.20-rc1
Here is the big USB/PHY driver patches for 4.20-rc1
 
 Lots of USB changes in here, primarily in these areas:
   - typec updates and new drivers
   - new PHY drivers
   - dwc2 driver updates and additions (this old core keeps getting added
     to new devices.)
   - usbtmc major update based on the industry group coming together and
     working to add new features and performance to the driver.
   - USB gadget additions for new features
   - USB gadget configfs updates
   - chipidea driver updates
   - other USB gadget updates
   - USB serial driver updates
   - renesas driver updates
   - xhci driver updates
   - other tiny USB driver updates
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCW9LlHw8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymnvwCffYmMWyMG9zSOw1oSzFPl7TVN1hYAoMyJqzLg
 umyLwWxC9ZWWkrpc3iD8
 =ux+Y
 -----END PGP SIGNATURE-----

Merge tag 'usb-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/PHY updates from Greg KH:
 "Here is the big USB/PHY driver patches for 4.20-rc1

  Lots of USB changes in here, primarily in these areas:

   - typec updates and new drivers

   - new PHY drivers

   - dwc2 driver updates and additions (this old core keeps getting
     added to new devices.)

   - usbtmc major update based on the industry group coming together and
     working to add new features and performance to the driver.

   - USB gadget additions for new features

   - USB gadget configfs updates

   - chipidea driver updates

   - other USB gadget updates

   - USB serial driver updates

   - renesas driver updates

   - xhci driver updates

   - other tiny USB driver updates

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'usb-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (229 commits)
  usb: phy: ab8500: silence some uninitialized variable warnings
  usb: xhci: tegra: Add genpd support
  usb: xhci: tegra: Power-off power-domains on removal
  usbip:vudc: BUG kmalloc-2048 (Not tainted): Poison overwritten
  usbip: tools: fix atoi() on non-null terminated string
  USB: misc: appledisplay: fix backlight update_status return code
  phy: phy-pxa-usb: add a new driver
  usb: host: add DT bindings for faraday fotg2
  usb: host: ohci-at91: fix request of irq for optional gpio
  usb/early: remove set but not used variable 'remain_length'
  usb: typec: Fix copy/paste on typec_set_vconn_role() kerneldoc
  usb: typec: tcpm: Report back negotiated PPS voltage and current
  USB: core: remove set but not used variable 'udev'
  usb: core: fix memory leak on port_dev_path allocation
  USB: net2280: Remove ->disconnect() callback from net2280_pullup()
  usb: dwc2: disable power_down on rockchip devices
  usb: gadget: udc: renesas_usb3: add support for r8a77990
  dt-bindings: usb: renesas_usb3: add bindings for r8a77990
  usb: gadget: udc: renesas_usb3: Add r8a774a1 support
  USB: serial: cypress_m8: remove set but not used variable 'iflag'
  ...
2018-10-26 08:14:13 -07:00
Stephen Warren d061864b89 ARM: dt: relicense two DT binding IRQ headers
Files in include/dt-bindings/ may be useful to any OS that uses DT, when
building the OS binary itself, not just when building DTB files. Since
some OSs are not GPL, they need non-GPL headers. This change relicenses
two of the useful files so that they can be used under the MIT license
when desired. I wrote these files and NVIDIA legal has approved this
change. Geert also ack'd the change; he fixed some spelling issues in the
comments.

Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-10-26 07:46:32 -05:00
Linus Torvalds bd6bf7c104 pci-v4.20-changes
-----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAlvPV7IUHGJoZWxnYWFz
 QGdvb2dsZS5jb20ACgkQWYigwDrT+vyaUg//WnCaRIu2oKOp8c/bplZJDW5eT10d
 oYAN9qeyptU9RYrg4KBNbZL9UKGFTk3AoN5AUjrk8njxc/dY2ra/79esOvZyyYQy
 qLXBvrXKg3yZnlNlnyBneGSnUVwv/kl2hZS+kmYby2YOa8AH/mhU0FIFvsnfRK2I
 XvwABFm2ZYvXCqh3e5HXaHhOsR88NQ9In0AXVC7zHGqv1r/bMVn2YzPZHL/zzMrF
 mS79tdBTH+shSvchH9zvfgIs+UEKvvjEJsG2liwMkcQaV41i5dZjSKTdJ3EaD/Y2
 BreLxXRnRYGUkBqfcon16Yx+P6VCefDRLa+RhwYO3dxFF2N4ZpblbkIdBATwKLjL
 npiGc6R8yFjTmZU0/7olMyMCm7igIBmDvWPcsKEE8R4PezwoQv6YKHBMwEaflIbl
 Rv4IUqjJzmQPaA0KkRoAVgAKHxldaNqno/6G1FR2gwz+fr68p5WSYFlQ3axhvTjc
 bBMJpB/fbp9WmpGJieTt6iMOI6V1pnCVjibM5ZON59WCFfytHGGpbYW05gtZEod4
 d/3yRuU53JRSj3jQAQuF1B6qYhyxvv5YEtAQqIFeHaPZ67nL6agw09hE+TlXjWbE
 rTQRShflQ+ydnzIfKicFgy6/53D5hq7iH2l7HwJVXbXRQ104T5DB/XHUUTr+UWQn
 /Nkhov32/n6GjxQ=
 =58I4
 -----END PGP SIGNATURE-----

Merge tag 'pci-v4.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas:

 - Fix ASPM link_state teardown on removal (Lukas Wunner)

 - Fix misleading _OSC ASPM message (Sinan Kaya)

 - Make _OSC optional for PCI (Sinan Kaya)

 - Don't initialize ASPM link state when ACPI_FADT_NO_ASPM is set
   (Patrick Talbert)

 - Remove x86 and arm64 node-local allocation for host bridge structures
   (Punit Agrawal)

 - Pay attention to device-specific _PXM node values (Jonathan Cameron)

 - Support new Immediate Readiness bit (Felipe Balbi)

 - Differentiate between pciehp surprise and safe removal (Lukas Wunner)

 - Remove unnecessary pciehp includes (Lukas Wunner)

 - Drop pciehp hotplug_slot_ops wrappers (Lukas Wunner)

 - Tolerate PCIe Slot Presence Detect being hardwired to zero to
   workaround broken hardware, e.g., the Wilocity switch/wireless device
   (Lukas Wunner)

 - Unify pciehp controller & slot structs (Lukas Wunner)

 - Constify hotplug_slot_ops (Lukas Wunner)

 - Drop hotplug_slot_info (Lukas Wunner)

 - Embed hotplug_slot struct into users instead of allocating it
   separately (Lukas Wunner)

 - Initialize PCIe port service drivers directly instead of relying on
   initcall ordering (Keith Busch)

 - Restore PCI config state after a slot reset (Keith Busch)

 - Save/restore DPC config state along with other PCI config state
   (Keith Busch)

 - Reference count devices during AER handling to avoid race issue with
   concurrent hot removal (Keith Busch)

 - If an Upstream Port reports ERR_FATAL, don't try to read the Port's
   config space because it is probably unreachable (Keith Busch)

 - During error handling, use slot-specific reset instead of secondary
   bus reset to avoid link up/down issues on hotplug ports (Keith Busch)

 - Restore previous AER/DPC handling that does not remove and
   re-enumerate devices on ERR_FATAL (Keith Busch)

 - Notify all drivers that may be affected by error recovery resets
   (Keith Busch)

 - Always generate error recovery uevents, even if a driver doesn't have
   error callbacks (Keith Busch)

 - Make PCIe link active reporting detection generic (Keith Busch)

 - Support D3cold in PCIe hierarchies during system sleep and runtime,
   including hotplug and Thunderbolt ports (Mika Westerberg)

 - Handle hpmemsize/hpiosize kernel parameters uniformly, whether slots
   are empty or occupied (Jon Derrick)

 - Remove duplicated include from pci/pcie/err.c and unused variable
   from cpqphp (YueHaibing)

 - Remove driver pci_cleanup_aer_uncorrect_error_status() calls (Oza
   Pawandeep)

 - Uninline PCI bus accessors for better ftracing (Keith Busch)

 - Remove unused AER Root Port .error_resume method (Keith Busch)

 - Use kfifo in AER instead of a local version (Keith Busch)

 - Use threaded IRQ in AER bottom half (Keith Busch)

 - Use managed resources in AER core (Keith Busch)

 - Reuse pcie_port_find_device() for AER injection (Keith Busch)

 - Abstract AER interrupt handling to disconnect error injection (Keith
   Busch)

 - Refactor AER injection callbacks to simplify future improvments
   (Keith Busch)

 - Remove unused Netronome NFP32xx Device IDs (Jakub Kicinski)

 - Use bitmap_zalloc() for dma_alias_mask (Andy Shevchenko)

 - Add switch fall-through annotations (Gustavo A. R. Silva)

 - Remove unused Switchtec quirk variable (Joshua Abraham)

 - Fix pci.c kernel-doc warning (Randy Dunlap)

 - Remove trivial PCI wrappers for DMA APIs (Christoph Hellwig)

 - Add Intel GPU device IDs to spurious interrupt quirk (Bin Meng)

 - Run Switchtec DMA aliasing quirk only on NTB endpoints to avoid
   useless dmesg errors (Logan Gunthorpe)

 - Update Switchtec NTB documentation (Wesley Yung)

 - Remove redundant "default n" from Kconfig (Bartlomiej Zolnierkiewicz)

 - Avoid panic when drivers enable MSI/MSI-X twice (Tonghao Zhang)

 - Add PCI support for peer-to-peer DMA (Logan Gunthorpe)

 - Add sysfs group for PCI peer-to-peer memory statistics (Logan
   Gunthorpe)

 - Add PCI peer-to-peer DMA scatterlist mapping interface (Logan
   Gunthorpe)

 - Add PCI configfs/sysfs helpers for use by peer-to-peer users (Logan
   Gunthorpe)

 - Add PCI peer-to-peer DMA driver writer's documentation (Logan
   Gunthorpe)

 - Add block layer flag to indicate driver support for PCI peer-to-peer
   DMA (Logan Gunthorpe)

 - Map Infiniband scatterlists for peer-to-peer DMA if they contain P2P
   memory (Logan Gunthorpe)

 - Register nvme-pci CMB buffer as PCI peer-to-peer memory (Logan
   Gunthorpe)

 - Add nvme-pci support for PCI peer-to-peer memory in requests (Logan
   Gunthorpe)

 - Use PCI peer-to-peer memory in nvme (Stephen Bates, Steve Wise,
   Christoph Hellwig, Logan Gunthorpe)

 - Cache VF config space size to optimize enumeration of many VFs
   (KarimAllah Ahmed)

 - Remove unnecessary <linux/pci-ats.h> include (Bjorn Helgaas)

 - Fix VMD AERSID quirk Device ID matching (Jon Derrick)

 - Fix Cadence PHY handling during probe (Alan Douglas)

 - Signal Cadence Endpoint interrupts via AXI region 0 instead of last
   region (Alan Douglas)

 - Write Cadence Endpoint MSI interrupts with 32 bits of data (Alan
   Douglas)

 - Remove redundant controller tests for "device_type == pci" (Rob
   Herring)

 - Document R-Car E3 (R8A77990) bindings (Tho Vu)

 - Add device tree support for R-Car r8a7744 (Biju Das)

 - Drop unused mvebu PCIe capability code (Thomas Petazzoni)

 - Add shared PCI bridge emulation code (Thomas Petazzoni)

 - Convert mvebu to use shared PCI bridge emulation (Thomas Petazzoni)

 - Add aardvark Root Port emulation (Thomas Petazzoni)

 - Support 100MHz/200MHz refclocks for i.MX6 (Lucas Stach)

 - Add initial power management for i.MX7 (Leonard Crestez)

 - Add PME_Turn_Off support for i.MX7 (Leonard Crestez)

 - Fix qcom runtime power management error handling (Bjorn Andersson)

 - Update TI dra7xx unaligned access errata workaround for host mode as
   well as endpoint mode (Vignesh R)

 - Fix kirin section mismatch warning (Nathan Chancellor)

 - Remove iproc PAXC slot check to allow VF support (Jitendra Bhivare)

 - Quirk Keystone K2G to limit MRRS to 256 (Kishon Vijay Abraham I)

 - Update Keystone to use MRRS quirk for host bridge instead of open
   coding (Kishon Vijay Abraham I)

 - Refactor Keystone link establishment (Kishon Vijay Abraham I)

 - Simplify and speed up Keystone link training (Kishon Vijay Abraham I)

 - Remove unused Keystone host_init argument (Kishon Vijay Abraham I)

 - Merge Keystone driver files into one (Kishon Vijay Abraham I)

 - Remove redundant Keystone platform_set_drvdata() (Kishon Vijay
   Abraham I)

 - Rename Keystone functions for uniformity (Kishon Vijay Abraham I)

 - Add Keystone device control module DT binding (Kishon Vijay Abraham
   I)

 - Use SYSCON API to get Keystone control module device IDs (Kishon
   Vijay Abraham I)

 - Clean up Keystone PHY handling (Kishon Vijay Abraham I)

 - Use runtime PM APIs to enable Keystone clock (Kishon Vijay Abraham I)

 - Clean up Keystone config space access checks (Kishon Vijay Abraham I)

 - Get Keystone outbound window count from DT (Kishon Vijay Abraham I)

 - Clean up Keystone outbound window configuration (Kishon Vijay Abraham
   I)

 - Clean up Keystone DBI setup (Kishon Vijay Abraham I)

 - Clean up Keystone ks_pcie_link_up() (Kishon Vijay Abraham I)

 - Fix Keystone IRQ status checking (Kishon Vijay Abraham I)

 - Add debug messages for all Keystone errors (Kishon Vijay Abraham I)

 - Clean up Keystone includes and macros (Kishon Vijay Abraham I)

 - Fix Mediatek unchecked return value from devm_pci_remap_iospace()
   (Gustavo A. R. Silva)

 - Fix Mediatek endpoint/port matching logic (Honghui Zhang)

 - Change Mediatek Root Port Class Code to PCI_CLASS_BRIDGE_PCI (Honghui
   Zhang)

 - Remove redundant Mediatek PM domain check (Honghui Zhang)

 - Convert Mediatek to pci_host_probe() (Honghui Zhang)

 - Fix Mediatek MSI enablement (Honghui Zhang)

 - Add Mediatek system PM support for MT2712 and MT7622 (Honghui Zhang)

 - Add Mediatek loadable module support (Honghui Zhang)

 - Detach VMD resources after stopping root bus to prevent orphan
   resources (Jon Derrick)

 - Convert pcitest build process to that used by other tools (iio, perf,
   etc) (Gustavo Pimentel)

* tag 'pci-v4.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (140 commits)
  PCI/AER: Refactor error injection fallbacks
  PCI/AER: Abstract AER interrupt handling
  PCI/AER: Reuse existing pcie_port_find_device() interface
  PCI/AER: Use managed resource allocations
  PCI: pcie: Remove redundant 'default n' from Kconfig
  PCI: aardvark: Implement emulated root PCI bridge config space
  PCI: mvebu: Convert to PCI emulated bridge config space
  PCI: mvebu: Drop unused PCI express capability code
  PCI: Introduce PCI bridge emulated config space common logic
  PCI: vmd: Detach resources after stopping root bus
  nvmet: Optionally use PCI P2P memory
  nvmet: Introduce helper functions to allocate and free request SGLs
  nvme-pci: Add support for P2P memory in requests
  nvme-pci: Use PCI p2pmem subsystem to manage the CMB
  IB/core: Ensure we map P2P memory correctly in rdma_rw_ctx_[init|destroy]()
  block: Add PCI P2P flag for request queue
  PCI/P2PDMA: Add P2P DMA driver writer's documentation
  docs-rst: Add a new directory for PCI documentation
  PCI/P2PDMA: Introduce configfs/sysfs enable attribute helpers
  PCI/P2PDMA: Add PCI p2pmem DMA mappings to adjust the bus offset
  ...
2018-10-25 06:50:48 -07:00
Linus Torvalds 3ea172c84d - New Drivers
- Add support for USART SPI to AT91*
 
  - New Functionality
    - Add support for Audio CODECs to motorola-cpcap
 
  - Fix-ups
    - DT documentation fix-ups; atmel-usart
    - Staticise functions/structs; spi-at91-usart, arizona-core
    - Constify; ti-lmu
    - Fix memory leaks; menelaus
    - Change device 'wake-up' status; ti_am335x_tscadc, max8997
    - Power Management (suspend/resume) semantic changes; ti_am335x_adc, cros_ec, max8997
    - SPDX churn; sec-core (+ headers), max* (+ headers), intel* (+ headers),
    - Trivial (whitespace, email addresses, alphabetisise); Kconfig, adp5520, intel_soc_pmic_*
    - Build as module; sec-irq
    - Use new %pOFn printk format for device_node.name; max77620
    - Remove unused code; madera
    - Use generic MACROs; intel_msic, intel_soc_pmic_crc
    - Move to GPIOD; ti-lmu
    - Use managed resources; ti-lmu
 
  - Bug Fixes
    - Add missing headers; at91-usart
    - Prevent device from entering low-power mode; arizona-core
    - Poll for BOOT_DONE to avoid still-booting NACK; madera-core
    - Prevent ADC read from shutting down device; mc13xxx-core
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAlvO94AACgkQUa+KL4f8
 d2GCaQ//XKJZ14EVT8gHVWekwUCJoqqLDDZH5Y+MDZkyq8ZnWZ3Iz2DeQ/g7KIAv
 EwtmWm4+TmfBMHziZSK3lZc/VBdhOWsFqi7/B1vQQ3n7RWHvhRcvFWASSzqCPpQP
 L7WbUtZWaeHx/26OKz1okbQbMuHEv11z8seXEX6axtSXlCbAF72fUaHDTAY0dCHD
 LAkomYee6wF3ohSwaPEH5FsgGRJ5ihnFmK8uGML+vBMq9IfrFOmOitrJmpOwPHud
 wKSEsKmVALeX/fP0kqcvaYOWTpNQecKEnJXH4uw0CC3QOIpL5nMmfKOjMfMF6wAq
 m76s5ZBt0UUMDZSiex+mzYQyfEXaP6bExtiUIfkXOii9uuaIIJ2J8rRLzoUrwpLy
 qTuGiIoUr3aoUFNx1uzmzeYVNLcQ2JeIrRw+MKlP60RiYDYyk8Ip96/ay+vLZXOl
 WTGFr9T5CnfjaHkoSgVcBu+F5q0v6qbvv0tBpjgYaRe9OClEEFqCSHqLo0oYwyeQ
 L4Y+tmGaDtUeRFdRyLp45X0y/DiThVkkDdOfRi3Fxn3PW4OxMOsU/GLCMQrbGXOr
 q5pJuSFjimu+JDZ2ibmMOtWrgtJ2EjTiBYLcDZNP2sujSWFE8azoEqGMXcQFDw/a
 Ltc6b474UNp9SGB4IC97f/B6EFUJ/TQWjo4WJXVEHdCRilRWBgM=
 =7B+Y
 -----END PGP SIGNATURE-----

Merge tag 'mfd-next-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Drivers
   - Add support for USART SPI to AT91*

  New Functionality
   - Add support for Audio CODECs to motorola-cpcap

  Fix-ups
   - DT documentation fix-ups; atmel-usart
   - Staticise functions/structs; spi-at91-usart, arizona-core
   - Constify; ti-lmu
   - Fix memory leaks; menelaus
   - Change device 'wake-up' status; ti_am335x_tscadc, max8997
   - Power Management (suspend/resume) semantic changes; ti_am335x_adc, cros_ec, max8997
   - SPDX churn; sec-core (+ headers), max* (+ headers), intel* (+ headers),
   - Trivial (whitespace, email addresses, alphabetisise); Kconfig, adp5520, intel_soc_pmic_*
   - Build as module; sec-irq
   - Use new %pOFn printk format for device_node.name; max77620
   - Remove unused code; madera
   - Use generic MACROs; intel_msic, intel_soc_pmic_crc
   - Move to GPIOD; ti-lmu
   - Use managed resources; ti-lmu

  Bug Fixes
   - Add missing headers; at91-usart
   - Prevent device from entering low-power mode; arizona-core
   - Poll for BOOT_DONE to avoid still-booting NACK; madera-core
   - Prevent ADC read from shutting down device; mc13xxx-core"

* tag 'mfd-next-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (45 commits)
  mfd: cros_ec: Avoid unneeded internal declaration warning
  mfd: ti-lmu: Use of_device_get_match_data() helper
  mfd: ti-lmu: Use managed resource for everything
  mfd: ti-lmu: Switch to GPIOD
  mfd: ti-lmu: constify mfd_cell tables
  mfd: max8997: Disable interrupt handling for suspend/resume cycle
  mfd: max8997: Enale irq-wakeup unconditionally
  mfd: arizona: Make array mclk_name static, shrinks object size
  MAINTAINERS: Add myself as designated reviewer of Intel MFD PMIC
  mfd: Convert Intel PMIC drivers to use SPDX identifier 1;5201;0c Reduce size of duplicated comments by switching to use SPDX identifier.
  mfd: Sort headers alphabetically for Intel PMIC drivers
  mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well
  mfd: intel_soc_pmic_crc: Use REGMAP_IRQ_REG() macro
  mfd: intel_soc_pmic_crc: Use DEFINE_RES_IRQ_NAMED() macro
  mfd: intel_msic: Use DEFINE_RES_IRQ() macro
  mfd: motorola-cpcap: Add audio-codec support
  mfd: mc13xxx-core: Fix PMIC shutdown when reading ADC values
  mfd: madera: Remove unused forward reference
  mfd: max77620: Convert to using %pOFn instead of device_node.name
  mfd: madera: Don't use regmap_read_poll_timeout to poll for BOOT_DONE
  ...
2018-10-25 06:19:15 -07:00
Linus Torvalds 50b825d7e8 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:

 1) Add VF IPSEC offload support in ixgbe, from Shannon Nelson.

 2) Add zero-copy AF_XDP support to i40e, from Björn Töpel.

 3) All in-tree drivers are converted to {g,s}et_link_ksettings() so we
    can get rid of the {g,s}et_settings ethtool callbacks, from Michal
    Kubecek.

 4) Add software timestamping to veth driver, from Michael Walle.

 5) More work to make packet classifiers and actions lockless, from Vlad
    Buslov.

 6) Support sticky FDB entries in bridge, from Nikolay Aleksandrov.

 7) Add ipv6 version of IP_MULTICAST_ALL sockopt, from Andre Naujoks.

 8) Support batching of XDP buffers in vhost_net, from Jason Wang.

 9) Add flow dissector BPF hook, from Petar Penkov.

10) i40e vf --> generic iavf conversion, from Jesse Brandeburg.

11) Add NLA_REJECT netlink attribute policy type, to signal when users
    provide attributes in situations which don't make sense. From
    Johannes Berg.

12) Switch TCP and fair-queue scheduler over to earliest departure time
    model. From Eric Dumazet.

13) Improve guest receive performance by doing rx busy polling in tx
    path of vhost networking driver, from Tonghao Zhang.

14) Add per-cgroup local storage to bpf

15) Add reference tracking to BPF, from Joe Stringer. The verifier can
    now make sure that references taken to objects are properly released
    by the program.

16) Support in-place encryption in TLS, from Vakul Garg.

17) Add new taprio packet scheduler, from Vinicius Costa Gomes.

18) Lots of selftests additions, too numerous to mention one by one here
    but all of which are very much appreciated.

19) Support offloading of eBPF programs containing BPF to BPF calls in
    nfp driver, frm Quentin Monnet.

20) Move dpaa2_ptp driver out of staging, from Yangbo Lu.

21) Lots of u32 classifier cleanups and simplifications, from Al Viro.

22) Add new strict versions of netlink message parsers, and enable them
    for some situations. From David Ahern.

23) Evict neighbour entries on carrier down, also from David Ahern.

24) Support BPF sk_msg verdict programs with kTLS, from Daniel Borkmann
    and John Fastabend.

25) Add support for filtering route dumps, from David Ahern.

26) New igc Intel driver for 2.5G parts, from Sasha Neftin et al.

27) Allow vxlan enslavement to bridges in mlxsw driver, from Ido
    Schimmel.

28) Add queue and stack map types to eBPF, from Mauricio Vasquez B.

29) Add back byte-queue-limit support to r8169, with all the bug fixes
    in other areas of the driver it works now! From Florian Westphal and
    Heiner Kallweit.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (2147 commits)
  tcp: add tcp_reset_xmit_timer() helper
  qed: Fix static checker warning
  Revert "be2net: remove desc field from be_eq_obj"
  Revert "net: simplify sock_poll_wait"
  net: socionext: Reset tx queue in ndo_stop
  net: socionext: Add dummy PHY register read in phy_write()
  net: socionext: Stop PHY before resetting netsec
  net: stmmac: Set OWN bit for jumbo frames
  arm64: dts: stratix10: Support Ethernet Jumbo frame
  tls: Add maintainers
  net: ethernet: ti: cpsw: unsync mcast entries while switch promisc mode
  octeontx2-af: Support for NIXLF's UCAST/PROMISC/ALLMULTI modes
  octeontx2-af: Support for setting MAC address
  octeontx2-af: Support for changing RSS algorithm
  octeontx2-af: NIX Rx flowkey configuration for RSS
  octeontx2-af: Install ucast and bcast pkt forwarding rules
  octeontx2-af: Add LMAC channel info to NIXLF_ALLOC response
  octeontx2-af: NPC MCAM and LDATA extract minimal configuration
  octeontx2-af: Enable packet length and csum validation
  octeontx2-af: Support for VTAG strip and capture
  ...
2018-10-24 06:47:44 +01:00
Gustavo A. R. Silva 81fa7a69c2 dt-bindings: phy: Update SERDES_MAX to be SERDES_MAX + 1
SERDES_MAX is a valid value to index ctrl->phys in
drivers/phy/mscc/phy-ocelot-serdes.c. But, currently,
there is an out-of-bounds bug in the mentioned driver
when reading from ctrl->phys, because the size of
array ctrl->phys is SERDES_MAX.

Partially fix this by updating SERDES_MAX to be SERDES6G_MAX + 1.

Notice that this is the first part of the solution to
the out-of-bounds bug mentioned above. Although this
change is not dependent on any other one.

Suggested-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-22 19:27:14 -07:00
Stephen Boyd 1578968f77 Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and 'clk-smp2s11-match' into clk-next
- iMX6 MMDC clks
  - Qualcomm Krait CPU clk support

* clk-imx6-mmdc:
  clk: imx6q: add mmdc0 ipg clock
  clk: imx6sl: add mmdc ipg clocks
  clk: imx6sll: add mmdc1 ipg clock
  clk: imx6sx: add mmdc1 ipg clock
  clk: imx6ul: add mmdc1 ipg clock

* clk-qcom-krait:
  clk: qcom: Add safe switch hook for krait mux clocks
  dt-bindings: clock: Document qcom,krait-cc
  clk: qcom: Add Krait clock controller driver
  dt-bindings: arm: Document qcom,kpss-gcc
  clk: qcom: Add KPSS ACC/GCC driver
  clk: qcom: Add support for Krait clocks
  clk: qcom: Add IPQ806X's HFPLLs
  clk: qcom: Add MSM8960/APQ8064's HFPLLs
  dt-bindings: clock: Document qcom,hfpll
  clk: qcom: Add HFPLL driver
  clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
  ARM: Add Krait L2 register accessor functions

* clk-rockchip:
  clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call
  clk: rockchip: use the newly added clock-id for hdmi on RK3066
  clk: rockchip: add clock-id for HCLK_HDMI on rk3066
  clk: rockchip: fix wrong mmc sample phase shift for rk3328
  clk: rockchip: improve rk3288 pll rates for better hdmi output

* clk-smp2s11-match:
  clk: s2mps11: Add used attribute to s2mps11_dt_match
  clk: s2mps11: Fix matching when built as module and DT node contains compatible
2018-10-18 15:44:01 -07:00
Stephen Boyd 1fe7c040b6 Merge branches 'clk-actions-reset', 'clk-imx7-init-critical', 'clk-mmp2-ids' and 'clk-at91-pmc-rework' into clk-next
- Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs
 - Rework at91 PMC clock driver for new DT bindings

* clk-actions-reset:
  clk: actions: Add Actions Semi S900 SoC Reset Management Unit support
  clk: actions: Add Actions Semi S700 SoC Reset Management Unit support
  clk: actions: Add Actions Semi Owl SoCs Reset Management Unit support
  dt-bindings: reset: Add binding constants for Actions Semi S900 RMU
  dt-bindings: reset: Add binding constants for Actions Semi S700 RMU
  dt-bindings: clock: Add reset controller bindings for Actions Semi Owl SoCs
  clk: actions: Cache regmap info in private clock descriptor

* clk-imx7-init-critical:
  clk: imx7d: remove CLK_IS_CRITICAL flag for arm_a7_root_clk
  clk: imx: cpu clock should be always critical
  clk: imx: imx7d: remove clks_init_on array
  clk: imx: imx7d: remove unnecessary clocks from clks_init_on array

* clk-mmp2-ids:
  clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk

* clk-at91-pmc-rework:
  clk: at91: move DT compatibility code to its own file
  clk: at91: add at91sam9rl PMC driver
  clk: at91: add at91sam9x5 PMCs driver
  clk: at91: add at91sam9260 PMC driver
  clk: at91: add sama5d2 PMC driver
  clk: at91: add sama5d4 pmc driver
  clk: at91: add new DT lookup function
  dt-bindings: clk: at91: Document new PMC binding
  clk: at91: add pmc_data struct and helpers
  clk: at91: allow clock registration from C code
  clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated()
  clk: at91: audio-pll: separate registration from DT parsing
  clk: at91: h32mx: separate registration from DT parsing
  clk: at91: generated: SSCs don't have a gclk
  clk: at91: audio-pll: fix audio pmc type
2018-10-18 15:43:48 -07:00
Stephen Boyd 19ef24654f Merge branch 'clk-ingenic-jz4725b' into clk-next
- Ingenic jz4725b CGU

* clk-ingenic-jz4725b:
  clk: Add Ingenic jz4725b CGU driver
  dt-bindings: clock: Add jz4725b-cgu.h header
  dt-bindings: clock: ingenic: Explicitly list compatible strings
  clk: ingenic: Add proper Kconfig entries
2018-10-18 15:43:24 -07:00
Stephen Boyd fa4c0e4903 Merge branch 'clk-qcom-qcs404' into clk-next
- Qualcomm QCS404 GCC support

* clk-qcom-qcs404:
  clk: qcom: gcc: Add global clock controller driver for QCS404
  clk: qcom: Export clk_alpha_pll_configure()
2018-10-18 15:42:42 -07:00
Stephen Boyd 37163726e1 Merge branch 'clk-qcom-sdm660' into clk-next
- Qualcomm SDM660 GCC support

* clk-qcom-sdm660:
  clk: qcom: gcc-sdm660: Add MODULE_LICENSE
  clk: qcom: Add Global Clock controller (GCC) driver for SDM660
2018-10-18 15:41:51 -07:00
Stephen Boyd ffd3b1c880 Merge branches 'clk-samsung', 'clk-hisi3670' and 'clk-at91-div-0' into clk-next
- Hisilicon 3670 SoC support

* clk-samsung:
  dt-bindings: clock: samsung: Add SPDX license identifiers
  clk: samsung: Use clk_hw API for calling clk framework from clk notifiers
  clk: samsung: exynos5420: Enable PERIS clocks for suspend
  clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420
  clk: samsung: exynos5433: Keep sclk_uart clocks enabled in suspend
  clk: samsung: Remove obsolete code for Exynos4412 ISP clocks
  clk: samsung: exynos5433: Add suspend state for TOP, CPIF & PERIC CMUs
  clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resume
  clk: samsung: exynos5420: Use generic helper for handling suspend/resume
  clk: samsung: exynos4: Use generic helper for handling suspend/resume
  clk: samsung: Add support for setting registers state before suspend
  clk: samsung: exynos5250: Use generic helper for handling suspend/resume
  clk: samsung: s5pv210: Use generic helper for handling suspend/resume
  clk: samsung: s3c64xx: Use generic helper for handling suspend/resume
  clk: samsung: s3c2443: Use generic helper for handling suspend/resume
  clk: samsung: s3c2412: Use generic helper for handling suspend/resume
  clk: samsung: s3c2410: Use generic helper for handling suspend/resume
  clk: samsung: Remove excessive include

* clk-hisi3670:
  clk: hisilicon: Add clock driver for Hi3670 SoC
  dt-bindings: clk: hisilicon: Add bindings for Hi3670 clk

* clk-at91-div-0:
  clk: at91: Fix division by zero in PLL recalc_rate()
2018-10-18 15:41:36 -07:00
Stephen Boyd 8a69f1d470 Merge branch 'clk-ti' into clk-next
* clk-ti:
  clk: ti: Prepare for remove of OF node name
  clk: Clean up suspend/resume coding style
  clk: ti: Add functions to save/restore clk context
  clk: clk: Add clk_gate_restore_context function
  clk: Add functions to save/restore clock context en-masse
  clk: ti: dra7: add new clkctrl data
  clk: ti: dra7xx: rename existing clkctrl data as compat data
  clk: ti: am43xx: add new clkctrl data for am43xx
  clk: ti: am43xx: rename existing clkctrl data as compat data
  clk: ti: am33xx: add new clkctrl data for am33xx
  clk: ti: am33xx: rename existing clkctrl data as compat data
  clk: ti: clkctrl: replace dashes from clkdm name with underscore
  clk: ti: clkctrl: support multiple clkctrl nodes under a cm node
  dt-bindings: clock: dra7xx: add clkctrl indices for new data layout
  dt-bindings: clock: am43xx: add clkctrl indices for new data layout
  dt-bindings: clock: am33xx: add clkctrl indices for new data layout
2018-10-18 15:41:21 -07:00
Stephen Boyd cd8ca30052 Merge branches 'clk-mvebu-periph-pm', 'clk-meson', 'clk-allwinner', 'clk-mvebu-dup' and 'clk-davinci' into clk-next
- S2RAM support for Marvell mvebu periph clks

* clk-mvebu-periph-pm:
  clk: mvebu: armada-37xx-periph: add suspend/resume support
  clk: mvebu: armada-37xx-periph: save the IP base address in the driver data

* clk-meson:
  clk: meson: meson8b: use the regmap in the internal reset controller
  clk: meson: meson8b: register the clock controller early
  clk: meson-axg: pcie: drop the mpll3 clock parent
  clk: meson: axg: round audio system master clocks down
  clk: meson: clk-pll: drop hard-coded rates from pll tables
  clk: meson: clk-pll: remove od parameters
  clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary
  clk: meson: clk-pll: add enable bit

* clk-allwinner:
  dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro
  clk: sunxi-ng: a64: Add max. rate constraint to video PLLs
  clk: sunxi-ng: a64: Add minimal rate for video PLLs
  clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks
  clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs
  clk: sunxi-ng: nkmp: Add constraint for maximum rate
  clk: sunxi-ng: r40: Add max. rate constraint to video PLLs
  clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-video
  clk: sunxi-ng: Add maximum rate constraint to NM PLLs
  clk: sunxi-ng: h6: fix PWM gate/reset offset
  clk: sunxi-ng: h6: fix bus clocks' divider position

* clk-mvebu-dup:
  clk: mvebu: ap806: Remove superfluous of_clk_add_provider

* clk-davinci:
  clk: davinci: kill davinci_clk_reset_assert/deassert()
2018-10-18 15:39:08 -07:00
Stephen Boyd 5d3a48fe2c Merge branches 'clk-qcom-sdm845-camcc' and 'clk-mtk-unused' into clk-next
- Qualcomm SDM845 camera clock controller

* clk-qcom-sdm845-camcc:
  clk: qcom: Add camera clock controller driver for SDM845
  dt-bindings: clock: Introduce QCOM Camera clock bindings

* clk-mtk-unused:
  clk: mediatek: remove unused array audio_parents
2018-10-18 15:39:01 -07:00
Stephen Boyd faff3d8e85 Merge branch 'clk-renesas' into clk-next
* clk-renesas: (36 commits)
  clk: renesas: r7s9210: Add SPI clocks
  clk: renesas: r7s9210: Move table update to separate function
  clk: renesas: r7s9210: Convert some clocks to early
  clk: renesas: cpg-mssr: Add early clock support
  clk: renesas: r8a77970: Add TPU clock
  clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment
  dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0
  clk: renesas: cpg-mssr: Add r8a774c0 support
  clk: renesas: Add r8a774c0 CPG Core Clock Definitions
  clk: renesas: r8a7743: Add r8a7744 support
  clk: renesas: Add r8a7744 CPG Core Clock Definitions
  dt-bindings: clock: renesas: cpg-mssr: Document r8a7744 binding
  dt-bindings: clock: renesas: Convert to SPDX identifiers
  clk: renesas: cpg-mssr: Add R7S9210 support
  clk: renesas: r8a77970: Add TMU clocks
  clk: renesas: r8a77970: Add CMT clocks
  clk: renesas: r9a06g032: Fix UART34567 clock rate
  clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI
  clk: renesas: r8a77980: Add CMT clocks
  clk: renesas: r8a77990: Add missing I2C7 clock
  ...
2018-10-18 15:38:51 -07:00
Stephen Boyd 1affdc35e0 Merge branches 'clk-spdx', 'clk-qcom-dfs', 'clk-smp2s11-include', 'clk-qcom-8996-missing' and 'clk-qcom-qspi' into clk-next
- Tag various drivers with SPDX license tags
  - Support dynamic frequency switching (DFS) on qcom SDM845 GCC
  - Only use s2mps11 dt-binding defines instead of redefining them in the driver
  - Add some more missing clks to qcom MSM8996 GCC
  - Quad SPI clks on qcom SDM845

* clk-spdx:
  clk: mvebu: use SPDX-License-Identifier
  clk: renesas: Convert to SPDX identifiers
  clk: renesas: use SPDX identifier for Renesas drivers
  clk: s2mps11,s3c64xx: Add SPDX license identifiers
  clk: max77686: Add SPDX license identifiers

* clk-qcom-dfs:
  clk: qcom: Allocate space for NULL terimation in DFS table
  clk: qcom: gcc: Register QUPv3 RCGs for DFS on SDM845
  clk: qcom: Add support for RCG to register for DFS

* clk-smp2s11-include:
  clk: s2mps11: Use existing defines from bindings for clock IDs

* clk-qcom-8996-missing:
  clk: qcom: Add some missing gcc clks for msm8996

* clk-qcom-qspi:
  clk: qcom: Add qspi (Quad SPI) clocks for sdm845
  clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header
2018-10-18 15:33:28 -07:00
Stephen Boyd 72ad720795 clk: qcom: Add MSM8960/APQ8064's HFPLLs
Describe the HFPLLs present on MSM8960 and APQ8064 devices.

Acked-by: Rob Herring <robh@kernel.org> (bindings)
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:14:45 -07:00
Anson Huang 341ce3563e clk: imx6q: add mmdc0 ipg clock
i.MX6Q has MMDC0 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:16:02 -07:00
Anson Huang 09d47620d0 clk: imx6sl: add mmdc ipg clocks
i.MX6SL has MMDC0 and MMDC1 ipg clock in CCM CCGR, add them into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:15:51 -07:00
Anson Huang aac7ff2048 clk: imx6sll: add mmdc1 ipg clock
i.MX6SLL has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:15:44 -07:00
Anson Huang 891f30bf60 clk: imx6sx: add mmdc1 ipg clock
i.MX6SX has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:15:32 -07:00
Anson Huang acc4f98d44 clk: imx6ul: add mmdc1 ipg clock
i.MX6UL has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:15:20 -07:00
Alexandre Belloni d387ff5427 clk: at91: add new DT lookup function
Add a new DT lookup function to lookup for PMC clocks.

Note that the #ifndef AT91_PMC_MOSCS section will be removed once all the
platforms are converted.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:44:33 -07:00
Paul Cercueil 2fdecde775 dt-bindings: clock: Add jz4725b-cgu.h header
This will be used from the devicetree bindings to specify the clocks
that should be obtained from the jz4725b-cgu driver.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 15:19:43 -07:00
Shefali Jain 652f1813c1 clk: qcom: gcc: Add global clock controller driver for QCS404
Add the clocks supported in global clock controller which clock the
peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks
to the clock framework for the clients to be able to request for them.

Signed-off-by: Shefali Jain <shefjain@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Co-developed-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Anu Ramanathan <anur@codeaurora.org>
[bamse, vkoul: rebase and tidyup for upstream]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Lowercase hex]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 15:13:54 -07:00
Taniya Das f2a76a2955 clk: qcom: Add Global Clock controller (GCC) driver for SDM660
Add support for the global clock controller found on SDM660
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Based on CAF implementation.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
[craig: rename parents to fit upstream, and other cleanups]
Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Rename gcc_660 to gcc_sdm660 and fix numbering of
defines to avoid duplicates]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 15:06:43 -07:00
Manivannan Sadhasivam 3b6b13ede0 dt-bindings: clk: hisilicon: Add bindings for Hi3670 clk
Add devicetree bindings for HiSilicon Hi3670 clock controller.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 14:46:56 -07:00
Manivannan Sadhasivam a35bcf7c7f dt-bindings: reset: Add binding constants for Actions Semi S900 RMU
Add device tree binding constants for Actions Semi S900 SoC Reset
Management Unit (RMU).

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 14:41:15 -07:00
Manivannan Sadhasivam 73a5e67efa dt-bindings: reset: Add binding constants for Actions Semi S700 RMU
Add device tree binding constants for Actions Semi S700 SoC Reset
Management Unit (RMU).

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 14:41:01 -07:00
Krzysztof Kozlowski 40970f7a43 dt-bindings: thermal: samsung: Add SPDX license identifier
Replace GPL license statement with SPDX license identifier (GPL-2.0+).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-10-15 13:35:45 -05:00
Krzysztof Kozlowski cd9102e9ad dt-bindings: clock: samsung: Add SPDX license identifiers
Replace GPL license statements with SPDX license identifiers (GPL-2.0).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-10-15 13:35:00 -05:00
Heiko Stuebner 5f697a0e31 clk: rockchip: add clock-id for HCLK_HDMI on rk3066
RK3066 and RK3188 share most of the clock controller but the rk3066 does
have an internal hdmi encoder and associated clock. Therefore add a
clock-id so that this clock can be used.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-10-11 14:57:25 +02:00
Arnd Bergmann e4c080a10a arm64: zynqmp: SoC CLK changes for v4.20
This patchset adds CCF compliant clock driver for ZynqMP.
 Clock driver queries supported clock information from firmware
 and regiters pll and output clocks with CCF.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlu8k7oACgkQykllyylKDCFmPACfewJHUsKUhaX77Ew+Pup5tFzC
 GHgAn1Xb2fJF+9D4CSB+iwdQNPltuhBg
 =QShK
 -----END PGP SIGNATURE-----

Merge tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx into next/drivers

arm64: zynqmp: SoC CLK changes for v4.20

This patchset adds CCF compliant clock driver for ZynqMP.
Clock driver queries supported clock information from firmware
and regiters pll and output clocks with CCF.

* tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx:
  drivers: clk: Add ZynqMP clock driver
  dt-bindings: clock: Add bindings for ZynqMP clock driver
  firmware: xilinx: Add zynqmp IOCTL API for device control
  Documentation: xilinx: Add documentation for eemi APIs

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-10 13:47:06 +02:00
Arnd Bergmann f7d87826fe Reset controller changes for v4.20
This adds a new driver for the PDC Global (Power Domain Controller)
 reset controller found on Qualcomm SDM845 SoCs, fixes a potential
 use-after-free issue in reset_controller_dev.of_xlate() callbacks
 from __of_reset_control_get(), and trivially fixes a documentation
 grammar issue.
 -----BEGIN PGP SIGNATURE-----
 
 iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCW7x5rhcccC56YWJlbEBw
 ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwDy9AP9Z7aMOwFUB0ie3RtL3TVdKq0dg
 ayIYm+iKAlWjiwvr5wD/XuHhygmuY3uDyvTaQP3yoWsQe5+/ugg606Shcxe4EQE=
 =+kaf
 -----END PGP SIGNATURE-----

Merge tag 'reset-for-4.20' of git://git.pengutronix.de/git/pza/linux into next/drivers

Reset controller changes for v4.20

This adds a new driver for the PDC Global (Power Domain Controller)
reset controller found on Qualcomm SDM845 SoCs, fixes a potential
use-after-free issue in reset_controller_dev.of_xlate() callbacks
from __of_reset_control_get(), and trivially fixes a documentation
grammar issue.

* tag 'reset-for-4.20' of git://git.pengutronix.de/git/pza/linux:
  reset: Fix potential use-after-free in __of_reset_control_get()
  reset: qcom: PDC Global (Power Domain Controller) reset controller
  dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
  reset: Grammar s/more then once/more than once/

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-10 13:41:22 +02:00
Linus Walleij b0b378acde pinctrl: sh-pfc: Updates for v4.20 (take three)
- Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033)
     SoCs,
   - Add INTC-EX pin groups on R-Car E3.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCW7dQmQAKCRCKwlD9ZEnx
 cB04AQCj1PoCEotqH9TGaGeVXal35LUMP279vz3HoJweY0DF2AD/QKd/jC2mHz/c
 EypfJAvBvckw9AsdfNSacrCIdMNg7gE=
 =gtgr
 -----END PGP SIGNATURE-----

Merge tag 'sh-pfc-for-v4.20-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.20 (take three)

  - Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033)
    SoCs,
  - Add INTC-EX pin groups on R-Car E3.
2018-10-10 11:15:33 +02:00
Rajan Vaja 26372d0973 dt-bindings: clock: Add bindings for ZynqMP clock driver
Add documentation to describe Xilinx ZynqMP clock driver
bindings.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-09 13:26:34 +02:00
Quentin Schulz 9494a6c2e4 dt-bindings: net: vsc8531: add two additional LED modes for VSC8584
The VSC8584 (and most likely other PHYs in the same generation) has two
additional LED modes that can be picked, so let's add them.

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-08 10:31:27 -07:00
Quentin Schulz b68fc09be4 dt-bindings: add constants for Microsemi Ocelot SerDes driver
The Microsemi Ocelot has multiple SerDes and requires that the SerDes be
muxed accordingly to the hardware representation.

Let's add a constant for each SerDes available in the Microsemi Ocelot.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-05 14:36:44 -07:00
Krzysztof Kozlowski 9dbcfe1ace dt-bindings: clock: samsung: Add SPDX license identifiers
Replace GPL license statements with SPDX license identifiers (GPL-2.0).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sylwester Nawrocki <snawrocki@kernel.org>
2018-10-05 13:36:40 +02:00
Marek Szyprowski fa34efff75 clk: samsung: Remove obsolete code for Exynos4412 ISP clocks
Exynos4412 ISP clock are provided by separate Exynos4412 ISP clock
driver, so support for them in Exynos4-clk driver can be removed.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <snawrocki@kernel.org>
2018-10-05 13:36:35 +02:00
Leonard Crestez de24832709 reset: imx7: Add PCIE_CTRL_APPS_TURNOFF
This is required for the imx pci driver to send the PME_Turn_Off TLP.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
2018-10-05 09:56:19 +01:00
Sibi Sankar 032f11638f dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
Add PDC Global (Power Domain Controller) binding for SDM845 SoCs.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-10-05 10:33:28 +02:00
Tero Kristo 8fa4509579 dt-bindings: clock: dra7xx: add clkctrl indices for new data layout
The new data layout will be split based on clockdomain boundaries, instead
of CM boundaries. This introduces a few new clkctrl providers, that have
different indices for the clkctrl data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
2018-10-03 15:02:26 +03:00
Tero Kristo 8cfbdbd969 dt-bindings: clock: am43xx: add clkctrl indices for new data layout
The new data layout will be split based on clockdomain boundaries, instead
of CM boundaries. This introduces a few new clkctrl providers, that have
different indices for the clkctrl data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
2018-10-03 15:02:26 +03:00
Tero Kristo e358cf2e6e dt-bindings: clock: am33xx: add clkctrl indices for new data layout
The new data layout will be split based on clockdomain boundaries, instead
of CM boundaries. This introduces a few new clkctrl providers, that have
different indices for the clkctrl data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
2018-10-03 15:02:26 +03:00
Phil Edworthy d6381fbbf2 dt-bindings: pinctrl: renesas,rzn1-pinctrl: documentation
The Renesas RZ/N1 device family PINCTRL node description.

Based on a patch originally written by Michel Pollet at Renesas.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-10-02 12:16:39 +02:00
Arnd Bergmann 6a11b1804a Actions Semi arm64 based SoC DT for v4.20
This updates SPDX headers for remaining files.
 
 For S900 it adds clock, pinctrl, i2c and dma nodes.
 S900 SPS is added via topic branch (shared with driver).
 
 For S700 it adds clock nodes.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEF08DRxvMIhphdW+W+i7RLT5+AT8FAluxCgERHGFmYWVyYmVy
 QHN1c2UuZGUACgkQ+i7RLT5+AT/nFA/+Iz3ut7PQddWvw0RQF9IG93Z8PwWDqDxu
 Rf0yDMeD3UJOMR35U0VAEK2rIOKxIMi82oc+rVMtGegSAaffHPuXIArhVazw+woZ
 blc6BHf1e9Ml1YRqBOGkuLQw79iV/vXtwafa/jPtX2rNfazjc/075s42ZW03wmur
 +nM3pCXrMDe0eGPW+t8I7yzFFpvAqLF3FcgV9R7M+Orb/47RuscGnbCpy+K1gip4
 F2ZxyXzna7/BypMpJQ63jqtE4Q7FDbhU0kb//tJtbjEHv+UxW7Zkj2Kew7YQxJDP
 GWIzPAcUmQm/Fyw59ViPKP2uN/HTe/vwnS2RhYm9tO80+rLA4J+Q/IWCWajYKaIv
 uYvw50I6ky7a1TuaCko1XCgZVG2gmplXxcnEQ+vFW/x6mRg9Chy3DRNe63O2ufZM
 JaoNE7gkIa4ezMBBOh5whUwGDlOlUNdQasGRpfPhOLU6bM9RtEgyX+U4FZpSSimr
 K7CdjfFezcYvI/9/C94et9CmBkgrDZMS83QEX/8/SH5TT9tad4JGrd5yMWXSovfX
 Z2PvIll2vdpIxBlENDBLDAjMBgtLd3S7iArIqZi0ngEb47rF8lTDpBBWfeWytZjr
 qGRPZOh8RmN23olgYWlWqER2zsNwwKwWXZ6zoOQx/HVz9hfPzkBh14XzJv+cV+H4
 ExkboNvlHTs=
 =CRn3
 -----END PGP SIGNATURE-----

Merge tag 'actions-arm64-dt-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/dt

Actions Semi arm64 based SoC DT for v4.20

This updates SPDX headers for remaining files.

For S900 it adds clock, pinctrl, i2c and dma nodes.
S900 SPS is added via topic branch (shared with driver).

For S700 it adds clock nodes.

* tag 'actions-arm64-dt-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
  arm64: dts: actions: s700: Set UART clock references from CMU
  arm64: dts: actions: s700: Add Clock Management Unit
  arm64: dts: actions: s900: Add DMA Controller
  arm64: dts: actions: s900-bubblegum-96: Enable I2C1 and I2C2
  arm64: dts: actions: s900: Add I2C controller nodes
  arm64: dts: actions: s900-bubblegum-96: Add gpio line names
  arm64: dts: actions: s900: Add gpio properties to pinctrl node
  arm64: dts: actions: s900: Add pinctrl node
  arm64: dts: actions: s900: Add SPS node
  arm64: dts: actions: s900: Source CMU clock for UARTs
  arm64: dts: actions: s900: Add Clock Management Unit nodes
  dt-bindings: power: Add Actions Semi S900 SPS
  arm64: dts: actions: Convert to new-style SPDX license identifiers

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-02 11:19:36 +02:00
Arnd Bergmann 68b679b339 Actions Semi SoC drivers for v4.20 #2
The SPS power domain driver is extended for S900 SoC.
 This required merging a topic branch for the new bindings header.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEF08DRxvMIhphdW+W+i7RLT5+AT8FAluxDmkRHGFmYWVyYmVy
 QHN1c2UuZGUACgkQ+i7RLT5+AT+ryxAAk6dVEaVoyoY1CSR3oAZXQ5EF75zp9GY9
 4YYLg95WzUd/JX+9dzWlOy4L95Rx+E1nLoOQQQiI9Z7AIkgsm75n5qWB9PRFzHQN
 oH37uyRReet25eLijK7rzt5mRf82XFKnA10J2Efdot/STVrrfnb7kJ0Moyp5eQre
 MeuifSRP0to7NKhpCnvuxmKkwQeYY+SexPFOH/yJj3q2lKWbqH8bJWRxk6h79yv3
 cc2u+JfQ/7VhMFsHTfEnJeeQKIJJ/qYmXsGeSkWnl1NMonKAcsP4WeI3ebKhV1bl
 gJtNVEEFQnVUGiWVdcHPE22nj9M2fhrF2WIU+EOlsIjaRspaRdi8Saa2Qxgiq5D3
 bFRFgAl6waCe+iuJBmMuTus14qt2WkBP5I4aS8JBli/JnftfiSUcV2yySMA4nNlj
 e7RDX71aF/qMZWxITbNHwV/Kj9DJESjbb54tegdL4qYbLtwCUYmvPqlmsYNXLRpp
 0KPyWeqgSTY6aDsJm4ksdvzLXAWcae7Bqtz5Od+CZ77l24N2yuoSDymbs2LoHIVa
 nQgCMCog3B2rO3WTR1TLxGKFrCa6Itv8HsU6qxj+0m2ff/KGEZokgOU2hK3t6xxW
 YoI/+bLpuiaSzRDy0EGjyC4XN9Hz8AzN39bUIO2PxQM2UuG5aE6uqTlk/ahi6zpO
 0fHImgLwewc=
 =W/nr
 -----END PGP SIGNATURE-----

Merge tag 'actions-drivers+s900-sps-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/drivers

Actions Semi SoC drivers for v4.20 #2

The SPS power domain driver is extended for S900 SoC.
This required merging a topic branch for the new bindings header.

* tag 'actions-drivers+s900-sps-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
  soc: actions: sps: Add S900 power domains
  dt-bindings: power: Add Actions Semi S900 SPS
  soc: actions: Update SPS help text for S700
  soc: actions: Convert to SPDX license identifiers

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-02 10:02:59 +02:00
Manivannan Sadhasivam d1ca7c56e1 dt-bindings: power: Add Actions Semi S900 SPS
Define power domains for Actions Semi S900 SoC Smart Power System (SPS).

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2018-09-30 16:22:50 +02:00
Arnd Bergmann 86e762d967 Renesas ARM Based SoC Drivers Updates for v4.20
* Convert to SPDX identifiers
 * R-Car V3M (r8a77970) and V3H (r8a77980): Document Timer Unit (TMU) bindings
 * RZ/G1N (r8a7744) and RZ/G1C (r8a77470) SoCs:
   - Document APMU and SMP enable method
 * RZ/G2M (r8a74a1), RZ/G1N (r8a7744) and RZ/G2E (r8a774c0) SoCs:
   - Add reset support
   - Add sysc support
 * RZ/G2M (r8a774a1), RZ/G2E (r8a774c0) and RZ/A2M (r7s9210) SoCs:
   - Add support for identifying SoC
 * RZ/A2M (r7s9210) SoC:
   - Add basic SoC setup support
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlut+z8ACgkQ189kaWo3
 T77MKw//QZ0pTNuUk0+SRFesyX+C7nKYhm6mGlANEHUCJH3JUxosunxnGFBYw4+k
 8Dx1ffAEZ4c7LQ8cUDm8UjLsfJvMCd1bjHtwi0Ps010UVnGzBTnwkZqP1Won5okq
 I5jpCvMxYsDmq+vm2ODkBNukaqUpG12kYbpw1pJdZrvt1I/BDikkdDPSepSmwrJg
 UdP04PQvUsf2025NdCW7SRdy0qetKvX4bebIbXcY+xF5h1XVeDgL+60yM6SrKAxX
 g55Lb8O6OupucEeRmUV5TCRTKOLxp3AhEqNhG3YpVQsCJ70USCRYwYWWwBDfvbxl
 E4QRIFHFkFIoxm/ZRE3lwJx9pxtnsYo62oWQJnr0Beblz4qmuFnksQ3kPsCkTffo
 +AfjW/hEr424rTV3Q2VvPunSsd9KQYu1skCWSGA841Mlpjq4ACeYDHvCZXrodfqC
 FLTCk5N+pma2kr6CfJjHCWFgPiVtvV32Cyhrp/nwGdLa64e263yjj0IdStXt92Ph
 s5ZmIdX8Xv8MAYc5m9HmIOzUuzj9gUW1JwEZWR2zw1z6V6n7MKvLaEo+W2I51BuU
 hAoWPvuLsxaAHt28JfLJxQt2OAqcIztIu34uIKAK068MbbB6L2cxZG1LC7mkDi56
 viNsuf6ZNGTAW2wADMy46tJ2L5K6kzJPDnf2JAiDBwayiM8vM+M=
 =yxj4
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Renesas ARM Based SoC Drivers Updates for v4.20

* Convert to SPDX identifiers
* R-Car V3M (r8a77970) and V3H (r8a77980): Document Timer Unit (TMU) bindings
* RZ/G1N (r8a7744) and RZ/G1C (r8a77470) SoCs:
  - Document APMU and SMP enable method
* RZ/G2M (r8a74a1), RZ/G1N (r8a7744) and RZ/G2E (r8a774c0) SoCs:
  - Add reset support
  - Add sysc support
* RZ/G2M (r8a774a1), RZ/G2E (r8a774c0) and RZ/A2M (r7s9210) SoCs:
  - Add support for identifying SoC
* RZ/A2M (r7s9210) SoC:
  - Add basic SoC setup support

* tag 'renesas-drivers-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (21 commits)
  dt-bindings: apmu: Document r8a7744 support
  dt-bindings: timer: renesas: tmu: document R8A779{7|8}0 bindings
  dt-bindings: apmu: Document r8a77470 support
  soc: renesas: rcar-rst: Add support for RZ/G1N
  dt-bindings: reset: rcar-rst: Document r8a7744 reset module
  soc: renesas: rcar-sysc: Add r8a7744 support
  dt-bindings: power: rcar-sysc: Add r8a7744 power domain index macros
  dt-bindings: power: rcar-sysc: Document r8a7744 SYSC binding
  soc: renesas: rcar-rst: Add support for RZ/G2E
  dt-bindings: reset: rcar-rst: Document r8a774c0 rst
  soc: renesas: rcar-sysc: Add r8a774c0 support
  dt-bindings: power: rcar-sysc: Document r8a774c0 sysc
  dt-bindings: power: Add r8a774c0 SYSC power domain definitions
  soc: renesas: Identify RZ/G2E
  soc: renesas: convert to SPDX identifiers
  soc: renesas: rcar-rst: Add support for RZ/G2M
  soc: renesas: rcar-sysc: Add r8a774a1 support
  dt-bindings: power: Add r8a774a1 SYSC power domain definitions
  soc: renesas: identify RZ/A2
  ARM: shmobile: Add basic RZ/A2 SoC support
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-09-28 22:16:58 +02:00
Adam Thomson 63f59b73e8 dt-bindings: connector: Add support for USB-PD PPS APDOs to bindings
Add support for PPS APDOs to connector bindings so a port controller
can specify support for PPS, as per existing FIXED/BATT/VAR PDOs.

Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-09-20 12:56:02 +02:00
Fabrizio Castro 0acb6b53df clk: renesas: Add r8a774c0 CPG Core Clock Definitions
Add all RZ/G2E (a.k.a. R8A774C0) Clock Pulse Generator Core
Clock Outputs, as listed in Table 8.2g ("List of Clocks
[RZ/G2E]") of the RZ/G2 Hardware User's Manual.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-19 16:41:00 +02:00
Biju Das 6ff9cb53da clk: renesas: Add r8a7744 CPG Core Clock Definitions
Add all RZ/G1N Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2b ("List of Clocks [RZ/G1M/N]") of the RZ/G1 Hardware User's
Manual.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-19 16:37:56 +02:00
Kuninori Morimoto 5d169ce737 dt-bindings: clock: renesas: Convert to SPDX identifiers
This patch updates license to use SPDX-License-Identifier
instead of verbose license text on Renesas related headers.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-19 16:33:10 +02:00
Biju Das 841e37a5ca dt-bindings: power: rcar-sysc: Add r8a7744 power domain index macros
Add power domain indices for RZ/G1N (R8A7744) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-17 10:30:37 +02:00
Fabrizio Castro cb391265bc dt-bindings: power: Add r8a774c0 SYSC power domain definitions
This patch adds power domain indices for RZ/G2E.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-14 15:28:41 +02:00
Greg Kroah-Hartman 4b55dce8b0 1st round of IIO new device support, features and cleanups in the 4.20 cycle.
There is a merge commit in here to pull in regmap support for repeatedly
 reading the same register (to read out FIFOs).  Used by the adxl372 driver.
 This will find uses elsewhere once we tidy up various drivers that are
 effectively doing this and relying on not enabling regcache.
 
 New device support
 * Analog devices ADXL372 accelerometer
   - new driver for this accelerometer including fifo and and interrupt support.
     Follow up patches enforce trigger validation, add sampling frequency
     control and filter bandwidth control.  A later series added i2c support
     to the existing SPI support.
 * ST lsm6dsx
   - rework and add support fo the LSM6DSO 6 axis mems sensor.
 * Linear LTC 1660 DAC
   - new driver supporting the LTC 1660 and LTC 1665 SPI DACs.
 * Microchip mcp3911 ADC.
   - new driver for this integrated analog front end and ADC.
 * Qualcomm SPMI PMIC5 adc driver
   - using the spmi framework, new driver and bindings for this ADC.
     Follow up patch adds some missing channels.
 
 Features
 * ad5758
   - support hard reset using a gpio (if provided).
 * mpu6050
   - Regulator support
 * qcom-spmi-adc5
   - Sanity check the channel numbers provided by DT to make sure the
     driver actually knows about them.
 * sc27xx
   - give raw data for channel 20 as it's used on all known boards for
     the headset which needs a custom converstion function.  If it turns
     out someone builds a board where this isn't true we will deal with it
     when it happens.
   - add ADC scale calibration.
 * tsl2772
   - support device tree binding to set the proximity led settings.
   - regulator supprot.
   - binding for apds9930 - trivial addition as register compatible with tsl2772.
 
 Cleanups / Minor fixes
 
 * adxl345
   - supress a static checker warning but explicitly checking if the id
     object is null.
 * bh1750
   - avoid CONFIG_PM_SLEEP checks.
   - SPDX.
 * bme680
   - spelling mistake
   - use clamp rather than open coding.
   - white space and other similar fixes.
   - rename MSK to MASK for clarifty and use GENMASK to specify them.
   - use the FIELD_GET macro rather than a very odd accessor of dividing by
     16 to get the shift.
   - rework to share handing for oversampling of the various channels in a
     unified way.
   - check explicitly for val2 in write_raw function to ensure it is 0.
   - drop some field defines that don't add anything.
 * dpot-adc
   - SPDX
 * envelope detector
   - SPDX
 * isl29501
   - fix an ancient compiler warning mostly because it results in much
     nicer code.
 * max30102
   - mark switch fall throughs.
 * max44000
   - drop an unused variable.
 * max512
   - avoid CONFIG_PM_SLEEP checks.
 * max5481
   - use of_device_get_match_data rather than open coding it.
 * max5821
   - avoid CONFIG_PM_SLEEP checks.
 * max9611
   - explicity cast an enum to an integer to make it totally clear that
     this is intended.
 * mcp4018
   - fix an inconsistent MODULE_LICENSE.
   - use of_device_get_match_data rather than open coding it.
 * mcp4531
   - use of_device_get_match_data rather than open coding it.
   - SPDX
 * mcp4725
   - avoid CONFIG_PM_SLEEP checks.
 * mcp4922
   - Fix error handling and prevent writing a negative to when setting the
     output voltage.
 * ms5611
   - drop deprecated compatible strings without manufacturer from being
     explicitly listed.  They are handled anyway.
   - SPDX
 * multiplexer
   - SPDX
 * qcom-vadc
   - fix inconsistent documentation for reg.
 * ti-dac5571
   - provide and of_match_table.
 
 * treewide
   - update Michael Hennerich's email address.
   - Use %pOFn rather than device_node.name.
 * documentation.
   - tidy up a wrong kernel version for the introduction of the
     position_relative ABI.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAluave0RHGppYzIzQGtl
 cm5lbC5vcmcACgkQVIU0mcT0Fogr/A//bfXkfYPO2tPQOe+Ut/isyKvceDFs4faJ
 0ogmVxrH5hwFe96vfB0RWcYhovKXONrRtqreMCiVPMjKxg5o+F3Q+eSj0qhxhG77
 bDV5CnF1GXiBe/02WSEs9B3L4oxu6Z/PGq2sGrlTfTy8NZxJW6biER1aWeBbxmR6
 nPBb9SXH4vuqiiF8UOwRB2ETelx2jXXCNFxmUVQ0bzCYgAp/n7B2ZJu6OxWIhBGC
 NEPYofFajNATJEGgTQmwmKNv6xL4wVSpZXMLO1hzKPe8arARBqPGjIg14srl+nWs
 HsOdsl/GkeOcPsI7aUvQO0zC5nOgU9iXtQFZQLq8D1xMQP9LzfRuLhymy8dH8hg+
 uUfxkJf0OwhqEW+6GJ0g4A2xaDHyM7JFQAV1/XCNS93qjpcgC7rcLbnSDy9u6SC/
 j3g3EFUXVYqOuFXbr+1TLrg/oJhnOkXp3Wbm/Di0zXJNYOtzQ9zSLp55HZLxvOOl
 zzLWCSkse9EAwHzVnl4BAd03Zw3Ewh9aAJlXQ7JKGtQSXo+PpFyIiyn8woQpzGV8
 OePhhmooOYVxI2Aua0UKhwa6lPeZT71zjpJyFCTFJqRwU3I/8HEDH5g+9dX6Vk6h
 CLF/fCLCkRa1ccDzFQbHai91xLflaYUsXdjOnQymJ5CYToni/IyPukrZ05b2IdvO
 XnMIaoVrAUU=
 =+9gG
 -----END PGP SIGNATURE-----

Merge tag 'iio-for-4.20a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

1st round of IIO new device support, features and cleanups in the 4.20 cycle.

There is a merge commit in here to pull in regmap support for repeatedly
reading the same register (to read out FIFOs).  Used by the adxl372 driver.
This will find uses elsewhere once we tidy up various drivers that are
effectively doing this and relying on not enabling regcache.

New device support
* Analog devices ADXL372 accelerometer
  - new driver for this accelerometer including fifo and and interrupt support.
    Follow up patches enforce trigger validation, add sampling frequency
    control and filter bandwidth control.  A later series added i2c support
    to the existing SPI support.
* ST lsm6dsx
  - rework and add support fo the LSM6DSO 6 axis mems sensor.
* Linear LTC 1660 DAC
  - new driver supporting the LTC 1660 and LTC 1665 SPI DACs.
* Microchip mcp3911 ADC.
  - new driver for this integrated analog front end and ADC.
* Qualcomm SPMI PMIC5 adc driver
  - using the spmi framework, new driver and bindings for this ADC.
    Follow up patch adds some missing channels.

Features
* ad5758
  - support hard reset using a gpio (if provided).
* mpu6050
  - Regulator support
* qcom-spmi-adc5
  - Sanity check the channel numbers provided by DT to make sure the
    driver actually knows about them.
* sc27xx
  - give raw data for channel 20 as it's used on all known boards for
    the headset which needs a custom converstion function.  If it turns
    out someone builds a board where this isn't true we will deal with it
    when it happens.
  - add ADC scale calibration.
* tsl2772
  - support device tree binding to set the proximity led settings.
  - regulator supprot.
  - binding for apds9930 - trivial addition as register compatible with tsl2772.

Cleanups / Minor fixes

* adxl345
  - supress a static checker warning but explicitly checking if the id
    object is null.
* bh1750
  - avoid CONFIG_PM_SLEEP checks.
  - SPDX.
* bme680
  - spelling mistake
  - use clamp rather than open coding.
  - white space and other similar fixes.
  - rename MSK to MASK for clarifty and use GENMASK to specify them.
  - use the FIELD_GET macro rather than a very odd accessor of dividing by
    16 to get the shift.
  - rework to share handing for oversampling of the various channels in a
    unified way.
  - check explicitly for val2 in write_raw function to ensure it is 0.
  - drop some field defines that don't add anything.
* dpot-adc
  - SPDX
* envelope detector
  - SPDX
* isl29501
  - fix an ancient compiler warning mostly because it results in much
    nicer code.
* max30102
  - mark switch fall throughs.
* max44000
  - drop an unused variable.
* max512
  - avoid CONFIG_PM_SLEEP checks.
* max5481
  - use of_device_get_match_data rather than open coding it.
* max5821
  - avoid CONFIG_PM_SLEEP checks.
* max9611
  - explicity cast an enum to an integer to make it totally clear that
    this is intended.
* mcp4018
  - fix an inconsistent MODULE_LICENSE.
  - use of_device_get_match_data rather than open coding it.
* mcp4531
  - use of_device_get_match_data rather than open coding it.
  - SPDX
* mcp4725
  - avoid CONFIG_PM_SLEEP checks.
* mcp4922
  - Fix error handling and prevent writing a negative to when setting the
    output voltage.
* ms5611
  - drop deprecated compatible strings without manufacturer from being
    explicitly listed.  They are handled anyway.
  - SPDX
* multiplexer
  - SPDX
* qcom-vadc
  - fix inconsistent documentation for reg.
* ti-dac5571
  - provide and of_match_table.

* treewide
  - update Michael Hennerich's email address.
  - Use %pOFn rather than device_node.name.
* documentation.
  - tidy up a wrong kernel version for the introduction of the
    position_relative ABI.
2018-09-14 10:38:48 +02:00
Biju Das 066f7e63b9 dt-bindings: power: Add r8a774a1 SYSC power domain definitions
This patch adds power domain indices for RZ/G2M.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-12 10:18:55 +02:00
Chris Brandt fde35c9c7d clk: renesas: cpg-mssr: Add R7S9210 support
Add support for the R7S9210 (RZ/A2) Clock Pulse Generator and Module
Standby.

The Module Standby HW in the RZ/A series is very close to R-Car HW, except
for how the registers are laid out.
The MSTP registers are only 8-bits wide, there are no status registers
(MSTPSR), and the register offsets are a little different. Since the RZ/A
hardware manuals refer to these registers as the Standby Control Registers,
we'll use that name to distinguish the RZ/A type from the R-Car type.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Rob Herring <robh@kernel.org> # DT bits
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-11 12:01:07 +02:00
Radu Pirea a785ce4c6d dt-bindings: Add binding for atmel-usart in SPI mode
This patch moves the bindings for serial from serial/atmel-usart.txt to
mfd/atmel-usart.txt and adds bindings for USART in SPI mode.

Signed-off-by: Radu Pirea <radu.pirea@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2018-09-10 16:07:11 +01:00
Jagan Teki 8b2a378704
dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro
Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent.

Include the macro on dt-bindings so-that the same can be used
while defining CCU clock phandles.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-09-05 09:19:59 +02:00
Amit Nischal f40c467523 dt-bindings: clock: Introduce QCOM Camera clock bindings
Add device tree bindings for camera clock controller for
Qualcomm Technology Inc's SDM845 SoCs.

Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-30 18:26:45 -07:00
Yixun Lan 3cd3c83f67 pinctrl: Add compatibles for Amlogic Meson G12A pin controllers
Add new compatible name for Amlogic's Meson-G12A pin controllers,
add a dt-binding header file which document the detail pin names.

Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-29 10:34:53 +02:00
Douglas Anderson 48735597f7 clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header
These clocks will need to be defined in the clock driver and
referenced in device tree files.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-28 15:56:25 -07:00
Rajendra Nayak b567752144 clk: qcom: Add some missing gcc clks for msm8996
Add a few missing gcc clks for msm8996

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
[bjorn: omit aggre0_noc_qosgen_extref_clk]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-28 15:51:44 -07:00
Krzysztof Kozlowski 94047d9795 clk: s2mps11,s3c64xx: Add SPDX license identifiers
Replace GPL v2.0 and v2.0+ license statements with SPDX license
identifiers.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-27 14:17:03 -07:00
Krzysztof Kozlowski f300168a3a clk: max77686: Add SPDX license identifiers
Replace GPL v2.0 and v2.0+ license statements with SPDX license
identifiers.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-27 14:16:51 -07:00
Biju Das 62f32dde33 clk: renesas: Add r8a774a1 CPG Core Clock Definitions
Add all RZ/G2M Clock Pulse Generator Core Clock Outputs, as listed in
Table 8.2b ("List of Clocks [RZ/G2M]") of the RZ/G2M Hardware User's
Manual.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-08-27 17:00:19 +02:00
Aapo Vienamo d9be10edf7 dt-bindings: Add Tegra PMC pad configuration bindings
Document the PMC pinctrl bindings for pad power state and signaling
voltage configuration. Both nvidia,tegra186-pmc.txt and
nvidia,tegra20-pmc.txt are modified as they both cover SoC generations
for which these bindings apply.

Add a header defining Tegra PMC pad voltage configurations.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27 12:21:43 +02:00
Linus Torvalds b326272010 ARM: SoC: late updates
A couple of late-merged changes that would be useful to get in this
 merge window:
 
  - Driver support for reset of audio complex on Meson platforms. The
    audio driver went in this merge window, and these changes have been
    in -next for a while (just not in our tree).
 
  - Power management fixes for IOMMU on Rockchip platforms, getting
    closer to kexec working on them, including Chromebooks.
 
  - Another pass updating "arm,psci" -> "psci" for some properties that
    have snuck in since last time it was done.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAluBrbAPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx372IQAJayIgII0C/2MO7aUuVQixoIkSdXmfTbjHSZ
 JJLiK5Kbua4Gvpq3tkSowg35ohUvPlkoKmDDSTSuiUHGNDQQE9ETQzy5dxrP8R/m
 dpQpgA41oa9U1Uscl10Bjaf4Oe1NoBhpGx8xrlNYEXRliKkBMulMevj1MovUBSk0
 SvuWmwekVrEbVj0cDZ4f5Ze3ODWAkbKdUYebjBHHvDEyHO0J8LJT5Hv98ZEQs+mz
 BJQeapIXk29Tj1D37+5hoaxglDF4NJvxwQ/VxB7BCXAw2p98Y7TSu473HYkMdp1g
 ricaldmBlqXVG9KN30tmxjJAgUtupfHicVQ4oNcGQfRWFlwxK8dtKrnzOb6tIRyl
 S/86gGgFF9jjRlVlRxwCohhswXJR2sqYBw8d10YzsozV/jSgKi+60P8wT+yQIv6H
 BctwzH4+W7QEAVnx3AvYMWPtgUp1rtvaNjSfz/s7ZAKmEBT/rOD34oXJ8tCnjvVX
 zsm/5dSqVSbROlP7MY1qC2kHFUQyGcLco45BKXPa6VH/eOkIt3f/VZjXdBmf6CoY
 xFl7bIoHN8LSt9SdaC3pOfA+oEaM90L+SR8KBK+o58fNiFiwarWqqXR2B7Ql/AKJ
 j6hic30994/MzUoqCp+stVI2dISb5LofmVpmGeF7CVWihyB6efqzh4RTc1GCKHcK
 bhNcAMMJ
 =dQaG
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late updates from Olof Johansson:
 "A couple of late-merged changes that would be useful to get in this
  merge window:

   - Driver support for reset of audio complex on Meson platforms. The
     audio driver went in this merge window, and these changes have been
     in -next for a while (just not in our tree).

   - Power management fixes for IOMMU on Rockchip platforms, getting
     closer to kexec working on them, including Chromebooks.

   - Another pass updating "arm,psci" -> "psci" for some properties that
     have snuck in since last time it was done"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  iommu/rockchip: Move irq request past pm_runtime_enable
  iommu/rockchip: Handle errors returned from PM framework
  arm64: rockchip: Force CONFIG_PM on Rockchip systems
  ARM: rockchip: Force CONFIG_PM on Rockchip systems
  arm64: dts: Fix various entry-method properties to reflect documentation
  reset: imx7: Fix always writing bits as 0
  reset: meson: add meson audio arb driver
  reset: meson: add dt-bindings for meson-axg audio arb
2018-08-25 14:12:36 -07:00
Olof Johansson c37aad3612 Reset controller changes for v4.19, part 2
This adds a single new driver for the Amlogic Meson Audio Memory Arbiter
 resets.
 -----BEGIN PGP SIGNATURE-----
 
 iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCW2RYpxcccC56YWJlbEBw
 ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwGdpAQDW1fXG6l0a/YjTUlmuia8LAHxS
 4h0sJCUCEyNSEaTKAQEA0Cunr8w9D0kQlj7XjZyGylRX2wSIRI9rMseTm4U68wg=
 =xBwp
 -----END PGP SIGNATURE-----

Merge tag 'reset-for-4.19-2' of git://git.pengutronix.de/git/pza/linux into next/late

Reset controller changes for v4.19, part 2

This adds a single new driver for the Amlogic Meson Audio Memory Arbiter
resets.

* tag 'reset-for-4.19-2' of git://git.pengutronix.de/git/pza/linux:
  reset: meson: add meson audio arb driver
  reset: meson: add dt-bindings for meson-axg audio arb

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-08-24 08:49:48 -07:00
Linus Torvalds 2f34a64aea ARM: Device-tree updates
Business as usual -- the bulk of our changes are to devicetree files
 with new hardware support, new SoCs and platforms, and new board types.
 
 New SoCs/platforms:
  - Raspberry Pi Compute Module (CM1) and IO board
  - i.MX6SSL from NXP
  - Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN and
    PLC interfaces
  - TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5
    controllers, communication and PRU subsystem and lots of other
    interfaces (PCIe, USB3, etc).
 
 New boards and systems:
  - Several Atmel at91-based boards from Laird
  - Marvell Armada388-based Helios4 board from SolidRun
  - Samsung Aires-based phones (s5pv210)
  - Allwinner A64-based Pinebook laptop
 
 In addition to the above, there's the usual amount of new devices
 described on existing platforms, fixes and tweaks and new minor variants
 of boards/platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlt+NecPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3ScQQAIic6NPWiqGEwTRN1I+WoyoCt8oTGgiiu1kf
 h23RaLWI+TaEpR1yg5ko6wGlxlvBG1C/u2sOc0lD9nSt9JQ3evXXwMQ0bUNhKdSE
 8z3jhpnJYu5iNDsB15XfznhivpjOQUQNQXPR1/PG9j6SCKgdWi6wYR+A+q98Pe9d
 otzMizQOY0QUMYAec20Zvzgfs+AvEtOAo/w5K4tRb+Fv/EVixV8bVeT4uykxunFt
 6xOM0Ssvnwo3AnEh+V+FjAL8khMC7A3JC+/emXqqcw1Ogdg/GSnxriL7v6LchcwH
 fvYb8hujQCcZ0+mlN0W214RkWd1xAc0CwJ0JdKw/RMnskty5u5B7gXcDyZFw1oJ7
 b7Uof7N8l12lsXTqWW8CKOHupI1gxYshi0QJzkgkfY6P3h8ntE8HJhhcgjcHE0AN
 3mMjhzbDGjfUykVgS2rFpR6tm3JHT13jDl88jhAT+xtuYYxy60nqPBM9MD6jIzjF
 BnIVJBNX3sYa7aheEnZFBuA/Af/05fKbpUVQTNwnfq2f6NYDAbF9iBkCHepudZBa
 0U+tNHuDlVXwLXoocE1Nac5IJgPiuX2bsuJ9xHKLXb6hMr9L4YtPOaKwDaJb1hTZ
 XIHhlrF9w0ig9gu3IxaE+rC3hfu965CeFws0kwSZ9l52xmSP0Yi22ebSTfP6+h+u
 XLyOhpp8
 =J0qC
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Olof Johansson:
 "Business as usual -- the bulk of our changes are to devicetree files
  with new hardware support, new SoCs and platforms, and new board
  types.

  New SoCs/platforms:
   - Raspberry Pi Compute Module (CM1) and IO board
   - i.MX6SSL from NXP
   - Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN
     and PLC interfaces
   - TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5
     controllers, communication and PRU subsystem and lots of other
     interfaces (PCIe, USB3, etc).

  New boards and systems:
   - Several Atmel at91-based boards from Laird
   - Marvell Armada388-based Helios4 board from SolidRun
   - Samsung Aires-based phones (s5pv210)
   - Allwinner A64-based Pinebook laptop

  In addition to the above, there's the usual amount of new devices
  described on existing platforms, fixes and tweaks and new minor
  variants of boards/platforms"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (478 commits)
  arm64: dts: sdm845: Add tsens nodes
  arm64: dts: msm8996: thermal: Initialise via DT and add second controller
  arm64: dts: sprd: Add one suspend timer
  arm64: dts: sprd: Add SC27XX ADC device
  arm64: dts: sprd: Add SC27XX eFuse device
  arm64: dts: sprd: Add SC27XX vibrator device
  arm64: dts: sprd: Add SC27XX breathing light controller device
  arm64: dts: meson-axg: add spdif-dit codec
  arm64: dts: meson-axg: add lineout codec
  arm64: dts: meson-axg: add linein codec
  arm64: dts: meson-axg: add tdm interfaces
  arm64: dts: meson-axg: add tdmout formatters
  arm64: dts: meson-axg: add tdmin formatters
  arm64: dts: meson-axg: add spdifout
  arm64: dts: rockchip: add led support for Firefly-RK3399
  arm64: dts: rockchip: remove deprecated Type-C PHY properties on rk3399
  arm64: dts: rockchip: add power button support for Firefly-RK3399
  ARM: dts: aspeed: Add coprocessor interrupt controller
  arm64: dts: meson-axg: add audio arb reset controller
  arm64: dts: meson-axg: add usb power regulator
  ...
2018-08-23 14:02:22 -07:00
Linus Torvalds f3ea496213 ARM: SoC driver updates
Some of the larger changes this merge window:
  - Removal of drivers for Exynos5440, a Samsung SoC that never saw
    widespread use.
  - Uniphier support for USB3 and SPI reset handling
  - Syste control and SRAM drivers and bindings for Allwinner platforms
  - Qualcomm AOSS (Always-on subsystem) reset controller drivers
  - Raspberry Pi hwmon driver for voltage
  - Mediatek pwrap (pmic) support for MT6797 SoC
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlt+MMkPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3pB4QAIj7iVxSKEQFz65iXLTfMJKFZ9TSvRgWSDyE
 CHF+WOQGTnxkvySEHSw/SNqDM+Bas8ijR8b4vWzsXJFB+3HA0ZTGLU379/af1zCE
 9k8QjyIWtRWKX9fo7qCHVXlMfxGbOdbCOsh4jnmHqEIDxCHXpIiJRfvUbKIXGpfn
 tw6QpM70vm6Q6AdKwzmDbMCYnQAMWxBK/G/Q7BfRG+IYWYjFGbiWIc9BV9Ki8+nE
 3235ISaTHvAHodoec8tpLxv34GsOP4RCqscGYEuCf22RYfWva4S9e4yoWT8qPoIl
 IHWNsE3YWjksqpt9rj9Pie/PycthO4E4BUPMtqjMbC2OyKFgVsAcHrmToSdd+7ob
 t3VNM6RVl8xyWSRlm5ioev15CCOeWRi1nUT7m3UEBWpQ6ihJVpbjf1vVxZRW/E0t
 cgC+XzjSg26sWx1bSH9lGPFytOblAcZ04GG/Kpz02MmTgMiTdODFZ67AsqtdeQS7
 a9wpaQ+DgTqU0VcQx8Kdq8uy9MOztkhXn5yO8fEWjpm0lPcxjhJS4EpN+Ru2T7/Z
 AMuy5lRJfQzAPU9kY7TE0yZ07pgpZgh7LlWOoKtGD7UklzXVVZrVlpn7bApRN5vg
 ZLze5OiEiIF5gIiRC8sIyQ9TZdvg4NqwebCqspINixqs7iIpB7TG93WQcy82osSE
 TXhtx4Sy
 =ZjwY
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Some of the larger changes this merge window:

   - Removal of drivers for Exynos5440, a Samsung SoC that never saw
     widespread use.

   - Uniphier support for USB3 and SPI reset handling

   - Syste control and SRAM drivers and bindings for Allwinner platforms

   - Qualcomm AOSS (Always-on subsystem) reset controller drivers

   - Raspberry Pi hwmon driver for voltage

   - Mediatek pwrap (pmic) support for MT6797 SoC"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (52 commits)
  drivers/firmware: psci_checker: stash and use topology_core_cpumask for hotplug tests
  soc: fsl: cleanup Kconfig menu
  soc: fsl: dpio: Convert DPIO documentation to .rst
  staging: fsl-mc: Remove remaining files
  staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl
  staging: fsl-dpaa2: eth: move generic FD defines to DPIO
  soc: fsl: qe: gpio: Add qe_gpio_set_multiple
  usb: host: exynos: Remove support for Exynos5440
  clk: samsung: Remove support for Exynos5440
  soc: sunxi: Add the A13, A23 and H3 system control compatibles
  reset: uniphier: add reset control support for SPI
  cpufreq: exynos: Remove support for Exynos5440
  ata: ahci-platform: Remove support for Exynos5440
  soc: imx6qp: Use GENPD_FLAG_ALWAYS_ON for PU errata
  soc: mediatek: pwrap: add mt6351 driver for mt6797 SoCs
  soc: mediatek: pwrap: add pwrap driver for mt6797 SoCs
  soc: mediatek: pwrap: fix cipher init setting error
  dt-bindings: pwrap: mediatek: add pwrap support for MT6797
  reset: uniphier: add USB3 core reset control
  dt-bindings: reset: uniphier: add USB3 core reset support
  ...
2018-08-23 13:52:46 -07:00
Linus Torvalds 2475c515d4 Staging/IIO patches for 4.19-rc1
Here are the big staging/iio patches for 4.19-rc1.
 
 Lots of churn here, with tons of cleanups happening in staging drivers,
 a removal of an old crypto driver that no one was using (skein), and the
 addition of some new IIO drivers.  Also added was a "gasket" driver from
 Google that needs loads of work and the erofs filesystem.
 
 Even with adding all of the new drivers and a new filesystem, we are
 only adding about 1000 lines overall to the kernel linecount, which
 shows just how much cleanup happened, and how big the unused crypto
 driver was.
 
 All of these have been in the linux-next tree for a while now with no
 reported issues.
 
 Note, you will have a merge problem with a device tree IIO file and the
 MAINTAINERS file, both resolutions are easy, just take all changed.
 There will be a skein file merge issue as well, but that file got
 deleted so just drop that.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCW3g+2A8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ykwGACfQZz3Ncvc7thHkZytxxqQnbx5JpkAn0yV5SvF
 yVXG9SA9yCTKVjYczZjZ
 =6t/x
 -----END PGP SIGNATURE-----

Merge tag 'staging-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging and IIO updates from Greg KH:
 "Here are the big staging/iio patches for 4.19-rc1.

  Lots of churn here, with tons of cleanups happening in staging
  drivers, a removal of an old crypto driver that no one was using
  (skein), and the addition of some new IIO drivers. Also added was a
  "gasket" driver from Google that needs loads of work and the erofs
  filesystem.

  Even with adding all of the new drivers and a new filesystem, we are
  only adding about 1000 lines overall to the kernel linecount, which
  shows just how much cleanup happened, and how big the unused crypto
  driver was.

  All of these have been in the linux-next tree for a while now with no
  reported issues"

* tag 'staging-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (903 commits)
  staging:rtl8192u: Remove unused macro definitions - Style
  staging:rtl8192u: Add spaces around '+' operator - Style
  staging:rtl8192u: Remove stale comment - Style
  staging: rtl8188eu: remove unused mp_custom_oid.h
  staging: fbtft: Add spaces around / - Style
  staging: fbtft: Erases some repetitive usage of function name - Style
  staging: fbtft: Adjust some empty-line problems - Style
  staging: fbtft: Removes one nesting level to help readability - Style
  staging: fbtft: Changes gamma table to define.
  staging: fbtft: A bit more information on dev_err.
  staging: fbtft: Fixes some alignment issues - Style
  staging: fbtft: Puts macro arguments in parenthesis to avoid precedence issues - Style
  staging: rtl8188eu: remove unused array dB_Invert_Table
  staging: rtl8188eu: remove whitespace, add missing blank line
  staging: rtl8188eu: use is_multicast_ether_addr in rtw_sta_mgt.c
  staging: rtl8188eu: remove whitespace - style
  staging: rtl8188eu: cleanup block comment - style
  staging: rtl8188eu: use is_multicast_ether_addr in rtl8188eu_xmit.c
  staging: rtl8188eu: use is_multicast_ether_addr in recv_linux.c
  staging: rtlwifi: refactor rtl_get_tcb_desc
  ...
2018-08-18 11:00:00 -07:00
Linus Torvalds 5695d5d197 USB/PHY patches for 4.19-rc1
Here is the big USB and phy driver patch set for 4.19-rc1.
 
 Nothing huge but there was a lot of work that happened this development
 cycle:
 	- lots of type-c work, with drivers graduating out of staging,
 	  and displayport support being added.
 	- new PHY drivers
 	- the normal collection of gadget driver updates and fixes
 	- code churn to work on the urb handling path, using irqsave()
 	  everywhere in anticipation of making this codepath a lot
 	  simpler in the future.
 	- usbserial driver fixes and reworks
 	- other misc changes
 
 Full details are in the shortlog.
 
 All of these have been in linux-next with no reported issues for a
 while.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCW3hBPA8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+yloNwCggMZi9m8Krjq7d7aLw5oJJex/nIAAn0jeADOT
 NpoCgrtGHjwrATxN5/Ke
 =jXa3
 -----END PGP SIGNATURE-----

Merge tag 'usb-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/PHY updates from Greg KH:
 "Here is the big USB and phy driver patch set for 4.19-rc1.

  Nothing huge but there was a lot of work that happened this
  development cycle:

   - lots of type-c work, with drivers graduating out of staging, and
     displayport support being added.

   - new PHY drivers

   - the normal collection of gadget driver updates and fixes

   - code churn to work on the urb handling path, using irqsave()
     everywhere in anticipation of making this codepath a lot simpler in
     the future.

   - usbserial driver fixes and reworks

   - other misc changes

  All of these have been in linux-next with no reported issues for a
  while"

* tag 'usb-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (159 commits)
  USB: serial: pl2303: add a new device id for ATEN
  usb: renesas_usbhs: Kconfig: convert to SPDX identifiers
  usb: dwc3: gadget: Check MaxPacketSize from descriptor
  usb: dwc2: Turn on uframe_sched on "stm32f4x9_fsotg" platforms
  usb: dwc2: Turn on uframe_sched on "amlogic" platforms
  usb: dwc2: Turn on uframe_sched on "his" platforms
  usb: dwc2: Turn on uframe_sched on "bcm" platforms
  usb: dwc2: gadget: ISOC's starting flow improvement
  usb: dwc2: Make dwc2_readl/writel functions endianness-agnostic.
  usb: dwc3: core: Enable AutoRetry feature in the controller
  usb: dwc3: Set default mode for dwc_usb31
  usb: gadget: udc: renesas_usb3: Add register of usb role switch
  usb: dwc2: replace ioread32/iowrite32_rep with dwc2_readl/writel_rep
  usb: dwc2: Modify dwc2_readl/writel functions prototype
  usb: dwc3: pci: Intel Merrifield can be host
  usb: dwc3: pci: Supply device properties via driver data
  arm64: dts: dwc3: description of incr burst type
  usb: dwc3: Enable undefined length INCR burst type
  usb: dwc3: add global soc bus configuration reg0
  usb: dwc3: Describe 'wakeup_work' field of struct dwc3_pci
  ...
2018-08-18 10:21:49 -07:00
Siddartha Mohanadoss 2c8909b95b iio: adc: Update QCOM ADC license to SPDX format
Update QCOM ADC header file to SPDX format.

Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-08-18 18:11:46 +01:00
Linus Torvalds 9502f0d1d9 - xgene : potential null pointer fix
- omap : switch to spdx license and use of_device_get_match_data() to match data
 
 - ti-msgmgr : cleanup and optimisation. New TI specific feature - secure proxy thread.
 
 - mediatek : add driver for CMDQ controller.
 
 - nxp : add driver for MU controller
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAlt1nhUACgkQf9lkf8eY
 P5XbBg/9FAzw6wEhyBQUdybM6sv1UrQYPbe5bgpbRgS6quQMtDOIuCBAbznPkGp5
 ZeDsQ+CTK7UzUSG5QQEjdrb5L2NWzsXWRY8pp8XEwYFLCFmM8siPPf0NIuOHZUcg
 VkHAXOAFKzOqFKJHQ54ISgJzUweMx215jGF/PVUDFy6mNK9KpSIJJjmY9LCaiuav
 sOajNx/DuTl7DU+eDECQhHKYZdsSlBAnMYVk1nNQj3E/vMWgkuL421WrRckLf5T6
 Y2eAy7sid50+ZpwK5dFqJmGJgxyWo6b9C4qCX0dq4E0RDi1jYt9bmwo0RckIQSk4
 aTqYcNF3pwkl0EUMz+EKi3cc2G07ufX8H88jBW9xj8j4xaNBQJjPfimp2nhVBLqJ
 cesW+0QxdERBj48hw5EsL0lXwQ7sKlpIkg2PfmcDRLoJZynCM6TDil4+Xt9k5tkZ
 yoPcuVHQ+YAkY0a03v04daRySc3KEXJ814M396bE/nz+Y8EVm7WPlB2KtqHS/1Rv
 9kQWM+MBewtHOMuM8D8TAEVVjyfYfWuWb2F/6JugdedYYuAcbmpdNFaPs1Be9QVg
 RywNzEuWrrC/qvfYLQS9GD6dCGij62ErnSvP9UQjiXMcBoRwSQky7gzD+2DxabPb
 1h3rPUtw9at0rHYlIaozpsRKrrIlkOcH6uey7vFvb30XLL3OCRk=
 =6YOd
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v4.19' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - xgene: potential null pointer fix

 - omap: switch to spdx license and use of_device_get_match_data() to
   match data

 - ti-msgmgr: cleanup and optimisation. New TI specific feature - secure
   proxy thread.

 - mediatek: add driver for CMDQ controller.

 - nxp: add driver for MU controller

* tag 'mailbox-v4.19' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: Add support for i.MX messaging unit
  dt-bindings: mailbox: imx-mu: add generic MU channel support
  dt-bindings: arm: fsl: add mu binding doc
  mailbox: add MODULE_LICENSE() for mtk-cmdq-mailbox.c
  mailbox: mediatek: Add Mediatek CMDQ driver
  dt-bindings: soc: Add documentation for the MediaTek GCE unit
  mailbox: ti-msgmgr: Add support for Secure Proxy
  dt-bindings: mailbox: Add support for secure proxy threads
  mailbox: ti-msgmgr: Move the memory region name to descriptor
  mailbox: ti-msgmgr: Change message count mask to be descriptor based
  mailbox: ti-msgmgr: Allocate Rx channel resources only on request
  mailbox: ti-msgmgr: Get rid of unused structure members
  mailbox/omap: use of_device_get_match_data() to get match data
  mailbox/omap: switch to SPDX license identifier
  mailbox: xgene-slimpro: Fix potential NULL pointer dereference
2018-08-16 10:16:08 -07:00
Linus Torvalds db06f826ec The new and exciting feature this time around is in the clk core.
We've added duty cycle support to the clk API so that clk signal
 duty cycle ratios can be adjusted while taking into account things
 like clk dividers and clk tree hierarchy. So far only one SoC has
 implemented support for this, but I expect there will be more to
 come in the future.
 
 Outside of the core, we have the usual pile of clk driver updates
 and additions. The Amlogic meson driver got the most lines in the
 diffstat this time around because it added support for a whole bunch
 of hardware and duty cycle configuration. After that the Rockchip PX30,
 Qualcomm SDM845, and Renesas SoC drivers fill in a majority of the diff.
 We're left with the collection of non-critical fixes after that. Overall
 it looks pretty quiet this time.
 
 Core:
  - Clk duty cycle support
  - Proper CLK_SET_RATE_GATE support throughout the tree
 
 New Drivers:
  - Actions Semi Owl series S700 SoC clk driver
  - Qualcomm SDM845 display clock controller
  - i.MX6SX ocram_s clk support
  - Uniphier NAND, USB3 PHY, and SPI clk support
  - Qualcomm RPMh clk driver
  - i.MX7D mailbox clk support
  - Maxim 9485 Programmable Clock Generator
  - Expose 32 kHz PLL on PXA SoCs
  - imx6sll GPIO clk gate support
  - Atmel at91 I2S audio clk support
  - SI544/SI514 clk on/off support
  - i.MX6UL GPIO clock gates in CCM CCGR
  - Renesas Crypto Engine clocks on R-Car H3
  - Renesas clk support for the new RZ/N1D SoC
  - Allwinner A64 display engine clock support
  - Support for Rockchip's PX30 SoC
  - Amlogic Meson axg PCIe and audio clocks
  - Amlogic Meson GEN CLK on gxbb, gxl and axg
 
 Updates:
  - Remove an unused variable from Exynos4412 ISP driver
  - Fix a thinko bug in SCMI clk division logic
  - Add missing of_node_put()s in some i.MX clk drivers
  - Tegra SDMMC clk jitter improvements with high speed signaling modes
  - SPDX tagging for qcom and cs2000-cp drivers
  - Stop leaking con ids in __clk_put()
  - Fix a corner case in fixed factor clk probing where node is in DT but
    parent clk is registered much later
  - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return value
  - i.MX clk init arrays removed in place of CLK_IS_CRITICAL
  - Convert to CLK_IS_CRITICAL for i.MX51/53 driver
  - Fix Tegra BPMP driver oops when xlating a NULL clk
  - Proper default configuration for vic03 and vde clks on Tegra124
  - Mark Tegra memory controller clks as critical
  - Fix array bounds clamp in Tegra's emc determine_rate() op
  - Ingenic i2s bit update and allow UDC clk to gate
  - Fix name of aspeed SDC clk define to have only one 'CLK'
  - Fix i.MX6QDL video clk parent
  - Critical clk markings for qcom SDM845
  - Fix Stratix10 mpu_free_clk and sdmmc_free_clk parents
  - Mark Rockchip's pclk_rkpwm_pmu as critical clock, due to it supplying
    the pwm used to drive the logic supply of the rk3399 core.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlt0WD0RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSX5jBAAlMLb0fqnuAGNJeXZDk5rsCa496LMyGWx
 ku7uLA2H68SlbSQqq8FUPoCjDZkmsu2CbOX1U2/H4HFDS0pqpPiV3mZNtSeacedp
 4Wf8yUB5G3xdq9QUCSX5LxMmEQoGeJ+gaTspBvM6sNvEMBR2kEMGBqUy768tnDTR
 qCQ8Q1jOU6l8IdFV0SZGssmZ+oFqOyQoJVquPWPkw1+p/2f1KyYIyG5J5FXGxgcR
 1XQITY/I/dShQ2wd+ZeDdt+GjZqIXQ06Pt3ruRG7HVP79Zt1XCRJd5dZ2lf+Wj8T
 1ul3TWCAMYZ8gCPebLMbBGzKvQJQJcDU6DpIZsrUDN+C6z7KCS9vqeCxP9cF+3jJ
 LOmA6cWE7z9Vkk9s0I0KJJ2Sw7wRoXzE5OJcwa/yousSz3s9cX+F8SAkdZs77oUF
 0XnzPsvwdHI/egQ4UrsStPHM/gOFhsQqo8vvm5xaaTR2AxLKBHuPa9oUv9YpO/P5
 J6FCst3qeY3Wp69fJ5/Z058OFOAt81dKXij2fZJBOO4KJy7Kse8Sz5ApybXVAbY5
 lfvx+KGMITFqLYrcRIQZmlCuoHcMwI0FtHr9Ens5GXdbrJ+W+FlvP43eLCA0ZmRx
 9DidemChj3k3PC3H6tbax/jzV4IIxZdyUoBJ1imL4uyhhaXp/qr45A/aGwNp8Q8a
 WvkIGm3epK4=
 =Mcn+
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The new and exciting feature this time around is in the clk core.
  We've added duty cycle support to the clk API so that clk signal duty
  cycle ratios can be adjusted while taking into account things like clk
  dividers and clk tree hierarchy. So far only one SoC has implemented
  support for this, but I expect there will be more to come in the
  future.

  Outside of the core, we have the usual pile of clk driver updates and
  additions. The Amlogic meson driver got the most lines in the diffstat
  this time around because it added support for a whole bunch of
  hardware and duty cycle configuration. After that the Rockchip PX30,
  Qualcomm SDM845, and Renesas SoC drivers fill in a majority of the
  diff. We're left with the collection of non-critical fixes after that.
  Overall it looks pretty quiet this time.

  Core:
   - Clk duty cycle support
   - Proper CLK_SET_RATE_GATE support throughout the tree

  New Drivers:
   - Actions Semi Owl series S700 SoC clk driver
   - Qualcomm SDM845 display clock controller
   - i.MX6SX ocram_s clk support
   - Uniphier NAND, USB3 PHY, and SPI clk support
   - Qualcomm RPMh clk driver
   - i.MX7D mailbox clk support
   - Maxim 9485 Programmable Clock Generator
   - expose 32 kHz PLL on PXA SoCs
   - imx6sll GPIO clk gate support
   - Atmel at91 I2S audio clk support
   - SI544/SI514 clk on/off support
   - i.MX6UL GPIO clock gates in CCM CCGR
   - Renesas Crypto Engine clocks on R-Car H3
   - Renesas clk support for the new RZ/N1D SoC
   - Allwinner A64 display engine clock support
   - support for Rockchip's PX30 SoC
   - Amlogic Meson axg PCIe and audio clocks
   - Amlogic Meson GEN CLK on gxbb, gxl and axg

  Updates:
   - remove an unused variable from Exynos4412 ISP driver
   - fix a thinko bug in SCMI clk division logic
   - add missing of_node_put()s in some i.MX clk drivers
   - Tegra SDMMC clk jitter improvements with high speed signaling modes
   - SPDX tagging for qcom and cs2000-cp drivers
   - stop leaking con ids in __clk_put()
   - fix a corner case in fixed factor clk probing where node is in DT
     but parent clk is registered much later
   - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return
     value
   - i.MX clk init arrays removed in place of CLK_IS_CRITICAL
   - convert to CLK_IS_CRITICAL for i.MX51/53 driver
   - fix Tegra BPMP driver oops when xlating a NULL clk
   - proper default configuration for vic03 and vde clks on Tegra124
   - mark Tegra memory controller clks as critical
   - fix array bounds clamp in Tegra's emc determine_rate() op
   - Ingenic i2s bit update and allow UDC clk to gate
   - fix name of aspeed SDC clk define to have only one 'CLK'
   - fix i.MX6QDL video clk parent
   - critical clk markings for qcom SDM845
   - fix Stratix10 mpu_free_clk and sdmmc_free_clk parents
   - mark Rockchip's pclk_rkpwm_pmu as critical clock, due to it
     supplying the pwm used to drive the logic supply of the rk3399
     core"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (85 commits)
  clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399
  clk: cs2000-cp: convert to SPDX identifiers
  clk: scmi: Fix the rounding of clock rate
  clk: qcom: Add display clock controller driver for SDM845
  clk: mvebu: armada-37xx-periph: Remove unused var num_parents
  clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable
  clk: actions: Add S700 SoC clock support
  dt-bindings: clock: Add S700 support for Actions Semi Soc's
  clk: actions: Add missing REGMAP_MMIO dependency
  clk: uniphier: add clock frequency support for SPI
  clk: uniphier: add more USB3 PHY clocks
  clk: uniphier: add NAND 200MHz clock
  clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks
  clk: tegra: Add sdmmc mux divider clock
  clk: tegra: Refactor fractional divider calculation
  clk: tegra: Fix includes required by fence_udelay()
  clk: imx6sll: fix missing of_node_put()
  clk: imx6ul: fix missing of_node_put()
  clk: imx: add ocram_s clock for i.mx6sx
  clk: mvebu: armada-37xx-periph: Fix wrong return value in get_parent
  ...
2018-08-15 21:41:21 -07:00
Linus Torvalds 54dbe75bbf drm pull for 4.19-rc1
-----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJbc41pAAoJEAx081l5xIa+ZrAP/AzKj4i4pBLVJcvNZ2BwD+UD
 ZNSNj2iqCJ5+Jo/WtIwQ8tLct9UqfVssUwBke6tZksiLdTigGPTUyVIAdK+9kyWD
 D00m3x/pToJrSF2D0FwxQlPUtPkohp9N+E6+TU7gd1oCasZfBzmcEpoVAmZf+NWE
 kN1xXpmGxZWpu0wc7JA2lv9MuUTijCwIqJqa5E0bB3z06G5mw+PJ89kYzMx19OyA
 ZYQK8y3A40ZGl8UbajZ4xg9pqFCRYFFHGqfYlpUWWTh0XMAXu8+Yqzh3dJxmak7r
 4u2pdQBsxPMZO8qKBHpVvI7Zhoe0Ntnolc0XVD+2IbqqnTprVbQs0bWf3YyfUlQi
 1/9bWFK67W0LEuzac6M7a7EQqFNiHF13Btao7aqENTIe/GaCZJoopaiRMAmh6EHD
 4PezeYqrW8cSaPj6OKouL1BhW9Bjixsg0bvjS/uB6m4KekFCt1++BDFGzkqvm6Mo
 SVW7nkJoCFpCASaR7DhUEOPexaHeJ65HCDDUvYdqz9jd2w1TgvvanEZWual1NwEm
 ImA8A4wGZ/3KijpyyKm0gE96RX7+zMMZ3brW6p1vhUUKVYJCrvSr5jrXH5+2k6Aw
 Y455doGL87IRkwyje/YbQF0I8pbUZD9QS5wII13tLGwOH9/uC/Xl6dHNM40gtqyh
 W4gEdY+NAMJmYLvRNawa
 =g9rD
 -----END PGP SIGNATURE-----

Merge tag 'drm-next-2018-08-15' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "This is the main drm pull request for 4.19.

  Rob has some new hardware support for new qualcomm hw that I'll send
  along separately. This has the display part of it, the remaining pull
  is for the acceleration engine.

  This also contains a wound-wait/wait-die mutex rework, Peter has acked
  it for merging via my tree.

  Otherwise mostly the usual level of activity. Summary:

  core:
   - Wound-wait/wait-die mutex rework
   - Add writeback connector type
   - Add "content type" property for HDMI
   - Move GEM bo to drm_framebuffer
   - Initial gpu scheduler documentation
   - GPU scheduler fixes for dying processes
   - Console deferred fbcon takeover support
   - Displayport support for CEC tunneling over AUX

  panel:
   - otm8009a panel driver fixes
   - Innolux TV123WAM and G070Y2-L01 panel driver
   - Ilitek ILI9881c panel driver
   - Rocktech RK070ER9427 LCD
   - EDT ETM0700G0EDH6 and EDT ETM0700G0BDH6
   - DLC DLC0700YZG-1
   - BOE HV070WSA-100
   - newhaven, nhd-4.3-480272ef-atxl LCD
   - DataImage SCF0700C48GGU18
   - Sharp LQ035Q7DB03
   - p079zca: Refactor to support multiple panels

  tinydrm:
   - ILI9341 display panel

  New driver:
   - vkms - virtual kms driver to testing.

  i915:
   - Icelake:
        Display enablement
        DSI support
        IRQ support
        Powerwell support
   - GPU reset fixes and improvements
   - Full ppgtt support refactoring
   - PSR fixes and improvements
   - Execlist improvments
   - GuC related fixes

  amdgpu:
   - Initial amdgpu documentation
   - JPEG engine support on VCN
   - CIK uses powerplay by default
   - Move to using core PCIE functionality for gens/lanes
   - DC/Powerplay interface rework
   - Stutter mode support for RV
   - Vega12 Powerplay updates
   - GFXOFF fixes
   - GPUVM fault debugging
   - Vega12 GFXOFF
   - DC improvements
   - DC i2c/aux changes
   - UVD 7.2 fixes
   - Powerplay fixes for Polaris12, CZ/ST
   - command submission bo_list fixes

  amdkfd:
   - Raven support
   - Power management fixes

  udl:
   - Cleanups and fixes

  nouveau:
   - misc fixes and cleanups.

  msm:
   - DPU1 support display controller in sdm845
   - GPU coredump support.

  vmwgfx:
   - Atomic modesetting validation fixes
   - Support for multisample surfaces

  armada:
   - Atomic modesetting support completed.

  exynos:
   - IPPv2 fixes
   - Move g2d to component framework
   - Suspend/resume support cleanups
   - Driver cleanups

  imx:
   - CSI configuration improvements
   - Driver cleanups
   - Use atomic suspend/resume helpers
   - ipu-v3 V4L2 XRGB32/XBGR32 support

  pl111:
   - Add Nomadik LCDC variant

  v3d:
   - GPU scheduler jobs management

  sun4i:
   - R40 display engine support
   - TCON TOP driver

  mediatek:
   - MT2712 SoC support

  rockchip:
   - vop fixes

  omapdrm:
   - Workaround for DRA7 errata i932
   - Fix mm_list locking

  mali-dp:
   - Writeback implementation
        PM improvements
   - Internal error reporting debugfs

  tilcdc:
   - Single fix for deferred probing

  hdlcd:
   - Teardown fixes

  tda998x:
   - Converted to a bridge driver.

  etnaviv:
   - Misc fixes"

* tag 'drm-next-2018-08-15' of git://anongit.freedesktop.org/drm/drm: (1506 commits)
  drm/amdgpu/sriov: give 8s for recover vram under RUNTIME
  drm/scheduler: fix param documentation
  drm/i2c: tda998x: correct PLL divider calculation
  drm/i2c: tda998x: get rid of private fill_modes function
  drm/i2c: tda998x: move mode_valid() to bridge
  drm/i2c: tda998x: register bridge outside of component helper
  drm/i2c: tda998x: cleanup from previous changes
  drm/i2c: tda998x: allocate tda998x_priv inside tda998x_create()
  drm/i2c: tda998x: convert to bridge driver
  drm/scheduler: fix timeout worker setup for out of order job completions
  drm/amd/display: display connected to dp-1 does not light up
  drm/amd/display: update clk for various HDMI color depths
  drm/amd/display: program display clock on cache match
  drm/amd/display: Add NULL check for enabling dp ss
  drm/amd/display: add vbios table check for enabling dp ss
  drm/amd/display: Don't share clk source between DP and HDMI
  drm/amd/display: Fix DP HBR2 Eye Diagram Pattern on Carrizo
  drm/amd/display: Use calculated disp_clk_khz value for dce110
  drm/amd/display: Implement custom degamma lut on dcn
  drm/amd/display: Destroy aux_engines only once
  ...
2018-08-15 17:39:07 -07:00
Stephen Boyd ac7da1b787 Merge branches 'clk-actions-s700', 'clk-exynos-unused', 'clk-qcom-dispcc-845', 'clk-scmi-round' and 'clk-cs2000-spdx' into clk-next
* clk-actions-s700:
  :  - Actions Semi Owl series S700 SoC clk driver
  clk: actions: Add S700 SoC clock support
  dt-bindings: clock: Add S700 support for Actions Semi Soc's
  clk: actions: Add missing REGMAP_MMIO dependency

* clk-exynos-unused:
  :  - Remove an unused variable from Exynos4412 ISP driver
  clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable

* clk-qcom-dispcc-845:
  :  - Qualcomm SDM845 display clock controller
  clk: qcom: Add display clock controller driver for SDM845
  dt-bindings: clock: Introduce QCOM Display clock bindings
  clk: qcom: Move frequency table macro to common file

* clk-scmi-round:
  :  - Fix a thinko bug in SCMI clk division logic
  clk: scmi: Fix the rounding of clock rate

* clk-cs2000-spdx:
  clk: cs2000-cp: convert to SPDX identifiers
2018-08-14 23:00:15 -07:00
Stephen Boyd 032405a754 Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter', 'clk-allwinner' and 'clk-uniphier' into clk-next
* clk-imx6-ocram:
  :  - i.MX6SX ocram_s clk support
  clk: imx: add ocram_s clock for i.mx6sx

* clk-missing-put:
  :  - Add missing of_node_put()s in some i.MX clk drivers
  clk: imx6sll: fix missing of_node_put()
  clk: imx6ul: fix missing of_node_put()

* clk-tegra-sdmmc-jitter:
  :  - Tegra SDMMC clk jitter improvements with high speed signaling modes
  clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks
  clk: tegra: Add sdmmc mux divider clock
  clk: tegra: Refactor fractional divider calculation
  clk: tegra: Fix includes required by fence_udelay()

* clk-allwinner:
  clk: sunxi-ng: add A64 compatible string
  dt-bindings: add compatible string for the A64 DE2 CCU
  clk: sunxi-ng: r40: Export video PLLs
  clk: sunxi-ng: r40: Allow setting parent rate to display related clocks
  clk: sunxi-ng: r40: Add minimal rate for video PLLs

* clk-uniphier:
  :  - Uniphier NAND, USB3 PHY, and SPI clk support
  clk: uniphier: add clock frequency support for SPI
  clk: uniphier: add more USB3 PHY clocks
  clk: uniphier: add NAND 200MHz clock
2018-08-14 22:58:53 -07:00
Stephen Boyd d16adaf0b9 Merge branches 'clk-mvebu-spdx', 'clk-meson', 'clk-imx7d-mu', 'clk-imx-init-array-cleanup' and 'clk-rockchip' into clk-next
* clk-mvebu-spdx:
  clk: mvebu: armada-37xx-periph: switch to SPDX license identifier

* clk-meson:
  clk: meson: add gen_clk
  clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition
  clk: meson-axg: add clocks required by pcie driver
  clk: meson: remove unused clk-audio-divider driver
  clk: meson: stop rate propagation for audio clocks
  clk: meson: axg: add the audio clock controller driver
  clk: meson: add axg audio sclk divider driver
  clk: meson: add triple phase clock driver
  clk: meson: add clk-phase clock driver
  clk: meson: clean-up meson clock configuration
  clk: meson: remove obsolete register access
  clk: meson: expose GEN_CLK clkid
  clk: meson-axg: add pcie and mipi clock bindings
  dt-bindings: clock: add meson axg audio clock controller bindings
  clk: meson: audio-divider is one based
  clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL

* clk-imx7d-mu:
  :  - i.MX7D mailbox clk support
  clk: imx7d: add IMX7D_MU_ROOT_CLK

* clk-imx-init-array-cleanup:
  :  - i.MX clk init arrays removed in place of CLK_IS_CRITICAL
  clk: imx6sx: remove clks_init_on array
  clk: imx6sl: remove clks_init_on array
  clk: imx6q: remove clks_init_on array

* clk-rockchip:
  clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399
  clk: rockchip: fix clk_i2sout parent selection bits on rk3399
  clk: rockchip: add clock controller for px30
  clk: rockchip: add support for half divider
  dt-bindings: add bindings for px30 clock controller
  clk: rockchip: add dt-binding header for px30
2018-08-14 22:58:45 -07:00
Stephen Boyd ea4f7872c7 Merge branches 'clk-ingenic-fixes', 'clk-max9485', 'clk-pxa-32k-pll', 'clk-aspeed' and 'clk-imx6sll-gpio' into clk-next
* clk-ingenic-fixes:
  :  - Ingenic i2s bit update and allow UDC clk to gate
  clk: ingenic: Add missing flag for UDC clock
  clk: ingenic: Fix incorrect data for the i2s clock

* clk-max9485:
  :  - Maxim 9485 Programmable Clock Generator
  clk: Add driver for MAX9485
  dts: clk: add devicetree bindings for MAX9485

* clk-pxa-32k-pll:
  :  - Expose 32 kHz PLL on PXA SoCs
  clk: pxa: export 32kHz PLL

* clk-aspeed:
  :  - Fix name of aspeed SDC clk define to have only one 'CLK'
  clk: aspeed: Fix SDCLK name

* clk-imx6sll-gpio:
  :  - imx6sll GPIO clk gate support
  clk: imx6sll: add GPIO LPCGs
2018-08-14 22:58:39 -07:00
Stephen Boyd b183c6887a Merge branches 'clk-imx6-video-parent', 'clk-qcom-sdm845-criticals', 'clk-renesas', 'clk-stratix10-fixes' and 'clk-atmel-i2s' into clk-next
* clk-imx6-video-parent:
  :  - Fix i.MX6QDL video clk parent
  clk: imx6: fix video_27m parent for IMX6QDL_CLK_CKO1_SEL

* clk-qcom-sdm845-criticals:
  :  - critical clk markings for qcom SDM845
  clk: qcom: Enable clocks which needs to be always on for SDM845

* clk-renesas:
  clk: renesas: Renesas R9A06G032 clock driver
  dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation
  dt-bindings: clock: Add the r9a06g032-sysctrl.h file
  clk: renesas: r8a7795: Add CCREE clock
  clk: renesas: r8a7795: Add CR clock

* clk-stratix10-fixes:
  :  - Fix Stratix10 mpu_free_clk and sdmmc_free_clk parents
  clk: socfpga: stratix10: fix the sdmmc_free_clk mux
  clk: socfpga: stratix10: fix the parents of mpu_free_clk

* clk-atmel-i2s:
  :  - Atmel at91 I2S audio clk support
  clk: at91: add I2S clock mux driver
  dt-bindings: clk: at91: add an I2S mux clock
2018-08-14 22:58:35 -07:00
Linus Torvalds b018fc9800 Power management updates for 4.19-rc1
- Add a new framework for CPU idle time injection (Daniel Lezcano).
 
  - Add AVS support to the armada-37xx cpufreq driver (Gregory CLEMENT).
 
  - Add support for current CPU frequency reporting to the ACPI CPPC
    cpufreq driver (George Cherian).
 
  - Rework the cooling device registration in the imx6q/thermal
    driver (Bastian Stender).
 
  - Make the pcc-cpufreq driver refuse to work with dynamic
    scaling governors on systems with many CPUs to avoid
    scalability issues with it (Rafael Wysocki).
 
  - Fix the intel_pstate driver to report different maximum CPU
    frequencies on systems where they really are different and to
    ignore the turbo active ratio if hardware-managend P-states (HWP)
    are in use; make it use the match_string() helper (Xie Yisheng,
    Srinivas Pandruvada).
 
  - Fix a minor deferred probe issue in the qcom-kryo cpufreq
    driver (Niklas Cassel).
 
  - Add a tracepoint for the tracking of frequency limits changes
    (from Andriod) to the cpufreq core (Ruchi Kandoi).
 
  - Fix a circular lock dependency between CPU hotplug and sysfs
    locking in the cpufreq core reported by lockdep (Waiman Long).
 
  - Avoid excessive error reports on driver registration failures
    in the ARM cpuidle driver (Sudeep Holla).
 
  - Add a new device links flag to the driver core to make links go
    away automatically on supplier driver removal (Vivek Gautam).
 
  - Eliminate potential race condition between system-wide power
    management transitions and system shutdown (Pingfan Liu).
 
  - Add a quirk to save NVS memory on system suspend for the ASUS
    1025C laptop (Willy Tarreau).
 
  - Make more systems use suspend-to-idle (instead of ACPI S3) by
    default (Tristian Celestin).
 
  - Get rid of stack VLA usage in the low-level hibernation code on
    64-bit x86 (Kees Cook).
 
  - Fix error handling in the hibernation core and mark an expected
    fall-through switch in it (Chengguang Xu, Gustavo Silva).
 
  - Extend the generic power domains (genpd) framework to support
    attaching a device to a power domain by name (Ulf Hansson).
 
  - Fix device reference counting and user limits initialization in
    the devfreq core (Arvind Yadav, Matthias Kaehlcke).
 
  - Fix a few issues in the rk3399_dmc devfreq driver and improve its
    documentation (Enric Balletbo i Serra, Lin Huang, Nick Milner).
 
  - Drop a redundant error message from the exynos-ppmu devfreq driver
    (Markus Elfring).
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJbcqOqAAoJEILEb/54YlRxOxMP/2ZFvnXU0pey/VX/+TelLMS7
 /ROVGQ+s75QP1c9P/3BjvnXc0dsMRLRFPog+7wyoG/2DbEIV25COyAYsmSE0TRni
 XUaZO6YAx4/e3pm2AfamYbLCPvjw85eucHg5QJQ4b1mSVRNJOsNv+fUo6lmxwvnm
 j9kHvfttFeIhoa/3wa7hbhPKLln46atnpVSxCIceY7L5EFNhkKBvQt6B5yx9geb9
 QMY6ohgkyN+bnK9QySXX+trcWpzx1uGX0apI07NkX7n9QGFdU4lCW8lsAf8jMC3g
 PPValTsUQsdRONUJJsrgqBioq4tvtgQWibyS2tfRrOGXYvHpJNpGmHVplfsrf/SE
 cvlsciR47YbmrXZuqg/r8hql+qefNN16/rnZIZ9VnbcG806VBy2z8IzI5wcdWR7p
 vzxhbCqVqOHcEdEwRwvuM2io67MWvkGtKsbCP+33DBh8SubpsECpKN4nIDboa3SE
 CJ15RUqXnF6enmmfCKOoHZeu7iXWDz6Pi71XmRzaj9DqbITVV281IerqLgV3rbal
 BVa53+202iD0IP+2b7KedGe/5ALlI97ffN0gB+L/eB832853DKSZQKzcvvpRhEN7
 Iv2crnUwuQED9ns8P7hzp1Bk9CFCAOLW8UM43YwZRPWnmdeSsPJusJ5lzkAf7bss
 wfsFoUE3RaY4msnuHyCh
 =kv2M
 -----END PGP SIGNATURE-----

Merge tag 'pm-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management updates from Rafael Wysocki:
 "These add a new framework for CPU idle time injection, to be used by
  all of the idle injection code in the kernel in the future, fix some
  issues and add a number of relatively small extensions in multiple
  places.

  Specifics:

   - Add a new framework for CPU idle time injection (Daniel Lezcano).

   - Add AVS support to the armada-37xx cpufreq driver (Gregory
     CLEMENT).

   - Add support for current CPU frequency reporting to the ACPI CPPC
     cpufreq driver (George Cherian).

   - Rework the cooling device registration in the imx6q/thermal driver
     (Bastian Stender).

   - Make the pcc-cpufreq driver refuse to work with dynamic scaling
     governors on systems with many CPUs to avoid scalability issues
     with it (Rafael Wysocki).

   - Fix the intel_pstate driver to report different maximum CPU
     frequencies on systems where they really are different and to
     ignore the turbo active ratio if hardware-managend P-states (HWP)
     are in use; make it use the match_string() helper (Xie Yisheng,
     Srinivas Pandruvada).

   - Fix a minor deferred probe issue in the qcom-kryo cpufreq driver
     (Niklas Cassel).

   - Add a tracepoint for the tracking of frequency limits changes (from
     Andriod) to the cpufreq core (Ruchi Kandoi).

   - Fix a circular lock dependency between CPU hotplug and sysfs
     locking in the cpufreq core reported by lockdep (Waiman Long).

   - Avoid excessive error reports on driver registration failures in
     the ARM cpuidle driver (Sudeep Holla).

   - Add a new device links flag to the driver core to make links go
     away automatically on supplier driver removal (Vivek Gautam).

   - Eliminate potential race condition between system-wide power
     management transitions and system shutdown (Pingfan Liu).

   - Add a quirk to save NVS memory on system suspend for the ASUS 1025C
     laptop (Willy Tarreau).

   - Make more systems use suspend-to-idle (instead of ACPI S3) by
     default (Tristian Celestin).

   - Get rid of stack VLA usage in the low-level hibernation code on
     64-bit x86 (Kees Cook).

   - Fix error handling in the hibernation core and mark an expected
     fall-through switch in it (Chengguang Xu, Gustavo Silva).

   - Extend the generic power domains (genpd) framework to support
     attaching a device to a power domain by name (Ulf Hansson).

   - Fix device reference counting and user limits initialization in the
     devfreq core (Arvind Yadav, Matthias Kaehlcke).

   - Fix a few issues in the rk3399_dmc devfreq driver and improve its
     documentation (Enric Balletbo i Serra, Lin Huang, Nick Milner).

   - Drop a redundant error message from the exynos-ppmu devfreq driver
     (Markus Elfring)"

* tag 'pm-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (35 commits)
  PM / reboot: Eliminate race between reboot and suspend
  PM / hibernate: Mark expected switch fall-through
  cpufreq: intel_pstate: Ignore turbo active ratio in HWP
  cpufreq: Fix a circular lock dependency problem
  cpu/hotplug: Add a cpus_read_trylock() function
  x86/power/hibernate_64: Remove VLA usage
  cpufreq: trace frequency limits change
  cpufreq: intel_pstate: Show different max frequency with turbo 3 and HWP
  cpufreq: pcc-cpufreq: Disable dynamic scaling on many-CPU systems
  cpufreq: qcom-kryo: Silently error out on EPROBE_DEFER
  cpufreq / CPPC: Add cpuinfo_cur_freq support for CPPC
  cpufreq: armada-37xx: Add AVS support
  dt-bindings: marvell: Add documentation for the Armada 3700 AVS binding
  PM / devfreq: rk3399_dmc: Fix duplicated opp table on reload.
  PM / devfreq: Init user limits from OPP limits, not viceversa
  PM / devfreq: rk3399_dmc: fix spelling mistakes.
  PM / devfreq: rk3399_dmc: do not print error when get supply and clk defer.
  dt-bindings: devfreq: rk3399_dmc: move interrupts to be optional.
  PM / devfreq: rk3399_dmc: remove wait for dcf irq event.
  dt-bindings: clock: add rk3399 DDR3 standard speed bins.
  ...
2018-08-14 13:12:24 -07:00
Linus Torvalds c6ed444fd6 This is the bulk of pin control changes for v4.19:
Core changes:
 
 - Augment pinctrl_generic_add_group() and pinmux_generic_add_function()
   to return the selector for the added group/function to the caller
   and augment (hopefully) all drivers to handle this.
 
 New subdrivers:
 
 - Qualcomm PM8998 and PM8005 are supported in the SPMI pin
   control and GPIO driver.
 
 - Intel Ice Lake PCH (platform controller hub) support.
 
 - NXP (ex Freescale) i.MX8MQ support.
 
 - Berlin AS370 support.
 
 Improvements to drivers:
 
 - Support interrupts on the Ocelot pin controller.
 
 - Add SPI pins to the Uniphier driver.
 
 - Define a GPIO compatible per SoC in the Tegra driver.
 
 - Push Tegra initialization down in the initlevels.
 
 - Support external wakeup interrupts on the Exynos.
 
 - Add generic clocks pins to the meson driver.
 
 - Add USB and HSCIF pins for some Renesas PFC chips.
 
 - Suspend/resume support in the armada-37xx.
 
 - Interrupt support for the Actions Semiconductor S900 also
   known as "owl".
 
 - Correct the pin ordering in Cedarfork.
 
 - Debugfs output for INTF in the mcp23s08 driver
 
 - Avoid divisions in context save/restore in pinctrl-single.
 
 The rest is minor bug fixes or cleanups.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJbcYUCAAoJEEEQszewGV1zHyQP/2sbSF5fDiOs+CdAqHI+LzIU
 KHfXeamJlufZzIY5Cit6L9BRowVLnWewK3lkmQ3NJmUtF4KTbDkbMMEyzNh15WEu
 47xOVeHpa1Mrp3kTRiatVW7BibnC97wXFg48omG6KAABLt/eRNZ69NTdq6VZUdWD
 7PhCLhLtZSry4nZ/dDp2esc+yGeeQkMNMeNZEAiG+MF5+OYUtNdr7NUYCxMpQuTC
 7KxyCia8S0NNND3RtUANUP+M8XeyWRWYEQnqPXuWo1+Fwpk2CoYdraw7m44X7YIw
 voBqap5ThOFfhmR7LiqAaMcQEgm5n5ABy+qE0+fcJs4TYcdV8MYSQjCU/lIpO81b
 EfdcbU4lDkbDtTLO7aFSjXI01qB/J+bRmxcyTkYbUxENdNW7ZD1izHambhJNxDEt
 LO75fOlGJBx348zsypGL13WLc5j/IL4raa8Bj5+BOLuUbQOEpCnFovcktx42QJOK
 NHnNK6RknlpXjeNO3w33YO/oxNAkdhLlNU7IHXTN6T9rcBJJjtS7MFn7Sro+QGlC
 6EwyGfb0Y08wcUIkMpKHL+9L6So5r08GESzb7PLpgOZIvIi291wA454r1ntK1zoW
 JBDX+2vrFjmLSSKWqhKN5nCq85V6M2A2PJSfYG6A0CJZLEPDRC7Lx3roV2W2vss4
 EoxKjpMskqRuSbmy/WJZ
 =EUMW
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for v4.19:

  Core changes:

   - Augment pinctrl_generic_add_group() and pinmux_generic_add_function()
     to return the selector for the added group/function to the caller
     and augment (hopefully) all drivers to handle this

  New subdrivers:

   - Qualcomm PM8998 and PM8005 are supported in the SPMI pin control
     and GPIO driver

   - Intel Ice Lake PCH (platform controller hub) support

   - NXP (ex Freescale) i.MX8MQ support

   - Berlin AS370 support

  Improvements to drivers:

   - Support interrupts on the Ocelot pin controller

   - Add SPI pins to the Uniphier driver

   - Define a GPIO compatible per SoC in the Tegra driver

   - Push Tegra initialization down in the initlevels

   - Support external wakeup interrupts on the Exynos

   - Add generic clocks pins to the meson driver

   - Add USB and HSCIF pins for some Renesas PFC chips

   - Suspend/resume support in the armada-37xx

   - Interrupt support for the Actions Semiconductor S900 also known as
     "owl"

   - Correct the pin ordering in Cedarfork

   - Debugfs output for INTF in the mcp23s08 driver

   - Avoid divisions in context save/restore in pinctrl-single

  The rest is minor bug fixes or cleanups"

* tag 'pinctrl-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (69 commits)
  pinctrl: nomadik: silence uninitialized variable warning
  pinctrl: axp209: Fix NULL pointer dereference after allocation
  pinctrl: samsung: Remove duplicated "wakeup" in printk
  pinctrl: ocelot: add support for interrupt controller
  pinctrl: intel: Don't shadow error code of gpiochip_lock_as_irq()
  pinctrl: berlin: fix 'pctrl->functions' allocation in berlin_pinctrl_build_state
  gpio: tegra: Move driver registration to subsys_init level
  pinctrl: tegra: Move drivers registration to arch_init level
  pinctrl: baytrail: actually print the apparently misconfigured pin
  MAINTAINERS: Replace Heikki as maintainer of Intel pinctrl
  pinctrl: freescale: off by one in imx1_pinconf_group_dbg_show()
  pinctrl: uniphier: add spi pin-mux settings
  pinctrl: cannonlake: Fix community ordering for H variant
  pinctrl: tegra: define GPIO compatible node per SoC
  pinctrl: intel: Do pin translation when lock IRQ
  pinctrl: imx: off by one in imx_pinconf_group_dbg_show()
  pinctrl: mediatek: include chained_irq.h header
  pinctrl/amd: only handle irq if it is pending and unmasked
  pinctrl/amd: fix gpio irq level in debugfs
  pinctrl: stm32: add syscfg mask parameter
  ...
2018-08-14 12:31:27 -07:00
Mark Brown d22d59362b
Merge branch 'regulator-4.19' into regulator-next 2018-08-10 17:31:24 +01:00
David Collins 0db021f7a2
regulator: dt-bindings: add QCOM RPMh regulator bindings
Introduce bindings for RPMh regulator devices found on some
Qualcomm Technlogies, Inc. SoCs.  These devices allow a given
processor within the SoC to make PMIC regulator requests which
are aggregated within the RPMh hardware block along with requests
from other processors in the SoC to determine the final PMIC
regulator hardware state.

Signed-off-by: David Collins <collinsd@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-08-10 17:30:25 +01:00