* git://git.infradead.org/mtd-2.6: (90 commits)
jffs2: Fix long-standing bug with symlink garbage collection.
mtd: OneNAND: Fix test of unsigned in onenand_otp_walk()
mtd: cfi_cmdset_0002, fix lock imbalance
Revert "mtd: move mxcnd_remove to .exit.text"
mtd: m25p80: add support for Macronix MX25L4005A
kmsg_dump: fix build for CONFIG_PRINTK=n
mtd: nandsim: add support for 4KiB pages
mtd: mtdoops: refactor as a kmsg_dumper
mtd: mtdoops: make record size configurable
mtd: mtdoops: limit the maximum mtd partition size
mtd: mtdoops: keep track of used/unused pages in an array
mtd: mtdoops: several minor cleanups
core: Add kernel message dumper to call on oopses and panics
mtd: add ARM pismo support
mtd: pxa3xx_nand: Fix PIO data transfer
mtd: nand: fix multi-chip suspend problem
mtd: add support for switching old SST chips into QRY mode
mtd: fix M29W800D dev_id and uaddr
mtd: don't use PF_MEMALLOC
mtd: Add bad block table overrides to Davinci NAND driver
...
Fixed up conflicts (mostly trivial) in
drivers/mtd/devices/m25p80.c
drivers/mtd/maps/pcmciamtd.c
drivers/mtd/nand/pxa3xx_nand.c
kernel/printk.c
The Freescale MX27 and MX31 SoCs have a EHCI controller onboard.
The controller is capable of USB on the go. This patch adds
a driver to support all three of them.
Users have to pass details about serial interface configuration in the
platform data.
The USB OTG core used here is the ARC core, so the driver should
be renamed and probably be merged with ehci-fsl.c eventually.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch configures iomux and i2c io expander in order to add
support to SD/MMC cards on i-MXT TD60.
Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is useful for audio where we do not want to setup a new scatterlist
after playing 4GB of audio data. This would cause skips in the playback.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current model does not allow to put a pad into different modes
once a pins is allocated. Remove the resource handling.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The macro mx31_revision() used to take the global variable system_rev to
determine the CPU revision number. However, this number is expected to
be set by the bootloader and is usually zero (at least on my MX31 based
boards here). More than that, it is usually taken to identify the
board's revision, not the CPU's.
Fix that by reading the the CPU's SREV register instead.
Right now, mx31_read_cpu_rev() is called from mx31_clocks_init() which
is admittedly not a good place for it. However, we need to enable the
IIM clock first, and the clock code also has conditional code that
depends on mx31_revision() returning the right thing.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit splits the support code for LogicPD's mx31lite hardware
into module and board specific parts.
This introduces a new mandatory coreparam called 'mx31lite_baseboard'
which specifies the base board support to use. For now, only the LiteKit
development board is supported, and developers of own boards are
encouraged to use that as reference.
The UART support moved to the board code.
Some comments were amended along the way.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to Russell King handle_edge_irq is only useful for "edge-based
inputs where the controller does not remember transitions with the input
masked."
So using handle_edge_irq unconditionally for both edge and level irqs is
wrong. Testing showed that the controller does remember transitions
while the interrupt is masked. So use handle_level_irq unconditionally.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ARC USB OTG Core has support for accessing ULPI tranceivers
through so called ULPI viewports. Export a set of function for use with
the USB OTG framework.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Cc: linux-usb@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver has been tested on i.MX1/i.MX27/i.MX35 with an AT25 type
EEPROM and on i.MX27/i.MX31 with a Freescale MC13783 PMIC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: David Brownell <david-b@pacbell.net>
Cc: Andrea Paterniani <a.paterniani@swapp-eng.it>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
MBIMX27 is the evaluation board for CPUIMX27 and integrates : a
QVGA TFT, a SPI touchscreen controler, a SDCard connector wired to
SDHC1.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CPUIMX27 is built around Freescale's i.MX27 and has up to 64MB of
NOR Flash, up to 512MB of NAND Flash and up to 256MB of mDDR,
it includes an ethernet PHY in MII mode, an I2C RTC and a
ST16554 QuadUART on nCS3.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old defines leaked in from an old version of the patch.
Change the defines to match the register layout of the iomuxer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the MT9T031 CMOS camera sensor from Aptina to the PCM037
board. Also add two I2C iomux pin definitions, needed for pcm037. Also
remove now unneeded #ifdef CONFIG_I2C_IMX.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (417 commits)
MAINTAINERS: EB110ATX is not ebsa110
MAINTAINERS: update Eric Miao's email address and status
fb: add support of LCD display controller on pxa168/910 (base layer)
[ARM] 5552/1: ep93xx get_uart_rate(): use EP93XX_SYSCON_PWRCNT and EP93XX_SYSCON_PWRCN
[ARM] pxa/sharpsl_pm: zaurus needs generic pxa suspend/resume routines
[ARM] 5544/1: Trust PrimeCell resource sizes
[ARM] pxa/sharpsl_pm: cleanup of gpio-related code.
[ARM] pxa/sharpsl_pm: drop set_irq_type calls
[ARM] pxa/sharpsl_pm: merge pxa-specific code into generic one
[ARM] pxa/sharpsl_pm: merge the two sharpsl_pm.c since it's now pxa specific
[ARM] sa1100: remove unused collie_pm.c
[ARM] pxa: fix the conflicting non-static declarations of global_gpios[]
[ARM] 5550/1: Add default configure file for w90p910 platform
[ARM] 5549/1: Add clock api for w90p910 platform.
[ARM] 5548/1: Add gpio api for w90p910 platform
[ARM] 5551/1: Add multi-function pin api for w90p910 platform.
[ARM] Make ARM_VIC_NR depend on ARM_VIC
[ARM] 5546/1: ARM PL022 SSP/SPI driver v3
ARM: OMAP4: SMP: Update defconfig for OMAP4430
ARM: OMAP4: SMP: Enable SMP support for OMAP4430
...
Using the iMX serial driver with an IrDA device
needs extra peripheral settings and specific
timing depending on the transmitter circuitry used.
Signed-off-by: Fabian Godehardt <fg@emlix.com>
Signed-off-by: Oskar Schirmer <os@emlix.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Sascha Hauer wrote:
> On Tue, Jun 02, 2009 at 04:18:42PM -0400, Daniel Schaeffer wrote:
>> Add basic support for the Logic i.MX27LITE board.
>>
>> Signed-off-by: Daniel Schaeffer <daniel.schaeffer@timesys.com>
>
> Besides the comment made by Fabio this looks ok to me.
>
> Sascha
>
>
Fixed issues pointed out by Fabio and Magnus, and rebased to mxc-master head.
Signed-off-by: Daniel Schaeffer <daniel.schaeffer@timesys.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Support code for lilly-1131 is implemented in a module/baseboard
fashion. All code specific to peripherals found on the development board
will go to this file.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds basic support for INCO startec's LILLY-1131 iMX31 based
modules. The module needs a baseboard support to work which will be
added in the next patch.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX31 PDK consists of several boards, one of them is a debug
board containing a CPLD which controls some debug leds, switch
buttons, an interrupt chip and an Ethernet controller.
This patch adds support for detecting if the PDK board is present
(during boot) and adds the interrupt chip to the kernel.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since iomux code is not directly related to gpio on mx31, the calls
to gpio_request are removed from iomux.c file.
These calls have to be done in platform initialization files. The
name of the singe pin call for iomux is also changed to
mxc_iomux_alloc_pin.
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several comments in board config files stated "mandatory for
CONFIG_LL_DEBUG" but the correct name is CONFIG_DEBUG_LL.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As suggested by Sascha, I regroup them in a single patch so that the
other patches become more orthogonal.
changes since v1: changed I2C1 pin names
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This hw-random driver add support to RNGA hardware found
on some i.MX processors.
Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
Acked-by: Matt Mackall <mpm@selenic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Kconfig enables now HAVE_PWM (this enables in turn the selection of
CONFIG_BACKLIGHT_PWM)
* changes CONFIG_ARCH_MXyy to CONFIG_MACH_MXyy
* fix some register names to match those of the reference manual
* write a stub code so that the PWM can be used to program the
LCD backlight
* convert from #ifdef CONFIG_ARCH_MXxx to cpu_is_mxXX()
* remove unneeded defines and fix 80-column "violations" of checkpatch.pl
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[PATCH v6] MXC: mx21ads base support
Base machine support for the Freescale i.MX21ADS
(M9328MX21ADSE) Application Development System.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MXC GPIO controller does not support generation of interrupts on both
edges. Emulate this mode in software by reconfiguring the irq trigger
polarity on each interrupt. This follows an example of
drivers/mfd/asic3.c.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently we depend on hardcoded base addresses for the interrupt
controller. This prevents us from compiling in more than one i.MX
architecture at a time. This patch changes the base address to a
runtime calculated one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently we depend on hardcoded base addresses for the timer.
This prevents us from compiling in more than one i.MX architecture
at a time. This patch changes the base address to a runtime
calculated one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows us to have more mapping functions for more than one
i.MX architecture in the kernel. As this is the earliest board
specific hook we have, also use it to set the cpu type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This iomux is called iomux-v3 in the tree because it is the third known
incarnation of MXC iomuxers. It is not only found on the MX35 but also
on the MX51 and probably others.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Before this patch I got the following line in my dmesg:
[ 0.000000] BUG: mapping for 0xd4000000 at 0xeb000000 overlaps vmalloc space
VMALLOC_END is 0xf4000000 and there are the following other mappings
defined for mx27ads:
(0xa0500000,+0x00001000) maps to 0xffff0000
(0x10000000,+0x00100000) maps to 0xf4000000
(0x80000000,+0x00100000) maps to 0xf4100000
(0xd8000000,+0x00100000) maps to 0xf4200000
So map PBC to 0xf4300000.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX31 I sometimes get spurious interrupts. There is no need
to crash the whole system when this happens. Instead, silently
ignore it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On MX2 platforms imx_dma_request() calls request_irq() which may sleep
with interrupts disabled.
Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The sequence
imx_dma_request()
imx_dma_enable()
imx_dma_free()
left the dma channel in_use mode and did not release the timer.
Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pass clocksource pointer to the read() callback for clocksources. This
allows us to share the callback between multiple instances.
[hugh@veritas.com: fix powerpc build of clocksource pass clocksource mods]
[akpm@linux-foundation.org: cleanup]
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: John Stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Move ifdef under function brackets. This fixes compile crach when IRQ priorities
are disabled.
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Set the correct clkdev-name for the i2c clock.
It also get's rid of the ARCH_NR_GPIOS define on the rationale
that isn't an ARCH-wide setting anyway. If a device has two
pca953x devices, the reserved number will be wrong.
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
* 'i2c-for-2630-v2' of git://aeryn.fluff.org.uk/bjdooks/linux:
i2c: imx: Make disable_delay a per-device variable
i2c: xtensa s6000 i2c driver
powerpc/85xx: i2c-mpc: use new I2C bindings for the Socates board
i2c: i2c-mpc: make I2C bus speed configurable
i2c: i2c-mpc: use dev based printout function
i2c: i2c-mpc: various coding style fixes
i2c: imx: Add missing request_mem_region in probe()
i2c: i2c-s3c2410: Initialise Samsung I2C controller early
i2c-s3c2410: Simplify bus frequency calculation
i2c-s3c2410: sda_delay should be in ns, not clock ticks
i2c: iMX/MXC support
Implementation of I2C Adapter/Algorithm Driver for I2C Bus integrated
in Freescale's i.MX/MXC processors.
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Tested-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch adds arch_reset() function for all mxc platforms.
It also removes (unsused) arch/arm/mach-mx2/system.c file.
This patch has been tested on i.MX1/27/31/35
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OMAP wishes to pass state to the boot loader upon reboot in order to
instruct it whether to wait for USB-based reflashing or not. There is
already a facility to do this via the reboot() syscall, except we ignore
the string passed to machine_restart().
This patch fixes things to pass this string to arch_reset(). This means
that we keep the reboot mode limited to telling the kernel _how_ to
perform the reboot which should be independent of what we request the
boot loader to do.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds basic support for Dave/DENX QongEVB-LITE i.MX31-based
board. It includes support for clocks initialization, UART1, NOR-flash,
FPGA-attached NAND flash and DNET ethernet controller (inside FPGA).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds clkdev support for i.MX31. This is done in a
similar way done previously for i.MX27
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds clock support for i.MX35 SoCs. We do not support setting
of clock rates yet, but most interesting clock rates should be reported.
I couldn't test all clock rates and the datasheet contains some obvious
bugs, so expect some bugs in this code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We had hardcoded cpu_is_ macros for mxc architectures till now. As we
want to run the same kernel on i.MX31 and i.MX35 this patch adds cpu_is_
macros which expand to 0 or 1 if only one architecture is compiled in and
only check for the cpu type if more than one architecture is compiled
in.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch moves the stuff common to i.MX31 and i.MX35 to mx3x.h and the
specifics to mx31.h/mx35.h. We can build a kernel which runs on i.MX31 and
i.MX35, so always include mx31.h and mx35.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This enables our mx31moboard to be used on the different baseboards that
we are developping according to the application needs. There are not
many differences between the boards for now, but when other peripherals
are available for mx31 the differences are going to grow.
v2: takes Sascha's comments into account
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make sure not to create spurious pulses on GPIOs, when configuring them as
output: first set required level, then switch direction.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver has been tested on MX27/MX31. It should work on MX1/MX1
aswell, but the actual setting of the PWM is missing so far.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This new implemenatation avoids that two physical pins are claimed by
the same driver (also with the the gpr hardware modes).
The gpio kernel lib is also called when a capable gpio pin is assigned
its gpio function.
The mxc_iomux_mode function is still here for backward compatibility but
should not be used anymore.
V2:
In the precendent revision, the iomux code was claiming a pin when its
hardware mode was changed. This was uncorrect: when the hardware mode is
changed, the pin must still be claimed through the iomux.
In order to have a pin working in mode hw2, we must fist issue the
mxc_iomux_set_gpr call and then the corresponding mxc_iomux_mode calls
with the FUNC mode (usually done with mxc_iomux_setup_multiple_pins).
The reverse calls must be done to fee the pins.
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several of the macros in mx31ads.h depend on mx31.h which is no longer
included in quite so many standard headers as it once was. Include it
directly so we can build.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch mimicks what Martin wrote on the mailing list:
* move arch/arm/mach-imx/include/mach/imxfb.h into
arch/arm/mach-mxc/include/mach/imxfb.h
* changes Kconfig so that CONFIG_FB_IMX is selectable
* adds a platform device (copied from some pengutronix
patches)
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on code from "Martin Fuzzey" <mfuzzey@gmail.com>
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* define new CONFIG_ARCH_MX21 (this one is currently mutually exclusive to
CONFIG_ARCH_MX27, but this might change)
* splits one header file. Memory definitions, interrupt sources,
DMA channels are split into common part, i.MX27 specific and i.MX21
specific.
* guard access to UART5/UART6, which don't exist on i.MX21
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Here are some of the warnings that get fixed by this:
> 200 times: warning: cast adds address space to expression (<asn:2>)
twelve times: warning: symbol 'xxx' was not declared. Should it be static
two times: warning: symbol 'clock' shadows an earlier one
five times: warning: incorrect type in initializer (different address spaces)
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch only adds general clkdev support without actually switching
any MXC architecture to clkdev.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The context makes it clear already that these are clocks, so there's
no need for such a suffix. This patch only changes the clocks actually
used in the tree. The remaining clocks are renamed in the subsequent
architecture specific patches.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- rename mxc_clocks_init to architecture specific versions. This
allows us to have more than one architecture compiled in.
- call mxc_timer_init from clock initialisation instead from board
code
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We had 3 versions of this function in clock support for MX1/2/3
Use a single one instead. I picked the one from the MX3 as it seems
to calculate more accurate as the other ones. Also, on MX27 and MX31 mfn
can be negative, this hasn't been handled correctly on MX27 since now.
This patch has been tested on MX27 and MX31 and produces the same clock
frequencies for me.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* adds Kconfig variables
* specifies different physical address for i.MX21 because of the
different memory layouts
* disables support for UART5/UART6 in the i.MX serial driver
(the i.MX21 doesn't have those modules)
Based on code from "Martin Fuzzey" <mfuzzey@gmail.com>
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* removed iomux-mx1-mx2.h completely
* distributes the former contents to four different files (iomux-mx1.h,
iomux-mx21.h, iomux-mx27.h and the file iomux-mx2x.h, which is common to
both i.MX21 and i.MX27).
* adds all documented IOMUX definitions for i.MX21 and i.MX27
* fixes a few that were wrong (PD14_AOUT_FEC_CLR, PE16_AF_RTCK).
* don't silenly include <linux/io.h>
* and fixes all collateral damage from above
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a framebuffer driver for i.MX31 SoCs. It only supports synchronous
displays, vertical panning supported, no overlay support.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This reverts commit 86528da229.
This version of the patch was tab-to-space corrupted before
application.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This patch adds a MX2/MX3 specific SDHC driver. The hardware is basically
the same as in the MX1, but unlike the MX1 controller the MX2
controller just works as expected. Since the MX1 driver has more
workarounds for bugs than anything else I had no success with supporting
MX1 and MX2 in a sane way in one driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This is a framebuffer driver for i.MX31 SoCs. It only supports synchronous
displays, vertical panning supported, no overlay support.
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
i.MX3x SoCs contain an Image Processing Unit, consisting of a Control
Module (CM), Display Interface (DI), Synchronous Display Controller (SDC),
Asynchronous Display Controller (ADC), Image Converter (IC), Post-Filter
(PF), Camera Sensor Interface (CSI), and an Image DMA Controller (IDMAC).
CM contains, among other blocks, an Interrupt Generator (IG) and a Clock
and Reset Control Unit (CRCU). This driver serves IDMAC and IG. They are
supported over dmaengine and irq-chip APIs respectively.
IDMAC is a specialised DMA controller, its DMA channels cannot be used for
general-purpose operations, even though it might be possible to configure
a memory-to-memory channel for memcpy operation. This driver will not work
with generic dmaengine clients, clients, wishing to use it must use
respective wrapper structures, they also must specify which channels they
require, as channels are hard-wired to specific IPU functions.
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>