please pull the following:
- Eric adds support for the CLCD and PWM controller on Cygnus chis
- Loic fixes the console path on the Raspberry Pi 3 (already submitted as
fixes) and then proceeds with enabling the BCM43438 bluetooth chip on
the Raspberry Pi 3
- Rafal specifies the USB ports on the Luxul XWR-1200
- Dan adds support for the Luxul ABR-4500 based on BCM47094, the Luxul XAP-810
and XAP-1440 both based on BCM53573
- Florian adds support for the Broadcom Hurricane 2 SoC by adding general
machine binding, clock binding, SoC DTS include file and a DTS for the
Ubiquiti Networks UniFi Switch 8
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Merge tag 'arm-soc/for-4.15/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.15" from Florian Fainelli:
This pull request contains Broadcom ARM-based Device Tree changes for 4.15,
please pull the following:
- Eric adds support for the CLCD and PWM controller on Cygnus chis
- Loic fixes the console path on the Raspberry Pi 3 (already submitted as
fixes) and then proceeds with enabling the BCM43438 bluetooth chip on
the Raspberry Pi 3
- Rafal specifies the USB ports on the Luxul XWR-1200
- Dan adds support for the Luxul ABR-4500 based on BCM47094, the Luxul XAP-810
and XAP-1440 both based on BCM53573
- Florian adds support for the Broadcom Hurricane 2 SoC by adding general
machine binding, clock binding, SoC DTS include file and a DTS for the
Ubiquiti Networks UniFi Switch 8
* tag 'arm-soc/for-4.15/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: Hurricane 2: Add basic support for Ubiquiti UniFi Switch 8
dt-bindings: Add Ubiquiti Networks vendor prefix
ARM: dts: Add Broadcom Hurricane 2 DTS include file
dt-bindings: Document Broadcom Hurricane 2 clocks
dt-bindings: Add documentation for Broadcom Hurricane 2 SoCs
ARM: dts: BCM53573: Add DT for Luxul XAP-1440
ARM: dts: BCM53573: Add DT for Luxul XAP-810
ARM: dts: BCM5301X: Add DT for Luxul ABR-4500
ARM: dts: BCM5301X: Add DT for Luxul XBR-4500
ARM: dts: BCM5301X: Specify USB ports for USB LED of Luxul XWR-1200
ARM: dts: bcm2837-rpi-3-b: Add bcm43438 serial slave
ARM: dts: bcm283x: Fix console path on RPi3
ARM: dts: cygnus: Add the PWM node
ARM: dts: cygnus: Add the CLCD controller
Adds support for the CEC controller found on Tegra124 and enables it on
Tegra K1.
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Merge tag 'tegra-for-4.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "ARM: tegra: Device tree changes for v4.15-rc1" from Thierry Reding:
Adds support for the CEC controller found on Tegra124 and enables it on
Tegra K1.
* tag 'tegra-for-4.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable CEC support on Jetson TK1
ARM: tegra: Add CEC support for Tegra124
* r8a77430 (RZ/G1M) SoC
- Add XHCI support to SoC DT. Boards may enable this as appropriate
* All Renesas ARM based SoCs
- Add missing clocks for ARM CPU cores
Geert Uytterhoeven says "This series improves DT hardware descriptions
for Renesas arm32 SoCs by adding missing clocks properties to the
device nodes corresponding to ARM CPU cores."
* R-Car Gen 1 and 2, and RZ/G SoCs
- Use R-Car Fallback compat strings for GPIO
Simon Horman says "Use newly added R-Car GPIO Gen 1, 2 and 3 fallback
compat strings in peace of now deprecated non-generation specific R-Car
GPIO fallback compat string in the DT of Renesas ARM and arm64 based
SoCs.
As noted in the changelogs for the r8a777[89] changes, this introduces
an incompatibility with pre-v4.14 kernels used with new DTBs. There is
no run-time effect for other SoCs updated by this changeset."
* r7s72100 (RZ/A1H) GR-Peach board
- Add pin configuration subnode for ETHER pin group.
This avoids relying on boot-loader configuration of these pins.
- Enable ostm0 and ostm1 timers
Jacopo Mondi says these are "to be used as clock source and clockevent
source. The timers provides greater accuracy than the already enabled
mtu2 one."
- Correct leds node name indent
- Enable MTU2 timer pulse unit
Jacopo Mondi says "MTU2 multi-function/multi-channel timer/counter is
not enabled for GR-Peach board. The timer is used as clock event source
to schedule wake-ups, and without this enabled all sleeps not performed
through busy waiting hang the board."
* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
- Add USB function support
* r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
- Add USB2.0 Host support
* r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform
- Rework DT architecture and add DT for camera DB
Fabrizio Castro says "Some of the serial interfaces are exposed on the
camera daughter board. The camera daughter board can be connected to
the carrier board by means of expansion connectors 1, 2 and 3. The
carrier board may host an RZ/G1M or an RZ/G1N based SoM.
While adding support for the serial interfaces on the camera daughter
board we faced the dilemma of how to properly describe all of the
possible HW configurations and how to maximize code reuse.
The best option would be to use device tree overlays, however there is
still some work to be done on that front before actually using them,
therefore for the time being we decided to provide .dtsi files to
describe the carrier board and the camera daughter board, and provide
.dts files to describe the HW configurations we need to support."
* r8a779[0-4] R-Car Gen2 SoCs
- Use generic node name for VSP1 nodes
Geert Uytterhoeven says "This patch series replaces the specific node
names used for the VSP1 nodes by the preferred generic node names, cfr.
commit 0e1bfb72b0 ("v4l: vsp1: Use generic node name")."
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Merge tag 'renesas-dt2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.15" from Simon Horman:
* r8a77430 (RZ/G1M) SoC
- Add XHCI support to SoC DT. Boards may enable this as appropriate
* All Renesas ARM based SoCs
- Add missing clocks for ARM CPU cores
Geert Uytterhoeven says "This series improves DT hardware descriptions
for Renesas arm32 SoCs by adding missing clocks properties to the
device nodes corresponding to ARM CPU cores."
* R-Car Gen 1 and 2, and RZ/G SoCs
- Use R-Car Fallback compat strings for GPIO
Simon Horman says "Use newly added R-Car GPIO Gen 1, 2 and 3 fallback
compat strings in peace of now deprecated non-generation specific R-Car
GPIO fallback compat string in the DT of Renesas ARM and arm64 based
SoCs.
As noted in the changelogs for the r8a777[89] changes, this introduces
an incompatibility with pre-v4.14 kernels used with new DTBs. There is
no run-time effect for other SoCs updated by this changeset."
* r7s72100 (RZ/A1H) GR-Peach board
- Add pin configuration subnode for ETHER pin group.
This avoids relying on boot-loader configuration of these pins.
- Enable ostm0 and ostm1 timers
Jacopo Mondi says these are "to be used as clock source and clockevent
source. The timers provides greater accuracy than the already enabled
mtu2 one."
- Correct leds node name indent
- Enable MTU2 timer pulse unit
Jacopo Mondi says "MTU2 multi-function/multi-channel timer/counter is
not enabled for GR-Peach board. The timer is used as clock event source
to schedule wake-ups, and without this enabled all sleeps not performed
through busy waiting hang the board."
* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
- Add USB function support
* r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
- Add USB2.0 Host support
* r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform
- Rework DT architecture and add DT for camera DB
Fabrizio Castro says "Some of the serial interfaces are exposed on the
camera daughter board. The camera daughter board can be connected to
the carrier board by means of expansion connectors 1, 2 and 3. The
carrier board may host an RZ/G1M or an RZ/G1N based SoM.
While adding support for the serial interfaces on the camera daughter
board we faced the dilemma of how to properly describe all of the
possible HW configurations and how to maximize code reuse.
The best option would be to use device tree overlays, however there is
still some work to be done on that front before actually using them,
therefore for the time being we decided to provide .dtsi files to
describe the carrier board and the camera daughter board, and provide
.dts files to describe the HW configurations we need to support."
* r8a779[0-4] R-Car Gen2 SoCs
- Use generic node name for VSP1 nodes
Geert Uytterhoeven says "This patch series replaces the specific node
names used for the VSP1 nodes by the preferred generic node names, cfr.
commit 0e1bfb72b0 ("v4l: vsp1: Use generic node name")."
* tag 'renesas-dt2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (42 commits)
ARM: dts: r8a7743: Add xhci support to SoC dtsi
ARM: dts: r7s72100: Add clock for CA9 CPU core
dt-bindings: clk: r7s72100: Add missing I and G clocks
ARM: dts: sh73a0: Add clocks for CA9 CPU cores
ARM: dts: r8a7794: Add missing clock for secondary CA7 CPU core
ARM: dts: r8a7793: Add missing clock for secondary CA15 CPU core
ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU core
ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU core
ARM: dts: r8a7790: Add clocks for CA7 CPU cores
ARM: dts: r8a7790: Add missing clocks for secondary CA15 CPU cores
ARM: dts: r8a7779: Add clocks for CA9 CPU cores
ARM: dts: r8a7778: Add clock for CA9 CPU core
ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU core
ARM: dts: r8a73a4: Add clock for CA15 CPU0 core
ARM: dts: r8a7794: Use R-Car GPIO Gen2 fallback compat string
ARM: dts: r8a7793: Use R-Car GPIO Gen2 fallback compat string
ARM: dts: r8a7792: Use R-Car GPIO Gen2 fallback compat string
ARM: dts: r8a7791: Use R-Car GPIO Gen2 fallback compat string
ARM: dts: r8a7790: Use R-Car GPIO Gen2 fallback compat string
ARM: dts: r8a7743: Use R-Car GPIO Gen2 fallback compat string
...
The most notable changes are:
- Conversion to the last SoC (A10, A20) to the new clock framework
- HDMI and dual pipeline support for the A10, A20 and A31 DRM driver
- Support for the various power supplies on a number of boards
- Fix of DTC warnings on a number of SoCs, but most of them still need
some work
- New boards: A20-OLinuXino-MICRO-eMMC, TBS A711, Banana Pi M2 Berry,
Banana Pi M2 Ultra
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Merge tag 'sunxi-dt-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Pull "Allwinner DT changes for 4.15" from Maxime Ripard:
The most notable changes are:
- Conversion to the last SoC (A10, A20) to the new clock framework
- HDMI and dual pipeline support for the A10, A20 and A31 DRM driver
- Support for the various power supplies on a number of boards
- Fix of DTC warnings on a number of SoCs, but most of them still need
some work
- New boards: A20-OLinuXino-MICRO-eMMC, TBS A711, Banana Pi M2 Berry,
Banana Pi M2 Ultra
- New R40 SoC support
* tag 'sunxi-dt-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (63 commits)
ARM: sun8i: r40: enable USB host for Banana Pi M2 Ultra
ARM: sun8i: v40: add 5V regulator for Banana Pi M2 Berry
ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra
ARM: sun8i: r40: add USB host port nodes for R40
ARM: dts: sun4i: Enable HDMI support on some A10 devices
ARM: dts: sun7i: Enable HDMI support on some A20 devices
ARM: dts: sun7i: Add device nodes for display pipelines
ARM: dts: sun4i: Add device nodes for display pipelines
ARM: dts: sun8i: r40: add watchdog device node
ARM: dts: sun5i: reference-design-tablet: Enable AXP209 AC and battery
ARM: dts: sun9i: Change node names to remove underscores
ARM: dts: sun9i: Change node names to remove underscores
ARM: dts: sun4i: Remove underscores from nodes names
ARM: dts: sun4i: Provide default muxing for relevant controllers
ARM: dts: sun4i: Change pinctrl nodes to avoid warning
ARM: dts: sun6i: Enable HDMI support on some A31/A31s devices
ARM: dts: sun6i: Add device node for HDMI controller
ARM: dts: sun4i: Change LRADC node names to avoid warnings
ARM: dts: sun4i: Remove skeleton and memory to avoid warnings
ARM: dts: sun4i: Remove gpio-keys warnings
...
- add SMP support to Meson8/8b
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Merge tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/soc
Pull "Amlogic SoC updates for v4.15" from Kevin Hilman:
- add SMP support to Meson8/8b
* tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: meson: enable MESON_IRQ_GPIO in Kconfig for meson8b
ARM: meson: Add SMP bringup code for Meson8 and Meson8b
ARM: smp_scu: allow the platform code to read the SCU CPU status
ARM: smp_scu: add a helper for powering on a specific CPU
dt-bindings: Amlogic: Add Meson8 and Meson8b SMP related documentation
- A series from Marco Franchi from to clean up build warnings see with
W=1 in arch/arm/mach-imx/.
- Move i.MX6 speed grading check from i.MX platform code to cpufreq
driver. The patch is suggested by cpufreq folks to go through
arm-soc tree.
- Enable cpuidle support on i.MX6DL starting from IMX_CHIP_REVISION_1_1.
- Constify platform_suspend_ops for MXS platform.
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Merge tag 'imx-soc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Pull "i.MX SoC changes for 4.15" from Shawn Guo:
- A series from Marco Franchi from to clean up build warnings see with
W=1 in arch/arm/mach-imx/.
- Move i.MX6 speed grading check from i.MX platform code to cpufreq
driver. The patch is suggested by cpufreq folks to go through
arm-soc tree.
- Enable cpuidle support on i.MX6DL starting from IMX_CHIP_REVISION_1_1.
- Constify platform_suspend_ops for MXS platform.
* tag 'imx-soc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
cpufreq: imx6q: Move speed grading check to cpufreq driver
ARM: imx: Enable cpuidle for i.MX6DL starting at 1.1
ARM: imx: mach-mx31lite: Make mx31lite_map_io static
ARM: imx: cpuidle-imx5: Include "cpuidle.h" header file
ARM: imx: 3ds-debugboard: Include "3ds_debugboard.h" header file
ARM: imx: imx31moboard: Include "board-mx31moboard.h" header file
ARM: mxs: constify platform_suspend_ops
part), please pull the following:
- Florian adds support for the Broadcom Hurricane 2 SoC machine entry point
and defines the debug UART address for use with earlyprintk/DEBUG_LL
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Merge tag 'arm-soc/for-4.15/soc-part2' of http://github.com/Broadcom/stblinux into next/soc
Pull "Broadcom soc changes for 4.15 (part 2)" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC changes for 4.15 (second
part), please pull the following:
- Florian adds support for the Broadcom Hurricane 2 SoC machine entry point
and defines the debug UART address for use with earlyprintk/DEBUG_LL
* tag 'arm-soc/for-4.15/soc-part2' of http://github.com/Broadcom/stblinux:
ARM: debug: Add Hurricane 2 UART2 debug addresses
ARM: bcm: Add support for Broadcom Hurricane 2 SoC
- Turn on DRM_DW_HDMI_CEC option to get HDMI CEC support.
- Enable MUX_MMIO to get ADV7180 probe on Gateworks GW51xx boards.
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Merge tag 'imx-defconfig-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Pull "i.MX defconfig updates for 4.15" from Shawn Guo:
- Turn on DRM_DW_HDMI_CEC option to get HDMI CEC support.
- Enable MUX_MMIO to get ADV7180 probe on Gateworks GW51xx boards.
* tag 'imx-defconfig-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select the CEC driver
ARM: imx_v6_v7_defconfig: Select CONFIG_MUX_MMIO
A bunch of patches for the sunxi documentation and mach-sunxi. The most
notable feature is the introduction of the R40 support.
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Merge tag 'sunxi-core-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/soc
Pull "Allwinner core changes for 4.15" from Maxime Ripard:
A bunch of patches for the sunxi documentation and mach-sunxi. The most
notable feature is the introduction of the R40 support.
* tag 'sunxi-core-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sunxi: add support for R40 SoC
ARM: sunxi: fix the core number of V3s in sunxi README
dt-bindings: add compatible string for Allwinner V3s SoC
We now handle the open drain mode internally in the I2C GPIO
driver, but we will get warnings from the gpiolib that we
override the default mode of the line so it becomes open
drain.
We can fix all in-kernel users by simply passing the right
flag along in the descriptor table, and we already touched
all of these files in the series so let's just tidy it up.
Cc: Steven Miao <realmz6@gmail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Wu, Aaron <Aaron.Wu@analog.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the GPIO-based I2C-driver to using GPIO
descriptors instead of the old global numberspace-based
GPIO interface. We:
- Convert the driver to unconditionally grab two GPIOs
from the device by index 0 (SDA) and 1 (SCL) which
will work fine with device tree and descriptor tables.
The existing device trees will continue to work just
like before, but without any roundtrip through the
global numberspace.
- Brutally convert all boardfiles still passing global
GPIOs by registering descriptor tables associated with
the devices instead so this driver does not need to keep
supporting passing any GPIO numbers as platform data.
There is no stepwise approach as elegant as this, I
strongly prefer this big hammer over any antsteps for this
conversion. This way the old GPIO numbers go away and
NEVER COME BACK.
Special conversion for the different boards utilizing
I2C-GPIO:
- EP93xx (arch/arm/mach-ep93xx): pretty straight forward as
all boards were using the same two GPIO lines, just define
these two in a lookup table for "i2c-gpio" and register
these along with the device. None of them define any
other platform data so just pass NULL as platform data.
This platform selects GPIOLIB so all should be smooth.
The pins appear on a gpiochip for bank "G" as pins 1 (SDA)
and 0 (SCL).
- IXP4 (arch/arm/mach-ixp4): descriptor tables have to
be registered for each board separately. They all use
"IXP4XX_GPIO_CHIP" so it is pretty straight forward.
Most board define no other platform data than SCL/SDA
so they can drop the #include of <linux/i2c-gpio.h> and
assign NULL to platform data.
The "goramo_mlr" (Goramo Multilink Router) board is a bit
worrisome: it implements its own I2C bit-banging in the
board file, and optionally registers an I2C serial port,
but claims the same GPIO lines for itself in the board file.
This is not going to work: there will be competition for the
GPIO lines, so delete the optional extra I2C bus instead, no
I2C devices are registered on it anyway, there are just hints
that it may contain an EEPROM that may be accessed from
userspace. This needs to be fixed up properly by the serial
clock using I2C emulation so drop a note in the code.
- KS8695 board acs5k (arch/arm/mach-ks8695/board-acs5.c)
has some platform data in addition to the pins so it needs to
be kept around sans GPIO lines. Its GPIO chip is named
"KS8695" and the arch selects GPIOLIB.
- PXA boards (arch/arm/mach-pxa/*) use some of the platform
data so it needs to be preserved here. The viper board even
registers two GPIO I2Cs. The gpiochip is named "gpio-pxa" and
the arch selects GPIOLIB.
- SA1100 Simpad (arch/arm/mach-sa1100/simpad.c) defines a GPIO
I2C bus, and the arch selects GPIOLIB.
- Blackfin boards (arch/blackfin/bf533 etc) for these I assume
their I2C GPIOs refer to the local gpiochip defined in
arch/blackfin/kernel/bfin_gpio.c names "BFIN-GPIO".
The arch selects GPIOLIB. The boards get spiked with
IF_ENABLED(I2C_GPIO) but that is a side effect of it
being like that already (I would just have Kconfig select
I2C_GPIO and get rid of them all.) I also delete any
platform data set to 0 as it will get that value anyway
from static declartions of platform data.
- The MIPS selects GPIOLIB and the Alchemy machine is using
two local GPIO chips, one of them has a GPIO I2C. We need
to adjust the local offset from the global number space here.
The ATH79 has a proper GPIO driver in drivers/gpio/gpio-ath79.c
and AFAICT the chip is named "ath79-gpio" and the PB44
PCF857x expander spawns from this on GPIO 1 and 0. The latter
board only use the platform data to specify pins so it can be
cut altogether after this.
- The MFD Silicon Motion SM501 is a special case. It dynamically
spawns an I2C bus off the MFD using sm501_create_subdev().
We use an approach to dynamically create a machine descriptor
table and attach this to the "SM501-LOW" or "SM501-HIGH"
gpiochip. We use chip-local offsets to grab the right lines.
We can get rid of two local static inline helpers as part
of this refactoring.
Cc: Steven Miao <realmz6@gmail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Ben Dooks <ben.dooks@codethink.co.uk>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Wu, Aaron <Aaron.Wu@analog.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
After finding out there are active users of this sensor I noticed:
- It has a single PXA27x board file using the platform data
- The platform data is only used to carry two GPIO pins, all other
fields are unused
- The driver does not use GPIO descriptors but the legacy GPIO
API
I saw we can swiftly fix this by:
- Killing off the platform data entirely
- Define a GPIO descriptor lookup table in the board file
- Use the standard devm_gpiod_get() to grab the GPIO descriptors
from either the device tree or the board file table.
This compiles, but needs testing.
Cc: arm@kernel.org
Cc: Marco Franchi <marco.franchi@nxp.com>
Cc: Davide Hug <d@videhug.ch>
Cc: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Meson6, Meson8 and Meson8b use a similar IP block which has access to
512 bytes of efuse data.
During SoC manufacturing some calibration settings for the CVBS
connector and the internal temperature sensor are written to this efuse.
On some boards it additionally stores for example the MAC addresses.
The efuse is enabled on Meson8 and Meson8b but kept disabled on Meson6
since we do not have a clock driver there (which is required to read
data from the efuse).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Booting the secondary CPU cores involves the following nodes/devices:
- SCU (Snoop-Control-Unit, for which we already have a DT node)
- a reset line for each CPU core, provided by the reset-controller
which is built into the clock-controller
- the PMU (power management unit) which controls the power of the CPU
cores
- a range in the SRAM specifically reserved for booting secondary CPU
cores
- the "enable-method" which activates booting the secondary CPU cores
This adds all required nodes and properties to boot the secondary CPU
cores.
Signed-off-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Linus Lüssing <linus.luessing@c0d3.blue>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Booting the secondary CPU cores involves the following nodes/devices:
- SCU (Snoop-Control-Unit, for which we already have a DT node)
- a reset line for each CPU core, provided by the reset-controller
which is built into the clock-controller
- the PMU (power management unit) which controls the power of the CPU
cores
- a range in the SRAM specifically reserved for booting secondary CPU
cores
- the "enable-method" which activates booting the secondary CPU cores
This adds all required nodes and properties to boot the secondary CPU
cores.
Suggested-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the necessary SMP-operations and startup code to use the
additional cores on the Amlogic Meson8/Meson8m2 (both are using the same
sequence) and Meson8b (using a slightly difference sequence) SoCs.
Signed-off-by: Carlo Caione <carlo@endlessm.com>
[add Meson8/Meson8m2 support and allow taking CPU cores offline as well]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
On Amlogic Meson8 / Meson8m2 (both Cortex-A9) and Meson8b (Cortex-A5)
the CPU hotplug code needs to wait until the SCU status of the CPU that
is being taken offline is SCU_PM_POWEROFF.
Provide a utility function (which can be invoked for example from
.cpu_kill()) which allows reading the SCU status of a CPU.
While here, replace the magic number 0x3 with a preprocessor macro
(SCU_CPU_STATUS_MASK) so we don't have to duplicate this magic number in
the new function.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
To boot the secondary CPUs on the Amlogic Meson8/Meson8m2 (Cortex-A9)
and Meson8b (Cortex-A5) SoCs we have to enable SCU mode SCU_PM_NORMAL,
otherwise the secondary cores will not start.
This patch adds a scu_cpu_power_enable() function which can be used to
enable SCU_PM_NORMAL for a specific (logical) CPU. An internal helper
function is also created, to avoid code duplication with
scu_power_mode().
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Merge tag 'for-linus-4.14c-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip
Pull xen fixes from Juergen Gross:
- a fix for the Xen gntdev device repairing an issue in case of partial
failure of mapping multiple pages of another domain
- a fix of a regression in the Xen balloon driver introduced in 4.13
- a build fix for Xen on ARM which will trigger e.g. for Linux RT
- a maintainers update for pvops (not really Xen, but carrying through
this tree just for convenience)
* tag 'for-linus-4.14c-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
maintainers: drop Chris Wright from pvops
arm/xen: don't inclide rwlock.h directly.
xen: fix booting ballooned down hvm guest
xen/gntdev: avoid out of bounds access in case of partial gntdev_mmap()
rwlock.h should not be included directly. Instead linux/splinlock.h
should be included. One thing it does is to break the RT build.
Cc: Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Under heavy system stress mvebu SoC using Cortex A9 sporadically
encountered instability issues.
The "double linefill" feature of L2 cache was identified as causing
dependency between read and write which lead to the deadlock.
Especially, it was the cause of deadlock seen under heavy PCIe traffic,
as this dependency violates PCIE overtaking rule.
Fixes: c8f5a878e5 ("ARM: mvebu: use DT properties to fine-tune the L2 configuration")
Cc: stable@vger.kernel.org
Signed-off-by: Yan Markman <ymarkman@marvell.com>
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Nadav Haklai <nadavh@marvell.com>
[gregory.clement@free-electrons.com: reformulate commit log, add Armada
375 and add Fixes tag]
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The local variable "bus" will eventually be set to an appropriate pointer
a bit later. Thus omit the explicit initialisation at the beginning.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add a jump target so that a bit of exception handling can be better reused
at the end of this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Please do not apply this to mainline directly, instead please re-run the
coccinelle script shown below and apply its output.
For several reasons, it is desirable to use {READ,WRITE}_ONCE() in
preference to ACCESS_ONCE(), and new code is expected to use one of the
former. So far, there's been no reason to change most existing uses of
ACCESS_ONCE(), as these aren't harmful, and changing them results in
churn.
However, for some features, the read/write distinction is critical to
correct operation. To distinguish these cases, separate read/write
accessors must be used. This patch migrates (most) remaining
ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following
coccinelle script:
----
// Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and
// WRITE_ONCE()
// $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch
virtual patch
@ depends on patch @
expression E1, E2;
@@
- ACCESS_ONCE(E1) = E2
+ WRITE_ONCE(E1, E2)
@ depends on patch @
expression E;
@@
- ACCESS_ONCE(E)
+ READ_ONCE(E)
----
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: davem@davemloft.net
Cc: linux-arch@vger.kernel.org
Cc: mpe@ellerman.id.au
Cc: shuah@kernel.org
Cc: snitzer@redhat.com
Cc: thor.thayer@linux.intel.com
Cc: tj@kernel.org
Cc: viro@zeniv.linux.org.uk
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
linux/compiler.h is included indirectly by linux/types.h via
uapi/linux/types.h -> uapi/linux/posix_types.h -> linux/stddef.h
-> uapi/linux/stddef.h and is needed to provide a proper definition of
offsetof.
Unfortunately, compiler.h requires a definition of
smp_read_barrier_depends() for defining lockless_dereference() and soon
for defining READ_ONCE(), which means that all
users of READ_ONCE() will need to include asm/barrier.h to avoid splats
such as:
In file included from include/uapi/linux/stddef.h:1:0,
from include/linux/stddef.h:4,
from arch/h8300/kernel/asm-offsets.c:11:
include/linux/list.h: In function 'list_empty':
>> include/linux/compiler.h:343:2: error: implicit declaration of function 'smp_read_barrier_depends' [-Werror=implicit-function-declaration]
smp_read_barrier_depends(); /* Enforce dependency ordering from x */ \
^
A better alternative is to include asm/barrier.h in linux/compiler.h,
but this requires a type definition for "bool" on some architectures
(e.g. x86), which is defined later by linux/types.h. Type "bool" is also
used directly in linux/compiler.h, so the whole thing is pretty fragile.
This patch splits compiler.h in two: compiler_types.h contains type
annotations, definitions and the compiler-specific parts, whereas
compiler.h #includes compiler-types.h and additionally defines macros
such as {READ,WRITE.ACCESS}_ONCE().
uapi/linux/stddef.h and linux/linkage.h are then moved over to include
linux/compiler_types.h, which fixes the build for h8 and blackfin.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1508840570-22169-2-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The asm-generic/unaligned.h header provides two different implementations
for accessing unaligned variables: the access_ok.h version used when
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is set pretends that all pointers
are in fact aligned, while the le_struct.h version convinces gcc that the
alignment of a pointer is '1', to make it issue the correct load/store
instructions depending on the architecture flags.
On ARMv5 and older, we always use the second version, to let the compiler
use byte accesses. On ARMv6 and newer, we currently use the access_ok.h
version, so the compiler can use any instruction including stm/ldm and
ldrd/strd that will cause an alignment trap. This trap can significantly
impact performance when we have to do a lot of fixups and, worse, has
led to crashes in the LZ4 decompressor code that does not have a trap
handler.
This adds an ARM specific version of asm/unaligned.h that uses the
le_struct.h/be_struct.h implementation unconditionally. This should lead
to essentially the same code on ARMv6+ as before, with the exception of
using regular load/store instructions instead of the trapping instructions
multi-register variants.
The crash in the LZ4 decompressor code was probably introduced by the
patch replacing the LZ4 implementation, commit 4e1a33b105 ("lib: update
LZ4 compressor module"), so linux-4.11 and higher would be affected most.
However, we probably want to have this backported to all older stable
kernels as well, to help with the performance issues.
There are two follow-ups that I think we should also work on, but not
backport to stable kernels, first to change the asm-generic version of
the header to remove the ARM special case, and second to review all
other uses of CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS to see if they
might be affected by the same problem on ARM.
Cc: stable@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Some interrupts properties are given '0' as the flags argument or no
flags argument at all.
Change them to use the appropriate interrupt flags.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Some interrupts properties are given '0' as the flags argument.
Change them to use the appropriate interrupt flags.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Interrupt lines from on-board devices are connected to the GPIO
controller. Add GPIO hogging so that the corresponding GPIO line
is automatically requested.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Interrupt lines from on-board devices are connected to the GPIO
controller. Handle this correctly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The GPIO controller also acts as an interrupt controller and the
interrupt lines are connected to the AIDET block.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, there is assumption in early MPU setup code that kernel
image is located in RAM, which is obviously not true for XIP. To run
code from ROM we need to make sure that it is covered by MPU. However,
due to we allocate regions (semi-)dynamically we can run into issue of
trimming region we are running from in case ROM spawns several MPU
regions. To help deal with that we enforce minimum alignments for start
end end of XIP address space as 1MB and 128Kb correspondingly.
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
PMSAv7 defines curious alignment requirements to the regions:
- size must be power of 2, and
- region start must be aligned to the region size
Because of that we currently adjust lowmem bounds plus we assign
only one MPU region to cover memory all these lead to significant amount of
memory could be wasted. As an example, consider 64Mb of memory at
0x70000000 - it fits alignment requirements nicely; now, imagine that
2Mb of memory is reserved for coherent DMA allocation, so now Linux is
expected to see 62Mb of memory... and here annoying thing happens -
memory gets truncated to 32Mb (we've lost 30Mb!), i.e. MPU layout
looks like:
0: base 0x70000000, size 0x2000000
This patch tries to allocate as much as possible MPU slots to minimise
amount of truncated memory. Moreover, with this patch MPU subregions
starting to get used. MPU subregions allow us reduce the number of MPU
slots used. For example given above, MPU layout looks like:
0: base 0x70000000, size 0x2000000
1: base 0x72000000, size 0x1000000
2: base 0x73000000, size 0x1000000, disable subreg 7 (0x73e00000 - 0x73ffffff)
Where without subregions we'd get:
0: base 0x70000000, size 0x2000000
1: base 0x72000000, size 0x1000000
2: base 0x73000000, size 0x800000
3: base 0x73800000, size 0x400000
4: base 0x73c00000, size 0x200000
To achieve better layout we fist try to cover specified memory as is
(maybe with help of subregions) and if we failed, we truncate memory
to fit alignment requirements (so it occupies one MPU slot) and
perform one more attempt with the reminder, and so on till we either
cover all memory or run out of MPU slots.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This patch makes it possible to use MPU with v7M cores.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The last user of CONFIG_VECTORS_BASE has gone, so kill it.
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reported-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
It seems that MPU never worked with XIP, so we just disallow such
combination.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Currently, there are several issues with how MPU is setup:
1. We won't boot if MPU is missing
2. We won't boot if use XIP
3. Further extension of MPU setup requires asm skills
The 1st point can be relaxed, so we can continue with boot CPU even if
MPU is missed and fail boot for secondaries only. To address the 2nd
point we could create region covering CONFIG_XIP_PHYS_ADDR - _end and
that might work for the first stage of MPU enable, but due to MPU's
alignment requirement we could cover too much, IOW we need more
flexibility in how we're partitioning memory regions... and it'd be
hardly possible to archive because of the 3rd point.
This patch is trying to address 1st and 3rd issues and paves the path
for 2nd and further improvements.
The most visible change introduced with this patch is that we start
using mpu_rgn_info array (as it was supposed?), so change in MPU setup
done by boot CPU is recorded there and feed to secondaries. It
allows us to keep minimal region setup for boot CPU and do the rest in
C. Since we start programming MPU regions in C evaluation of MPU
constrains (number of regions supported and minimal region order) can
be done once, which in turn open possibility to free-up "probe"
region early.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Currently, inline assembly for accessing to MPU's cp15 lacks volatile
keyword which opens possibility to compiler to optimise such accesses
as soon as we start using them more intensively. Rather than fixing
inline asm, lets move MPU accessors to use cp15 helpers which do the
right thing.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Having MPU handling code in dedicated module makes it easier to
enhance/maintain it.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /soc/aips@50000000/iomuxc@53fa8000/imx53-qsb/led_gpio7_7@0 has a unit name, but no reg property
Fix this warning by removing '@0' from such node.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /soc/aips@50000000/iomuxc@53fa8000/imx53-m53evk/led_gpio@0 has a unit name, but no reg property
Fix this warning by removing '@0' from such node.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warnings are seen with W=1:
Warning (unit_address_vs_reg): Node /soc/aips@50000000/usbphy@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips@50000000/usbphy@1 has a unit name, but no reg property
Fix these warnings by changing '@' to '-'.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /display-di0/port@0 has a unit name,
but no reg property
Fix this warning by removing '@' from such node.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /backlight@bl1 has a unit name, but no reg property
Fix this warning by removing '@bl1'from such node and change 'bl1grp' to
'backlightgrp', once there is only one backlight in this dts.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds support for the Zodiac Inflight Innovations RDU1 board,
which is based on the i.MX51.
It is the predecessor of the already supported ZII RDU2 board and
relies on the bootloader in the same way to enable correct display
and touchscreen nodes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The TX6QP-8037 is a Computer On Module manufactured by
Ka-Ro electronics GmbH with the following characteristics:
Processor Freescale i.MX 6QuadPlus MCIMX6QP7, 1 GHz
RAM 1GiB 64-bit DDR3 SDRAM
ROM 4GB HiRel eMMC
Power supply Single 3.3 to 5V
Size 26mm SO-DIMM
Temp. Range -40°C to 105°C
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the MB7 specific settings to a separate .dtsi file to facilitate
supporting more module variants with this baseboard.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently the display (LCD or LVDS) configuration is duplicated with
slight variations in each TX6 module specific file.
Move it to an include file for simplification and consistency.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Define the required properties to enable I2C bus recovery supported by
the I2C subsystem.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Convert the DTS sound setup to use the simple-audio-card driver.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Under certain circumstances the ethernet PHY cannot be detected on
Ka-Ro electronics TX6 modules. Using a phy-reset-post-delay of at least
2ms alleviates this problem. Define it to 10ms to be on the safe side.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove the PHY INT and RESET pins from hog section and put them into
their own pinctrl nodes referenced by the appropriate driver nodes.
Also, the MDIO pins are required for probing the Ethernet PHY, so they
must be configured by the FEC driver, not by the PHY driver. Move the
corresponding pinctrl settings from the PHY subnode to the FEC node.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As the DS1339 driver now supports enabling the trickle charge feature
via DTB, add the appropriate properties to utilize this feature.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The 'ipu1' alias is already defined in imx6q.dtsi. There is no need to
redefine it here.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The display, that incorporates this touchpanel is obsolete and won't
be supported any more.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The current TX6Q module HW revision is 3 reflected in the module name
suffix '-1030' (-1130 for LVDS).
Change the model string to prevent confusion about what DTS file to
use for these modules.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GPIO polarity is missing in the cd-gpios property.
Fix it, so that the following build warnings are gone:
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pass the '#dma-cells' property in the sdma node, so that the following
build warning is gone:
DTC arch/arm/boot/dts/imx50-evk.dtb
arch/arm/boot/dts/imx50-evk.dtb: Warning (dmas_property): Missing property '#dma-cells' in node /soc/aips@60000000/sdma@63fb0000 or bad phandle (referred from /soc/aips@50000000/spba@50000000/ssi@50014000:dmas[0])
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GPIO polarity is missing in the cd-gpios property.
Fix it, so that the following build warning is gone:
DTC arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dtb
arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb400
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The correct property name is 'interrupt-parent', so fix it accordingly.
This fixes the following build warning:
arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /soc/aips-bus@02100000/ethernet@02188000/mdio/ethernet0-phy@0
arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /soc/aips-bus@02100000/ethernet@021b4000/mdio/ethernet1-phy@0
Cc: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The 'interrupts' property has an extra cell by mistake.
Fix this, so that the following build warning is gone:
DTC arch/arm/boot/dts/imx6ul-pico-hobbit.dtb
arch/arm/boot/dts/imx6ul-pico-hobbit.dtb: Warning (interrupts_property): interrupts size is (12), expected multiple of 8 in /soc/aips-bus@2000000/ethernet@20b4000/mdio/ethernet-phy@1
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6qp variant also has sata, so add support for it.
Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt,
the property for specifying the PCIe regulator is 'vpcie-supply', so
use the correct one.
Also fix the polarity of GPIO2_24 so that the regulator can operate
correctly.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit c26ebe98a1 ("PCI: imx6: Add regulator support"), it is
possible to pass the 'vpcie-supply' property to describe the PCIE supply.
This way we can remove the 'regulator-always-on' property from the
regulator and have a better device tree description.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This works identically to imx6sx-tempmon on both imx6ul and imx6ull.
It just needs to be defined in dts.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On imx6sx accessing OCOTP directly is wrong because the ocotp clock
needs to be enabled first. Use the nvmem-cells binding instead.
This requirement does not apply to older imx6qdl chips because there the
ocotp access clock (clk_ipg_s) is always enabled.
This is visible by comparing the "System Clocks, Gating, and Override"
tables (OCOTP rows) in the 6DQ and 6SX manuals:
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6SXRM.pdfhttp://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf
This happens to work right now because the ocotp clock might be enabled
for some other reason. In particular the it might be enabled from the
bootloader and it only gets disabled late during boot in
clk_disable_unused, after imx-thermal has completed probing.
If imx-thermal is compiled as a module then the system can hang on
probe.
Reported-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The container node in the iomuxc node is no longer necessary and causes
pinctl errors on the Ventana boards with analog video capture
since aa12693e4156adafdef80a8bd134123a6419621b:
pinctrl core: initialized pinctrl subsystem
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/adv7180grp
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/ipu2_csi1grp
imx6q-pinctrl 20e0000.iomuxc: initialized IMX pinctrl driver
imx6q-pinctrl 20e0000.iomuxc: function 'iomuxc' not supported
imx6q-pinctrl 20e0000.iomuxc: invalid function iomuxc in map table
imx6q-pinctrl 20e0000.iomuxc: function 'iomuxc' not supported
imx6q-pinctrl 20e0000.iomuxc: invalid function iomuxc in map table
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Latest wandboard hardware revision is revd1, which brings the following
new features:
- PFUZE100 PMIC
- AR8035 Ethernet PHY
- Upgrade Wifi/BT chip to BCM4339/BCM43430.
Add support for the mx6, mx6dl and mx6qp revd1 variants.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
By default, the lcdif_pre_sel mux is switched to the pll3_pfd1_540m PFD
source. If this mux is allowed to propagate rate changes to its parent,
setting the LCDIF pixel clock rate to 9 MHz, as required by the LCD
panel, will cause the pll3_pfd1_540m PFD to be switched away from its
nominal rate to 288 MHz.
This has no negative side effects, as there are no other children to
this PFD. Still, to avoid surprises, it might be preferrable to switch
to the designated video PLL (pll5_video_div) as clock source for the
LCDIF pixel clock.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx-i2c driver supports automatic bus recovery via the GPIO
function of the I2C pins. Enable this functionality for the Ka-Ro
electronics TX53 modules.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Don't rely on the padctl settings established by the boot loader, but
explicitly specify the padctl values in DTB. This is also necessary to
be able to use the DTB files from the Linux kernel for future U-Boot
versions that support HW configuration via DTB.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As the DS1339 driver now supports enabling the trickle charge feature
via DTB, add the appropriate properties to utilize this feature.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The display, that incorporates this touchpanel is obsolete and won't
be supported any more.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is not recommended to place the regulator nodes inside 'simple-bus',
so adjust them accordingly.
The motivation for rearranging this is to make it easier to add new
regulator nodes in the future.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The current GPL only licensing on the dts files makes it very
impractical for other software components licensed under another
license.
In order to make it easier for them to reuse our device trees,
relicense our dts files first under a GPL/X11 dual-license.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As the DS1339 driver now supports enabling the trickle charge feature
via DTB, add the appropriate properties to utilize this feature.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The vdd10_lcd and vcc18_lcd regulators need to be enabled for HDMI output
to work, so add 'regulator-always-on', just as is done in rk3288-firefly.dtsi.
Also enable i2c5, the hdmi block and configure the correc cec pin.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The CEC line can be routed to two possible pins. Define those pins.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The dw-hdmi block needs the cec clk for the rk3288. Add it.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
When HYP code runs into branch profiling code, it attempts to jump to
unmapped memory, causing a HYP Panic.
Disable the branch profiling for code designed to run at HYP mode.
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
When a exception is trapped to EL2, hardware uses ELR_ELx to hold
the current fault instruction address. If KVM wants to inject a
abort to 32 bit guest, it needs to set the LR register for the
guest to emulate this abort happened in the guest. Because ARM32
architecture is pipelined execution, so the LR value has an offset to
the fault instruction address.
The offsets applied to Link value for exceptions as shown below,
which should be added for the ARM32 link register(LR).
Table taken from ARMv8 ARM DDI0487B-B, table G1-10:
Exception Offset, for PE state of:
A32 T32
Undefined Instruction +4 +2
Prefetch Abort +4 +4
Data Abort +8 +8
IRQ or FIQ +4 +4
[ Removed unused variables in inject_abt to avoid compile warnings.
-- Christoffer ]
Cc: <stable@vger.kernel.org>
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
Tested-by: Haibin Zhang <zhanghaibin7@huawei.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Pull ARM fixes from Russell King:
"Three fixes this time around:
- ensure sparse realises that we're building for a 32-bit arch on
64-bit hosts.
- use the correct instruction for semihosting on v7m (nommu) CPUs.
- reserve address 0 to prevent the first page of memory being used on
nommu systems"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8704/1: semihosting: use proper instruction on v7m processors
ARM: 8701/1: fix sparse flags for build on 64bit machines
ARM: 8700/1: nommu: always reserve address 0 away
Two fixes, one for the A31 DRM binding, and one for a missing regulator on
the pine MMC controller.
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Merge tag 'sunxi-fixes-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Pull "Allwinner fixes for 4.14" from Maxime Ripard:
Two fixes, one for the A31 DRM binding, and one for a missing regulator on
the pine MMC controller.
* tag 'sunxi-fixes-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun6i: Fix endpoint IDs in second display pipeline
arm64: allwinner: a64: pine64: Use dcdc1 regulator for mmc0
Without the STDMAC clock enabled, the USB 2.0 hosts do not work.
This clock must be explicitly listed in the "clocks" property because
it is independent of the other clocks.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Banana Pi M2 Ultra board features two USB host ports, connected to the
two USB host ports on the SoC.
Add support for them.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
On the Banana Pi M2 Berry board, the 5V power output (used by HDMI, SATA
and USB) is controlled via a GPIO.
Add regulator node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
On newer revisions of the Banana Pi M2 Ultra boards, the 5V power output
(used by HDMI, SATA and USB) is controller via a GPIO.
Add the regulator node for it.
Older revisions just have the 5V power output always on, and the GPIO is
reserved on these boards. So it won't affect the older revisions.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
Add support for the host ports in the DTSI file.
The OTG controller still cannot work with existing compatibles, and needs
more investigation. So it's not added yet.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
support for omap35xx-evm, am34xx-epos-evm and dra7:
- A series of changes to fix support for omap35xx-evm
- A series of changes to add earlycon support for n8x0, pandaboard
and omap5 boards
- A series of changes for am43xx-epos-evm pinctrl modes for default
and sleep states
- A series of changes to correct pbias regulator voltage for dra7
from 3V to 3.3V
- Use microchip compatible instead of deprecated mcp compatible for
mcp23017
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Merge tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "device tree changes for omaps for v4.15 merge window" from Tony Lindgren:
Device tree changes for omaps for v4.15 merge window to improve
support for omap35xx-evm, am34xx-epos-evm and dra7:
- A series of changes to fix support for omap35xx-evm
- A series of changes to add earlycon support for n8x0, pandaboard
and omap5 boards
- A series of changes for am43xx-epos-evm pinctrl modes for default
and sleep states
- A series of changes to correct pbias regulator voltage for dra7
from 3V to 3.3V
- Use microchip compatible instead of deprecated mcp compatible for
mcp23017
* tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
ARM: dts: omap3: Replace deprecated mcp prefix
ARM: dts: dra7-evm: Move pcie RC node to common file
ARM: dts: omap5: Increase max-voltage of pbias regulator
ARM: dts: dra7: Increase max-voltage of pbias regulator
ARM: dts: am43xx-epos-evm: Add default pinmux for unused pins
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for usb2_phy1 and usb2_phy2
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for uart0
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for matrix_keypad0
ARM: dts: am43xx-epos-evm: Add sleep pinmux for mmc1
ARM: dts: am43xx-epos-evm: Add sleep pinmux for pixcir_ts
ARM: dts: am43xx-epos-evm: Add sleep pinmux for gpmc
ARM: dts: am43xx-epos-evm: Add sleep pinmux for ecap0
ARM: dts: am43xx-epos-evm: Add sleep pinmux for qspi1
ARM: dts: am43xx-epos-evm: Add sleep pinmux for spi0 and spi1
ARM: dts: am43xx: Introduce additional pinmux definitions for DS0
ARM: dts: Configure earlycon for omap5-common
ARM: dts: Configure earlycon for pandaboard
ARM: dts: Configure earlycon for n8x0
ARM: dts: omap3-evm: Add DSS {vdds_dsi,vdda_video}-supply references
ARM: dts: omap3: Add Sharp LS037V7DW01 'envdd' supply
...
dts files fixed up to contain the necessary data for basic resources, we
can drop the related platform data.
Note that this branch depends on the "omap-for-v4.15/fixes-dt-signed"
branch and the patches with dependencies are based on a merge with that
branch.
These patches first ensure things keep working for the legacy "ti,hwmods"
property when we start making it optional, then adds a minimal TI sysc
interconnect target device driver to handle the new generic "ti,sysc"
compatible property. And then we can finally drop the legacy platform
data for IRQ, DMA and IO resources as seen in the diffstats.
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Merge tag 'omap-for-v4.15/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "more soc changes for omaps for v4.15 merge window" from Tony Lindgren:
Drop omap legacy platform data for IRQ, DMA and IO resources. With the
dts files fixed up to contain the necessary data for basic resources, we
can drop the related platform data.
Note that this branch depends on the "omap-for-v4.15/fixes-dt-signed"
branch and the patches with dependencies are based on a merge with that
branch.
These patches first ensure things keep working for the legacy "ti,hwmods"
property when we start making it optional, then adds a minimal TI sysc
interconnect target device driver to handle the new generic "ti,sysc"
compatible property. And then we can finally drop the legacy platform
data for IRQ, DMA and IO resources as seen in the diffstats.
* tag 'omap-for-v4.15/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (25 commits)
bus: ti-sysc: Fix unbalanced pm_runtime_enable by adding remove
bus: ti-sysc: mark PM functions as __maybe_unused
ARM: OMAP2+: omap_device: fix error return code in omap_device_copy_resources()
ARM: OMAP2+: Drop legacy struct omap_hwmod_addr_space
ARM: OMAP2+: Drop omap_hwmod_dma_info
ARM: OMAP2+: Drop omap_hwmod_irq_info
ARM: OMAP4: Remove legacy IRQ for PRM
ARM: OMAP3: Remove legacy IRQ for PRM
bus: ti-sysc: Add minimal TI sysc interconnect target driver
ARM: OMAP2+: Populate legacy resources for dma and smartreflex
ARM: OMAP2+: Parse module IO range from dts for legacy "ti,hwmods" support
ARM: dts: Configure SmartReflex only to idle the interconnect target module
ARM: dts: Add nodes for missing omap4 interconnect target modules
dt-bindings: bus: Minimal TI sysc interconnect target module binding
ARM: dts: Add missing hwmod related properties for dra7
ARM: dts: Add missing hwmod related nodes for am33xx
ARM: dts: Add missing dma hwmod property for omap5
ARM: dts: Add missing wdt3 node for omap4
ARM: dts: Add missing hsi node for omap4
ARM: dts: Add missing onewire node for omap4
...
Pull "non-urgent device tree fixes for omaps for v4.15 merge window"
from Tony Lindgren
Non-urgent device tree fixes for omaps that can all wait for v4.15
merge window.
Turns out that we have many devices working just because we have
the legacy platform data still around. This is mostly an issue
for omap4, other SoCs just have minimal fixes needed.
As many of the missing device tree nodes and properties are for
devices that have no drivers in the mainline kernel, such as
slimbus, iss, mcasp, aess, fdif and gpu, we might as well start
using the new "ti,sysc" interconnect target module binding for
them so we can get the devices with no child device drivers idled.
This also makes it possible to drop unnecessary platform data
in later patches.
* tag 'omap-for-v4.15/fixes-dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Fix typo for omap4 mcasp rx path
ARM: dts: Configure SmartReflex only to idle the interconnect target module
ARM: dts: Add nodes for missing omap4 interconnect target modules
dt-bindings: bus: Minimal TI sysc interconnect target module binding
ARM: dts: Add missing hwmod related properties for dra7
ARM: dts: Add missing hwmod related nodes for am33xx
ARM: dts: Add missing dma hwmod property for omap5
ARM: dts: Add missing wdt3 node for omap4
ARM: dts: Add missing hsi node for omap4
ARM: dts: Add missing onewire node for omap4
ARM: dts: Add missing smartreflex node and binding for omap4
ARM: dts: Add missing hwmods property for omap4 dma
ARM: dts: Add missing properties for omap4 control modules
ARM: dts: Configure pmu without interrupt for omap4430
ARM: dts: Add missing dma hwmods property for omap3
Pull "Rockchip dts32 updates for 4.15 part1" from Heiko Stübner:
One new board the Vyasa from Amarula Solutions using a rk3288
and core lvds node for the newly added driver+binding.
Also bindings + nodes for the Mali-Utgard GPUs found on some
Rockchip socs like rk3036 and rk3188. With the recently revived
Lima project they can even render a red triangle to a png file.
* tag 'v4.15-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Enable thermal on rk3288-vyasa board
ARM: dts: rockchip: fix mali400 ppmmu interrupt names
ARM: dts: rockchip: Enable mali GPU node on rk3288-vyasa
ARM: dts: rockchip: enable gpu on rk3188-radxarock
ARM: dts: rockchip: add gpu nodes on rk3066/rk3188
ARM: dts: rockchip: add rk322x gpu node
ARM: dts: rockchip: enable the gpu on rk3036-kylin boards
ARM: dts: rockchip: add rk3036 gpu node
dt-bindings: gpu: mali-utgard: add optional power-domain reference
dt-bindings: gpu: mali-utgard: add optional supply regulator
dt-bindings: gpu: mali-utgard: Add Rockchip Utgard Malis
ARM: dts: rockchip: enable vops and hdmi output on rk3288-vyasa
ARM: dts: rockchip: Add rk3288 vyasa board
dt-bindings: Add vendor prefix for Amarula Solutions
ARM: dts: rockchip: add LVDS node for rk3288
Pull "STM32 DT updates for v4.15, round 1" from Alexandre Torgue:
Highlights:
----------
-Add I2C1 support on STM32F746 SoC
-Enable I2C1 on STM32F746 eval board
-Add Timers support on STM32F746 SoC
-Add USB HS and FS supports on STM32F746 Soc
-Enable USB HS on STM32F746 disco and eval boards
-Enable USB FS en STM32F746 disco board
-Add Vrefbuf to STM32H743 SoC
-Add LPTIMERS support on STM32H743 SoC
-Add DMAMUX support on STM32H743 SoC
-Enable STM32H743 clock driver
-Add MDMA support on STM32H743 SoC
-Change pinctrl pinmux entries for all SoC.
* tag 'stm32-dt-for-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: Add MDMA support for STM32H743 SoC
ARM: dts: stm32: Enable USB FS on stm32f746-disco
ARM: dts: stm32: Add USB FS support for STM32F746 MCU
ARM: dts: stm32: Enable USB HS on stm32f746-disco
ARM: dts: stm32: Enable USB HS on stm32746g-eval
ARM: dts: stm32: Add USB HS support for STM32F746 MCU
ARM: dts: stm32: change pinctrl bindings definition
ARM: dts: stm32: Enable STM32H743 clock driver
ARM: dts: stm32: fix hse clock frequency on STM32H743 Eval board
ARM: dts: stm32: add Timers driver for stm32f746 MCU
ARM: dts: stm32: Add DMAMUX support for STM32H743 SoC
ARM: dts: stm32: Add lptimer definitions to stm32h743
ARM: dts: stm32: add vrefbuf to stm32h743
ARM: dts: stm32: Add I2C1 support for STM32F746 eval board
ARM: dts: stm32: Add I2C1 support for STM32F746 SoC
Pull "Samsung DTS ARM changes for 4.15" from Krzysztof Kozłowski:
1. Add new board: Hardkernel Odroid HC1.
2. Fix incomplete Odroid-XU3/4 thermal-zones definition leading to
possible overheat if first pair of A7+A15 cores is idle but rest of
CPUs are busy.
3. Add capacity-dmips-mhz properties for CPUs of octa-core SoCs.
4. Add power button to Odroid XU3/4.
5. Improvements in Gscaler, HDMI and Mixer blocks on Exynos5.
6. Add suspend quirk to DWC3 USB controller to fix enumeration of
SuperSpeed devices on Odroid XU4.
7. Add HDMI and MHL to Trats2.
8. Cleanups (redundant properties and nodes).
* tag 'samsung-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: samsung: Document binding for new Odroid HC1 board
ARM: dts: exynos: Add HDMI and Sil9234 to Trats2 board
ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board
ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi
ARM: dts: exynos: Add dwc3 SUSPHY quirk
ARM: dts: exynos: Add status property to Exynos 542x Mixer nodes
ARM: dts: exynos: Add status property to Exynos 5250 HDMI and Mixer nodes
ARM: dts: exynos: Cleanup HDMI DCC definitions on Exynos5250 and Exynos542x boards
ARM: dts: exynos: Move HDMI PHY node from boards to exynos5250.dtsi
ARM: dts: exynos: Use specific compatibles for proper Gscaler limits on Exynos5250 and Exynos5420
ARM: dts: exynos: Remove redundant interrupt properties in gpio-keys on Odroid boards
ARM: dts: exynos: Add power button for Odroid XU3/4
ARM: dts: exynos: Remove the display-timing and delay from Rinato
ARM: dts: exynos: add exynos5422 cpu capacity-dmips-mhz information
ARM: dts: exynos: add exynos5420 cpu capacity-dmips-mhz information
ARM: dts: exynos: fix incomplete Odroid-XU3/4 thermal-zones definition
Pull "DaVinci DT updates for v4.15" from Sekhar Nori:
Add support for accessing DSP on DA850 SoC when using
device-tree.
* tag 'davinci-for-v4.15/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da8xx-dt: Add OF_DEV_AUXDATA entry for DSP clock matching
ARM: dts: da850-lcdk: Add and enable CMA reserved pool for DSP
ARM: dts: da850: Add DSP node
The Faraday TVE200 is present in the Gemini SoC, sometimes
under the name "TVC". Add it to the SoC DTSI file along with
its resources.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "Renesas ARM Based SoC DT Updates for v4.15" from Simon Horman:
* r7s72100 (RZ/A1) Peach board
- Add pin groups for SCIF2 serial debug interface and Ethernet
This avoids relying on bootloader settings
- Support control of LED1 using gpio-leds
* r8a7743 (RZ/G1M) and r8a7745 (RZ/G1E) SoCs
- Add MSIOF[012] support and define aliases for spi[0123]
* r8a7743 (RZ/G1M) SoC
- Add I2C and IIC core nodes
* r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform
- Enable SDHI1 SD controller supporting high-speed and SDR50 transfers
- Add chosen node to allow correct selection of serial console
and the kernel command line
- Enable RTC support
- Enable USB2.0 host support
This includes enabling USB PHY and internal PCI
* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven and
r8a7745 (RZ/G1E) iW-RainboW-G22M-SM SoMs
- Enable Add SPI NOR support
This devices is used to boot up the system to the SoM DT
* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
- Enable SDHI0 SD controller supporting high-speed transfers
* r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
- Add pnctl support for scif4
This avoids reling on boot loader settings
- Add EtherAVB support
* r8a7745 (RZ/G1E) iW-RainboW-G22M-SM SoM
- Add basic SoM support
- Enable MMCIF eMMC support
- Enable RTC support
- Enable SDHI1 SD controller supporting high-speed transfers
* r8a779[0-4] R-Car Gen2 SoCs
- Add reset control properties
Geert Uytterhoeven says:
This patch series describes the reset topology on all R-Car Gen2 Socs,
like was done before for R-Car Gen3 and RZ/G1.
Resets usually match the corresponding module clocks. Exceptions are:
- The audio module has resets for the Serial Sound Interfaces only,
- The display module has only a single reset for all DU channels, but
adding reset properties for the display is postponed upon request
from Laurent.
- Convert to new CPG/MSSR bindings
Geert Uytterhoven says:
Currently Renesas R-Car Gen2 SoCs use the common clk-rcar-gen2,
clk-mstp, and clk-div6 drivers, which depend on most clocks being
described in DT. Especially the module (MSTP) clocks are cumbersome
and error prone, due to 3 arrays (clocks, clock-indices, and
clock-output-names) to be kept in sync. In addition, the clk-mstp
driver cannot be extended easily to also support module resets, which
are provided by the same hardware module.
Hence when developing support for R-Car Gen3 SoCs, another approach
was chosen, which led to the CPG/MSSR driver core, and SoC-specific
subdrivers (initially for R-Car Gen3, but later also for RZ/G1).
This series converts the various R-Car Gen2 DTSes to migrate to the
new CPG/MSSR drivers that were added in v4.13-rc1.
* r8a779[0,1,3,4] R-Car Gen2 SoCs
- Stop grouping clocks under a "clocks" subnode
Geert Uytterhoeven says:
The current practice is to not group clocks under a "clocks" subnode,
but just put them together with the other on-SoC devices.
Hence this patch series implements this for the various R-Car Gen2
DTSes that still need this (r8a7792.dtsi is OK).
* r8a7794 (E2) Alt board
- Correct inverted sense of SD wip pins
* tag 'renesas-dt-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (48 commits)
ARM: dts: r8a7743: Add MSIOF[012] support
ARM: dts: r8a7745: Add MSIOF[012] support
ARM: dts: iwg22d: Enable SDHI0 controller
ARM: dts: iwg22m: Add SPI NOR support
ARM: dts: r8a7745: Add QSPI support
ARM: dts: iwg20m: Add SPI NOR support
ARM: dts: r8a7743: Add QSPI support
ARM: dts: iwg22m: Enable SDHI1 controller
ARM: dts: r8a7745: Add SDHI controllers
ARM: dts: r8a7794: Add reset control properties
ARM: dts: r8a7793: Add reset control properties
ARM: dts: r8a7792: Add reset control properties
ARM: dts: r8a7791: Add reset control properties
ARM: dts: r8a7790: Add reset control properties
ARM: dts: r8a7743: Add IIC cores to dtsi
ARM: dts: alt: use correct logic for SD WP pins
ARM: dts: iwg20d-q7: Enable USB PHY
ARM: dts: iwg20d-q7: Enable internal PCI
ARM: dts: r8a7743: Link PCI USB devices to USB PHY
ARM: dts: r8a7743: Add USB PHY DT support
...
Pull "DTS updates for the Integrator PCIv3 driver" from Linus Walleij:
These are the DTS file changes required to fix bugs and satisfy
requirements for the new PCIv3 driver in the PCI subsystem.
The binding changes have been merged to the PCI tree.
[arnd] Note: this is an incompatible DT binding change, so things
will break during bisection or when using an old dtb file.
Since integrator has no real users, we can make an exception
for that.
* tag 'integrator-pciv3-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: Update Integrator/AP PCI v3 compatible
ARM: dts: integratorap: Fix PCI windows
ARM: dts: add the PCI clock to the device tree
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:
perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'
Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some
occurrences of uppercase hex.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
"interrupt-parent" property is declared in root node, so it is global
to all nodes. This property is re-declared in few sub-nodes. To avoid
duplication this property is removed from following sub-nodes:
pmu, amba@0, amba@0/ethernet.
Signed-off-by: Surender Polsani <surenderp@techveda.org>
Acked-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The SX150X GPIO expander has been moved to pin control and
its Kconfig symbol has been renamed. We used to have a paper-over
thing in Kconfig but it was causing circular dependencies so
I have had to kill it off. Select the right driver instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Enable Sony Z2 tablet options
* Enable USB on APQ8064/MSM8974
* Fixup/catchup config to support newer options
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Merge tag 'qcom-defconfig-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/soc
Pull "Qualcomm ARM Based defconfig Updates for v4.15" from Andy Gross:
* Enable Sony Z2 tablet options
* Enable USB on APQ8064/MSM8974
* Fixup/catchup config to support newer options
* tag 'qcom-defconfig-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: qcom_defconfig: Enable Z2 Tablet related options
ARM: qcom_defconfig: Disable DEBUG_GPIO
ARM: qcom_defconfig: Enable configs for USB on apq8064/msm8974
ARM: qcom_defconfig: Resync with new Kconfig options
1. Cleanups for s3c24xx and s3c64xx (memory allocation printks, code
style).
2. Remove of Exynos4212 related dead code (no more support for this
SoC).
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Merge tag 'samsung-soc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Pull "Samsung mach/soc changes for v4.15" from Krzysztof Kozłowski:
1. Cleanups for s3c24xx and s3c64xx (memory allocation printks, code
style).
2. Remove of Exynos4212 related dead code (no more support for this
SoC).
* tag 'samsung-soc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: EXYNOS: Remove Exynos4212 related dead code
ARM: SAMSUNG: Simplify size used for kzalloc
ARM: SAMSUNG: Remove printk for failed memory allocation
ARM: s3c64xx: Delete an unnecessary return statement in samsung_bl_set
ARM: s3c64xx: Remove printk for failed memory allocation in samsung_bl_set
ARM: s3c2410: Fix typos in a comments
ARM: s3c24xx: Simplify size used for kzalloc in iotiming get
ARM: s3c24xx: Remove printk for failed memory allocation in iotiming get
1. Enable USB3503 on multi_v7 for Odroid U3.
2. Enable USB Attached SCSI for Odroid HC1.
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Merge tag 'samsung-defconfig-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Pull "Samsung defconfig changes for v4.15" from Krzysztof Kozłowski:
1. Enable USB3503 on multi_v7 for Odroid U3.
2. Enable USB Attached SCSI for Odroid HC1.
* tag 'samsung-defconfig-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: multi_v7_defconfig: Enable UAS support for Odroid HC1 board
ARM: exynos_defconfig: Enable UAS support for Odroid HC1 board
ARM: multi_v7_defconfig: Enable USB3503 driver
fixes and clean-up in preparation for dropping more platform data later
on:
- Fix am33xx/am437x MMC address space offsets
- Fix overwriting clkctrl and modulemode values when dts data is
used
- Drop unused platform init code for omap_init_hdq
- Drop unused struct omap_hwmod_mux_info
- Remove duplicate define for dra722 es1.0 silicon revision
- Add support for dra71x es2.1
- Make omap_dma_dev_info __initdata
- A series of fixes for Coccinelle found issues
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Merge tag 'omap-for-v4.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "OMAP soc changes for omaps for v4.15 merge window" from Tony Lindgren:
SoC changes for omaps for v4.15 merge window that are mostly non-urgent
fixes and clean-up in preparation for dropping more platform data later
on:
- Fix am33xx/am437x MMC address space offsets
- Fix overwriting clkctrl and modulemode values when dts data is
used
- Drop unused platform init code for omap_init_hdq
- Drop unused struct omap_hwmod_mux_info
- Remove duplicate define for dra722 es1.0 silicon revision
- Add support for dra71x es2.1
- Make omap_dma_dev_info __initdata
- A series of fixes for Coccinelle found issues
* tag 'omap-for-v4.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: Fix typos in two comment lines in _omap_dm_timer_request()
ARM: OMAP: Use kcalloc() in omap_system_dma_probe()
ARM: OMAP: Improve a size determination in two functions
ARM: OMAP: Delete an error message for a failed memory allocation in two functions
ARM: OMAP2+: make omap_dma_dev_info __initdata
ARM: DRA722: Add support for DRA71x Silicon Rev 2.1
ARM: DRA722: remove redundant definition of 1.0 device
ARM: OMAP2+: Drop unused omap_hwmod_mux_info
ARM: OMAP2+: Drop unused omap_init_hdq
ARM: OMAP2+: Fix overwriting of clkctrl and modulemode values
ARM: OMAP2+: Fix MMC address space mismatch for am33xx and am43xx
Fix to allow UP build of shmobile.
Arnd Bergmann says:
A bugfix for the SMP case broke the build for the UP case:
arch/arm/mach-shmobile/headsmp-apmu.o: In function `shmobile_boot_apmu':
(.text+0x34): undefined reference to `secondary_startup'
The assembler file mixes code that is used for SMP with code
that we also need on a single-CPU build, so I'm leaving it
always enabled in the Makefile, but enclose the SMP code
in an #ifdef.
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Merge tag 'renesas-soc2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Second Round of Renesas ARM Based SoC Updates for v4.15" from Simon Horman:
Fix to allow UP build of shmobile.
Arnd Bergmann says:
A bugfix for the SMP case broke the build for the UP case:
arch/arm/mach-shmobile/headsmp-apmu.o: In function `shmobile_boot_apmu':
(.text+0x34): undefined reference to `secondary_startup'
The assembler file mixes code that is used for SMP with code
that we also need on a single-CPU build, so I'm leaving it
always enabled in the Makefile, but enclose the SMP code
in an #ifdef.
* tag 'renesas-soc2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: rcar-gen2: fix non-SMP build
This patch adds interrupt-names property in audio node so that
binding can be agnostic of the IRQ order.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds board related config for MT2701 pwm backlight.
Signed-off-by: Weiqing Kong <weiqing.kong@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds the device node for MT2701 pwm backlight.
Signed-off-by: Weiqing Kong <weiqing.kong@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
It has been superceded by a modernized driver in the PCI
subsystem host/ directory.
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Merge tag 'integrator-pciv3-delete' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
Pull "Delete old PCIv3 driver" from Linus Walleij:
This deletes the old PCIv3 driver in the Integrator machine.
It has been superceded by a modernized driver in the PCI
subsystem host/ directory.
* tag 'integrator-pciv3-delete' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: Delete the V3 PCI driver
please pull the following:
- Danilo removes the clock provider driver stubs which are no longer needed
now that we have a proper CPRMAN clock provider driver
- Stefan moves the SMP startup code for BCM2836 from the interrupt controller
driver down to where it belongs in the architecture code, this was requested
by Marc Zyngier before comitting any fixes to that code
- Phil provides a fix for a future Raspberry Pi firmware which will make the
secondary cores wait for an event and therefore requires the CPU onlining
other cores to send such event (along with the appropriate barrier)
- Florian fixes the BRCMSTB UART debug stub to work correctly when using an
ARM BE8 kernel since there were some missing register read swapping needed
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Merge tag 'arm-soc/for-4.15/soc' of http://github.com/Broadcom/stblinux into next/soc
Pull "Broadcom soc changes for 4.15 (part 1)" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC/Kconfig changes for 4.15
please pull the following:
- Danilo removes the clock provider driver stubs which are no longer needed
now that we have a proper CPRMAN clock provider driver
- Stefan moves the SMP startup code for BCM2836 from the interrupt controller
driver down to where it belongs in the architecture code, this was requested
by Marc Zyngier before comitting any fixes to that code
- Phil provides a fix for a future Raspberry Pi firmware which will make the
secondary cores wait for an event and therefore requires the CPU onlining
other cores to send such event (along with the appropriate barrier)
- Florian fixes the BRCMSTB UART debug stub to work correctly when using an
ARM BE8 kernel since there were some missing register read swapping needed
* tag 'arm-soc/for-4.15/soc' of http://github.com/Broadcom/stblinux:
ARM: brcmstb: Add appropriate ARM_BE8() macros for swapping
ARM: bcm2836: Send event when onlining other cores
irqchip: bcm2836: Move SMP startup code to arch/arm (v2)
clk: bcm2835: remove remains from stub clk driver
* Prepare to enable SMP on R-Car E2 (r8a7794).
Geert Uytterhoeven says:
"The main hurdle here is that R-Car Gen2 boot loaders do not initialize
the arch_timer CNTVOFF register, which thus needs workarounds on Linux.
- The first patch adds a definition for MON_MODE, as suggested by Marc
Zyngier,
- The second patch makes sure CNTVOFF is initialized for boot and
secondary Cortex-A15 and Cortex-A7 CPU cores, like is already done for
the boot Cortex-A7 CPU core. Without this, the ARM arch timer does
not work on secondary CPU cores."
A follow-up patch to enable SMP in DT on R-Car E2 (r8a7794) is currently
deferred unto v4.16 as it depends on the above.
* Enable low-level debugging support for RZ/G1E (r8a7745).
Fabrizio Castro says, "RZ/G1E uses SCIF4 for the debug console."
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Merge tag 'renesas-soc-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Updates for v4.15" from Simon Horman:
* Prepare to enable SMP on R-Car E2 (r8a7794).
Geert Uytterhoeven says:
"The main hurdle here is that R-Car Gen2 boot loaders do not initialize
the arch_timer CNTVOFF register, which thus needs workarounds on Linux.
- The first patch adds a definition for MON_MODE, as suggested by Marc
Zyngier,
- The second patch makes sure CNTVOFF is initialized for boot and
secondary Cortex-A15 and Cortex-A7 CPU cores, like is already done for
the boot Cortex-A7 CPU core. Without this, the ARM arch timer does
not work on secondary CPU cores."
A follow-up patch to enable SMP in DT on R-Car E2 (r8a7794) is currently
deferred unto v4.16 as it depends on the above.
* Enable low-level debugging support for RZ/G1E (r8a7745).
Fabrizio Castro says, "RZ/G1E uses SCIF4 for the debug console."
* tag 'renesas-soc-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15
ARM: Add definition for monitor mode
ARM: debug-ll: Add support for r8a7745
Enable BQ32000 RTC driver in multi_v7_defconfig.
Biju Das says, "The iWave RZ/G1M Q7 SOM supports RTC (TI BQ32000).
To increase hardware support enable the driver in the
multi_v7_defconfig multiplatform configuration."
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Merge tag 'renesas-defconfig-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Defconfig Updates for v4.15" from Simon Horman:
Enable BQ32000 RTC driver in multi_v7_defconfig.
Biju Das says, "The iWave RZ/G1M Q7 SOM supports RTC (TI BQ32000).
To increase hardware support enable the driver in the
multi_v7_defconfig multiplatform configuration."
* tag 'renesas-defconfig-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: multi_v7_defconfig: Enable BQ32000 RTC driver
converting the platform to sparsemem, using SPI-MMC
and a bit more.
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Merge tag 'ep93xx-for-arm-soc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
Pull "EP93xx improvements for v4.15"
EP93xx patches that have been floating for a while,
converting the platform to sparsemem, using SPI-MMC
and a bit more.
* tag 'ep93xx-for-arm-soc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: ep93xx: Add lm70 HWMON sensor to TS-72xx boards
ARM: ep93xx: tidy up TS-72xx Watchdog resources
ARM: ep93xx: simone: let the mmc_spi driver handle the card detect
ARM: ep93xx: switch to SPARSEMEM
The commit afece3ab9a ("PM / Domains: Add time accounting to various
genpd states") causes a boot regression for ux500.
The problem occurs when the ux500 machine code calls pm_genpd_init(), which
since the above change triggers a call to ktime_get(). More precisely,
because ux500 initializes PM domains in the init_IRQ() phase of the boot,
timekeeping has not yet been initialized.
Fix the problem by moving the initialization of the PM domains to after
timekeeping has been initialized.
Fixes: afece3ab9a ("PM / Domains: Add time accounting to various genpd..")
Cc: Thara Gopinath <thara.gopinath@linaro.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These platforms provide a clock to their watchdog, in each
case this is the peripheral clock (PCLK), so explicitly
name the clock in the device tree.
Take this opportunity to add the "faraday,ftwdt010"
compatible as fallback to the watchdog IP blocks.
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix the legacy PCI interrupt numbers for i.MX7. The numbers were
wrongly coded in an inverted order than what Reference Manual tells.
It causes problem for PCI devices using legacy interrupt.
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Merge tag 'imx-fixes-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Pull "i.MX fixes for 4.14" from Shawn Guo:
- Fix the legacy PCI interrupt numbers for i.MX7. The numbers were
wrongly coded in an inverted order than what Reference Manual tells.
It causes problem for PCI devices using legacy interrupt.
* tag 'imx-fixes-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx7d: Invert legacy PCI irq mapping
Two device tree related fixes:
- One on Armada 38x using a other compatible string for I2C in order
to cover an errata.
- One for Armada 7K/8K fixing a typo on interrupt-map property for
PCIe leading to fail PME and AER root port service initialization
And the last one for the mbus fixing the window size calculation when
it exceed 32bits
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Merge tag 'mvebu-fixes-4.14-2' of git://git.infradead.org/linux-mvebu into fixes
Pull "mvebu fixes for 4.14 (part 2)" from Gregory CLEMENT
Two device tree related fixes:
- One on Armada 38x using a other compatible string for I2C in order
to cover an errata.
- One for Armada 7K/8K fixing a typo on interrupt-map property for
PCIe leading to fail PME and AER root port service initialization
And the last one for the mbus fixing the window size calculation when
it exceed 32bits
* tag 'mvebu-fixes-4.14-2' of git://git.infradead.org/linux-mvebu:
bus: mbus: fix window size calculation for 4GB windows
ARM: dts: Fix I2C repeated start issue on Armada-38x
arm64: dts: marvell: fix interrupt-map property for Armada CP110 PCIe controller
- one DT phy address fix for the new sama5d27 som1 ek
- two DT ADC patches that were forgotten while moving to
hardware triggers for sama5d2 (iio changes already applied)
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Merge tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Fixes: second batch for 4.14:
- one DT phy address fix for the new sama5d27 som1 ek
- two DT ADC patches that were forgotten while moving to
hardware triggers for sama5d2 (iio changes already applied)
* tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d2: add ADC hw trigger edge type
ARM: dts: at91: sama5d2_xplained: enable ADTRG pin
ARM: dts: at91: at91-sama5d27_som1: fix PHY ID
please pull the following:
- Loic fixes the console path on the Raspberry Pi 3 which was not correctly set
and would cause all sorts of confusion between the Bluetooth controller and the
kernel console
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Merge tag 'arm-soc/for-4.14/devicetree-fixes' of http://github.com/Broadcom/stblinux into fixes
Pull "Broadcom devicetree fixes for 4.14" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC Device Tree fixes for 4.14,
please pull the following:
- Loic fixes the console path on the Raspberry Pi 3 which was not correctly set
and would cause all sorts of confusion between the Bluetooth controller and the
kernel console
* tag 'arm-soc/for-4.14/devicetree-fixes' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm283x: Fix console path on RPi3
A new feature Range Selector (RS) has been added to GIC specification
in order to support more than 16 CPUs at affinity level 0. New fields
are introduced in SGI system registers (ICC_SGI0R_EL1, ICC_SGI1R_EL1
and ICC_ASGI1R_EL1) to relax an artificial limit of 16 at level 0.
- A new RSS field in ICC_CTLR_EL3, ICC_CTLR_EL1 and ICV_CTLR_EL1:
[18] - Range Selector Support (RSS)
0b0 = Targeted SGIs with affinity level 0 values of 0-15 are supported.
0b1 = Targeted SGIs with affinity level 0 values of 0-255 are supported.
- A new RS field in ICC_SGI0R_EL1, ICC_SGI1R_EL1 and ICC_ASGI1R_EL1:
[47:44] - RangeSelector (RS) which group of 16 TargetList[n] field
TargetList[n] represents aff0 value ((RS*16)+n)
When ICC_CTLR_EL3.RSS==0 or ICC_CTLR_EL1.RSS==0, RS is RES0.
- A new RSS field in GICD_TYPER:
[26] - Range Selector Support (RSS)
0b0 = Targeted SGIs with affinity level 0 values of 0-15 are supported.
0b1 = Targeted SGIs with affinity level 0 values of 0-255 are supported.
Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Enable the CEC controller on Jetson TK1 so that it can be used to
communicate with CEC devices via the HDMI connector.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add support for the Tegra CEC IP to the Tegra124 DTSI and link it to the
HDMI controller via phandle.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add node for xhci. Boards DT files will enable it if needed.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On some i.MX6 SoCs (like i.MX6SL, i.MX6SX and i.MX6UL) that do not have
speed grading check, opp table will not be created in platform code,
so cpufreq driver prints the following error message:
cpu cpu0: dev_pm_opp_get_opp_count: OPP table not found (-19)
However, this is not really an error in this case because the
imx6q-cpufreq driver first calls dev_pm_opp_get_opp_count()
and if it fails, it means that platform code does not provide
OPP and then dev_pm_opp_of_add_table() will be called.
In order to avoid such confusing error message, move the speed grading
check from platform code to the imx6q-cpufreq driver.
This way the imx6q-cpufreq no longer has to check whether OPP table
is supplied by platform code.
Tested on a i.MX6Q and i.MX6UL based boards.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Various A10-based development boards have standard HDMI connectors
wired to the dedicated HDMI pins on the SoC.
Enable the display pipeline and HDMI output on boards I have or have
access to schematics:
- Cubieboard
- Olimex A10-OLinuXino-LIME
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
All the A20 devices I own have standard HDMI connectors wired
to the dedicated HDMI pins on the SoC:
- Bananapi M1+
- Cubieboard 2
- Cubietruck
- Lamobo R1 (or Bananapi R1)
Development boards from Olimex also have standard HDMI connectors.
Schematics for them are publicly available. Enable HDMI on them as
well.
- Olimex A20-OLinuXino-LIME
- Olimex A20-OLinuXino-LIME2
- Olimex A20-OLinuXino-MICRO
Enable the display pipeline and HDMI output for them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Priit Laes <plaes@plaes.org> # Cubietruck, A20-OLinuXino-MICRO
Tested-by: Olliver Schinagl <oliver@schinagl.nl> # A20-OLinuXino-LIME2
Tested-by: Jonathan Liu <net147@gmail.com> # A20-OLinuXino-LIME
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A20 has two interconnected display pipelines, mirroring the A10.
Add all the device nodes for them, including the downstream HDMI
controller that we already support.
Signed-off-by: Jonathan Liu <net147@gmail.com>
[wens@csie.org: Squashed in HDMI and provided commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A10 has two interconnected display pipelines, much like the A31,
but without the DRCs between the backend and TCONs.
Add all the device nodes for them, including the downstream HDMI
controller that we already support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The R40 SoC has a watchdog like the one on A20, in the timer memory zone
(which is also the same on A20).
Add the device tree node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Add usb otg support for rk3288-vyasa, board support usb1 otg
power through otg_vbus_drv and naming conversion followed
as per schematic.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add usb host support for rk3288-vyasa, board support hub power
through phy_pwr_en and usb2 host power through usb2_pwr_en and
naming conversion followed as per schematic.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the external clock-reference, enable the gmac node
and define the phy-related pin settings.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add supporting regulators for rk3288-vyasa board, dc12_vbat is
parent regulatorand followed regulators as are child regulators.
regulator naming conversion followed as per schematic for better
readability and easy for identification.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
rk808, SWITCH_REG1 has configured for sdmmc regulator as vcc_sd,
so use the same by renaming vcc33_sd to vcc_sd(as per schematic)
and drop explicit regulator definition from root.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
vdd_log, never used on DCDC_REG1 of rk808 from latest schematic so
remove the same and update the regulator-name as 'vdd_arm' to sync
with existing rk3288 board dts files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add thermal zone and dynamic CPU power coefficients for RV1108
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add tsadc needed main information for RV1108 SoC.
750000Hz is the max clock rate supported by tsadc module.
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the USB pins and nodes for USB FS core on STM32F746 SoC.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch adds the USB pins and nodes for USB HS core on STM32F746 SoC.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Initially each pin was declared in "include/dt-bindings/stm32<SOC>-pinfunc.h"
and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX).
Since this approach was approved, the number of supported MCU has
increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new
file in "include/dt-bindings" each time a new STM32 SOC arrives I propose
a new approach which consist to use a macro to define pin muxing in device
tree. All STM32 will use the common macro to define pinmux. Furthermore, it
will make STM32 maintenance and integration of new SOC easier .
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Fix HSE frequency to 25Mhz for STM32H743 Eval Board
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add Timers and it sub-nodes into DT for stm32f746 family.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add lptimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Improve hardware description by adding a clock property to the device
node corresponding to the CA9 CPU core.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Improve hardware description by adding clocks properties to the device
nodes corresponding to the CA9 CPU cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA7 cluster has a clocks property,
while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the CPU cores in the CA15 cluster have clocks properties.
Add the missing clocks properties for the CPU cores in the CA7 cluster
to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU cores are driven by the same clock.
Add the missing clocks properties to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Improve hardware description by adding clocks properties to the device
nodes corresponding to the CA9 CPU cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Improve hardware description by adding a clock property to the device
node corresponding to the CA9 CPU core.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Improve hardware description by adding a clocks property to the device
node corresponding to the primary CA15 CPU core, which is for now the
only one described.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7794 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7793 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7792 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7791 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7790 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7743 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen1 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in DT of r8a7779 SoC.
As the driver does not match on "renesas,gpio-r8a7779" there
are some run-time considerations for this patch:
* When a resulting DTB is used with kernels newer than v4.14 this should
not have any run-time effect as renesas,rcar-gen1-gpio is matched by the
driver since commit dbd1dad2ab ("gpio: rcar: add gen[123] fallback
compatibility strings")
* However, when used with older kernels GPIO will be disabled as
no compat string match will be made by the driver.
The regression documented above for the new DTB with old kernel case
is acceptable in my opinion.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen1 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in DT of r8a7778 SoC.
As the driver does not match on "renesas,gpio-r8a7778" there
are some run-time considerations for this patch:
* When a resulting DTB is used with kernels newer than v4.14 this should
not have any run-time effect as renesas,rcar-gen1-gpio is matched by the
driver since commit dbd1dad2ab ("gpio: rcar: add gen[123] fallback
compatibility strings")
* However, when used with older kernels GPIO will be disabled as
no compat string match will be made by the driver.
The regression documented above for the new DTB with old kernel case
is acceptable in my opinion.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Fix warnings like follows:
Warning (node_name_chars_strict): Character '_' not recommended in ...
Commit 8654cb8d03 ("dtc: update warning settings for new bus and
node/property name checks") says these checks are a bit subjective,
but Rob also says to not add new W=2 warnings.
The exising warnings should be fixed in order to catch new ones
easily.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC.
The thermal monitor node is included in sysctrl. Since the efuse might not
have a calibrated value of thermal monitor, this patch gives the default
value for PXs2.
Furthermore, add cpuN labels for reference in cooling-device property.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Enable thermal on rk3288-vyasa board, TSHUT is high active.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
According to i.MX7D reference manual (Rev. 0.1, table 7-1, page 1221)
legacy PCI interrupt mapping is as follows:
- PCIE INT A is IRQ 122
- PCIE INT B is IRQ 123
- PCIE INT C is IRQ 124
- PCIE INT D is IRQ 125
Invert the mapping information in corresponding DT node to reflect
that.
Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Fixes: a816d5750e ("ARM: dts: imx7d: Add node for PCIe controller")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is not recommended to place the regulator nodes inside 'simple-bus',
so adjust them accordingly.
The motivation for rearranging this is to make it easier to add new
regulator nodes in the future.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The current GPL only licensing on the dts file makes it very
impractical for other software components licensed under another
license.
In order to make it easier for them to reuse our device trees,
relicense our dts files first under a GPL/X11 dual-license.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable cpuidle support on i.MX6DL starting from IMX_CHIP_REVISION_1_1.
This also makes the code cleaner because 6q and 6dl actually have
different revision histories.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Arnd Bergmann