mirror of https://gitee.com/openkylin/linux.git
1541 Commits
Author | SHA1 | Message | Date |
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06d42212e6 |
dt-bindings: clock: Add Actions S900 clock bindings
Add Actions Semi S900 clock bindings. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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8bcde6582c |
clk: qcom: rpmcc: Add support to XO buffered clocks
XO is onchip buffer clock to generate 19.2MHz. This patch adds support to 5 XO buffer clocks found on PMIC8921, these buffer clocks can be controlled from external pin or in manual mode. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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8465baaeca |
dt-bindings: clock: add clocks for MT2712
add new clocks according to ECO design change Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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2f05b6b920 |
clk: stm32: Add DSI clock for STM32F469 Board
This patch adds DSI clock for STM32F469 board Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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fa6f398505 |
clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK
Update of END_PRIMARY_CLK was missed, it should be after CLK_SYSCLK hsi and sysclk are overwritten by gpioa and gpiob. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Tested-by: Philippe Cornu <philippe.cornu@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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936ceb12c5 |
clk: mediatek: update missing clock data for MT7622 audsys
Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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55a5fcafe3 |
dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4
Just add binding for a fixed-factor clock axisel_d4, which would be
referenced by PWM devices on MT7623 or MT2701 SoC.
Cc: stable@vger.kernel.org
Fixes:
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1390515aed |
dt-bindings: soc: update MT2712 power dt-bindings
Add new power domains(MFG_SC1/MFG_SC2/MFG_SC3) for MT2712 according to ECO design change. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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524353ea48
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clk: sunxi-ng: add support for the Allwinner H6 CCU
The Allwinner H6 SoC has a CCU which has been largely rearranged. Add support for it in the sunxi-ng CCU framework. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> |
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f7c14dd5b1 |
dt-bindings: clocks: add APB RTC gate for SC9860
Added index of RTC gate clocks which are used by some devices on aon area of SC9860, for example the Watchdog timer. Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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fed925ea70 |
Merge tag 'imx-dt-newclk-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "i.MX device tree update with new clock for 4.17" from Shawn Guo: - Add CAAM and Keypad device node for i.MX7S/D SoC device tree. - Add clock support for i.MX7 SNVS RTC device. * tag 'imx-dt-newclk-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx7s: add Keypad Port module ARM: dts: imx7s: add CAAM device node ARM: dts: imx7s: add snvs rtc clock clk: imx: imx7d: add the Keypad Port module clock clk: imx7d: add CAAM clock clk: imx: imx7d: add the snvs clock |
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83fc580dcc |
Input: gpio-keys - add support for wakeup event action
Add support for specifying event actions to trigger wakeup when using the gpio-keys input device as a wakeup source. This would allow the device to configure when to wakeup the system. For example a gpio-keys input device for pen insert, may only want to wakeup the system when ejecting the pen. Suggested-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> |
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a4fb7df25d |
clk: meson: axg: add hifi clock bindings
Add the new HIFI pll to axg clock bindings Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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0f2d4f162f
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ASoC: rt5651: move definitions of dt-binding constants to include/dt-bindings
Move the definitions of constants used in the dt-bindings from include/sound/rt5651.h to include/dt-bindings/sound/rt5651.h. As dt-bindings headers may also be parsed by the dt-compiler, they cannot use enums, only defines, so this commit also changes the code declaring the constants to use defines. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Mark Brown <broonie@kernel.org> |
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0c1a2c17f6 |
dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
Add relevant header files required for dt-bindings of SCPSYS power domain control for subsystems found on MT7623A SoC. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Cc: Rob Herring <robh@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> [mb: clean-up commit message] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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9bee94e7b7 |
clk: stm32mp1: Introduce STM32MP1 clock driver
This patch introduces the mechanism to probe stm32mp1 driver. It also defines registers definition. This patch also introduces the generic mechanism to register a clock (a simple gate, divider and fixed factor). All clocks will be defined in one table. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> |
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89e423c3f1 |
clk: tegra: Add la clock for Tegra210
This clock is needed by the memory built-in self test work around. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Hector Martin <marcan@marcan.st> Tested-by: Andre Heider <a.heider@gmail.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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5425fb15d8 |
arm64: tegra: Add Tegra194 chip device tree
Add the chip-level device tree, including binding headers, for the NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices are initially available, enough to boot to UART console. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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f932423c6f |
dt-bindings: mfd: Add STM32F7 SDMMC2 rcc entry
STM32F769 SoC provides 2 SDMMC instances, add missing RCC SDMMC2 entry for it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> |
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55af415b42 |
pinctrl: meson: meson8b: fix requesting GPIOs greater than GPIOZ_3
Meson8b is a cost reduced variant of the Meson8 SoC. It's package size is smaller than Meson8. Unfortunately there are a few key differences which cannot be seen without close inspection of the code and the public S805 datasheet: - the GPIOX bank is missing the GPIOX_12, GPIOX_13, GPIOX_14 and GPIOX_15 GPIOs - the GPIOY bank is missing the GPIOY_2, GPIOY_4, GPIOY_5, GPIOY_15 and GPIOY_16 GPIOs - the GPIODV bank is missing all GPIOs except GPIODV_9, GPIODV_24, GPIODV_25, GPIODV_26, GPIODV_27, GPIODV_28 and GPIODV_29 - the GPIOZ bank is missing completely - there is a new GPIO bank called "DIF" This means that Meson8b only has 83 actual GPIO lines. Without any holes there would be 130 GPIO lines in total (120 are inherited from Meson8 plus 10 new from the DIF bank). GPIOs greater GPIOZ_3 (whose ID is 83 - as a reminder: this is exactly the number of actual GPIO lines on Meson8b and also the value of meson8b_cbus_pinctrl_data.num_pins) cannot berequested. Using CARD_6 (which used ID 100 prior to this patch, "base of the GPIO controller was 382) as an example: $ echo 482 > /sys/class/gpio/export export_store: invalid GPIO 482 This removes all non-existing pins from to dt-bindings header file (include/dt-bindings/gpio/meson8b-gpio.h). This allows us to have a consecutive numbering for the GPIO #defines (GPIOY_2 doesn't exist for example, so previously the GPIOY_3 ID was "GPIOY_1 + 2", after this patch it is "GPIOY_1 + 1"). As a nice side-effect this means that we get compile-time (instead of runtime) errors if Meson8b .dts uses a pin that only exists on Meson8. Additionally the pinctrl-meson8b driver has to be updated to handle this new GPIO numbering. By default a struct meson_bank only handles GPIO banks where the pins are numbered consecutively because it calculates the bit offsets based on the GPIO IDs. This is solved by taking the original BANK() definition and splitting it into consecutive subsets (X0..11 and X16..21). The bit offsets for each new bank includes the skipped GPIOs (the definition of the "X0..11" bank is identical to the old "X" bank apart from the "last IRQ" field, the definition of the new, split "X16..21" bank takes the original "X" bank and adds 16 - the start of the new split bank - to the "first IRQ", pullen bit, pull bit, dir bit, out bit and in bit). Commit |
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536836d32c |
dt-bindings: pinctrl: mediatek: add bindings for I2C2 and SPI2 on MT7623
Add missing pinctrl binding about I2C2 and SPI2 which would be used in devicetree related files. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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55de0f31df
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clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO
CLK_PLL_VIDEO needs to be referenced in HDMI DT entry as a possible PHY clock parent. Export it so it can be used later in DT. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> |
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1691cc375a |
clk: imx: imx7d: add the Keypad Port module clock
According to the i.MX7D Reference Manual, the Keypad Port module (KPP) requires this clock gate to be enabled. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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baf15cbf54 |
clk: imx7d: add CAAM clock
Add CAAM clock so that we could use the Cryptographic Acceleration and Assurance Module (CAAM) hardware block. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: "Horia Geantă" <horia.geanta@nxp.com> Cc: Aymen Sghaier <aymen.sghaier@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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80f8ce5895 |
clk: hi3798cv200: add COMBPHY0 clock support
The clock COMBPHY1 has already been supported by hi3798cv200 driver, but COMBPHY0 is missing. It adds COMBPHY0 clock support. Since the mux table is being shared by COMBPHY0 and COMBPHY1, it renames comphy1_mux_p and comphy1_mux_table a bit to drop instance number '1' from there. Signed-off-by: Jianguo Sun <sunjianguo1@huawei.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> |
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a44d1f531a |
clk: hi3798cv200: fix define indentation
It's a coding-style fix, which corrects the indentation for all those clock definitions, so that the code looks nicer and new definitions can be added with a recommended indentation. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> |
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7ce36da900 |
clk: renesas: cpg-mssr: Add support for R-Car M3-N
Initial support for R-Car M3-N (r8a77965), including core and module clocks. Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual: Hardware (Rev. 0.80, Oct 31, 2017)". Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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10c1d542c7 |
media: dt-bindings: Add bindings for TDA1997X
Define the device tree bindings for the TDA1997X. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@iki.fi> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> [hans.verkuil@cisco.com: make a proper commit message] Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com> |
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d931ba53e0 |
clk: imx: imx7d: add the snvs clock
According to the i.MX7D Reference Manual, SNVS block has a clock gate, accessing SNVS block would need this clock gate to be enabled, add it into clock tree so that SNVS module driver can operate this clock gate. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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a527709b78 |
soc: renesas: rcar-sysc: Add R-Car M3-N support
Add support for R-Car M3-N (R8A77965) power areas. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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35b3c462da |
dt-bindings: clock: add R8A77980 CPG core clock definitions
Add macros usable by the device tree sources to reference the R8A77980 CPG core clocks by index. The data come from the table 8.2e of the R-Car Series, 3rd Generation User's Manual: Hardware (Rev. 0.80, Oct, 2017), however I had to add the Z2 clock which is somehow present only on the figure 8.1e... Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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7755b40d07 |
dt-bindings: power: add R8A77980 SYSC power domain definitions
Add macros usable by the device tree sources to reference R8A77980 SYSC power domains by index. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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9708fb630d |
net: phy: dp83867: Add binding for the CLK_OUT pin muxing option
The DP83867 has a muxing option for the CLK_OUT pin. It is possible to set CLK_OUT for different channels. Create a binding to select a specific clock for CLK_OUT pin. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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224a638441 |
clk: rockchip: remove HCLK_VIO from rk3328 dt header
This clock is not hclk_vio but hclk_vio_niu, the clock for the interconnect output. The clock got fixed and the id was never used in this incorrect form, so remove it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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8578953687 |
MIPS changes for 4.16
These are the main MIPS changes for 4.16. Rough overview: - Basic support for the Ingenic JZ4770 based GCW Zero open-source handheld video game console - Support for the Ranchu board (used by Android emulator) - Various cleanups and misc improvements Fixes: - Fix generic platform's USB_*HCI_BIG_ENDIAN selects (4.9) - Fix vmlinuz default build when ZBOOT selected - Fix clean up of vmlinuz targets - Fix command line duplication (in preparation for Ingenic JZ4770) Miscellaneous: - Allow Processor ID reads to be to be optimised away by the compiler (improves performance when running in guest) - Push ARCH_MIGHT_HAVE_PC_SERIO/PARPORT down to platform level to disable on generic platform with Ranchu board support - Add helpers for assembler macro instructions for older assemblers - Use assembler macro instructions to support VZ, XPA & MSA operations on older assemblers, removing C wrapper duplication - Various improvements to VZ & XPA assembly wrappers - Add drivers/platform/mips/ to MIPS MAINTAINERS entry Minor cleanups: - Misc FPU emulation cleanups (removal of unnecessary include, moving macros to common header, checkpatch and sparse fixes) - Remove duplicate assignment of core in play_dead() - Remove duplication in watchpoint handling - Remove mips_dma_mapping_error() stub - Use NULL instead of 0 in prepare_ftrace_return() - Use proper kernel-doc Return keyword for __compute_return_epc_for_insn() - Remove duplicate semicolon in csum_fold() Platform support: Broadcom: - Enable ZBOOT on BCM47xx Generic platform: - Add Ranchu board support, used by Android emulator - Fix machine compatible string matching for Ranchu - Support GIC in EIC mode Ingenic platforms: - Add DT, defconfig and other support for JZ4770 SoC and GCW Zero - Support dynamnic machine types (i.e. JZ4740 / JZ4770 / JZ4780) - Add Ingenic JZ4770 CGU clocks - General Ingenic clk changes to prepare for JZ4770 SoC support - Use common command line handling code - Add DT vendor prefix to GCW (Game Consoles Worldwide) Loongson: - Add MAINTAINERS entry for Loongson2 and Loongson3 platforms - Drop 32-bit support for Loongson 2E/2F devices - Fix build failures due to multiple use of "MEM_RESERVED" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEd80NauSabkiESfLYbAtpk944dnoFAlp64ZUACgkQbAtpk944 dnrXrg//UPWeZMye/uHw0eEeJJjybyA0IWpJ6M94gbHxpduhQsjYU3CR9U4ZBmhs feY53dahh0RCR0k28EF8DEPkoUbGFKmyYCnvqAuatq1XOjAZtlgS9+VVzbK+Iswm XkZD1MBoZ49o0meyjQrH/2Ri/t6tHuzo0G2WtRJ8FnVruN9ymG6D5pR4Y31gDucb 6JkTXjNfRJIKd0qJgP+c3HdlKE7jlnCTJnzHdA+5FbZVwKbm2/6KxbQo5Gc1BXJX 4j7I4nJ0FIz0cB6fHbcccFSW9w3lPa9bQ4XpYPJYE6a36QldFvMWHRxvI6rxrACN 5mPqIB9uqvtW8sdUbJtNRXFlNnm8XZzvsNqP6WxGQPW70+q2camni9W/gC1ifQsF +uVV54yj3Ky8xQNbbpfbDp/tFXRuLtj3DV4/a3dwA5J0YGEuMn1zzV5WTTzymFVn 3NKl62LDUlzBNw0d1lUPMY6P1oKcNnRhLxBq0cxaB7AdOLF0jlCQ/wYUhXPpblj6 CQB4cupR4IMvL7FZ1RS98e1RHaF8mXpaZBnGXT251DxZEre9OXCJxDdzqemedTVi SaCcvQqApCQD8OihL+wHZLew8Vp4EvwGAa++Evu/Ot4rWjY/9MGLtewYk8jkOEf6 qk30dDn86ou29HNwpzfWadIq5Zew+QftifGOzTcuzgrJXXt+jH8= =7iwT -----END PGP SIGNATURE----- Merge tag 'mips_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips Pull MIPS updates from James Hogan: "These are the main MIPS changes for 4.16. Rough overview: (1) Basic support for the Ingenic JZ4770 based GCW Zero open-source handheld video game console (2) Support for the Ranchu board (used by Android emulator) (3) Various cleanups and misc improvements More detailed summary: Fixes: - Fix generic platform's USB_*HCI_BIG_ENDIAN selects (4.9) - Fix vmlinuz default build when ZBOOT selected - Fix clean up of vmlinuz targets - Fix command line duplication (in preparation for Ingenic JZ4770) Miscellaneous: - Allow Processor ID reads to be to be optimised away by the compiler (improves performance when running in guest) - Push ARCH_MIGHT_HAVE_PC_SERIO/PARPORT down to platform level to disable on generic platform with Ranchu board support - Add helpers for assembler macro instructions for older assemblers - Use assembler macro instructions to support VZ, XPA & MSA operations on older assemblers, removing C wrapper duplication - Various improvements to VZ & XPA assembly wrappers - Add drivers/platform/mips/ to MIPS MAINTAINERS entry Minor cleanups: - Misc FPU emulation cleanups (removal of unnecessary include, moving macros to common header, checkpatch and sparse fixes) - Remove duplicate assignment of core in play_dead() - Remove duplication in watchpoint handling - Remove mips_dma_mapping_error() stub - Use NULL instead of 0 in prepare_ftrace_return() - Use proper kernel-doc Return keyword for __compute_return_epc_for_insn() - Remove duplicate semicolon in csum_fold() Platform support: Broadcom: - Enable ZBOOT on BCM47xx Generic platform: - Add Ranchu board support, used by Android emulator - Fix machine compatible string matching for Ranchu - Support GIC in EIC mode Ingenic platforms: - Add DT, defconfig and other support for JZ4770 SoC and GCW Zero - Support dynamnic machine types (i.e. JZ4740 / JZ4770 / JZ4780) - Add Ingenic JZ4770 CGU clocks - General Ingenic clk changes to prepare for JZ4770 SoC support - Use common command line handling code - Add DT vendor prefix to GCW (Game Consoles Worldwide) Loongson: - Add MAINTAINERS entry for Loongson2 and Loongson3 platforms - Drop 32-bit support for Loongson 2E/2F devices - Fix build failures due to multiple use of 'MEM_RESERVED'" * tag 'mips_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (53 commits) MIPS: Malta: Sanitize mouse and keyboard configuration. MIPS: Update defconfigs after previous patch. MIPS: Push ARCH_MIGHT_HAVE_PC_SERIO down to platform level MIPS: Push ARCH_MIGHT_HAVE_PC_PARPORT down to platform level MIPS: SMP-CPS: Remove duplicate assignment of core in play_dead MIPS: Generic: Support GIC in EIC mode MIPS: generic: Fix Makefile alignment MIPS: generic: Fix ranchu_of_match[] termination MIPS: generic: Fix machine compatible matching MIPS: Loongson fix name confict - MEM_RESERVED MIPS: bcm47xx: enable ZBOOT support MIPS: Fix trailing semicolon MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers. MIPS: MSA: Update helpers to use new asm macros MIPS: XPA: Standardise readx/writex accessors MIPS: XPA: Allow use of $0 (zero) to MTHC0 MIPS: XPA: Use XPA instructions in assembly MIPS: VZ: Pass GC0 register names in $n format MIPS: VZ: Update helpers to use new asm macros ... |
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ef991796be |
This is the bulk of pin control changes for the v4.16 kernel cycle:
Core changes: - After lengthy discussions and partly due to my ignorance, we have merged a patch making pinctrl_force_default() and pinctrl_force_sleep() reprogram the states into the hardware of any hogged pins, even if they are already in the desired state. This only apply to hogged pins since groups of pins owned by drivers need to be managed by each driver, lest they could not do things like runtime PM and put pins to sleeping state even if the system as a whole is not in sleep. New drivers: - New driver for the Microsemi Ocelot SoC. This is used in ethernet switches. - The X-Powers AXP209 GPIO driver was extended to also deal with pin control and moved over from the GPIO subsystem. This circuit is a mixed-mode integrated circuit which is part of AllWinner designs. - New subdriver for the Qualcomm MSM8998 SoC, core of a high end mobile devices (phones) chipset. - New subdriver for the ST Microelectronics STM32MP157 MPU and STM32F769 MCU from the STM32 family. - New subdriver for the MediaTek MT7622 SoC. This is used for routers, repeater, gateways and such network infrastructure. - New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC has multimedia features and target "smart devices", I guess in-car entertainment, in-flight entertainment, industrial control panels etc. General improvements: - Incremental improvements on the SH-PFC subdrivers for things like the CAN bus. - Enable the glitch filter on Baytrail GPIOs used for interrupts. - Proper handling of pins to GPIO ranges on the Semtec SX150X - An IRQ setup ordering fix on MCP23S08. - A good set of janitorial coding style fixes. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJadGEKAAoJEEEQszewGV1zA4QQALs8edxhv4qV5vm50mTdrO3n QtRhJNb53j6MIKtjFnazMvh6MXRIP+08SyX9sDLi5AxINIVuyQh3mrcB6Zc9zN58 +6jFFOIbfm5E8by4n3wnKm3F/WAbNBZph9eT2Rn3cDv9o9hQbyNJ50sQkQMCjd9X WGR353c3OL4zb3vU8t72G/RPYUY1w1SkG9bGzRuSif8LawDcN6v6MMo2XhZA6RqM 3qYIG29vJ1n0weggUIBeSAJIzk4eMwcoWCbVWxhns5JGxw5VPES1zbSp1D+mbzRC 01i5Pt/gD+cWN/Kk/zKIMo1OqLAl+uLr6hzepj6W+5wu9CcQz/BgvRx7HUqnqgyh S8cN4AOgWmW+T75pHypd1WVic3q0RCXkFY8jjHpCATDY+Z+js0lZRs3y4DBiJ2ys DMVBeumDINKqaZ6aLH6lVkm+SxXOUy143arQQIzi0/F7fAp68i+9ofIO8B5smEmd 0S+3sT0sO5QXVgZJ0t0iGUUG5irXi8XtF5qvRmuFZUe0OLGgKX20oCdC0pH0WU4M OZO1Bvb8vmn1tddogO2WlHeg6amWdwxtDuBsLRO3YILLu3jwPjhNqNmErXzXEmWt TY9l2M1uQmoJibNpmTjOzSfj4OtUHMwkDrFRJHAcUPcKwdEy4MyzFL16ATnIwgY9 AmyMLNWJd8Wazgc6BK6w =gLY/ -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v4.16 kernel cycle. Like with GPIO it is actually a bit calm this time. Core changes: - After lengthy discussions and partly due to my ignorance, we have merged a patch making pinctrl_force_default() and pinctrl_force_sleep() reprogram the states into the hardware of any hogged pins, even if they are already in the desired state. This only apply to hogged pins since groups of pins owned by drivers need to be managed by each driver, lest they could not do things like runtime PM and put pins to sleeping state even if the system as a whole is not in sleep. New drivers: - New driver for the Microsemi Ocelot SoC. This is used in ethernet switches. - The X-Powers AXP209 GPIO driver was extended to also deal with pin control and moved over from the GPIO subsystem. This circuit is a mixed-mode integrated circuit which is part of AllWinner designs. - New subdriver for the Qualcomm MSM8998 SoC, core of a high end mobile devices (phones) chipset. - New subdriver for the ST Microelectronics STM32MP157 MPU and STM32F769 MCU from the STM32 family. - New subdriver for the MediaTek MT7622 SoC. This is used for routers, repeater, gateways and such network infrastructure. - New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC has multimedia features and target "smart devices", I guess in-car entertainment, in-flight entertainment, industrial control panels etc. General improvements: - Incremental improvements on the SH-PFC subdrivers for things like the CAN bus. - Enable the glitch filter on Baytrail GPIOs used for interrupts. - Proper handling of pins to GPIO ranges on the Semtec SX150X - An IRQ setup ordering fix on MCP23S08. - A good set of janitorial coding style fixes" * tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (102 commits) pinctrl: mcp23s08: fix irq setup order pinctrl: Forward declare struct device pinctrl: sunxi: Use of_clk_get_parent_count() instead of open coding pinctrl: stm32: add STM32F769 MCU support pinctrl: sx150x: Add a static gpio/pinctrl pin range mapping pinctrl: sx150x: Register pinctrl before adding the gpiochip pinctrl: sx150x: Unregister the pinctrl on release pinctrl: ingenic: Remove redundant dev_err call in ingenic_pinctrl_probe() pinctrl: sprd: Use seq_putc() in sprd_pinconf_group_dbg_show() pinctrl: pinmux: Use seq_putc() in pinmux_pins_show() pinctrl: abx500: Use seq_putc() in abx500_gpio_dbg_show() pinctrl: mediatek: mt7622: align error handling of mtk_hw_get_value call pinctrl: mediatek: mt7622: fix potential uninitialized value being returned pinctrl: uniphier: refactor drive strength get/set functions pinctrl: imx7ulp: constify struct imx_cfg_params_decode pinctrl: imx: constify struct imx_pinctrl_soc_info pinctrl: imx7d: simplify imx7d_pinctrl_probe pinctrl: imx: use struct imx_pinctrl_soc_info as a const pinctrl: sunxi-pinctrl: fix pin funtion can not be match correctly. pinctrl: qcom: Add msm8998 pinctrl driver ... |
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3879ae653a |
The core framework has a handful of patches this time around, mostly due
to the clk rate protection support added by Jerome Brunet. This feature will allow consumers to lock in a certain rate on the output of a clk so that things like audio playback don't hear pops when the clk frequency changes due to shared parent clks changing rates. Currently the clk API doesn't guarantee the rate of a clk stays at the rate you request after clk_set_rate() is called, so this new API will allow drivers to express that requirement. Beyond this, the core got some debugfs pretty printing patches and a couple minor non-critical fixes. Looking outside of the core framework diff we have some new driver additions and the removal of a legacy TI clk driver. Both of these hit high in the dirstat. Also, the removal of the asm-generic/clkdev.h file causes small one-liners in all the architecture Kbuild files. Overall, the driver diff seems to be the normal stuff that comes all the time to fix little problems here and there and to support new hardware. Core: - Clk rate protection - Symbolic clk flags in debugfs output - Clk registration enabled clks while doing bookkeeping updates New Drivers: - Spreadtrum SC9860 - HiSilicon hi3660 stub - Qualcomm A53 PLL, SPMI clkdiv, and MSM8916 APCS - Amlogic Meson-AXG - ASPEED BMC Removed Drivers: - TI OMAP 3xxx legacy clk (non-DT) support - asm*/clkdev.h got removed (not really a driver) Updates: - Renesas FDP1-0 module clock on R-Car M3-W - Renesas LVDS module clock on R-Car V3M - Misc fixes to pr_err() prints - Qualcomm MSM8916 audio fixes - Qualcomm IPQ8074 rounded out support for more peripherals - Qualcomm Alpha PLL variants - Divider code was using container_of() on bad pointers - Allwinner DE2 clks on H3 - Amlogic minor data fixes and dropping of CLK_IGNORE_UNUSED - Mediatek clk driver compile test support - AT91 PMC clk suspend/resume restoration support - PLL issues fixed on si5351 - Broadcom IProc PLL calculation updates - DVFS support for Armada mvebu CPU clks - Allwinner fixed post-divider support - TI clkctrl fixes and support for newer SoCs -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJac5vRAAoJEK0CiJfG5JUlUaIP/Riq0tbApfc4k4GMvSvaieR/ AwZFIMCxOxO+KGdUsBWj7UUoDfBYmxyknHZkVUA/m+Lm7cRH/YHHMghEceZLaBYW zPQmDfkTl/QkwysXZMCw9vg4vO0tt5gWbHljQnvVhxVVTCkIRpaE8Vkktj1RZzpY WU/TkvPbVGY3SNm504TRXKWC9KpMTEXVvzqlg6zLDJ/jE7PGzBKtewqMoLDCBH2L q6b50BSXDo2Hep0vm6e5xneXKjLNR4kgN4PkbM4Yoi4iWLLbgAu79NfyOvvr/imS HxOHRms9tejtyaiR6bQSF0pbLOERZ3QSbMFEbxdxnCTuPEfy3Nw/2W7mNJlhJa8g EGLMnLL4WdloL4Z83dAcMrj9OmxYf7Yobf5dMidLrQT5EYuafdj0ParbI8TQpWSB eTqaffSUGPE/7xuKouYBcbvocpXXWCcokrP/mEn3OEHXkIeeut1Jd3RmEvsi3gtJ pNraJTIpvt4c05rj6yLUOhWfyqlA+fH3p4Fx3rrH1tmKEiG+lrhKoxF26uALZe0V OvarhG+LPIE10pCIYlQjZjQVnYLGCxsGAIoK1uz7VYvFPh2T0cxQlzzeqFgrlTyN 32hMj3LhkQw82FG9xZqjTX1935R35mySRlx63x7HStI1YFief2X9+RHjJR/lofG0 nC0JWTp5sC/pKf54QBXj =bGPp -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The core framework has a handful of patches this time around, mostly due to the clk rate protection support added by Jerome Brunet. This feature will allow consumers to lock in a certain rate on the output of a clk so that things like audio playback don't hear pops when the clk frequency changes due to shared parent clks changing rates. Currently the clk API doesn't guarantee the rate of a clk stays at the rate you request after clk_set_rate() is called, so this new API will allow drivers to express that requirement. Beyond this, the core got some debugfs pretty printing patches and a couple minor non-critical fixes. Looking outside of the core framework diff we have some new driver additions and the removal of a legacy TI clk driver. Both of these hit high in the dirstat. Also, the removal of the asm-generic/clkdev.h file causes small one-liners in all the architecture Kbuild files. Overall, the driver diff seems to be the normal stuff that comes all the time to fix little problems here and there and to support new hardware. Summary: Core: - Clk rate protection - Symbolic clk flags in debugfs output - Clk registration enabled clks while doing bookkeeping updates New Drivers: - Spreadtrum SC9860 - HiSilicon hi3660 stub - Qualcomm A53 PLL, SPMI clkdiv, and MSM8916 APCS - Amlogic Meson-AXG - ASPEED BMC Removed Drivers: - TI OMAP 3xxx legacy clk (non-DT) support - asm*/clkdev.h got removed (not really a driver) Updates: - Renesas FDP1-0 module clock on R-Car M3-W - Renesas LVDS module clock on R-Car V3M - Misc fixes to pr_err() prints - Qualcomm MSM8916 audio fixes - Qualcomm IPQ8074 rounded out support for more peripherals - Qualcomm Alpha PLL variants - Divider code was using container_of() on bad pointers - Allwinner DE2 clks on H3 - Amlogic minor data fixes and dropping of CLK_IGNORE_UNUSED - Mediatek clk driver compile test support - AT91 PMC clk suspend/resume restoration support - PLL issues fixed on si5351 - Broadcom IProc PLL calculation updates - DVFS support for Armada mvebu CPU clks - Allwinner fixed post-divider support - TI clkctrl fixes and support for newer SoCs" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (125 commits) clk: aspeed: Handle inverse polarity of USB port 1 clock gate clk: aspeed: Fix return value check in aspeed_cc_init() clk: aspeed: Add reset controller clk: aspeed: Register gated clocks clk: aspeed: Add platform driver and register PLLs clk: aspeed: Register core clocks clk: Add clock driver for ASPEED BMC SoCs clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built clk: fix reentrancy of clk_enable() on UP systems clk: meson-axg: fix potential NULL dereference in axg_clkc_probe() clk: Simplify debugfs registration clk: Fix debugfs_create_*() usage clk: Show symbolic clock flags in debugfs clk: renesas: r8a7796: Add FDP clock clk: Move __clk_{get,put}() into private clk.h API clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks clk: Improve flags doc for of_clk_detect_critical() arch: Remove clkdev.h asm-generic from Kbuild clk: sunxi-ng: a83t: Add M divider to TCON1 clock clk: Prepare to remove asm-generic/clkdev.h ... |
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fe53d1443a |
ARM: SoC driver updates for 4.16
A number of new drivers get added this time, along with many low-priority bugfixes. The most interesting changes by subsystem are: bus drivers: - Updates to the Broadcom bus interface driver to support newer SoC types - The TI OMAP sysc driver now supports updated DT bindings memory controllers: - A new driver for Tegra186 gets added - A new driver for the ti-emif sram, to allow relocating suspend/resume handlers there SoC specific: - A new driver for Qualcomm QMI, the interface to the modem on MSM SoCs - A new driver for power domains on the actions S700 SoC - A driver for the Xilinx Zynq VCU logicoreIP reset controllers: - A new driver for Amlogic Meson-AGX - various bug fixes tee subsystem: - A new user interface got added to enable asynchronous communication with the TEE supplicant. - A new method of using user space memory for communication with the TEE is added -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJac0fQAAoJEGCrR//JCVIntjEQALc6kflEGJc/FPundbx9V3F/ b+3+EX/uMnBnKsgZprz9ACPhx5eBH9QWja3A1zmIarb5c+q7zbBZDwhzUb8J8Yg8 xEb0im7Wx/GcKjUYZVKYBxtz9KjkXDzhrq8IAvPg6ShNcIy/8hq7ZO3iOkGsTDcy /PyioWKC5g0dhJgtp91X1kgog5tuTaWOg39uUOqyEzwVu1vYVa4w+eeCzjEd6I// 68R/zDQ52+hWw6WZGoYOsNYzuriOflnJRnNpwuGhMhLNULBJfWnd4hkqGm4E+hFa 5dzW6vVAdIqjemFqPzCBT2WB4UG871aZX8DJ9HgnfX+g970nlsm1JY8Ck9MJNJum aDkqZG41ArUYzDFWu8vJ2SKsue5lEZp6TEO2mLEVYrdOjOgedj0Zxqmq2DYeigxd +ccOVgKJ9SsYw9ft1LkQ5BHCgOh3C7y9Kcg7oBnaEI5OTVvtf5PwEkT2cwbvgxYl EVKLhlJ0Af+QXOW8E5JbNQETpYw52DMm6UKHiYn/JCGxB/8J0bgJzImDJI4Dtu2h zqJITKJeTepqbfA5pmNfKa+20RhmsktdRCw2NN/QynY7EEtGjHAUVnlpZT2mrDco 0m62b7Erek/776vJN5ECzE5e6XCs2N0MDE6Anp121C5zEmig/SMBrUosMzP7Jnis IDVC/QWkb3u85wK20Vc1 =yz0k -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "A number of new drivers get added this time, along with many low-priority bugfixes. The most interesting changes by subsystem are: bus drivers: - Updates to the Broadcom bus interface driver to support newer SoC types - The TI OMAP sysc driver now supports updated DT bindings memory controllers: - A new driver for Tegra186 gets added - A new driver for the ti-emif sram, to allow relocating suspend/resume handlers there SoC specific: - A new driver for Qualcomm QMI, the interface to the modem on MSM SoCs - A new driver for power domains on the actions S700 SoC - A driver for the Xilinx Zynq VCU logicoreIP reset controllers: - A new driver for Amlogic Meson-AGX - various bug fixes tee subsystem: - A new user interface got added to enable asynchronous communication with the TEE supplicant. - A new method of using user space memory for communication with the TEE is added" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (84 commits) of: platform: fix OF node refcount leak soc: fsl: guts: Add a NULL check for devm_kasprintf() bus: ti-sysc: Fix smartreflex sysc mask psci: add CPU_IDLE dependency soc: xilinx: Fix Kconfig alignment soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu soc: bcm: brcmstb: Be multi-platform compatible soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms Revert "soc: brcmstb: Only register SoC device on STB platforms" bus: omap: add MODULE_LICENSE tags soc: brcmstb: Only register SoC device on STB platforms tee: shm: Potential NULL dereference calling tee_shm_register() soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver dt-bindings: soc: xilinx: Add DT bindings to xlnx_vcu driver soc: xilinx: Create folder structure for soc specific drivers of: platform: populate /firmware/ node from of_platform_default_populate_init() soc: samsung: Add SPDX license identifiers soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe() tee: shm: don't put_page on null shm->pages ... |
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537433b624 |
ARM: SoC device tree updates for 4.16
We get a moderate number of new machines this time, and only one new SoC variant (Actions S700): Actions: S700 Soc and CubieBoard7 development board Allo.com Sparky Single-board-computer Allwinner: Orange Pi R1 development board Libre Computer Board ALL-H3-CC H3 single-board computer ASpeed ast2x00: Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500 Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500 Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400 AT91: Axentia Nattis/Natte digital signage sama5d2 PTC-ek Evaluation board Freescale/NXP i.MX: SolidRun Humminboard2 development board Variscite DART-MX6 SoM and Carrier-board Technologic TS-4600 and TS-7970 development board Toradex Colibri iMX7D SoM board v1.5 variant of Solidrun Cubox-i and Hummingboard Freescale/NXP Layerscape: Moxa UC-8410A Series industrial computer Gemini: D-Link DNS-313 NAS enclosure OMAP: LogicPD OMAP35xx SOM-LV devkit LogicPD OMAP35xx Torpedo devkit Renesas: r8a77970 (V3M) Starter Kit board r8a7795 (M3-W) Salvator-XS board We finally managed to get the dtc warnings under control, with no more build-time warnings for bad device tree files. This includes fixes for the majority of platforms, including nomadik, samsung, lpc32xx, STi, spear, mediatek, freescale, qcom, realview, keystone, omap, kirkwood, renesas, hisilicon, and broadcom. Files get rearranged on a few platforms, in particular the Marvell Armada 7K/8K device tree files are changed in preparation for future SoC support, based on more than two of the same chips in one package, and some boards get renamed for oxnas for consistency. Finally, many existing SoCs gain descriptions for additional on-chip devices that we can now support with kernel drivers: Allwinner A83t (drm, ethernet, i2c, ...), H3/H5 (USB-OTG) Amlogic AXG family (clk, pinctrl, pwm, ...), and others (vpu, hdmi) Aspeed clk controller support Freescale LS1088A, LS1021A device support Gemini Ethernet, PCI, TVE, panel Keystone gpio, qspi, more uarts Mediatek cpufreq, regulator, clock, reset Marvell thermal, cpufreq, nand Renesas SMP, thermal, timer, PWM, sound, phy, ipmmu Rockchip Mipi, GPU, display Samsung Exynos5433 PMU, power domain, nfc Spreadtrum: sc9860 clocks Tegra TX2 PSDI, HDMI, I2C,SMMU, display, fuse, ... -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJac0fiAAoJEGCrR//JCVInGUYP/ikTcjrmtQxmMINdsy88gmN3 lPk3jGoViyRzc9Y6hGUUXn1YNdK8+IqRkqLnhtVX3cOLS5pP2HwsvSgPmSSB3eQe NOhXUNRQaTbeS/eBGZxJbxEKSowQHU+43M2kRNQOht7UQzS8NnBj/1RGaxcFyNSw gIixWDZLgVTNCSloPaSrZmiwSa7rSM2q0ncBzzeafAZiTRNeOb6IUpnqu/n0Qnot er6VoEyxp6ThFqRB7O8bCAIwgqlyB9xSGBPNR/JI0e0xXo3KVE/2AjHYDHVP/Ttx X8vtb3m+RED7tX4oCmlrHb1SAAKpNi1Vzdg4PxmKCa7yb5xPog7OEr3rnpijzCL0 y8IJLlVSPyx31yB7mIIzCjrcISrT7tOXp0ha88/NgNsGXw5Ln0GVEqTkmSrz/JWo z1G2tNwnstS64KK+chHOZfUto4Rzbrpmr9L1ziKIpSQtiNyOmiSu1c3EjHim7x4I Mfiv6+8J71faUYuKVK1oaX0gi43oSZHu4NuniQy8dg/OIpgPpHHpG1qCyAzgC6Pa r1Am2w33CXrJI78b4zG2pIDx0HghIjFUtjX9tijoFiMs1EZgbV6cJ2meep6Sy+XV RBxHXPU8obdcuBfhgjEygwLI0HSe0R78B15qPP/SNxAFeAvE950xfPrGAoZg7qo/ o6B2iQSfsYQJbD8rUHaA =qN1F -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree updates from Arnd Bergmann: "We get a moderate number of new machines this time, and only one new SoC variant (Actions S700): Actions: - S700 Soc and CubieBoard7 development board - Allo.com Sparky Single-board-computer Allwinner: - Orange Pi R1 development board - Libre Computer Board ALL-H3-CC H3 single-board computer ASpeed ast2x00: - Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500 - Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500 - Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400 AT91: - Axentia Nattis/Natte digital signage - sama5d2 PTC-ek Evaluation board Freescale/NXP i.MX: - SolidRun Humminboard2 development board - Variscite DART-MX6 SoM and Carrier-board - Technologic TS-4600 and TS-7970 development board - Toradex Colibri iMX7D SoM board - v1.5 variant of Solidrun Cubox-i and Hummingboard Freescale/NXP Layerscape: - Moxa UC-8410A Series industrial computer Gemini: - D-Link DNS-313 NAS enclosure OMAP: - LogicPD OMAP35xx SOM-LV devkit - LogicPD OMAP35xx Torpedo devkit Renesas: - r8a77970 (V3M) Starter Kit board - r8a7795 (M3-W) Salvator-XS board We finally managed to get the dtc warnings under control, with no more build-time warnings for bad device tree files. This includes fixes for the majority of platforms, including nomadik, samsung, lpc32xx, STi, spear, mediatek, freescale, qcom, realview, keystone, omap, kirkwood, renesas, hisilicon, and broadcom. Files get rearranged on a few platforms, in particular the Marvell Armada 7K/8K device tree files are changed in preparation for future SoC support, based on more than two of the same chips in one package, and some boards get renamed for oxnas for consistency. Finally, many existing SoCs gain descriptions for additional on-chip devices that we can now support with kernel drivers: - Allwinner A83t (drm, ethernet, i2c, ...), H3/H5 (USB-OTG) - Amlogic AXG family (clk, pinctrl, pwm, ...), and others (vpu, hdmi) - Aspeed clk controller support - Freescale LS1088A, LS1021A device support - Gemini Ethernet, PCI, TVE, panel - Keystone gpio, qspi, more uarts - Mediatek cpufreq, regulator, clock, reset - Marvell thermal, cpufreq, nand - Renesas SMP, thermal, timer, PWM, sound, phy, ipmmu - Rockchip Mipi, GPU, display - Samsung Exynos5433 PMU, power domain, nfc - Spreadtrum: sc9860 clocks - Tegra TX2 PSDI, HDMI, I2C,SMMU, display, fuse, ..." * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (690 commits) arm64: dts: stratix10: fix SPI settings ARM: dts: socfpga: add i2c reset signals arm64: dts: stratix10: add USB ECC reset bit arm64: dts: stratix10: enable USB on the devkit ARM: dts: socfpga: disable over-current for Arria10 USB devkit ARM: dts: Nokia N9: add support for up/down keys in the dts ARM: dts: nomadik: add interrupt-parent for clcd ARM: dts: Add ethernet to a bunch of platforms ARM: dts: Add ethernet to the Gemini SoC ARM: dts: rename oxnas dts files ARM: dts: s5pv210: add interrupt-parent for ohci ARM: lpc3250: fix uda1380 gpio numbers ARM: dts: STi: Add gpio polarity for "hdmi,hpd-gpio" property ARM: dts: dra7: Reduce shut down temperature of non-cpu thermal zones ARM: dts: n900: Add aliases for lcd and tvout displays ARM: dts: Update ti-sysc data for existing users ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance arm64: dts: marvell: armada-80x0: Fix pinctrl compatible string arm: spear13xx: Fix spics gpio controller's warning arm: spear13xx: Fix dmas cells ... |
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c43a52cfd2 |
Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner' into clk-next
* clk-aspeed: clk: aspeed: Handle inverse polarity of USB port 1 clock gate clk: aspeed: Fix return value check in aspeed_cc_init() clk: aspeed: Add reset controller clk: aspeed: Register gated clocks clk: aspeed: Add platform driver and register PLLs clk: aspeed: Register core clocks clk: Add clock driver for ASPEED BMC SoCs dt-bindings: clock: Add ASPEED constants * clk-lock-UP: clk: fix reentrancy of clk_enable() on UP systems * clk-mediatek: clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built clk: mediatek: Fix all warnings for missing struct clk_onecell_data clk: mediatek: fixup test-building of MediaTek clock drivers clk: mediatek: group drivers under indpendent menu * clk-allwinner: clk: sunxi-ng: a83t: Add M divider to TCON1 clock clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU clk: sunxi-ng: add support for Allwinner H3 DE2 CCU dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3 clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLL clk: sunxi-ng: Support fixed post-dividers on NM style clocks clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocks clk: sunxi-ng: Support fixed post-dividers on MP style clocks clk: sunxi: Use PTR_ERR_OR_ZERO() |
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4d1d13a5ae |
Merge branches 'clk-remove-asm-clkdev', 'clk-debugfs-fixes', 'clk-renesas' and 'clk-meson' into clk-next
* clk-remove-asm-clkdev: clk: Move __clk_{get,put}() into private clk.h API clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks arch: Remove clkdev.h asm-generic from Kbuild clk: Prepare to remove asm-generic/clkdev.h blackfin: Use generic clkdev.h header * clk-debugfs-fixes: clk: Simplify debugfs registration clk: Fix debugfs_create_*() usage clk: Show symbolic clock flags in debugfs clk: Improve flags doc for of_clk_detect_critical() * clk-renesas: clk: renesas: r8a7796: Add FDP clock clk: renesas: cpg-mssr: Keep wakeup sources active during system suspend clk: renesas: mstp: Keep wakeup sources active during system suspend clk: renesas: r8a77970: Add LVDS clock * clk-meson: clk: meson-axg: fix potential NULL dereference in axg_clkc_probe() clk: meson-axg: make local symbol axg_gp0_params_table static clk: meson-axg: fix return value check in axg_clkc_probe() clk: meson: mpll: use 64-bit maths in params_from_rate clk: meson-axg: add clock controller drivers clk: meson-axg: add clocks dt-bindings required header dt-bindings: clock: add compatible variant for the Meson-AXG clk: meson: make the spinlock naming more specific clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocks clk: meson: gxbb: fix wrong clock for SARADC/SANA |
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21170e3bda |
Merge branches 'clk-spreadtrum', 'clk-mvebu-dvfs', 'clk-qoriq', 'clk-imx' and 'clk-qcom-ipq8074' into clk-next
* clk-spreadtrum: clk: sprd: add clocks support for SC9860 clk: sprd: Add dt-bindings include file for SC9860 dt-bindings: Add Spreadtrum clock binding documentation clk: sprd: add adjustable pll support clk: sprd: add composite clock support clk: sprd: add divider clock support clk: sprd: add mux clock support clk: sprd: add gate clock support clk: sprd: Add common infrastructure clk: move clock common macros out from vendor directories * clk-mvebu-dvfs: clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks clk: mvebu: armada-37xx-periph: prepare cpu clk to be used with DVFS clk: mvebu: armada-37xx-periph: cosmetic changes * clk-qoriq: clk: qoriq: add more divider clocks support * clk-imx: clk: imx51: uart4, uart5 gates only exist on imx50, imx53 * clk-qcom-ipq8074: clk: qcom: ipq8074: add misc resets for PCIE and NSS dt-bindings: clock: qcom: add misc resets for PCIE and NSS clk: qcom: ipq8074: add GP and Crypto clocks clk: qcom: ipq8074: add NSS ethernet port clocks clk: qcom: ipq8074: add NSS clocks clk: qcom: ipq8074: add PCIE, USB and SDCC clocks clk: qcom: ipq8074: add remaining PLL’s dt-bindings: clock: qcom: add remaining clocks for IPQ8074 clk: qcom: ipq8074: fix missing GPLL0 divider width clk: qcom: add parent map for regmap mux clk: qcom: add read-only divider operations |
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6ab1e867ac |
Few omap interconnect dts fixes for v4.16 merge window
Now that we have the dts clocks for the clkctrl clock and the interconnect binding, we need to update the existing ti-sysc users according to the binding to make it usable for drivers. Apologies for not being able to send this earlier but it took me few revisions to get the smartreflex changes right and tested with yet to be posted patches to make smartreflex probe with dts and I wanted to have it sit in next for a while to make sure we're not introducing regressions for legacy platform data based booting. Note that this is based on a merge with commit |
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b28a4b8eb9
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dt-bindings: clock: Add jz4770-cgu.h header
This will be used from the devicetree bindings to specify the clocks that should be obtained from the jz4770-cgu driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18481/ Signed-off-by: James Hogan <jhogan@kernel.org> |
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bcc8d312de | Merge commit '20a2742e5784295b9197250b50c40f6d38a55880' into omap-for-v4.16/dt-clk | |
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ba05173afe |
Another round of 64-bit DT changes for the new Amlogic SoCs. These
include IR, SPI and ethernet MAC support for the new AXG family SoCs. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlpQC6wACgkQWTcYmtP7 xmVazBAAh/riNhKvUEoHCa1TQ8f0ELfGkZ7ckOBtTEBE9DoQQXZ08jU+LwEEy1N3 /5Uby3lquAYZiJzMuXfaJ63V+07OzIDt9hYzFBToMPf2ZLxSyGS8ZTWsUveBRXep tAY8ETtK8u3tq1pQH0A5lGc84yR8MM74We91GwuCA4S6whYqVbO1dInSb0mVqX50 vVKChc+jUgXwy4zaazgSUKcjZmexSCF7zA9ZXnGM3wg3s4K3HhzLZwCm30GU30mC Of5uCT02cR+HkRC1fDfo3mY9oRr19krYz9hJIsMk3mnmQS0XeI+HJ1DX+5K8l4YP 2ayVueBCLvqG7a1T4MLV6Hb7B1//Ejz6dT6UfTSSQszKXA3FQKIER7vt4Hg9IcCW rH5hXnPCko5yfjMpym3yr4+97fi6U1iJccc+DYRs0dq1Wrth40BwZH6tCrQVHfOQ jY6c2Ha5GDPTHbsW39vb7JvsFGYN2wlmmC1ThqG4e9kF8l1ZW+m433dJOicWMk2m 55SqCkbmkboVy9bYC6Tgrx6/KAa6vqMK0oXHADSJgNeccEZZeiTttlVwAiF9b1/f 1umUwKSfRhAvtvHD+ynoZIQ64oEnWGeGyc5EEJIdY+q7T6csT2E+pi75+y4q6jI2 xMTuK5iwXNr7PF612Tmr5NMaB+59Abdshp9IXxsNDPJiNBTLagA= =lk2H -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64-3' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Another round of 64-bit DT changes for the new Amlogic SoCs. These include IR, SPI and ethernet MAC support for the new AXG family SoCs. * tag 'amlogic-dt64-3' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-axg: enable ethernet for A113D S400 board ARM64: dts: meson-axg: add ethernet mac controller ARM64: dts: meson-axg: add the SPICC controller ARM64: dts: meson-axg: enable IR controller arm64: dts: meson-axg: switch uart_ao clock to CLK81 clk: meson-axg: add clocks dt-bindings required header dt-bindings: clock: add compatible variant for the Meson-AXG Signed-off-by: Olof Johansson <olof@lixom.net> |
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b55eb1ae91 |
ASPEED device tree updates for 4.16
Clock driver support: Rework all platforms to use proper clock bindings. Linux should now boot upstream kernels on ast2400 and ast2500 platforms without out of tree patches. New systems: Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500 Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500 Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400 We also see updates to the Palmetto and Romulus systems to bring them in line with the functionality of those above. The systems take advantage of recently added drivers for LPC Snoop device and the PWM/Tachometer fan controller. OpenBMC flash layout: The flash layout used OpenBMC systems is added and the device trees now use it. -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJaSxoRAAoJEGt2WQeBR3CeiPgP/iBQ9qidGwAAGEAeg2UDnM6u 5oyFj6oMEE7oifUdCxgwWUv9S4TJqev7ux5vsp8d5iqd7bTmxTexRoAbhsADOnxz UlCibUVQm6ai5tDe1e9cSVtylo08PYi9yafLyQ37DPsvbkj+HrUN5RT0VXYKDMKL zV0X5jAZ49AAbekAGEFXIZsqFz9vEL2Z/6a8zHl2igRd/rlwLtMUdqeRdZKYIUJu SFPa7OCTKUFX44tD8tUh+VUabOHjgGM4ObeKm6ePAAtVnZ/fkaVM3wna7p1iCnJt o+6ZD3wnrDvfK8hNN+fdV7i4060B3G6CLjBsoJLWUl2/DEOedfW067vr1o8EvkYX jZvILGwAY7P5e6Y/7ugb46KKk/X/J4ViunPpjbzA/vLXpo7oafKF1DlzAa4jNkoT n/VyYu6Q1Xzh/axa7XUeqZIbBqzwuhSVA1NLrCwghSg/GPYHM4OyzjIunfuLlHSR 6Z1yy4KSmDDDHJx3gAMcxyBEVPm0g7d82e/OZDzaaapuKiFzSvH1OPYaK45944hn 9JspNS6zpGzUBpnMRfYCL76+UDOKugg6Gdctlj6A2BOHd+bRAxVeN9R+jZe7q/0w kNgySXI27rnZbc9nSNPDj2epm6DcQZwgq0kQUS07avrI4kccj8Lq0dDDlybePwCB 2T0s8+XhGiPSPht6W1jw =H9im -----END PGP SIGNATURE----- Merge tag 'aspeed-4.16-devicetree' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt Pull "ASPEED device tree updates for 4.16" from Joel Stanley: Clock driver support: Rework all platforms to use proper clock bindings. Linux should now boot upstream kernels on ast2400 and ast2500 platforms without out of tree patches. New systems: Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500 Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500 Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400 We also see updates to the Palmetto and Romulus systems to bring them in line with the functionality of those above. The systems take advantage of recently added drivers for LPC Snoop device and the PWM/Tachometer fan controller. OpenBMC flash layout: The flash layout used OpenBMC systems is added and the device trees now use it. * tag 'aspeed-4.16-devicetree' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: ARM: dts: aspeed-evb: Add unit name to memory node ARM: dts: aspeed-plametto: Add flash layout and fix memory node ARM: dts: aspeed-romulus: Update Romulus system ARM: dts: aspeed: Add Qanta Q71L BMC machine ARM: dts: aspeed: Add Ingrasys Zaius BMC machine ARM: dts: aspeed: Add Witherspoon BMC machine ARM: dts: aspeed: Sort ASPEED entries in makefile ARM: dts: Add OpenBMC flash layout ARM: dts: aspeed: Update license headers ARM: dts: aspeed: Remove skeleton.dtsi ARM: dts: aspeed: Add LPC Snoop device ARM: dts: aspeed: Add PWM and tachometer node ARM: dts: aspeed: Add clock phandle to GPIO ARM: dts: aspeed: Add flash controller clocks ARM: dts: aspeed: Add watchdog clocks ARM: dts: aspeed: Add MAC clocks ARM: dts: aspeed: Add proper clock references ARM: dts: aspeed: Add LPC and child devices dt-bindings: gpio: Add ASPEED constants dt-bindings: clock: Add ASPEED constants Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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c8ac0b10fd |
Reset controller changes for v4.16
- Fix device_reset_optional to be really optional - Header clean up: includes, warnings, and deprecated calls. - Add driver and bindings for the Meson-AXG SoC reset controller -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlpLODAXHHAuemFiZWxA cGVuZ3V0cm9uaXguZGUACgkQUMKIHHCeYOtW4xAA3cW+A5m80FNxJEOH1fT6UINp FmFBl1tkaTjM4jVOtYRGD6qzfd+Tp6aGttid8IBj+b1VE6uDBpIt1M+uRobLbpRr XXwlYE5FZLHj2WlXR/dPheB55BnJF06Q3ieHI2QbEU+z2bExKMMj+9wgkwoWSgt/ 5Z6FU849aU8TPEps8z/YmTT+RlES+KUe8vX4wWvaE8Jle99HLOeIfkZtsYRPVdEB +DY2lZbV4eRGDL0GEtCiNY1csz2joM5NLD2xrIQ03TxcRI7wgrcLjjfj+ROfT2rt xPkWdfLpuzm2sH2VQyGbmenjA8je+q6yWIbQiUjdEPl5urz+ZLwbLr+IiKX96ARM aaVN8EehJm3OiklKT6u1JPOj8FZpsqpMLk8xfP1bxZMV+BHFbhdIaYnVt+7RGky6 A6jfEcM8oXcgvb0AO4bGo3w3TIqdXX2zmL5PlG6RnzV8RbWwPfJO2DHKJq+Cppqr S07TBKes1zXpDtZqxW56Nd1Xnfjd39cDZGoWKqW1e8V2v8Pc6OTuCR3UlTer5mg5 WgP2KDI6w55PiSHFW9s4sjGweDbzqccCo8JLaggn4QxDD2/JKUPFK1Xvd2+X77rC iJW1hDMPP4od3uOBuI2ze8KKK+BeNUEl86Dbdd3CzU+Nt6niNfF1xK7lg9pb5Pud YGo+QVAdExV0mFJaCvE= =Ks60 -----END PGP SIGNATURE----- Merge tag 'reset-for-4.16' of git://git.pengutronix.de/git/pza/linux into next/drivers Pull "Reset controller changes for v4.16" from Philipp Zabel: This adds Meson-AXG reset support and fixes a few issues with the reset include header: device_reset_optional is fixed to be really optional, unused headers are pruned, and useless warnings and deprecated API calls are removed. * tag 'reset-for-4.16' of git://git.pengutronix.de/git/pza/linux: reset: meson-axg: add compatible string for Meson-AXG SoC dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset Controller reset: remove reset_control_get(_optional) reset: minimize the number of headers included from <linux/reset.h> reset: remove remaining WARN_ON() in <linux/reset.h> reset: make device_reset_optional() really optional |
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38b45e5186 |
Second set of device tree changes for omaps for v4.16 merge window
This branch mostly configures more hardware support: - Clean-up dts files to remove leading 0x and 0s from binding notation to remove more dtc compiler warnings - A series of am437x updates for backlight, to fix inverted pad pull macro, and to configure power management related OPPs - Configure n950 and droid 4 command mode LCD panels - Updates to pandora and gta04 LCD panels - Add support for am574x-idk - A series of changes to configure more dra7 related PCIe features - A series of fixes for am335x-boneblue for WLAN, UARTs and CAN configuration - A series of changes to configure dra7 OPPs and VDD supplies -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlo+gnMRHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXMTjhAAiY4YnmZRR/6eMT8mwgSruVUK7oefaDk/ Ul+Aw/Op/e5kHepJJivYxdUMabjMfEJqU6EExhKwl1MYk+iKB9L6MX7OUSqXRy9k PXYBWhGbN7ulV9P9424y+ftsuz3SurYYY0mdbpWdxCtB0ntMUlJ5vTJZAVcyHqbe RdQZYHh49j+HGlX+GD8vGfHjfOfQ8V++K8YQwis26w6CSjzN/jclcNBqK2U3MVdp d21W/RQhIb/N523voEmL45PZIEiSLOdv3NEIInfcDqdvf8D5bZexUS/7CdvlGdED 3Pbl55fMq5dd9JMOMbhs4MeZ8SXk4O/cdeb0YhIvwV8dJ3sdBxM4DGcjnTbhY2RN RVaGi5U8rlrGCZp3D9RkA2iQk+RT8Iq9A7r+ct6OmlC0T8w1dVb8SkS69P4tZQtb t8qesR/EO6rApn2KISban9SLUHZikyCNDRUapc719E14qGwEf33ngCHuBWEjWTvZ UOXiHgiKOIgZPEM/VFFbHMuoG/uM6avivkeLoATkO/tfr5GDb8h5tdH4+d2dnHLU 4OPxPfWiyYId6XWfrqpmPVDviQ0V+lrQRFk9zLuCnhrNWG2nPVIPynk584KQip7L 9dIk4yDKONephzRTFUoW9jV0EqtUEoeDLuhiDLh7oUFwEKUVyxKIig51emu3YjyS lpXmKg2LEfA= =G2ZQ -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.16/dt-pt2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Second set of device tree changes for omaps for v4.16 merge window This branch mostly configures more hardware support: - Clean-up dts files to remove leading 0x and 0s from binding notation to remove more dtc compiler warnings - A series of am437x updates for backlight, to fix inverted pad pull macro, and to configure power management related OPPs - Configure n950 and droid 4 command mode LCD panels - Updates to pandora and gta04 LCD panels - Add support for am574x-idk - A series of changes to configure more dra7 related PCIe features - A series of fixes for am335x-boneblue for WLAN, UARTs and CAN configuration - A series of changes to configure dra7 OPPs and VDD supplies * tag 'omap-for-v4.16/dt-pt2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits) Revert "ARM: dts: dra7: Add properties to enable PCIe x2 lane mode" ARM: dts: am572x-idk: Add cpu0 vdd supply ARM: dts: am571x-idk: Add cpu0 vdd supply ARM: dts: dra72-evm-tps65917: Add cpu0 vdd supply ARM: dts: dra7-evm: Add cpu0 vdd supply ARM: dts: am57xx-beagle-x15-common: Add cpu0 vdd supply ARM: dts: dra7: Enable 1.5 GHz operation for the CPU ARM: dts: dra7: Add MPU OPP supply node ARM: dts: dra7: Add vbb-supply to cpu and additional voltages ARM: dts: am335x-boneblue: enable can ARM: dts: am335x-boneblue: enable usarts ARM: dts: am335x-boneblue: fix wl1835 IRQ pin ARM: dts: dra7: Remove deprecated PCI compatible string ARM: dts: dra76-evm: Enable x2 PCIe lanes ARM: dts: DRA72x: Use PCIe compatible specific to dra72 ARM: dts: DRA74x: Use PCIe compatible specific to dra74 ARM: dts: dra7: Add properties to enable PCIe x2 lane mode ARM: dts: am57xx: Add support for am574x-idk ARM: dts: am43x-epos-evm: Hook dcdc2 as the cpu0-supply ARM: dts: am437x-idk-evm: Disable OPP50 for MPU ... Signed-off-by: Olof Johansson <olof@lixom.net> |
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8102324d86 |
TI sysc driver updates for v4.16 merge window
We now have gotten ti-sysc driver to the point where it can parse interconnect target configuration from device tree instead of the legacy platform data. This series updates the device tree binding and adds parsing to the driver for quirks and capabilities. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlo9SDIRHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXMnOA/9HboJqef8A3cHFKdbM/PVrRNUl7E9ozm2 mEFios7yde4WYx1GVTal66oX8h0YJY/l3jUtBe/IiWosUCZP/vDbo+w0rWrJaVhC xitZ5mIQniduM/7LnQOpznVXVFgVezefbJFKRVI4Fs+dUlJjDnyawob5Jr9egMxj 613l28FJX817y3jZ9CYf2/qBdRt8HwpkAI3V0PRXn0r6wik+0XohipHUvotDZFpb V8woyAX1H7gzSkNKw53ViL38bJCQ4/DlhRbaSojzBF8Lm4xMx37TWty/wbR3aYjS 0FoQtQR9URBQSRyCbBLL0m9/fY92tMQlltT5/Pd/Yc6CBDhhGQr+e7DE23lHKpWH qTc3YnHOAqHEC8oTLfL6Yknkm4MXf11OX9HKPJP9KOGKYq7YdGrG/AJnvyOXMIUE o68k91ST3mn9HbG4gPvVoHhHqe2GV15LI2ey5HJ8jk46BJGaaDW0WuFw7m5G/CMB q++9Lbu/MQSJtI3eJexLxJBlOQr7lUmC/ACa3Fl+W7C1F5LUPsio/aJrvX3YqNZ3 th8arjGkkfZx9WEsXfW7kHi1ljYzvrP8wnwX14sydbpoPgoWlRpA9d4EbOPPy9Wb c9/XUzOrPk3xgo5KntqJmCIjoa/OXxHrW5nWBU7cxbQbjH6IOW9lb4gO8sTUtE3H HA8uV88RU4U= =Hwvv -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.16/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers TI sysc driver updates for v4.16 merge window We now have gotten ti-sysc driver to the point where it can parse interconnect target configuration from device tree instead of the legacy platform data. This series updates the device tree binding and adds parsing to the driver for quirks and capabilities. * tag 'omap-for-v4.16/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: bus: ti-sysc: Add parsing of module capabilities bus: ti-sysc: Handle module quirks based dts configuration bus: ti-sysc: Detect i2c interconnect target module based on register layout bus: ti-sysc: Add register bits for interconnect target modules bus: ti-sysc: Make omap_hwmod_sysc_fields into sysc_regbits platform data ARM: OMAP2+: Move all omap_hwmod_sysc_fields to omap_hwmod_common_data.c ARM: dts: Add generic ti,sysc compatible in addition to the custom ones dt-bindings: ti-sysc: Update binding for timers and capabilities Signed-off-by: Olof Johansson <olof@lixom.net> |
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09fa4ba5e2 |
Actions Semi arm64 based SoC DT for v4.16
This adds S700 SoC and CubieBoard7. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJaPNk9AAoJEPou0S0+fgE/DccP/2itYmey7EPKZwq4ybuvQ5Hp 4cy5ubYGXcy4FGzfoT4ueJl+0oZxXJoXCoSWoUgnYYOmOseBVECFQyhaS13NIpbD ODaVU2tuHCcoWLQ/239NFoyiJgk3BAL792RItFwx56FGHEIdHWb8cnQqqO0QGga3 XmJXrj7S3Ta3zxcB/O5Rantqbq+NB4FDollzNg6buMhfaIeZDyvqUxQKLICt+QB1 Hm9AxFfzyg9AVslToKSuReUgvsM6oKvkON0XXduuej0SJXbBMgS0Yv6Z4RWjIQ4w drYM9bvA+dcuIKoGwzU63bAvT4Dw5YlZ2hxvOZfV/mMJRebmIQbPx1+tk0Yn41zs 7gj3xVontUaZPY8Py7vbuQ1jq4N5dVWZvMKbW/Kt0OXsPDAVz5odQnEhVBF9WPQk 7Clv0gqKJtAR1QplcMsaxcZYDukK3PZ4WlTacd1rhI7XQOwv+hVuBm0TwzNWBCzI 4PyRalloq0l2DT0wvC/mAKj3G7ZWKVcyxIDouzLlr1vuNUbx7w4FhACyOgDzZ+0f J/nU0JDKE78WhYtUV0OromDh0eRKYt7uNVDWC+qLNoWlChaEmgYnvJg8NFguJ289 J85XAVW15ipD60IwhxVTczca079kmo08ZRy/Ky52vL9bU69Uyz4cpNxeG+hfZYX7 +5cSaCxq+2lG/Ct4wFDp =T9Sv -----END PGP SIGNATURE----- Merge tag 'actions-arm64-dt-for-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/dt Actions Semi arm64 based SoC DT for v4.16 This adds S700 SoC and CubieBoard7. * tag 'actions-arm64-dt-for-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions: arm64: dts: actions: Add S700 and CubieBoard7 dt-bindings: power: Add Actions Semi S700 SPS dt-bindings: arm: actions: Add S700 and CubieBoard7 Signed-off-by: Olof Johansson <olof@lixom.net> |
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e1f34e4f27 |
dt-bindings: clock: qcom: add misc resets for PCIE and NSS
PCIE and NSS has MISC reset register in which single register has multiple reset bit. The patch adds the DT bindings for these MISC resets. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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8c1c2c5a96 |
dt-bindings: clock: qcom: add remaining clocks for IPQ8074
This patch adds the DT bindings for following IPQ8074 clocks - General PLL’s, NSS UBI PLL and NSS Crypto PLL. - 2 instances of PCIE, USB, SDCC. - 2 NSS UBI core and common NSS clocks. NSS is network switching system which accelerates the ethernet traffic. IPQ8074 NSS has two UBI cores. Some clocks are separate for each UBI core and remaining NSS clocks are common. - NSS ethernet port clocks. IPQ8074 has 6 ethernet ports and each port uses different TX and RX clocks. - Crypto engine clocks. - General purpose clocks which comes over GPIO. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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bf4439452b |
clk: sprd: Add dt-bindings include file for SC9860
This file defines all SC9860 clock indexes, it should be included in the device tree in which there's device using the clocks. Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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2939f96539 |
- mt8173 add cpufreq related nodes
supply nodes frequency/voltage operation table - mt2712 add cpufreq related nodes fixed regulator supply nodes frequency/voltage operation table - mt2712 add clock contoller nodes - mt2712 add scpsys node -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlo7nR8XHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00Nv2A/+Lw6UXhnIrINEv+LP9d5ECLIO QECRmHMYhyJDNAS3EjZR3phneYFKSKxdoAwF9prT0vaTZSvaGVShSg7RiN/sSNyR u7mOWrjDroXMLVw1stxLe25yLpO9nuw3ORf5kS1FE8CHeeC+6cJ6NPob/qEz9iUq BqcZJIrHzwWQASc3JpNwTcYnHRqweylyyKjrHF4mIzXoW7RpW/1yONjXc7hXapuB EggZRpHdM/1wv9HxBlsuPfH/NxHmA48DIS/kz+00tSKwpVJgKdSbTW7lFN99up8s 6HUx1qpd1Elh8q048c0Oe202ubYOwpDDO8REeFsqBFuseAXPogPzXPSusTghm8Ph orgmV3sOHvr2XWD7QeEUtVSfPV+JnGWFeJ/Bx9jAxIVQ3BmWkoHbuiq/kAZ/uK3s HvnaiaidiBnIygNE6OZIvKNbeoF40601+60VquKfydqoQ47mYR0+xN89Q5F4m6Q9 ugTLbHrDU00soPueODWi+AlLfarThIjU+7aqcPbya6sNJfA/HAtVmX/wpWc5kR9a rEuEzFUgAWQocfZNZXgAfQES67L32MFsTbK5B0gpTT2VgAFdmKNUnjq4AFX+kghk GHTHxz4s6iMoH6kdaU3BVkJIiUBSKXoCsnIRwD7QOxlSNNMdtwyugUxeXBzSQA4j 7EgwCT9WfCIXEfSP3Eo= =yHbI -----END PGP SIGNATURE----- Merge tag 'v4.15-next-dts64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/dt Pull "arm64: Updates of aarch64 DTS for v4.15-next" from Matthias Brugger - mt8173 add cpufreq related nodes supply nodes frequency/voltage operation table - mt2712 add cpufreq related nodes fixed regulator supply nodes frequency/voltage operation table - mt2712 add clock contoller nodes - mt2712 add scpsys node * tag 'v4.15-next-dts64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm64: dts: Add power controller device node of MT2712 arm64: dts: mediatek: add mt2712 cpufreq related device nodes arm64: dts: mt2712: Add clock controller device nodes arm64: dts: mediatek: add mt8173 cpufreq related device nodes dt-bindings: soc: add MT2712 power dt-bindings |
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30e18df6d3 |
dt-bindings: Updates for v4.16-rc1
This contains a set of patches that extend existing bindings with support for Tegra186. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlo6tPUTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoeP2EAC7yTdgs3kF6VOi8d1/+Z/RF38OlYFW 3vrzbFj2g2p831Dc3w2Zy6lSbVGX0vitppxYCAw7rgR2Dn/85jihZQZshMDRpdfE V0bdi+c7UJt7XkkW/tCQ7WF8gP6zlvzRyacJJnALDh8VNYfxdNHB4X9wY5PhUToY oFAGIlogJwaDVz6i0E3kmLr1FhscTTCvHRatOBpKa8ecA9hC6liMO14aHpTT+mc0 +idN+bT+e4cM1BaZz9GTxcYgD33bU0gTD2egD2Ru7t7HYRqAnY28h81AreUj4WIX ijLiM7CWQa8L2cyHXQEshNQUA7tPAUBAJ6PEyDtfezdhCZsYxCjvONCJmt9wzv1M 3kEtMs/yrpn3cVIeyjp02QqGtPZmBCrGxilqyI+wN5xHEkJcn5Zzh77FtCoDAPDo YOsWpiSrGvjaK3Pgcl2/k79UUBG9ZhpmaJL6gNJ9sj2K4SqOaFc/Oe+zNystLpsF UBiJt0pvFLMwu12eeRbbd5ZSq2cfx16gdJOAE9RtcaMD1qxhRPm4xtAcHeR3fY8G mjwqF194LHOZkxuL+EynbCUzWY5oBcYaD/V4AgDbxm0U1CPzfwyxN9pfv3Ze8eh1 vHGdl+72u7ycp8xDpEduIftRneJbFtvD0Kgk0npECaM1gTZcFyr/ssz7boLTmXye e0EH382qED5E9w== =ItSb -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.16-dt-bindings' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt Pull "dt-bindings: Updates for v4.16-rc1" from Thierry Reding: This contains a set of patches that extend existing bindings with support for Tegra186. * tag 'tegra-for-4.16-dt-bindings' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: memory: Add Tegra186 support dt-bindings: misc: Add Tegra186 MISC registers bindings |
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b88a17cb93 |
dt-bindings: soc: add MT2712 power dt-bindings
Add power dt-bindings for MT2712. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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a7d1ecb60a |
dt-bindings: gpio: Add ASPEED constants
These are used to by the device tree to map pin numbers to constants required by the GPIO bindings. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au> |
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70dad67ab1 |
dt-bindings: clock: Add ASPEED constants
These will be used by the clock driver and device trees. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au> |
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20a2742e57 |
dt-bindings: ti-sysc: Update binding for timers and capabilities
The ti-sysc binding does not yet describe the capabilities of the interconnect target module. So to make the ti-sysc binding usable for configuring the interconnect target module, we need to add few more properties: 1. To detect between omap2 and omap4 timers, let's add compatibles for them for "ti,sysc-omap2-timer" and,sysc-omap4-timer". This makes it easier to pick up the already initialized system timers later on 2. Let's add "ti,sysc-mask" for a mask of features supported by the interconnect target module. This describes what we have available in the various SYSCONFIG registers 3. Let's add "ti,sysc-midle" and "ti,sysc-sidle" lists for the master and slave idle modes supported by the interconnect target module. These describe the values available for MIDLE and SIDLE bits in the SYSCONFIG registers 4. Some interconnect target modules need a short delay after reset before they can be accessed, let's use "ti,sysc-delay-us" for that 5. Let's add "ti,syss-mask" bit to describe the optional SYSSTATUS register bits for reset done bits 6. Let's support the two existing custom quirk properties already listed in Documentation/devicetree/bindings/arm/omap/omap.txt for "ti,no-reset-on-init" and "ti,no-idle-on-init" 7. And finally, let's add a header for the binding for the dts files and the driver to use Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Dave Gerlach <d-gerlach@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Suman Anna <s-anna@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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01ce880380 |
ARM: dts: am43xx: Fix inverted DS0_PULL_UP_DOWN_EN macro
Due to a mistake in documentation the DS0_PULL_UP_DOWN_EN macro was mistakenly defined as an active high bit, however setting the bit actually disables the internal pull resistor on the pin, so correct this macro and introduce a new DS0_PULL_UP_DOWN_DIS macro with the proper bit value set now that the documentation has been updated. Change based on AM437x Techninal Reference Manual SPRUHL7G Revised June 2017 Section 7.2.1. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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7e5c90e0ed |
clk: meson-axg: add clocks dt-bindings required header
Add the required header for the clocks ID dt-bindings exported from various subsystem in the Meson-AXG SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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029ab5eaf0 |
dt-bindings: memory: Add Tegra186 support
As opposed to earlier incarnations, the memory controller on Tegra186 no longer implements an SMMU. Instead the SMMU is a regular ARM SMMU and in a separate IP block. However, the memory controller programs the SMMU stream IDs for each of the memory clients. Add a header file with definitions for each of these stream IDs and mark the #iommu-cells property as required on Tegra30 to Tegra210 in the device tree bindings. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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953e5b5071 |
dt-bindings: pinctrl: stm32: fix copyright and adopt SPDX identifier
Add missing copyright and add SPDX identifier. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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90552a6f93 |
Merge branch '4.15-rc1-clkctrl-driver' of https://github.com/t-kristo/linux-pm into clk-next
* '4.15-rc1-clkctrl-driver' of https://github.com/t-kristo/linux-pm: (28 commits) clk: ti: omap4: clkctrl data fixes for opt-clocks clk: ti: dm816: add clkctrl clock data dt-bindings: clk: add dm816 clkctrl definitions clk: ti: dm814: add clkctrl clock data dt-bindings: clk: add dm814 clkctrl definitions clk: ti: am43xx: add clkctrl clock data dt-bindings: clk: add am43xx clkctrl definitions clk: ti: am33xx: add clkctrl clock data dt-bindings: clk: add am33xx clkctrl definitions clk: ti: dra7: add clkctrl clock data dt-bindings: clk: add dra7 clkctrl definitions clk: ti: omap5: add clkctrl clock data dt-bindings: clk: add omap5 clkctrl definitions clk: ti: omap3: cleanup unnecessary clock aliases clk: ti: am43xx: cleanup unnecessary clock aliases clk: ti: am33xx: cleanup unnecessary clock aliases clk: ti: dm816x: cleanup unnecessary clock aliases clk: ti: dm814x: cleanup unnecessary clock aliases clk: ti: omap5: cleanup unnecessary clock aliases clk: ti: dra7: drop unnecessary clock aliases ... |
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a4a124c349 |
dt-bindings: clk: Hi3660: Document stub clock
Document the DT binding for stub clock which is used for CPU, GPU and DDR frequency scaling. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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e10f72bf4b |
gpio: gpiolib: Generalise state persistence beyond sleep
General support for state persistence is added to gpiolib with the introduction of a new pinconf parameter to propagate the request to hardware. The existing persistence support for sleep is adapted to include hardware support if the GPIO driver provides it. Persistence continues to be enabled by default; in-kernel consumers can opt out, but userspace (currently) does not have a choice. The *_SLEEP_MAY_LOSE_VALUE and *_SLEEP_MAINTAIN_VALUE symbols are renamed, dropping the SLEEP prefix to reflect that the concept is no longer sleep-specific. I feel that renaming to just *_MAY_LOSE_VALUE could initially be misinterpreted, so I've further changed the symbols to *_TRANSITORY and *_PERSISTENT to address this. The sysfs interface is modified only to keep consistency with the chardev interface in enforcing persistence for userspace exports. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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5afc8dde9a |
dt-bindings: clk: add dm816 clkctrl definitions
Contains offsets for all dm816 clkctrl main and optional clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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fe4ec6513e |
dt-bindings: clk: add dm814 clkctrl definitions
Contains offsets for all dm814 clkctrl main and optional clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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9bc01114b1 |
dt-bindings: clk: add am43xx clkctrl definitions
Contains offsets for all am43xx clkctrl main and optional clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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172c48c7d1 |
dt-bindings: clk: add am33xx clkctrl definitions
Contains offsets for all am33xx clkctrl main and optional clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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ae263d5276 |
dt-bindings: clk: add dra7 clkctrl definitions
Contains offsets for all dra7 clkctrl main and optional clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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e11f1d6823 |
dt-bindings: clk: add omap5 clkctrl definitions
Contains offsets for all omap5 clkctrl main and optional clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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83c566806a |
pinctrl: meson-axg: Add new pinctrl driver for Meson AXG SoC
Add new pinctrl driver for Amlogic's Meson-AXG SoC. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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afc7e58604 |
dt-bindings: power: Add Actions Semi S700 SPS
Define power domains for Actions Semi S700 SoC Smart Power System (SPS). Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Andreas Färber <afaerber@suse.de> |
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c16292578f |
dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset Controller
Add DT bindings for the Meson-AXG SoC Reset Controller include file, and also slightly update documentation. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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c353bfc6eb |
fixes/cleanups for rc1, non-desktop flags for VR
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJaFkpiAAoJEAx081l5xIa+LOcQAJqXyh7vx++oPe5kJFC2rCoX MqX1aJ4nH8y04QJqLmKx1SC6eyYsTM92rcg3RfHOThktzonD5l2wSO9TvCkmLtr9 2n9P/aYMcbPTZntrbJc4mQyzd82U0D4h40i5Cmhr9n4gcLPOsOpau/7eclyuEUds PHZSTCRq0Ygk1K5VWQPyKsY1k1TqFes2YE46FJzkD8SQwKDfbWxVZG0BPnvqb5Om PMVobnEukruzpsSqnetaEYsW89e0TJ2TW9MSCfVohzWvyCVGzmwSzqaooqOkgFe2 5ZrzA4aW6qRez4nXN2Zw+p9qhS4DZ8MVEJO8qczrR6BGx5yRlHriGhs+5FQskGBT Idqj6YZX3x/qab/AXQy0fzn2lrZdwxTolG6BgnNOwdGhyFEfz7P7p9kcv4QLbyn5 8MynMUcLmOkpouHD0mpIwn5kS7EU4hbEPGOeBwxy54FbiLFWb81FjlGts2N+/ckI 69UlmyyFZrpxvTmL9vRzvGCeO0zdfvKtBa1GoYWbzNTs8r50F2EtdJkS64SYOVOf o4ApcG5bznx42NfBwa3TBc+NETTYJPS0blFImPVu1qvdQn5AciX137vYbqzwuqac 2gM2m6Rdfpncw/3VRIePwXYwpNS/3fsa3V6UgzTFlDhrQCtP2XxKPhfru7pFN+te Vav1I46Q8pa7ko8dS3A3 =P4O6 -----END PGP SIGNATURE----- Merge tag 'drm-for-v4.15-part2' of git://people.freedesktop.org/~airlied/linux Pull more drm updates from Dave Airlie: "Fixes/cleanups for rc1, non-desktop flags for VR - remove the MSM dt-bindings file Rob managed to push in the previous pull. - add a property/edid quirk to denote HMD devices, I had these hanging around for a few weeks and Keith had done some work on them, they are fairly self contained and small, and only affect people using HTC Vive VR headsets so far. - amdgpu, tegra, tilcdc, fsl fixes - some imx-drm cleanups I missed, these seemed pretty small, and no reason to hold off. I have one TTM regression fix (fixes bochs-vga in qemu) sitting locally awaiting review I'll probably send that in a separate pull request tomorrow" * tag 'drm-for-v4.15-part2' of git://people.freedesktop.org/~airlied/linux: (33 commits) dt-bindings: remove file that was added accidentally drm/edid: quirk HTC vive headset as non-desktop. [v2] drm/fb: add support for not enabling fbcon on non-desktop displays [v2] drm: add connector info/property for non-desktop displays [v2] drm/amdgpu: fix rmmod KCQ disable failed error drm/amdgpu: fix kernel hang when starting VNC server drm/amdgpu: don't skip attributes when powerplay is enabled drm/amd/pp: fix typecast error in powerplay. drm/tilcdc: Remove obsolete "ti,tilcdc,slave" dts binding support drm/tegra: sor: Reimplement pad clock Revert "drm/radeon: dont switch vt on suspend" drm/amd/amdgpu: fix over-bound accessing in amdgpu_cs_wait_any_fence drm/amd/powerplay: fix unfreeze level smc message for smu7 drm/amdgpu:fix memleak drm/amdgpu:fix memleak in takedown drm/amd/pp: fix dpm randomly failed on Vega10 drm/amdgpu: set f_mapping on exported DMA-bufs drm/amdgpu: Properly allocate VM invalidate eng v2 drm/fsl-dcu: enable IRQ before drm_atomic_helper_resume() drm/fsl-dcu: avoid disabling pixel clock twice on suspend ... |
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98ecf1a308 |
dt-bindings: remove file that was added accidentally
I think this snuck in when I applied the patch for |
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fc35c1966e |
We have two changes to the core framework this time around. The first being a
large change that introduces runtime PM support to the clk framework. Now we properly call runtime PM operations on the device providing a clk when the clk is in use. This helps on SoCs where the clks provided by a device need something to be powered on before using the clks, like power domains or regulators. It also helps power those things down when clks aren't in use. The other core change is a devm API addition for clk providers so we can get rid of a bunch of clk driver remove functions that are just doing of_clk_del_provider(). Outside of the core, we have the usual addition of clk drivers and smattering of non-critical fixes to existing drivers. The biggest diff is support for Mediatek MT2712 and MT7622 SoCs, but those patches really just add a bunch of data. By the way, we're trying something new here where we build the tree up with topic branches. We plan to work this into our workflow so that we don't step on each other's toes, and so the fixes branch can be merged on an as-needed basis. Core: - Runtime PM support for clk providers - devm API for of_clk_add_hw_provider() New Drivers: - Mediatek MT2712 and MT7622 - Renesas R-Car V3M SoC Updates: - Runtime PM support for Samsung exynos5433/exynos4412 providers - Removal of clkdev aliases on Samsung SoCs - Convert clk-gpio to use gpio descriptors - Various driver cleanups to match kernel coding style - Amlogic Video Processing Unit VPU and VAPB clks - Sigma-delta modulation for Allwinner audio PLLs - Allwinner A83t Display clks - Support for the second display unit clock on Renesas RZ/G1E - Suspend/resume support for Renesas R-Car Gen3 CPG/MSSR - New clock ids for Rockchip rk3188 and rk3368 SoCs - Various 'const' markings on clk_ops structures - RPM clk support on Qualcomm MSM8996/MSM8660 SoCs -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJaD3qRAAoJEK0CiJfG5JUlOLgQAKWekgG/IYgcPzPWDYfg8Hwr sVVUK7+q7TVfbHsbYVikJuUaxutKZ0onnrYmOalTTyyxqL2E1/rYScnxdYHfcwX8 cyfHebRHsbh/Xg45ktwjzBkO49nwuppkpXd/V80GSBUZ+lsIVl5DUrrFAZdRUEdr CEsAsF9tEWIl+0gqXYNuiKBV7QAYv5BUPrbJQf0PwL6jX0OAhLv+ukfN8BdmYsOb rdoqhdgmyHkTuIMqsC/H2yP59aAKBse7wxIYebDiTdbPWfTkC9q927fTs4A02F6L sHfLvCpfuB4rOjXy6LSd1gMGWIcjotZai+idHBqtNLLVz6exF1QpUCp+pZjEULbA /Sx9lk8A3cYoa8pTu1NrrZbZX17iHkFswqMF3T20nhUN9+Ti597ZEbRcWDcoEZtw v2NznOTJ7Mm2SrNHOvDklstggNIGcwiAEePGMo7rJNEQZChpDjQj/gJWKzn0UwL4 zfk+0EzoejPdvZ5FJUfmlr8Tqk53uw+y7/0xQ6gf8lDviTrzzoeXtJUyumGBiuGx RxFywf8n02oLYRJm5hu+0NkC+/bX0Lxg/kwiR6FLBFbBFgkWyp7FGcxhlm6ZiBfe 0KkPciWslNavn5KhljIkZDbXymbvhhSr9uBEFsyeJueA5q7sSghWloL8Ag1cac3W e6swD1ngXtM/t5gjOLhR =hC7z -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "We have two changes to the core framework this time around. The first being a large change that introduces runtime PM support to the clk framework. Now we properly call runtime PM operations on the device providing a clk when the clk is in use. This helps on SoCs where the clks provided by a device need something to be powered on before using the clks, like power domains or regulators. It also helps power those things down when clks aren't in use. The other core change is a devm API addition for clk providers so we can get rid of a bunch of clk driver remove functions that are just doing of_clk_del_provider(). Outside of the core, we have the usual addition of clk drivers and smattering of non-critical fixes to existing drivers. The biggest diff is support for Mediatek MT2712 and MT7622 SoCs, but those patches really just add a bunch of data. By the way, we're trying something new here where we build the tree up with topic branches. We plan to work this into our workflow so that we don't step on each other's toes, and so the fixes branch can be merged on an as-needed basis. Summary: Core: - runtime PM support for clk providers - devm API for of_clk_add_hw_provider() New Drivers: - Mediatek MT2712 and MT7622 - Renesas R-Car V3M SoC Updates: - runtime PM support for Samsung exynos5433/exynos4412 providers - removal of clkdev aliases on Samsung SoCs - convert clk-gpio to use gpio descriptors - various driver cleanups to match kernel coding style - Amlogic Video Processing Unit VPU and VAPB clks - sigma-delta modulation for Allwinner audio PLLs - Allwinner A83t Display clks - support for the second display unit clock on Renesas RZ/G1E - suspend/resume support for Renesas R-Car Gen3 CPG/MSSR - new clock ids for Rockchip rk3188 and rk3368 SoCs - various 'const' markings on clk_ops structures - RPM clk support on Qualcomm MSM8996/MSM8660 SoCs" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits) clk: stm32h7: fix test of clock config clk: pxa: fix building on older compilers clk: sunxi-ng: a83t: Fix i2c buses bits clk: ti: dra7-atl-clock: fix child-node lookups clk: qcom: common: fix legacy board-clock registration clk: uniphier: fix DAPLL2 clock rate of Pro5 clk: uniphier: fix parent of miodmac clock data clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu' clk: hisilicon: Delete an error message for a failed memory allocation in hisi_register_clkgate_sep() clk: hi3660: fix incorrect uart3 clock freqency clk: kona-setup: Delete error messages for failed memory allocations ARC: clk: fix spelling mistake: "configurarion" -> "configuration" clk: cdce925: remove redundant check for non-null parent_name clk: versatile: Improve sizeof() usage clk: versatile: Delete error messages for failed memory allocations clk: ux500: Improve sizeof() usage clk: ux500: Delete error messages for failed memory allocations clk: spear: Delete error messages for failed memory allocations clk: ti: Delete error messages for failed memory allocations clk: mmp: Adjust checks for NULL pointers ... |
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cf9b0772f2 |
ARM: SoC driver updates for v4.15
This branch contains platform-related driver updates for ARM and ARM64, these are the areas that bring the changes: New drivers: - Driver support for Renesas R-Car V3M (R8A77970) - Power management support for Amlogic GX - A new driver for the Tegra BPMP thermal sensor - A new bus driver for Technologic Systems NBUS Changes for subsystems that prefer to merge through arm-soc: - The usual updates for reset controller drivers from Philipp Zabel, with five added drivers for SoCs in the arc, meson, socfpa, uniphier and mediatek families. - Updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla, Heiner Kallweit and Lorenzo Pieralisi. Changes specific to some ARM-based SoC - The Freescale/NXP DPAA QBMan drivers from PowerPC can now work on ARM as well. - Several changes for power management on Broadcom SoCs - Various improvements on Qualcomm, Broadcom, Amlogic, Atmel, Mediatek - Minor Cleanups for Samsung, TI OMAP SoCs -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaDggbAAoJEGCrR//JCVInIeQQAN1MDyO1UaWiFYnbkVOgzFcj dqbFOc41DBE/90JoBWE8kR/rjyF83OqztiaYpx9viu2qMMBZVcOwxhCUthWK59c/ IujYdw4zGevLscF+jdrLbXgk97nfaWebsHyTAF307WAdZVJxiVGGzQEcgm71d6Zp CXjLiUii4winHUMK9FLRY2st0HKAevXhuvZJVV432+sTg3p7fGVilYeGOL5G62WO zQfCisqzC5q677kGGyUlPRGlHWMPkllsTTnfXcmV/FUiGyVa3lUWY5sEu+wCl96O U1ffPENeNj/A/4fa1dbErtbiNnC2z/+jf+Dg7Cn8w/dPk4Suf0ppjP8RqIGyxmDl Wm/UxbwDClxaeF4GSaYh2yKgGRJMH5N87bJnZRINE5ccGiol8Ww/34bFG0xNnfyh jSAFAc318AFG62WD4lvqWc7LSpzOYxp/MNqIFXKN692St/MJLkx8/q0nTwY1qPY0 3SELz9II3hz+3MfDRqtRi7hZpkgHgQ+UG7S5+Xhmqrl309GOEldCjPVJhhXxWoxK ZPtZOuyYvGhIC+YAnHaN6lUjADIdNJZHwbuXFImx85oKHVofoxHbcni5vk8Uu7z1 sQNYOtdDGaPG/2u9RJdJlPg/jIgLKxxt/Xm9TYVawpZ5hFANhBTtIq5ExCRAil68 j9sMOrpZ1DzCQyR7zN2v =qDhq -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "This branch contains platform-related driver updates for ARM and ARM64, these are the areas that bring the changes: New drivers: - driver support for Renesas R-Car V3M (R8A77970) - power management support for Amlogic GX - a new driver for the Tegra BPMP thermal sensor - a new bus driver for Technologic Systems NBUS Changes for subsystems that prefer to merge through arm-soc: - the usual updates for reset controller drivers from Philipp Zabel, with five added drivers for SoCs in the arc, meson, socfpa, uniphier and mediatek families - updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla, Heiner Kallweit and Lorenzo Pieralisi Changes specific to some ARM-based SoC - the Freescale/NXP DPAA QBMan drivers from PowerPC can now work on ARM as well - several changes for power management on Broadcom SoCs - various improvements on Qualcomm, Broadcom, Amlogic, Atmel, Mediatek - minor Cleanups for Samsung, TI OMAP SoCs" [ NOTE! This doesn't work without the previous ARM SoC device-tree pull, because the R8A77970 driver is missing a header file that came from that pull. The fact that this got merged afterwards only fixes it at this point, and bisection of that driver will fail if/when you walk into the history of that driver. - Linus ] * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (96 commits) soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader bus: add driver for the Technologic Systems NBUS memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg() soc: qcom: remove unused label soc: amlogic: gx pm domain: add PM and OF dependencies drivers/firmware: psci_checker: Add missing destroy_timer_on_stack() dt-bindings: power: add amlogic meson power domain bindings soc: amlogic: add Meson GX VPU Domains driver soc: qcom: Remote filesystem memory driver dt-binding: soc: qcom: Add binding for rmtfs memory of: reserved_mem: Accessor for acquiring reserved_mem of/platform: Generalize /reserved-memory handling soc: mediatek: pwrap: fix fatal compiler error soc: mediatek: pwrap: fix compiler errors arm64: mediatek: cleanup message for platform selection soc: Allow test-building of MediaTek drivers soc: mediatek: place Kconfig for all SoC drivers under menu soc: mediatek: pwrap: add support for MT7622 SoC soc: mediatek: pwrap: add common way for setup CS timing extenstion soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap .. |
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527d147074 |
ARM: Device-tree updates for 4.15
We add device tree files for a couple of additional SoCs in various areas: Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking, Amlogic A113D for audio, and Renesas R-Car V3M for automotive. As usual, lots of new boards get added based on those and other SoCs: - Actions S500 based CubieBoard6 single-board computer - Amlogic Meson-AXG A113D based development board - Amlogic S912 based Khadas VIM2 single-board computer - Amlogic S912 based Tronsmart Vega S96 set-top-box - Allwinner H5 based NanoPi NEO Plus2 single-board computer - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers - Allwinner A83T based TBS A711 Tablet - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8 - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500 wireless access points and routers - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board - NXP i.MX53 based GE Healthcare PPD biometric monitor - NXP i.MX6 based Pistachio single-board computer - NXP i.MX6 based Vining-2000 automotive diagnostic interface - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards - Renasas r8a7745 based iWave G22D-SODIMM SoM - Rockchip rk3288 based Amarula Vyasa single-board computer - Samsung Exynos5800 based Odroid HC1 single-board computer For existing SoC support, there was a lot of ongoing work, as usual most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic and Allwinner platforms, but others were also active. Rob Herring and many others worked on reducing the number of issues that the latest version of 'dtc' now warns about. Unfortunately there is still a lot left to do. A rework of the ARM foundation model introduced several new files for common variations of the model. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaDhcfAAoJEGCrR//JCVIngu0QAI2ntVotaOAOaCurNCnoVwI1 j+eKwHGTawQRcSHWN8C+p4FzzaOmw+vvbOyewky8PWaDOCkK6yWEHRf3hb2la2jw j9prht28R1RAHIRPuah4SxKHYoT4VW9q/2hMHJ2BiNDOMX54xE7j2cUvWSsIRz5o id2QqKsp2OIDNQAXAA4N25FjdBCYvSik80panSdJITtJODIj6UfmcXSgqkoQ3TTV rwVyFtryl9Si3eyZYcfB2/0ILKuaMC8gl7IX9z+PkRqu9XN7i6bZKZlMMtpJqX3u Ad89kLkFqNhiwZ77bIoRRl+0NEoSu5hTPLHRqghS6gPfDY2JT6igf0rGC8twjfea fzGOBWr6NlIlUmR4smS0GyE/3YsfOQvYWjE+zx5qkmay30TORVTZBzsBR+kQJzKK tnbO1zvst1ECtk9e8np0di4NAo9rwM37dxpu4aspP1Umxw1K68VSNE3RhGl8UUwW oNvHa8hD8Ck0QDBNltrkmKBVoIYKRU3XhXrRXVjRQdu6Xitml0XYBi80V0h33EE3 162UXDEMu1/aqRRZUtKw7+yozT8fqOHjH8Zrv2zCVGg0HEwVohcWv/BPXbrg0abJ wXYS8VocZJP6Nb4FQMe+cRbBUHoBgBQqbsF60tWiYsjv0zoc5hogLWcZYqzDcIO6 06OBR3HgUW27urUn/JBu =TnSo -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM device-tree updates from Arnd Bergmann: "We add device tree files for a couple of additional SoCs in various areas: Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking, Amlogic A113D for audio, and Renesas R-Car V3M for automotive. As usual, lots of new boards get added based on those and other SoCs: - Actions S500 based CubieBoard6 single-board computer - Amlogic Meson-AXG A113D based development board - Amlogic S912 based Khadas VIM2 single-board computer - Amlogic S912 based Tronsmart Vega S96 set-top-box - Allwinner H5 based NanoPi NEO Plus2 single-board computer - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers - Allwinner A83T based TBS A711 Tablet - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8 - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500 wireless access points and routers - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board - NXP i.MX53 based GE Healthcare PPD biometric monitor - NXP i.MX6 based Pistachio single-board computer - NXP i.MX6 based Vining-2000 automotive diagnostic interface - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards - Renasas r8a7745 based iWave G22D-SODIMM SoM - Rockchip rk3288 based Amarula Vyasa single-board computer - Samsung Exynos5800 based Odroid HC1 single-board computer For existing SoC support, there was a lot of ongoing work, as usual most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic and Allwinner platforms, but others were also active. Rob Herring and many others worked on reducing the number of issues that the latest version of 'dtc' now warns about. Unfortunately there is still a lot left to do. A rework of the ARM foundation model introduced several new files for common variations of the model" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits) arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3 dt-bindings: bus: Add documentation for the Technologic Systems NBUS arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock ARM: dts: owl-s500: Add CubieBoard6 dt-bindings: arm: actions: Add CubieBoard6 ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock ARM: dts: owl-s500: Set power domains for CPU2 and CPU3 arm: dts: mt7623: remove unused compatible string for pio node arm: dts: mt7623: update usb related nodes arm: dts: mt7623: update crypto node ARM: dts: sun8i: a711: Enable USB OTG ARM: dts: sun8i: a711: Add regulator support ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1 ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1 ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes ARM: dts: sunxi: Add dtsi for AXP81x PMIC arm64: dts: allwinner: H5: Restore EMAC changes ... |
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b630a23a73 |
This is the bulk of pin control changes for the v4.15
kernel cycle: Core: - The pin control Kconfig entry PINCTRL is now turned into a menuconfig option. This obviously has the implication of making the subsystem menu visible in menuconfig. This is happening because of two things: - Intel have started to deploy and depend on pin controllers in a way that is affecting users directly. This happens on the highly integrated laptop chipsets named after geographical places: baytrail, broxton, cannonlake, cedarfork, cherryview, denverton, geminilake, lewisburg, merrifield, sunrisepoint... It started a while back and now it is ever more evident that this is crucial infrastructure for x86 laptops and not an embedded obscurity anymore. Users need to be aware. - Pin control expanders on I2C and SPI that are arch-agnostic. Currently Semtech SX150X and Microchip MCP28x08 but more are expected. Users will have to be able to configure these in directly for their set-up. - Just go and select GPIOLIB now that we made sure that GPIOLIB is a very vanilla subsystem. Do not depend on it, if we need it, select it. - Exposing the pin control subsystem in menuconfig uncovered a bunch of obscure bugs that are now hopefully fixed, all more or less pertaining to Blackfin. - Unified namespace for cross-calls between pin control and GPIO. - New support for clock skew/delay generic DT bindings and generic pin config options for this. - Minor documentation improvements. Various: - The Renesas SH-PFC pin controller has evolved a lot. It seems Renesas are churning out new SoCs by the minute. - A bunch of non-critical fixes for the Rockchip driver. - Improve the use of library functions instead of open coding. - Support the MCP28018 variant in the MCP28x08 driver. - Static constifying. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJaDV9TAAoJEEEQszewGV1zf0AQAIlHxM8B0mJPOFv7WdPIHs8j GSGAPv0rPobdgZI8vegosIQmAiry5jjaHP6VGOrK5n8FRxfBLd89NLT7dgK7J9Yx tYcQRQn1/MqZKaIjWWgTes3okEr9s77Of3aWkA9gyvBjTGoo2hu8BTwZOYuPrIPP aYcI7VR0VbTe7FQR1QRtKBXnBTXfznF1j5ckKNY4ahgIPcUgxyh6EA1E61rDorLK gvwwzoBqIKQAcnapgarF7YOJjoE0i7ZoSlhL0b0nvhcgolyK/zLN4xujLcTGPeTJ hQwe7LhxtvtmJmu0jRMuetDLFT52d6eq8ttyFBMULkgRzcgMv6GZZXUy4k92t7ZT F2DRbAjyAlxkhUhQ8BORzEXwfWYITt1M49jWQqugdDR2fV/MAlF8motOkVBl73iS zHIQ/ZDcAD+PlwTHiDyDOUxj7qyDs2MkTLTzfXc0koOQZOqskDHQ1dIf3UzLzZ9S /dx339/ejwP73E0lzOsanhianfonqWZ3Apn3aRG18uqCt2+eHySWpxyRANuOlBZI czERg+47wDfng24xyuH0EElgbS5G0Bt1lT5zLVLdFEvoLmcBHVKqaCkiuvYXOjVM GyMRvQPiJbhT6qiJ+aSP8t/utl1aUhXQLtrUnXxu8qv9tQ6jgmqiQd9855Uvrzb0 ZR2wyNc2jtWzwCfrkWjt =kj/b -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v4.15 kernel cycle: Core: - The pin control Kconfig entry PINCTRL is now turned into a menuconfig option. This obviously has the implication of making the subsystem menu visible in menuconfig. This is happening because of two things: (a) Intel have started to deploy and depend on pin controllers in a way that is affecting users directly. This happens on the highly integrated laptop chipsets named after geographical places: baytrail, broxton, cannonlake, cedarfork, cherryview, denverton, geminilake, lewisburg, merrifield, sunrisepoint... It started a while back and now it is ever more evident that this is crucial infrastructure for x86 laptops and not an embedded obscurity anymore. Users need to be aware. (b) Pin control expanders on I2C and SPI that are arch-agnostic. Currently Semtech SX150X and Microchip MCP28x08 but more are expected. Users will have to be able to configure these in directly for their set-up. - Just go and select GPIOLIB now that we made sure that GPIOLIB is a very vanilla subsystem. Do not depend on it, if we need it, select it. - Exposing the pin control subsystem in menuconfig uncovered a bunch of obscure bugs that are now hopefully fixed, all more or less pertaining to Blackfin. - Unified namespace for cross-calls between pin control and GPIO. - New support for clock skew/delay generic DT bindings and generic pin config options for this. - Minor documentation improvements. Various: - The Renesas SH-PFC pin controller has evolved a lot. It seems Renesas are churning out new SoCs by the minute. - A bunch of non-critical fixes for the Rockchip driver. - Improve the use of library functions instead of open coding. - Support the MCP28018 variant in the MCP28x08 driver. - Static constifying" * tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (91 commits) pinctrl: gemini: Fix missing pad descriptions pinctrl: Add some depends on HAS_IOMEM pinctrl: samsung/s3c24xx: add CONFIG_OF dependency pinctrl: gemini: Fix GMAC groups pinctrl: qcom: spmi-gpio: Add pmi8994 gpio support pinctrl: ti-iodelay: remove redundant unused variable dev pinctrl: max77620: Use common error handling code in max77620_pinconf_set() pinctrl: gemini: Implement clock skew/delay config pinctrl: gemini: Use generic DT parser pinctrl: Add skew-delay pin config and bindings pinctrl: armada-37xx: Add edge both type gpio irq support pinctrl: uniphier: remove eMMC hardware reset pin-mux pinctrl: rockchip: Add iomux-route switching support for rk3288 pinctrl: intel: Add Intel Cedar Fork PCH pin controller support pinctrl: intel: Make offset to interrupt status register configurable pinctrl: sunxi: Enforce the strict mode by default pinctrl: sunxi: Disable strict mode for old pinctrl drivers pinctrl: sunxi: Introduce the strict flag pinctrl: sh-pfc: Save/restore registers for PSCI system suspend pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description ... |
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e60e1ee606 |
main drm pull request for v4.15
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJaCm8RAAoJEAx081l5xIa+zX0QAJSm31kCG3vdw2CNiRx25L3q 3hcsEOgAjVJ9FQVGKFWjzb8TK35tSqtNx5kWIj0VGaIfBE5Bdg5SLLgKKUYas8rY 4LaphqICq2uxu2BNa2tpiar/sHhAnuozwQ4czpVWXzlaISnb9yYzRl7gMuyUVGkx +Gih5VUhLmQC0HsRTLJ3vaZQoUsLAl2gAjKcWa1bx57j2S+iKOPfsLaq7VYo+y1I Njc+iSGqMhJzRLXVkxL2lQKaslp7R38Bbh5K4Kvyjkm4Aq7zErOF6irpOXKMcrGl mwnr89vf1G9thjikrBaXpKnuvdbWYveoN/ORMlTdCfxkFnChHLnm3bd7NJ49RXDN Hv/Iq9YYjmZ9GTatxnx7lWtmXnZXC5he1yn1JAuz/yt7/0b/Wx+Mu/wEpBXYNFTd 1AZdD586i+AmPo3yDkqH9nBu8JC0W0AnS9VZma4LVvZOP2UfJmj5Im1CLHItbGDN FnUCkwyD/lJUUk+WgT+w/GOMJgmFHDiFFl4tFtYVVjrUirpCFVguSKG9xuv6tT8P 8iRsoP7RrcmDN9ojN2SEHwcpsAv3HnKkDv+9+GIbWnrGsSbCPq8Qm+JDSvf4h22I K5lwNpJrcpSKI+q10L7w2xliTBwb98sJkWGA/rssomrdBOWteGZAyqFRYAVgQ+mJ x/nJurIqQYh2KQN9+uLG =xVV2 -----END PGP SIGNATURE----- Merge tag 'drm-for-v4.15' of git://people.freedesktop.org/~airlied/linux Pull drm updates from Dave Airlie: "This is the main drm pull request for v4.15. Core: - Atomic object lifetime fixes - Atomic iterator improvements - Sparse/smatch fixes - Legacy kms ioctls to be interruptible - EDID override improvements - fb/gem helper cleanups - Simple outreachy patches - Documentation improvements - Fix dma-buf rcu races - DRM mode object leasing for improving VR use cases. - vgaarb improvements for non-x86 platforms. New driver: - tve200: Faraday Technology TVE200 block. This "TV Encoder" encodes a ITU-T BT.656 stream and can be found in the StorLink SL3516 (later Cortina Systems CS3516) as well as the Grain Media GM8180. New bridges: - SiI9234 support New panels: - S6E63J0X03, OTM8009A, Seiko 43WVF1G, 7" rpi touch panel, Toshiba LT089AC19000, Innolux AT043TN24 i915: - Remove Coffeelake from alpha support - Cannonlake workarounds - Infoframe refactoring for DisplayPort - VBT updates - DisplayPort vswing/emph/buffer translation refactoring - CCS fixes - Restore GPU clock boost on missed vblanks - Scatter list updates for userptr allocations - Gen9+ transition watermarks - Display IPC (Isochronous Priority Control) - Private PAT management - GVT: improved error handling and pci config sanitizing - Execlist refactoring - Transparent Huge Page support - User defined priorities support - HuC/GuC firmware refactoring - DP MST fixes - eDP power sequencing fixes - Use RCU instead of stop_machine - PSR state tracking support - Eviction fixes - BDW DP aux channel timeout fixes - LSPCON fixes - Cannonlake PLL fixes amdgpu: - Per VM BO support - Powerplay cleanups - CI powerplay support - PASID mgr for kfd - SR-IOV fixes - initial GPU reset for vega10 - Prime mmap support - TTM updates - Clock query interface for Raven - Fence to handle ioctl - UVD encode ring support on Polaris - Transparent huge page DMA support - Compute LRU pipe tweaks - BO flag to allow buffers to opt out of implicit sync - CTX priority setting API - VRAM lost infrastructure plumbing qxl: - fix flicker since atomic rework amdkfd: - Further improvements from internal AMD tree - Usermode events - Drop radeon support nouveau: - Pascal temperature sensor support - Improved BAR2 handling - MMU rework to support Pascal MMU exynos: - Improved HDMI/mixer support - HDMI audio interface support tegra: - Prep work for tegra186 - Cleanup/fixes msm: - Preemption support for a5xx - Display fixes for 8x96 (snapdragon 820) - Async cursor plane fixes - FW loading rework - GPU debugging improvements vc4: - Prep for DSI panels - fix T-format tiling scanout - New madvise ioctl Rockchip: - LVDS support omapdrm: - omap4 HDMI CEC support etnaviv: - GPU performance counters groundwork sun4i: - refactor driver load + TCON backend - HDMI improvements - A31 support - Misc fixes udl: - Probe/EDID read fixes. tilcdc: - Misc fixes. pl111: - Support more variants adv7511: - Improve EDID handling. - HDMI CEC support sii8620: - Add remote control support" * tag 'drm-for-v4.15' of git://people.freedesktop.org/~airlied/linux: (1480 commits) drm/rockchip: analogix_dp: Use mutex rather than spinlock drm/mode_object: fix documentation for object lookups. drm/i915: Reorder context-close to avoid calling i915_vma_close() under RCU drm/i915: Move init_clock_gating() back to where it was drm/i915: Prune the reservation shared fence array drm/i915: Idle the GPU before shinking everything drm/i915: Lock llist_del_first() vs llist_del_all() drm/i915: Calculate ironlake intermediate watermarks correctly, v2. drm/i915: Disable lazy PPGTT page table optimization for vGPU drm/i915/execlists: Remove the priority "optimisation" drm/i915: Filter out spurious execlists context-switch interrupts drm/amdgpu: use irq-safe lock for kiq->ring_lock drm/amdgpu: bypass lru touch for KIQ ring submission drm/amdgpu: Potential uninitialized variable in amdgpu_vm_update_directories() drm/amdgpu: potential uninitialized variable in amdgpu_vce_ring_parse_cs() drm/amd/powerplay: initialize a variable before using it drm/amd/powerplay: suppress KASAN out of bounds warning in vega10_populate_all_memory_levels drm/amd/amdgpu: fix evicted VRAM bo adjudgement condition drm/vblank: Tune drm_crtc_accurate_vblank_count() WARN down to a debug drm/rockchip: add CONFIG_OF dependency for lvds ... |
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6aa2f9441f |
This is the bulk of GPIO changes for the v4.15 kernel cycle:
CORE: - Fix the semantics of raw GPIO to actually be raw. No inversion semantics as before, but also no open draining, and allow the raw operations to affect lines used for interrupts as the caller supposedly knows what they are doing if they are getting the big hammer. - Rewrote the __inner_function() notation calls to names that make more sense. I just find this kind of code disturbing. - Drop the .irq_base() field from the gpiochip since now all IRQs are mapped dynamically. This is nice. - Support for .get_multiple() in the core driver API. This allows us to read several GPIO lines with a single register read. This has high value for some usecases: it can be used to create oscilloscopes and signal analyzers and other things that rely on reading several lines at exactly the same instant. Also a generally nice optimization. This uses the new assign_bit() macro from the bitops lib that was ACKed by Andrew Morton and is implemented for two drivers, one of them being the generic MMIO driver so everyone using that will be able to benefit from this. - Do not allow requests of Open Drain and Open Source setting of a GPIO line simultaneously. If the hardware actually supports enabling both at the same time the electrical result would be disastrous. - A new interrupt chip core helper. This will be helpful to deal with "banked" GPIOs, which means GPIO controllers with several logical blocks of GPIO inside them. This is several gpiochips per device in the device model, in contrast to the case when there is a 1-to-1 relationship between a device and a gpiochip. NEW DRIVERS: - Maxim MAX3191x industrial serializer, a very interesting piece of professional I/O hardware. - Uniphier GPIO driver. This is the GPIO block from the recent Socionext (ex Fujitsu and Panasonic) platform. - Tegra 186 driver. This is based on the new banked GPIO infrastructure. OTHER IMPROVEMENTS: - Some documentation improvements. - Wakeup support for the DesignWare DWAPB GPIO controller. - Reset line support on the DesignWare DWAPB GPIO controller. - Several non-critical bug fixes and improvements for the Broadcom BRCMSTB driver. - Misc non-critical bug fixes like exotic errorpaths, removal of dead code etc. - Explicit comments on fall-through switch() statements. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJaCvGiAAoJEEEQszewGV1z+oAQAJUpdPH/msdgHDuXSuBcbuFq NObQdkRiz1hez4vJOT+kbgES6ay57MArnbmM/xRdy+37lKrmkP+yfZe4UUruQhhW f2GVlwBbUp9tIzNliS8IYWO0tj+BTYyg1MQx0C0nE1zMZqVZk44EDa9SO6esRaFJ SLc2BpO3oJCQRaObe0+KTHIJV0dK3vQh4QXSzL+cM5u7P67Jq+wv4xdLVVScwbJB 4jgwVER3Ah0E1jHclIG2PxI1rbYKwlOBumafOTUlq5fmfC3tULVPJEm9FXcdaBLJ KAmtxX4yi+SgUccYFsmK+fNNLVQiAjmkhJCl6kxVOrxYqamrG100YST4Iew3sakM /iQ3lpup5L6eJ/dndfgE207OqRFhvAzNRxORv1p/wJIRLmV1/QehCX8GYOcDumXY MySRcEeUeZPfBHcnjIDRP6y/XOg8zBKso7GL+feRgLZUJZlNQZqokdC95TY9S5nm QLK+sU367o41tomyv5TP3y1DDsym6+ZdpuOUh73znxuz2x/x+FfTfwM2J0r8Ussm GQTfAojeBI9aSOZ2mvgRI1XxSprXqO3FFFWBwrQ6RS9rBceLF1o2ySKC2gI0FG5d 6GBkARcN5RyyNtYkH923pyrqz/FZJc6ZkrsUTGmERM5HGuWwczcditqwYRhbHwl8 pIlmX4y0AYh6FFVoIcQE =8Mon -----END PGP SIGNATURE----- Merge tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v4.15 kernel cycle: Core: - Fix the semantics of raw GPIO to actually be raw. No inversion semantics as before, but also no open draining, and allow the raw operations to affect lines used for interrupts as the caller supposedly knows what they are doing if they are getting the big hammer. - Rewrote the __inner_function() notation calls to names that make more sense. I just find this kind of code disturbing. - Drop the .irq_base() field from the gpiochip since now all IRQs are mapped dynamically. This is nice. - Support for .get_multiple() in the core driver API. This allows us to read several GPIO lines with a single register read. This has high value for some usecases: it can be used to create oscilloscopes and signal analyzers and other things that rely on reading several lines at exactly the same instant. Also a generally nice optimization. This uses the new assign_bit() macro from the bitops lib that was ACKed by Andrew Morton and is implemented for two drivers, one of them being the generic MMIO driver so everyone using that will be able to benefit from this. - Do not allow requests of Open Drain and Open Source setting of a GPIO line simultaneously. If the hardware actually supports enabling both at the same time the electrical result would be disastrous. - A new interrupt chip core helper. This will be helpful to deal with "banked" GPIOs, which means GPIO controllers with several logical blocks of GPIO inside them. This is several gpiochips per device in the device model, in contrast to the case when there is a 1-to-1 relationship between a device and a gpiochip. New drivers: - Maxim MAX3191x industrial serializer, a very interesting piece of professional I/O hardware. - Uniphier GPIO driver. This is the GPIO block from the recent Socionext (ex Fujitsu and Panasonic) platform. - Tegra 186 driver. This is based on the new banked GPIO infrastructure. Other improvements: - Some documentation improvements. - Wakeup support for the DesignWare DWAPB GPIO controller. - Reset line support on the DesignWare DWAPB GPIO controller. - Several non-critical bug fixes and improvements for the Broadcom BRCMSTB driver. - Misc non-critical bug fixes like exotic errorpaths, removal of dead code etc. - Explicit comments on fall-through switch() statements" * tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (65 commits) gpio: tegra186: Remove tegra186_gpio_lock_class gpio: rcar: Add r8a77995 (R-Car D3) support pinctrl: bcm2835: Fix some merge fallout gpio: Fix undefined lock_dep_class gpio: Automatically add lockdep keys gpio: Introduce struct gpio_irq_chip.first gpio: Disambiguate struct gpio_irq_chip.nested gpio: Add Tegra186 support gpio: Export gpiochip_irq_{map,unmap}() gpio: Implement tighter IRQ chip integration gpio: Move lock_key into struct gpio_irq_chip gpio: Move irq_valid_mask into struct gpio_irq_chip gpio: Move irq_nested into struct gpio_irq_chip gpio: Move irq_chained_parent to struct gpio_irq_chip gpio: Move irq_default_type to struct gpio_irq_chip gpio: Move irq_handler to struct gpio_irq_chip gpio: Move irqdomain into struct gpio_irq_chip gpio: Move irqchip into struct gpio_irq_chip gpio: Introduce struct gpio_irq_chip pinctrl: armada-37xx: remove unused variable ... |
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4c4fe16971 |
Merge branch 'clk-mediatek' into clk-next
* clk-mediatek: clk: mediatek: add clock support for MT7622 SoC clk: mediatek: add clocks dt-bindings required header for MT7622 SoC clk: mediatek: add the option for determining PLL source clock dt-bindings: clock: mediatek: document clk bindings for MediaTek MT7622 SoC clk: mediatek: mark mtk_infrasys_init_early __init clk: mediatek: Add MT2712 clock support clk: mediatek: Add dt-bindings for MT2712 clocks dt-bindings: ARM: Mediatek: Document bindings for MT2712 |
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eed58151d6 |
Merge branch 'clk-imx' into clk-next
* clk-imx: clk: imx: imx7d: Remove ARM_M0 clock clk: imx: imx7d: Fix parent clock for OCRAM_CLK clk: imx: clk-imx6ul: allow lcdif_pre_sel to change parent rate clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPU |
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8f62040086 |
Merge branch 'clk-qcom' into clk-next
* clk-qcom: clk: qcom: clk-smd-rpm: add msm8996 rpmclks clk: qcom: Implement RPM clocks for MSM8660/APQ8060 clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC clk: qcom: Elaborate on "active" clocks in the RPM clock bindings clk: qcom: Remove unused RCG ops |
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042e2e9c2c |
clk: tegra: Changes for v4.15-rc1
This contains cleanups and minor fixes for the Tegra clock driver. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAloBzq8THHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zobeJD/9QhqSqE1EA5jLZDE/9yqNWL7BJHgOP +csMY4y6PaEX5SkxGuLrHmMOJPNHTfFeqnL8djAkMfsmAnUOYqxKvweEFqxmgT2V 7lPOv5ScdvAejPKje1TMou29P2JYaScoU2Pk3Ve6mQIye/m1IoTJxDMhDWJYCn1c 8fetIu2J25vrGHQcl9xChxce8au0KenEkQQSot0czrgymtrpZcBAJLFPn7EqVh5i HVkvB1RZG8GKbRNNhmm9P1ryWE0r5Yi+MOCki1izr153uDLsNM5oV20UY3FohoY3 97CsgZCt3PisCRuNd+4M4uYUQomQfalfz7MR5z+4wws+9tOi3uVujNUmRzU03pBY 4fscXy6iepDGLDngUxqZkjAhy1mvV8g0iGEvNS+7ELzyC7hsAAkNHN3j2xg+uklE aVl9/SSdKMDFjZk0n2YHmnE5bYAhlweluNUsEnJ2KnNpB9V7xWuDhF6abq3NPVbS XxMLGbwy/jT4t4IziPb2CicLsRbM1qySjlDd5AxyhM4t8bq3JVgVU6M+JwcrOZnQ ydkTvoFS489kXPDl2E3NyUJOSVPfp6z05mONGsNNJIMqh4pE7Q4uaMoBXEntMxbl UHhOcJSx8SAtRe2gnEnIc7+U+ngWAFzRD6mU0qEab2bEg1VfpCP6GD6MLa2PrUBU 8Ln17zfr0lD2YQ== =wB8S -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.15-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next Pull tegra clk drivers updates from Thierry Reding: This contains cleanups and minor fixes for the Tegra clock driver. * tag 'tegra-for-4.15-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init() clk: tegra: dfll: Fix drvdata overwriting issue clk: tegra: Fix cclk_lp divisor register clk: tegra: Bump SCLK clock rate to 216 MHz clk: tegra: Use common definition of APBDMA clock gate clk: tegra: Correct parent of the APBDMA clock clk: tegra: Add AHB DMA clock entry clk: tegra: Mark APB clock as critical clk: tegra: Make tegra_clk_pll_params __ro_after_init clk: tegra: Fix sor1_out clock implementation clk: tegra: Use tegra_clk_register_periph_data() clk: tegra: Add peripheral clock registration helper clk: tegra: Check BPMP response return code dt-bindings: clock: tegra: Add sor1_out clock firmware: tegra: Propagate error code to caller |
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894025f24b |
USB/PHY patches for 4.15-rc1
Here is the big set of USB and PHY driver updates for 4.15-rc1. There is the usual amount of gadget and xhci driver updates, along with phy and chipidea enhancements. There's also a lot of SPDX tags and license boilerplate cleanups as well, which provide some churn in the diffstat. Other major thing is the typec code that moved out of staging and into the "real" part of the drivers/usb/ tree, which was nice to see happen. All of these have been in linux-next with no reported issues for a while. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWgm/Vw8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+yktXwCdGgpInfOEvOGFd83EPDL7a1ncyc4AoM5wI8yl 1CeLipqVIN3IsMMJptvb =zvDI -----END PGP SIGNATURE----- Merge tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/PHY updates from Greg KH: "Here is the big set of USB and PHY driver updates for 4.15-rc1. There is the usual amount of gadget and xhci driver updates, along with phy and chipidea enhancements. There's also a lot of SPDX tags and license boilerplate cleanups as well, which provide some churn in the diffstat. Other major thing is the typec code that moved out of staging and into the "real" part of the drivers/usb/ tree, which was nice to see happen. All of these have been in linux-next with no reported issues for a while" * tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (263 commits) usb: gadget: f_fs: Fix use-after-free in ffs_free_inst USB: usbfs: compute urb->actual_length for isochronous usb: core: message: remember to reset 'ret' to 0 when necessary USB: typec: Remove remaining redundant license text USB: typec: add SPDX identifiers to some files USB: renesas_usbhs: rcar?.h: add SPDX tags USB: chipidea: ci_hdrc_tegra.c: add SPDX line USB: host: xhci-debugfs: add SPDX lines USB: add SPDX identifiers to all remaining Makefiles usb: host: isp1362-hcd: remove a couple of redundant assignments USB: adutux: remove redundant variable minor usb: core: add a new usb_get_ptm_status() helper usb: core: add a 'type' parameter to usb_get_status() usb: core: introduce a new usb_get_std_status() helper usb: core: rename usb_get_status() 'type' argument to 'recip' usb: core: add Status Type definitions USB: gadget: Remove redundant license text USB: gadget: function: Remove redundant license text USB: gadget: udc: Remove redundant license text USB: gadget: legacy: Remove redundant license text ... |
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bee67c7c9d | Merge branch 'gpio-irqchip-rework' of /home/linus/linux-gpio into devel | |
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1e11cbf720 |
Support for the RGA (raster graphics accelerator) on rk3399
and efuses on rk3368. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlnxjcYQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgQg9CACKoNn8LseipJa0kc6ZYXXtVDurmVHgaPyV OpC3+YbN9tpaBh6lsujkecthmlS45qrjZUsw00P50vcGbrMgrB9zytVrFrpEVxQT iNdEccU9RFEZ1GSQTPstxI3Uv1fnDcqSCplzKEeVxZ/U7vwWwq5YAi4bSey6eMzc GNq6FfT65Uf07a0Ondn3+IUzvjRpY42BHjjQjMv3k3lSn7z94/OG0AmCkRrXkBw/ 0+jxf9eMkkEj3JaC+OhwHOLJn7bv2U67HPGjLV7BLfFUQYGjPYd8g+LdeVV9Y2PJ urGiu3o/VbUbTbl2+TWh+OWYbfLFhpBdE+ouPHBPxJMPFkiGnrdA =xf8q -----END PGP SIGNATURE----- Merge tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "Rockchip dts64 updates for 4.15 part2" from Heiko Stübner: Support for the RGA (raster graphics accelerator) on rk3399 and efuses on rk3368. * tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: add efuse for RK3368 SoCs arm64: dts: rockchip: add RGA device node for RK3399 clk: rockchip: add more rk3188 graphics clock ids clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs |
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78af0be67b |
thermal: tegra: Changes for v4.15-rc1
This contains the Tegra186 BPMP thermal driver. It is used to monitor and access several thermal sensors found in the SoC. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlnp4eMTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zodrZEACEhH5rCNN/848plxE43sG3nr67MBgd j012dMLQJghvTv60nJerWOapfiNIQIubaGxMe4cW0QM6tiQ4fmIrl4ewTA20R6lI Udsy/vgzzpfGZeClVGlL9DDmnxu7yNDL+LL70Hps00d74k3rWpnf6xRcIqxsdpxJ 1bEZzZRCu4Q+0RpjgfmfrHrDo22qUrj1f0HjVQ4iFwDx6fbzNLPEkKszFoevgNPE ce7pnzmYywR+694t7CQ2REWDBIYzTZrgWqxkMtXmPgQISYzUXmqD5dzBFA2IZQO4 kWyxzlMLyV2eK4ElvKnycZFYhuEzaOG/EVlpvHtFxy8NOlAIJWNh1CXT0mwdKx/o ZQvOU64vyqBSXURFoHLkGn8KfqrNpkc1nC4KU65Vuef4XMTTeLabki2rkxKo+7nb ljnwuMBTMfsaN9iLDHCdbXxxLQN1qXiUIcdOpt95NVZS4wsL7gQvpLj9UvUCFqJj o1OilXyArZd0KzxDQDAfoq1TC+AzYrQ2/29QZHqi6gi9/Qg4ipWKOiLezeqiwSyG 6I85+fNV8Oc1nor9HqOC4cxNrO5woJA/gFw/J+JP3zg7aHOwldD4feKCeAV6QUKg /XS+S6iVqQQ7CVMV1Dw6ruiq1vaZ+DiapoaTnhC7n1g+wTfWdiQ9CsQ8UnAjVT76 mfjD/Qjn8m5NoQ== =Y8Vc -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.15-thermal' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Pull "thermal: tegra: Changes for v4.15-rc1" from Thierry Reding: This contains the Tegra186 BPMP thermal driver. It is used to monitor and access several thermal sensors found in the SoC. * tag 'tegra-for-4.15-thermal' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux: thermal: Add Tegra BPMP thermal sensor driver dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal dt-bindings: clock: tegra: Add sor1_out clock |
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b24413180f |
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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bda921fad5 |
clk: mediatek: add clocks dt-bindings required header for MT7622 SoC
Add the required header for the entire clocks dt-bindings exported from topckgen, apmixedsys, infracfg, pericfg, ethsys, pciesys, ssusbsys and audsys which could be found on MT7622 SoC. Signed-off-by: Chen Zhong <chen.zhong@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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b7f1a721bb |
clk: mediatek: Add dt-bindings for MT2712 clocks
Add MT2712 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg, mcucfg and subsystem clocks. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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259bc28306 |
clk: imx: imx7d: Remove ARM_M0 clock
IMX7d does not have an M0 Core and this particular clock doesn't seem connected to anything else. Remove this entry from the CCM driver. Signed-off-by: Adriana Reus <adriana.reus@nxp.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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7066fdd0d7 |
clk: qcom: clk-smd-rpm: add msm8996 rpmclks
Add all RPM controlled clocks on msm8996 platform [srini: Fixed various issues with offsets and made names specific to msm8996] Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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856e6bb91e |
clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC
These compatible strings need to be added to extend support for the RPM CC to cover MSM8660/APQ8060. We also need to add enumberators to the include file for a few clocks that were missing. Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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7a88cbd8d6 |
Linux 4.14-rc7
-----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJZ9kEFAAoJEHm+PkMAQRiGw6wH/0j197qyGd0hkVFMJO6LAgN3 KQWS4nZ5BkVDocwv0RVnUJTtXqU1eozFgdVEtSoaFXpzlHGuptR2Tau9efDCJ7w3 /utZxqvhGebZd2T+j+/o/LE8BRQxhADBNJq2D/o0WNt8ecxuG0GIkhkEYt/o3z1v /sxlwVwzXB7Dc/h1WcgGJG7cS6L9KzzAzGAS/iNvdFrPOygHBv8c0MxVZIiBIeeK 1nZdyvbyM8uenSyG+prGt9ENrqXZxxfwUxIchi2V7A9m1WmD5zijNkf1JCWji/O+ UsA1auxna7MwoxjxqZuGm4MlKOwZ+8xutk4JGgc+aP/ulndJbJYu+4op/3vaFBM= =Mhx+ -----END PGP SIGNATURE----- Backmerge tag 'v4.14-rc7' into drm-next Linux 4.14-rc7 Requested by Ben Skeggs for nouveau to avoid major conflicts, and things were getting a bit conflicty already, esp around amdgpu reverts. |
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6705fc9441 |
Some new clock ids for rk3188 and rk3368 as well as removal of a
superfluous memory allocation error message. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlnmPGsQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgYO7CACCYT7nEtwfQd4ajxUp9CoMYqBUEuZYv1xR NWbaK99eF2gNLZwUIkY3Y1C/YV8SA14gfeD2zmqbBe+f7MNqyUvi8VtEzidyHj0d JpIGjD1Gqy/A/Qli2RN76rPyQc9hW7KgFGIFSOEdKwmmkf6gQcb66tlG9qFfmAka Gfx7+5E226NGOtG6vjGtfW6lsrxpgpffsyOZiAK0MWLSF6y2tvxkO8kA4/elWhfc +fRYuBxjxZ74O2zJvIFMNC7L9S3fflPJ1+LRs+PSZwUgTwd7+bQlSXxh3ktc/9uf v57UmlDcRLABdL126tEK4oQLCXwIDy+LGx/2XCr791HRyQDcXo3q =0pyD -----END PGP SIGNATURE----- Merge tag 'v4.15-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next Pull Rockchip clk drivers updates from Heiko Stuebner: - new clock ids for rk3188 and rk3368 - removal of a superfluous memory allocation error message * tag 'v4.15-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: use new cif/vdpu clock ids on rk3188 clk: rockchip: export clock pclk_efuse_256 for RK3368 SoCs clk: rockchip: add more rk3188 graphics clock ids clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs clk: rockchip: Remove superfluous error message in rockchip_clk_register_cpuclk() |
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319663c7d1 |
Amlogic clock changes for 4.15
- Addition of Video Processing Unit VPU and VAPB clocks -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZ6bW/AAoJEHfc29rIyEnRAvkP+wZhUNg/5s/tj68Qmc34yfRq WKk6Hn4ySOpjQr3DR0LNYevqNhVALFOsMGafIRnFIE89cLyoHqTjBn7K21TctOnj YyPjMx54PP46PjBV0XJ9jk1Km+z/JYa4A79xjW4x2lfaazxZfdXyfvOCHzWsmF6R jyLwsOwNyqpbP7eYqss5qXJeBVQ56VvjL35n3fLbbpTS56RsjXNGUMoS84WNECS4 6ixs/YhpmkgJE+cOY9KaeDXmd8v9IWK4wWjcqty+CMiOZPmxW2LuxisVNEZriGQ4 dmEiD/FSjqL7hNtNco2AHhvq/Erh96S1jf8lj8grHOSSIV+jVnA/zZNGCM4Myi2P lq7qI8EuQLa5PqVdRzG5RoWelbLkvJ351QQZolmLjAVTjAdSiwibFQHqF1Ofwnak CzG3qblgItnXhboreKwvP1VI6qmnGq7m3LWi3FT6Lp3GxUsEYsvT97RMjXpOerZN D7ZGoMKu4Qu2v8i1JWJzfDPuoAg0/+jz6HAx/nKgK6bgbNYjoJ3Llw+8Tf3wPjOm uJrEHKY2WpishRFbHclO9AftBAU4+8UBh9S6Gvz4l9tGeWklHVQh1u2F7jzmNyRT pNjWVEcuiX5ckNaARDqKZu0Lv5FYdTMfQQ6OdLnxTGmWCwB9QFnzIrI2AR/tuESl hfsh89AFS7f5QnzI9P41 =rDVJ -----END PGP SIGNATURE----- Merge tag 'meson-clk-for-4.15' of git://github.com/baylibre/clk-meson into clk-next Pull Amlogic clock driver updates from Neil Armstrong: - Addition of Video Processing Unit VPU and VAPB clocks * tag 'meson-clk-for-4.15' of git://github.com/baylibre/clk-meson: clk: meson: gxbb: Add VPU and VAPB clocks data clk: meson: gxbb: Add VPU and VAPB clockids |
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ffc3eb6f3a |
Allwinner clock changes for 4.15
The most notable changes are: - Addition of sigma/delta modulation for the audio PLLs on the newer SoCs - A83t Display clocks supports There's also a bunch of minor fixes that didn't have any impact on current features provided by the kernel. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZ6ahsAAoJEBx+YmzsjxAgtvAQALfAX8+9HfJ7dk84s2qhLoZ6 LsTujOAzUSWgOFDRhHK5vkqzq4GMqL+Tum57g7Sa7iStkYjSjtqDoMG3ajvehm1L rGqilZFMLSiOGiV2sQXmA8EANVjqNH6jeOc6Szwo7e0tqw5FC27TjN3jNHAAmd0z B9dmKQSaquMfHa+ldtOSmUjitY1uwq4dKdxuZrCxBVcgjJEwYuXOVCCioUN+d+/j ZRkcsoROW48FqVcsu9wONGYJxgKMVfkOR6P4QuTOfrw5Flvj5DZPYKMk0c2hYcEh FfSFJU7kq43dEIzD2sS4o17RTtoJQz8pO7qQ6TwL23sgtZuxvUKofhnSFbe7OV3P nqqiaDXEayjxNYD+aN4hpKBdK6rml9bhO8d1Y4d3dgFTdP3jhbsbO3CQebbzTKTs /KLyYKG3G7r3BrvY7XfrSRT1q68mp9O8GFxUMXCGwcESiqyBFLoDX32+25fZumtg 2wADvSyTBHViJDsgHaJFuzG0rOKQLxVW2VUce3RFlFZAUCxZ9ZMrSj8ANhGfCqJ9 RH9dpTVPVw1fPl1Lpx9ZLz9sE5Y+rQXn18etyV04rTuW9nlAQqua5wLicGEAz3Dq bln44RgngxpQk/0/O77Q6U+7F9gUdowwri+1m2m0s73xNjAUAE42SuCnuFZz7P3L 4i58+Nv/CU9H98ew4TRR =4mo5 -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next Pull Allwinner clock driver updates from Maxime Ripard: - Addition of sigma/delta modulation for the audio PLLs on the newer SoCs - A83t Display clocks supports - minor fixes that didn't have any impact on current features * tag 'sunxi-clk-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: sun4i: Export video PLLs clk: sunxi-ng: Add A83T display clocks clk: sunxi-ng: sun8i: a23: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun6i: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun5i: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun4i: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun8i: h3: Use sigma-delta modulation for audio PLL clk: sunxi-ng: nm: Add support for sigma-delta modulation clk: sunxi-ng: Add sigma-delta modulation support clk: sunxi-ng: nm: Check if requested rate is supported by fractional clock clk: sunxi-ng: sun5i: Fix bit offset of audio PLL post-divider clk: sunxi-ng: a83t: Fix invalid csi-mclk mux offset clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collision clk: sunxi-ng: sun6i: Export video PLLs clk: sunxi-ng: Implement reset control status readback clk: sunxi-ng: Fix missing CLK_SET_RATE_PARENT in ccu-sun4i-a10.c clk: sunxi-ng: add CLK_SET_RATE_PARENT flag to H3 GPU clock clk: sunxi-ng: add CLK_SET_RATE_UNGATE to all H3 PLLs |
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ae74ac0828 |
clk/samsung updates for v4.15, part 2
- An addition of separate driver for the Exynos 4412 ISP CMU, needed to model and properly handle the clock controller's dependencies on the ISP power domain. - Adding __maybe_unused attributes to the exynos5433_cmu_{suspend, resume} ops to suppress compiler warnings with CONFIG_PM disabled. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJZ5IjJAAoJEE1bIKeAnHqLsnIP/iPVWF3tkpKgc7v5cq3US+HW U7uU3/Di1A8jWgIVYyFVjAAceahz9xefu2rgCxsiUAkh1i+SdR9O9gAWq08AcmZu OMGWI7zMzH0GVvRXDbZsRGKVxtkrda519KnOTXorawhh1JnODuOzMBxMcAXm+zen bvPuqiXBvGXADFc18QtaR7JAd7sqd+rMFYCJ45RJAIf20Z9PPGJQPtkxfvkK2xRX nuB6ZaUfN9xrBVhWvjYq6WjKhkIO/j848B+0+l5GLi2au/a+nDN0qOYrMpFG8EQe k/6zu3xDTG/9UgKWNJN5fMon7QK82sOJTszDwDLLsttz5LhuUGV+oLHnAdt8rcgJ 7UuTNRc169t0tNtoep6m/5kHn81XARSQAgPVKs5xuOfTef4lP3kXhbDLoIENx/+H fCDq7GteFat1Shu/01HZJhBe4MOolZLHsFvu7+KawB6CmD3KzDSckgRRIrEFDqck AYqxDmqJLaNbnJeTBsNRQQ3uX5D1wAaGKJLNq4HSfNOL3ZeOHQ2nxp0GgIOk7CSB agelkdpMaN4uNTB8cENnEIBv99bEkbdd4o5unCbO8lu3JgqfgjqFm6FjQZRR0ZQi uu1rFK+w7G239B6eBpkRLuJ7h8v3FntQy6FJOHHm8fKkHtN+BpBEUgX9EkJsW1QG ii7VgIaLm7QLcFOupKeh =DlbQ -----END PGP SIGNATURE----- Merge tag 'clk-v4.15-exynos-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-next Pull Samsung clk driver updates from Sylwester Nawrocki: - An addition of separate driver for the Exynos 4412 ISP CMU, needed to model and properly handle the clock controller's dependencies on the ISP power domain. - Adding __maybe_unused attributes to the exynos5433_cmu_{suspend, resume} ops to suppress compiler warnings with CONFIG_PM disabled. * tag 'clk-v4.15-exynos-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk: clk: samsung: Add a separate driver for Exynos4412 ISP clocks clk: samsung: Add dt bindings for Exynos4412 ISP clock controller clk: samsung: Instantiate Exynos4412 ISP clocks only when available clk: samsung: exynos5433: mark PM functions as __maybe_unused |
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c4db01edba |
dt-bindings: Updates for v4.15-rc1
This contains the addition of a clock alias which will be used to fix the implementation of the SOR1 clock. Also included are the bindings for the Tegra186 BPMP thermal driver, a prerequisite for both the driver and device tree changes. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlnp4PgTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zod0iD/wITLsu5aK0z8LH9lyXo0lgQJuakHTQ s/Au1D+baT4a7qGuT86unqQLlAxnlWjgmQzOnw3KSxQ0ech92uwlP9lIqeieYH20 g0jNxNFLLsfd+k6mKn1SEKx2QRxsStv+qH/rjTRB1oU7tlE87PBSwI8IdmpczVY4 EsJs4wqnbkFfmAzAEBLqyC2+P+vyW37DTq0IVK+y840iEKkEBjIpGQnNCIarc6B2 gHxFVZGZWeV0BmeuWDUzSaoxIs0tSjH/FRMbIx4CML404FMlTgdhz4j/eIGvNhAI A/9bkKeiicflg55ra7cc1GQC5wkT+KaJzO2AgQ5dVW9/OeY8zntT2/B1N/52Pz5x yJTRfP/F8KzSNQ4FMwz99CwBOgCjymHTiYWFRrVCUcM4vLJLIKy5nsiMozxGN0aH Zz53mB1qiVTUTD8rSp/8bfB/QdMac0PFhKct8pQQPpF7X4hkJ3kcidkx5UzNwCND 4/oIjaS0Oz46mxlcGkG06tnBs1TPS+s8txp+Z73V+Jccj0ppQKG6Ehs7H8t9wWPg pqVT4imE5y0zH8PJyMz/TsFzsLgc3jceP5iqRzvziK8i0mrK/Lshl6rIpe3UTavP QFLkfNyxoya1cGzist4SbQ5/0yAh2YQkRUblGMaQScHEeksftQpEWJKEVBune9CD 2ZCGdNPXE2MsuQ== =xdyX -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.15-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt Pull "dt-bindings: Updates for v4.15-rc1" from Thierry Reding: This contains the addition of a clock alias which will be used to fix the implementation of the SOR1 clock. Also included are the bindings for the Tegra186 BPMP thermal driver, a prerequisite for both the driver and device tree changes. * tag 'tegra-for-4.15-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal dt-bindings: clock: tegra: Add sor1_out clock |
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6ac5482ee6 |
Second Round of Renesas ARM Based SoC DT Updates for v4.15
* r8a77430 (RZ/G1M) SoC - Add XHCI support to SoC DT. Boards may enable this as appropriate * All Renesas ARM based SoCs - Add missing clocks for ARM CPU cores Geert Uytterhoeven says "This series improves DT hardware descriptions for Renesas arm32 SoCs by adding missing clocks properties to the device nodes corresponding to ARM CPU cores." * R-Car Gen 1 and 2, and RZ/G SoCs - Use R-Car Fallback compat strings for GPIO Simon Horman says "Use newly added R-Car GPIO Gen 1, 2 and 3 fallback compat strings in peace of now deprecated non-generation specific R-Car GPIO fallback compat string in the DT of Renesas ARM and arm64 based SoCs. As noted in the changelogs for the r8a777[89] changes, this introduces an incompatibility with pre-v4.14 kernels used with new DTBs. There is no run-time effect for other SoCs updated by this changeset." * r7s72100 (RZ/A1H) GR-Peach board - Add pin configuration subnode for ETHER pin group. This avoids relying on boot-loader configuration of these pins. - Enable ostm0 and ostm1 timers Jacopo Mondi says these are "to be used as clock source and clockevent source. The timers provides greater accuracy than the already enabled mtu2 one." - Correct leds node name indent - Enable MTU2 timer pulse unit Jacopo Mondi says "MTU2 multi-function/multi-channel timer/counter is not enabled for GR-Peach board. The timer is used as clock event source to schedule wake-ups, and without this enabled all sleeps not performed through busy waiting hang the board." * r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM - Add USB function support * r8a7745 (RZ/G1E) iW-RainboW-G22D development platform - Add USB2.0 Host support * r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform - Rework DT architecture and add DT for camera DB Fabrizio Castro says "Some of the serial interfaces are exposed on the camera daughter board. The camera daughter board can be connected to the carrier board by means of expansion connectors 1, 2 and 3. The carrier board may host an RZ/G1M or an RZ/G1N based SoM. While adding support for the serial interfaces on the camera daughter board we faced the dilemma of how to properly describe all of the possible HW configurations and how to maximize code reuse. The best option would be to use device tree overlays, however there is still some work to be done on that front before actually using them, therefore for the time being we decided to provide .dtsi files to describe the carrier board and the camera daughter board, and provide .dts files to describe the HW configurations we need to support." * r8a779[0-4] R-Car Gen2 SoCs - Use generic node name for VSP1 nodes Geert Uytterhoeven says "This patch series replaces the specific node names used for the VSP1 nodes by the preferred generic node names, cfr. commit |
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f97decac5f |
drm/msm: Support multiple ringbuffers
Add the infrastructure to support the idea of multiple ringbuffers. Assign each ringbuffer an id and use that as an index for the various ring specific operations. The biggest delta is to support legacy fences. Each fence gets its own sequence number but the legacy functions expect to use a unique integer. To handle this we return a unique identifier for each submission but map it to a specific ring/sequence under the covers. Newer users use a dma_fence pointer anyway so they don't care about the actual sequence ID or ring. The actual mechanics for multiple ringbuffers are very target specific so this code just allows for the possibility but still only defines one ringbuffer for each target family. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> |
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6bd5bb1ede |
phy: for 4.15
*) Add support in phy core to perform phy calibration *) Return NULL for optional PHY's even if CONFIG_GENERIC_PHY is not selected *) Add USB Phy driver for Broadcom STB SoCs *) Add support to force mediatek PHY with USB OTG function to enter a specific mode *) Calibrate rockchip-typec PHY according to docs *) Enable dual route feature for sun4i-usb in V3s SoC *) Use dr_mode dt property to enable otg capability in rcar-gen3-usb2 *) Add driver data to specify dedicated otg pins in rcar-gen3-usb2 driver *) Configure the RX equalizer of brcm-sata PHY *) Update pcie phy settings for ti-pipe3 phy *) Add set_mode callback in qcom-ufs-qmp-14nm phy *) Use PHY callbacks in phy-qcom-ufs instead of export APIs Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJZ8HRDAAoJEA5ceFyATYLZyFAP/R8kN02DtuvPTzXxgGYli1kC CNpFYBGwL4rq39C/zT7+8xBXamwCOpPWqQJ6M0HgkD3XX1Vg6htH0VdvND9nZsPk oSDenxPkDELyM6k5OqjGdWQCBEZdvoZqGHtuIsk4ZrZKVajvqBPAG2WI8tVBpiPL 27mwm/5QpXzXfNm1k8onXDqTpSBGmY1EcNvIgmon2Zl/qkWoKuNTpOv3w6JE/ktt YOxg9ScQCyw1LYx82hKF86aq0M9nQ5F+pN5o6c7oNFrotK5cE/Us3XTgKCVH+3sb wtbgHhDCCYeYShBr+msgPj8u8Jy596W6IcGFt2nuIm+ATL/qBZQyhSUtfzqPEf6k ShtJ05jTUHrM16jVDf+nDIkv9ENeSsUOoDJ7FKo4ht0miBE5fD3tmLcXP5NfOla6 PMJN4g+TF/5Ym6eB0mtlq41V5aBInbBr07wD+WFp4uNgdtBHVSRz0yRA2CNIZpww dhjoiAPjOeJlIeWMDJni7cvU6eAEV1hXRHB0+hPa0lQU3B7t4hZaROypzIwJd7Fu ZUetYfcKCmViRinr8O6Ym4DhMatlxPSLgD2R6VQhGYtThUEO57oLBPv5XMzAthwi PkigsXaO9fDCodECcNDO/PD0Zc6tUugRmiiD/UhVpSCQ+X1EsdYSrYBYtSwwMauC DqNvwPo3MExkMjFs68ZU =VvPn -----END PGP SIGNATURE----- Merge tag 'phy-for-4.15_v1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: phy: for 4.15 *) Add support in phy core to perform phy calibration *) Return NULL for optional PHY's even if CONFIG_GENERIC_PHY is not selected *) Add USB Phy driver for Broadcom STB SoCs *) Add support to force mediatek PHY with USB OTG function to enter a specific mode *) Calibrate rockchip-typec PHY according to docs *) Enable dual route feature for sun4i-usb in V3s SoC *) Use dr_mode dt property to enable otg capability in rcar-gen3-usb2 *) Add driver data to specify dedicated otg pins in rcar-gen3-usb2 driver *) Configure the RX equalizer of brcm-sata PHY *) Update pcie phy settings for ti-pipe3 phy *) Add set_mode callback in qcom-ufs-qmp-14nm phy *) Use PHY callbacks in phy-qcom-ufs instead of export APIs Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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faa865f18c |
clk/samsung updates for v4.15
Overall clk/samsung clean up and fixes. Removed remaining unused code after removal of exynos4212 SoC support; dropped internal data structure fields and related code for registering clkdev lookup entry for each possible clock object, clkdev aliases could still be defined if needed in a separate table; other minor fixes of the clock tree definitions. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJZ4K7OAAoJEE1bIKeAnHqLlFUP/12Mnb3KIeO4WvNewZupUETd 2BWpPHMS/4Al216I+RAZIgBU5lxx9xv0lMUeSfOWXwPMh/xReCY3SQ3N11KTE6DW 6PwZpXtkYUyJ9sakVMNonczljfuWKFleRBscqPy3DH2S1vzG611lmmE8QvMmie2O shKrRQOwN7lWIGSQFdu1aSa/9OsHM9xsmgGGcAWMcpXTm26/nZ4EZxd7OU3nB39G fBzqjIP8hrvDKUi4b4+5uQxaXTYN8HKTmteWJzlXtXglVR55Wu7DmXXK4eFDLsmh iE3lkUnFK2cgkQjANJeeF/GK19ZvIVjlzEGX66IrAUG8qTDSgLDCWJRxW6qwm9jl KrSyC4d1D6GfymcVWUe8drixdeimVpOxyg/FCzyJXA8jkWUfwJJvi4eqJ3inPbh7 5fv84bTxm4xOhWYOLWu4r0Z9GvxDl/DyeW5tJhkGh7ZSWBWng9f2FDZp9aloJf4K DPopqAt5e+8NCe1jyKCNLdDrZxlHp7xyYu+n/xTAVOxS/BZJ+bKvuGIp6b39dzhB LMdTwwuwDCneEINROH09FqqH7y+HqyG2vR7cFaiShzP02OE0YGu20WlhRykzajFj XhXwfDiGzgTiLjuCS3BbtuYlgFxWAmjo81/3nuJ8MTZYDaXLWuaGCWHYvSc2+oFy AiNNDhap38/ed2cLdsgl =VHBX -----END PGP SIGNATURE----- Merge tag 'clk-v4.15-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-next Pull Samsung clk driver updates from Sylwester Nawrocki: Overall clk/samsung clean up and fixes. Removed remaining unused code after removal of exynos4212 SoC support; dropped internal data structure fields and related code for registering clkdev lookup entry for each possible clock object, clkdev aliases could still be defined if needed in a separate table; other minor fixes of the clock tree definitions. * tag 'clk-v4.15-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk: clk: samsung: Remove obsolete clkdev alias support clk: samsung: Add explicit MPLL, EPLL clkdev aliases in S3C2443 driver clk: samsung: Rework clkdev alias handling in S3C2443 driver clk: samsung: Rework clkdev alias handling in Exynos5440 driver clk: samsung: Drop useless alias in Exynos5420 clk driver clk: samsung: Remove clkdev alias support in Exynos5250 clk driver clk: samsung: Remove double assignment of CLK_ARM_CLK in Exynos4 driver clk: samsung: Remove clkdev alias support in Exynos4 clk driver clk: samsung: Remove support for obsolete Exynos4212 CPU clock clk: samsung: Remove support for Exynos4212 SoCs in Exynos CLKOUT driver clk: samsung: Properly propagate flags in __PLL macro clk: samsung: Fix m2m scaler clock on Exynos542x clk: samsung: Delete a memory allocation error message in clk-cpu.c |
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1c59d04505 |
dt-bindings: gpio: uniphier: add UniPhier GPIO binding
This GPIO controller is used on UniPhier SoC family. The vendor specific property "socionext,interrupt-ranges" is for specifying interrupt mapping to the parent interrupt controller because the mapping is not contiguous. It works like "ranges", but transforms "interrupts" instead of "reg". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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55b20e8de9 |
dt-bindings: phy: Add PHY_TYPE_UFS definition
Add definition for UFS phy type. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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4cf8f811c6 |
clk: meson: gxbb: Add VPU and VAPB clockids
Add the clkids for the clocks feeding the Video Processing Unit. Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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2cbfca66ba |
gpio: Fix loose spelling
Literally. I expect "lose" was meant here, rather than "loose", though you could feasibly use a somewhat uncommon definition of "loose" to mean what would be meant by "lose": "Loose the hounds" for instance, as in "Release the hounds". Substituting in "value" for "hounds" gives "release the value", and makes some sense, but futher substituting back to loose gives "loose the value" which overall just seems a bit anachronistic. Instead, use modern, pragmatic English and save a character. Cc: Russell Currey <ruscur@russell.cc> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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092283190a |
Device tree changes for omaps for v4.15 merge window to improve
support for omap35xx-evm, am34xx-epos-evm and dra7: - A series of changes to fix support for omap35xx-evm - A series of changes to add earlycon support for n8x0, pandaboard and omap5 boards - A series of changes for am43xx-epos-evm pinctrl modes for default and sleep states - A series of changes to correct pbias regulator voltage for dra7 from 3V to 3.3V - Use microchip compatible instead of deprecated mcp compatible for mcp23017 -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlng604RHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXPLCQ//cPpaHUB7wW0jKLVX3J0cUQt5lWjNv/16 3W/ap6TPIwNmkdeF8YySt22exHNXtgPjd6XuIK5MPfx5B/4Z1llEjet4kjb01Jmw j2A7QeQln0lqWfAXux4Rw7G7bnmN8Zsph8BYKz5K2vYfAca1Y+xhlNPRRSmsD7Wx +zHR87eKQ+WEL8x+7iBnw5tgqKvdKVyqmkKHm1y/Hr4DqewuOTgvVZJ6FnxG6hGA PeNnQrM1GOLGxU28tlROuGnaUTT1knBQcoJy2lWwxx4on2S/XzAMcetEq8e0RR2C 0WOotWAQPSPicncr17Gmx7kNewcAwJ+bnNmbkXsuIsGksOkcil+Q+H0Y5gzImYQu XBRbuhLwqrFxqSfOyQIppFa0w5KGF7Mm9zTyjaO9DshpTny9gwsxJK2r0rh6ucbq Rt3WuJmJwdMZ9XT8iBRJonkGle4Q6dmtuHu0pqlJzjclfLwvLUoxNZwc0k0e5g2f a/PGNUj0rqSo6AgUfjlvQU8M/f3T9X0bRIIE7zWbIo8P0qxJPUDBnz+CHHADVD4G Yn/rM1omIfcMCIOKiY3l53Nclr6Nld2U1Mg4tMiG32AkE8lefU4q1dlfUblO/Vrw wAAoG54IMH4ekv5ljSeAKR0cB+a6PzlLwZivwZaN9/mUuMBRYlFSQEhRD1KdhZbR L/c9isoMAqk= =xWf5 -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Pull "device tree changes for omaps for v4.15 merge window" from Tony Lindgren: Device tree changes for omaps for v4.15 merge window to improve support for omap35xx-evm, am34xx-epos-evm and dra7: - A series of changes to fix support for omap35xx-evm - A series of changes to add earlycon support for n8x0, pandaboard and omap5 boards - A series of changes for am43xx-epos-evm pinctrl modes for default and sleep states - A series of changes to correct pbias regulator voltage for dra7 from 3V to 3.3V - Use microchip compatible instead of deprecated mcp compatible for mcp23017 * tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits) ARM: dts: omap3: Replace deprecated mcp prefix ARM: dts: dra7-evm: Move pcie RC node to common file ARM: dts: omap5: Increase max-voltage of pbias regulator ARM: dts: dra7: Increase max-voltage of pbias regulator ARM: dts: am43xx-epos-evm: Add default pinmux for unused pins ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for usb2_phy1 and usb2_phy2 ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for uart0 ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for matrix_keypad0 ARM: dts: am43xx-epos-evm: Add sleep pinmux for mmc1 ARM: dts: am43xx-epos-evm: Add sleep pinmux for pixcir_ts ARM: dts: am43xx-epos-evm: Add sleep pinmux for gpmc ARM: dts: am43xx-epos-evm: Add sleep pinmux for ecap0 ARM: dts: am43xx-epos-evm: Add sleep pinmux for qspi1 ARM: dts: am43xx-epos-evm: Add sleep pinmux for spi0 and spi1 ARM: dts: am43xx: Introduce additional pinmux definitions for DS0 ARM: dts: Configure earlycon for omap5-common ARM: dts: Configure earlycon for pandaboard ARM: dts: Configure earlycon for n8x0 ARM: dts: omap3-evm: Add DSS {vdds_dsi,vdda_video}-supply references ARM: dts: omap3: Add Sharp LS037V7DW01 'envdd' supply ... |
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7d738dbbe2 |
Merge tag 'stm32-dt-for-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/soc
Pull "STM32 DT updates for v4.15, round 1" from Alexandre Torgue: Highlights: ---------- -Add I2C1 support on STM32F746 SoC -Enable I2C1 on STM32F746 eval board -Add Timers support on STM32F746 SoC -Add USB HS and FS supports on STM32F746 Soc -Enable USB HS on STM32F746 disco and eval boards -Enable USB FS en STM32F746 disco board -Add Vrefbuf to STM32H743 SoC -Add LPTIMERS support on STM32H743 SoC -Add DMAMUX support on STM32H743 SoC -Enable STM32H743 clock driver -Add MDMA support on STM32H743 SoC -Change pinctrl pinmux entries for all SoC. * tag 'stm32-dt-for-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: Add MDMA support for STM32H743 SoC ARM: dts: stm32: Enable USB FS on stm32f746-disco ARM: dts: stm32: Add USB FS support for STM32F746 MCU ARM: dts: stm32: Enable USB HS on stm32f746-disco ARM: dts: stm32: Enable USB HS on stm32746g-eval ARM: dts: stm32: Add USB HS support for STM32F746 MCU ARM: dts: stm32: change pinctrl bindings definition ARM: dts: stm32: Enable STM32H743 clock driver ARM: dts: stm32: fix hse clock frequency on STM32H743 Eval board ARM: dts: stm32: add Timers driver for stm32f746 MCU ARM: dts: stm32: Add DMAMUX support for STM32H743 SoC ARM: dts: stm32: Add lptimer definitions to stm32h743 ARM: dts: stm32: add vrefbuf to stm32h743 ARM: dts: stm32: Add I2C1 support for STM32F746 eval board ARM: dts: stm32: Add I2C1 support for STM32F746 SoC |
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c305cf3388 |
Merge tag 'renesas-dt-bindings-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC DT Bindings Updates for v4.15" from Simon Horman: * Consistently do not use ';' in documentation of compat strings for boards. A misture of using and not using a trailing ';' had krept in over time with not using being dominant. * Document bindings for - Eagle board and r8a77970 (V3M) SoC bindings. Eagle is a board for the V3M SoC - Document Kingfisher board bindings. Kingfisher is an extension board for the H3ULCB and M3ULCB boards. * Add r8a77970 (V3M) SYSC power domain definitions Add macros usable by the device tree sources to reference r8a77970 SYSC power domains by index. * Add Renesas SoC DT bindings doc to Renesas ARM section of MAINTAINERS file * Drop bogus node name suffix from example of /renesas,dw-hdmi binding * Document APMU and SMP enable method for r8a7745 (RZ/G1E) SoC * tag 'renesas-dt-bindings-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: remove inconsistent ; from documentation arm64: renesas: document Eagle board bindings arm: shmobile: Document Kingfisher board DT bindings dt-bindings: power: add R8A77970 SYSC power domain definitions MAINTAINERS: Add Renesas SoC DT bindings doc to Renesas ARM sections ARM: shmobile: Document R-Car V3M SoC DT bindings dt-bindings: display: renesas: dw-hdmi: Drop bogus node name suffix dt-bindings: apmu: Document r8a7745 support |
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3e09b155d5 |
dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal
In Tegra186, the BPMP (Boot and Power Management Processor) implements an interface that is used to read system temperatures, including CPU cluster and GPU temperatures. This binding describes the thermal sensor that is exposed by BPMP. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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4328a2186e |
clk: sunxi-ng: sun4i: Export video PLLs
The video PLLs are used directly by the HDMI controller. Export them so that we can use them in our DT node. Signed-off-by: Jonathan Liu <net147@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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4d1dc40185 |
dt-bindings: clock: tegra: Add sor1_out clock
The sor1_src clock implemented on Tegra210 is modelled the wrong way around, which causes some issues with HDMI and DP support. This clock implementation is provided by BPMP on Tegra186, which models this in a more correct way. Since this introduces incompatibilities between the two SoC generations which we want to avoid, the Tegra210 will be fixed in subsequent patches. This change adds sor1_out as an alias for sor1_src. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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162d58c26d |
ARM: dts: stm32: change pinctrl bindings definition
Initially each pin was declared in "include/dt-bindings/stm32<SOC>-pinfunc.h" and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX). Since this approach was approved, the number of supported MCU has increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new file in "include/dt-bindings" each time a new STM32 SOC arrives I propose a new approach which consist to use a macro to define pin muxing in device tree. All STM32 will use the common macro to define pinmux. Furthermore, it will make STM32 maintenance and integration of new SOC easier . Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com> Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <robh@kernel.org> |
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44842cc8a8 |
dt-bindings: clk: r7s72100: Add missing I and G clocks
Add the missing definitions for the I (CPU) and G (Image Processing) clocks, so these clocks can be referred to from device nodes in DT. Note that these clocks are already fully supported otherwise (DT bindings, Linux driver, r7s72100.dtsi), they were just omitted from the header file. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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8ca8ac1024 |
clk: samsung: Add dt bindings for Exynos4412 ISP clock controller
Some registers for the Exynos 4412 ISP (Camera subsystem) clocks are located in the ISP power domain. Because those registers are also located in a different memory region than the main clock controller, support for them can be provided by a separate clock controller. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> |
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4e07533f30 |
clk: rockchip: add more rk3188 graphics clock ids
Add ids for cif, v{d/e}pu clocks on rk3188. ACLK_CIF does get a needed 1 at it's end but that should be safe because no driver for the camera interface has surfaced so far and the old vendor kernels for these socs are based on linux-3.0 and still used board files then, so there really are no previous users anywhere to be found. Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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8c04f7a3e3 |
clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs
Signed-off-by: Romain Perier <romain.perier@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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45d882daf8 |
clk: samsung: Add explicit MPLL, EPLL clkdev aliases in S3C2443 driver
S3C2443 platform still use non-dt based lookup in some of its drivers to get MPLL and EPLL clocks. Till now it worked only because PLL() macro implicitly created aliases for all instantiated clocks. This feature will be removed, so explicitly create aliases for MPLL and EPLL clocks. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> |
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e891a5a401 |
pinctrl: meson-gx: TEST_N belongs to the AO controller
On meson-gx platforms, TEST_N has been incorrectly declared in the EE controller while it belongs to AO controller. Move the pin to the appropriate controller Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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7f4fbf79f4 |
reset: mediatek: add reset controller dt-bindings required header for MT7622 SoC
Add the reset controller dt-bindings exported from infracfg, pericfg, hifsys and ethsys which could be found on MT7622 SoC. So that we can reference them from within a device-tree file. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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130c28daf0 |
ARM: dts: am43xx: Introduce additional pinmux definitions for DS0
AM43xx platform pinmux registers contain bits to set state during suspend (DS0), add these bit definitions here. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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80815004a4 |
clk: sunxi-ng: sun6i: Export video PLLs
The 2x outputs of the 2 video PLL clocks are directly used by the
HDMI controller block.
Export them so they can be referenced in the device tree.
Fixes:
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ecadea00f5 |
dt-bindings: clock: Add R8A77970 CPG core clock definitions
Add macros usable by the device tree sources to reference the R8A77970 CPG core clocks by index. The data come from the table 8.2c of R-Car Series, 3rd Generation User's Manual: Hardware (Rev. 0.55, Jun. 30, 2017). Based on the original (and large) patch by Daisuke Matsushita <daisuke.matsushita.ns@hitachi.com>. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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13541226dc |
ARC: reset: remove the misleading v1 suffix all over
There is no plan yet to do a v2 board. And even if we were to do it only some IPs would actually change, so it be best to add suffixes at that point, not now ! Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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833bdb47c8 |
dt-bindings: power: add R8A77970 SYSC power domain definitions
Add macros usable by the device tree sources to reference R8A77970 SYSC power domains by index. Based on the original (and large) patch by Daisuke Matsushita <daisuke.matsushita.ns@hitachi.com>. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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7318413077 |
Merge branch '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "This is the main pull request for 4.14 for MIPS; below a summary of the non-merge commits: CM: - Rename mips_cm_base to mips_gcr_base - Specify register size when generating accessors - Use BIT/GENMASK for register fields, order & drop shifts - Add cluster & block args to mips_cm_lock_other() CPC: - Use common CPS accessor generation macros - Use BIT/GENMASK for register fields, order & drop shifts - Introduce register modify (set/clear/change) accessors - Use change_*, set_* & clear_* where appropriate - Add CM/CPC 3.5 register definitions - Use GlobalNumber macros rather than magic numbers - Have asm/mips-cps.h include CM & CPC headers - Cluster support for topology functions - Detect CPUs in secondary clusters CPS: - Read GIC_VL_IDENT directly, not via irqchip driver DMA: - Consolidate coherent and non-coherent dma_alloc code - Don't use dma_cache_sync to implement fd_cacheflush FPU emulation / FP assist code: - Another series of 14 commits fixing corner cases such as NaN propgagation and other special input values. - Zero bits 32-63 of the result for a CLASS.D instruction. - Enhanced statics via debugfs - Do not use bools for arithmetic. GCC 7.1 moans about this. - Correct user fault_addr type Generic MIPS: - Enhancement of stack backtraces - Cleanup from non-existing options - Handle non word sized instructions when examining frame - Fix detection and decoding of ADDIUSP instruction - Fix decoding of SWSP16 instruction - Refactor handling of stack pointer in get_frame_info - Remove unreachable code from force_fcr31_sig() - Convert to using %pOF instead of full_name - Remove the R6000 support. - Move FP code from *_switch.S to *_fpu.S - Remove unused ST_OFF from r2300_switch.S - Allow platform to specify multiple its.S files - Add #includes to various files to ensure code builds reliable and without warning.. - Remove __invalidate_kernel_vmap_range - Remove plat_timer_setup - Declare various variables & functions static - Abstract CPU core & VP(E) ID access through accessor functions - Store core & VP IDs in GlobalNumber-style variable - Unify checks for sibling CPUs - Add CPU cluster number accessors - Prevent direct use of generic_defconfig - Make CONFIG_MIPS_MT_SMP default y - Add __ioread64_copy - Remove unnecessary inclusions of linux/irqchip/mips-gic.h GIC: - Introduce asm/mips-gic.h with accessor functions - Use new GIC accessor functions in mips-gic-timer - Remove counter access functions from irq-mips-gic.c - Remove gic_read_local_vp_id() from irq-mips-gic.c - Simplify shared interrupt pending/mask reads in irq-mips-gic.c - Simplify gic_local_irq_domain_map() in irq-mips-gic.c - Drop gic_(re)set_mask() functions in irq-mips-gic.c - Remove gic_set_polarity(), gic_set_trigger(), gic_set_dual_edge(), gic_map_to_pin() and gic_map_to_vpe() from irq-mips-gic.c. - Convert remaining shared reg access, local int mask access and remaining local reg access to new accessors - Move GIC_LOCAL_INT_* to asm/mips-gic.h - Remove GIC_CPU_INT* macros from irq-mips-gic.c - Move various definitions to the driver - Remove gic_get_usm_range() - Remove __gic_irq_dispatch() forward declaration - Remove gic_init() - Use mips_gic_present() in place of gic_present and remove gic_present - Move gic_get_c0_*_int() to asm/mips-gic.h - Remove linux/irqchip/mips-gic.h - Inline __gic_init() - Inline gic_basic_init() - Make pcpu_masks a per-cpu variable - Use pcpu_masks to avoid reading GIC_SH_MASK* - Clean up mti, reserved-cpu-vectors handling - Use cpumask_first_and() in gic_set_affinity() - Let the core set struct irq_common_data affinity microMIPS: - Fix microMIPS stack unwinding on big endian systems MIPS-GIC: - SYNC after enabling GIC region NUMA: - Remove the unused parent_node() macro R6: - Constify r2_decoder_tables - Add accessor & bit definitions for GlobalNumber SMP: - Constify smp ops - Allow boot_secondary SMP op to return errors VDSO: - Drop gic_get_usm_range() usage - Avoid use of linux/irqchip/mips-gic.h Platform changes: Alchemy: - Add devboard machine type to cpuinfo - update cpu feature overrides - Threaded carddetect irqs for devboards AR7: - allow NULL clock for clk_get_rate BCM63xx: - Fix ENETDMA_6345_MAXBURST_REG offset - Allow NULL clock for clk_get_rate CI20: - Enable GPIO and RTC drivers in defconfig - Add ethernet and fixed-regulator nodes to DTS Generic platform: - Move Boston and NI 169445 FIT image source to their own files - Include asm/bootinfo.h for plat_fdt_relocated() - Include asm/time.h for get_c0_*_int() - Include asm/bootinfo.h for plat_fdt_relocated() - Include asm/time.h for get_c0_*_int() - Allow filtering enabled boards by requirements - Don't explicitly disable CONFIG_USB_SUPPORT - Bump default NR_CPUS to 16 JZ4700: - Probe the jz4740-rtc driver from devicetree Lantiq: - Drop check of boot select from the spi-falcon driver. - Drop check of boot select from the lantiq-flash MTD driver. - Access boot cause register in the watchdog driver through regmap - Add device tree binding documentation for the watchdog driver - Add docs for the RCU DT bindings. - Convert the fpi bus driver to a platform_driver - Remove ltq_reset_cause() and ltq_boot_select( - Switch to a proper reset driver - Switch to a new drivers/soc GPHY driver - Add an USB PHY driver for the Lantiq SoCs using the RCU module - Use of_platform_default_populate instead of __dt_register_buses - Enable MFD_SYSCON to be able to use it for the RCU MFD - Replace ltq_boot_select() with dummy implementation. Loongson 2F: - Allow NULL clock for clk_get_rate Malta: - Use new GIC accessor functions NI 169445: - Add support for NI 169445 board. - Only include in 32r2el kernels Octeon: - Add support for watchdog of 78XX SOCs. - Add support for watchdog of CN68XX SOCs. - Expose support for mips32r1, mips32r2 and mips64r1 - Enable more drivers in config file - Add support for accessing the boot vector. - Remove old boot vector code from watchdog driver - Define watchdog registers for 70xx, 73xx, 78xx, F75xx. - Make CSR functions node aware. - Allow access to CIU3 IRQ domains. - Misc cleanups in the watchdog driver Omega2+: - New board, add support and defconfig Pistachio: - Enable Root FS on NFS in defconfig Ralink: - Add Mediatek MT7628A SoC - Allow NULL clock for clk_get_rate - Explicitly request exclusive reset control in the pci-mt7620 PCI driver. SEAD3: - Only include in 32 bit kernels by default VoCore: - Add VoCore as a vendor t0 dt-bindings - Add defconfig file" * '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (167 commits) MIPS: Refactor handling of stack pointer in get_frame_info MIPS: Stacktrace: Fix microMIPS stack unwinding on big endian systems MIPS: microMIPS: Fix decoding of swsp16 instruction MIPS: microMIPS: Fix decoding of addiusp instruction MIPS: microMIPS: Fix detection of addiusp instruction MIPS: Handle non word sized instructions when examining frame MIPS: ralink: allow NULL clock for clk_get_rate MIPS: Loongson 2F: allow NULL clock for clk_get_rate MIPS: BCM63XX: allow NULL clock for clk_get_rate MIPS: AR7: allow NULL clock for clk_get_rate MIPS: BCM63XX: fix ENETDMA_6345_MAXBURST_REG offset mips: Save all registers when saving the frame MIPS: Add DWARF unwinding to assembly MIPS: Make SAVE_SOME more standard MIPS: Fix issues in backtraces MIPS: jz4780: DTS: Probe the jz4740-rtc driver from devicetree MIPS: Ci20: Enable RTC driver watchdog: octeon-wdt: Add support for 78XX SOCs. watchdog: octeon-wdt: Add support for cn68XX SOCs. watchdog: octeon-wdt: File cleaning. ... |
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f60a2abfdb |
The diff is dominated by the Allwinner A10/A20 SoCs getting converted to
the sunxi-ng framework. Otherwise, the heavy hitters are various drivers for SoCs like AT91, Amlogic, Renesas, and Rockchip. There are some other new clk drivers in here too but overall this is just a bunch of clk drivers for various different pieces of hardware and a collection of non-critical fixes for clk drivers. New Drivers: - Allwinner R40 SoCs - Renesas R-Car Gen3 USB 2.0 clock selector PHY - Atmel AT91 audio PLL - Uniphier PXs3 SoCs - ARC HSDK Board PLLs - AXS10X Board PLLs - STMicroelectronics STM32H743 SoCs Removed Drivers: - Non-compiling mb86s7x support Updates: - Allwinner A10/A20 SoCs converted to sunxi-ng framework - Allwinner H3 CPU clk fixes - Renesas R-Car D3 SoC - Renesas V2H and M3-W modules - Samsung Exynos5420/5422/5800 audio fixes - Rockchip fractional clk approximation fixes - Rockchip rk3126 SoC support within the rk3128 driver - Amlogic gxbb CEC32 and sd_emmc clks - Amlogic meson8b reset controller support - IDT VersaClock 5P49V5925/5P49V6901 support - Qualcomm MSM8996 SMMU clks - Various 'const' applications for struct clk_ops - si5351 PLL reset bugfix - Uniphier audio on LD11/LD20 and ethernet support on LD11/LD20/Pro4/PXs2 - Assorted Tegra clk driver fixes -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJZuIAQAAoJEK0CiJfG5JUlUMQQAKFwCZRfTzz0m9jJ9s1XZSR/ vldNAEUGm+Mz0W84xIzFqaT0UI1+SJK4e9Du+EN6phcCD5yVB0JS2EtRa84Bku/i Zy6AYSUNbGjx94HPwIq1hKt+UOIfBiNbJKMnkoCbEyYPA/TiWzr8JR5GyLjwYhPq IZHSvKqUKM3h2nr+MtpFJIIk8DlkLARRca4CCqa5i2Oqj6B8rjQQAq7TaLAM3ASN tSFIW2vdmWD+om2L57WHhwBgaYnUB4jBCRWkFZRsO4ZIRgm4VpePmosy2UTZ7fqb kEaW2bPuv65zUHpvjHG6yXo+yh0yk1fBsXG/joXgJ4oOmNzsIgnCZzPnGUC1ccms QdK/qhdIXsdgiR2DZtYuzUHji8+TNIPPjfAFyJjUwxDBXpqzXvsvltx2a1hg/rUP VDvTL2OnoGtrW2bXPufCkxBsyejJ4RqC5riMJws5xgMkqKKUajiLovPeuL6+8kU+ ncqWYiIkEvHNKpmW511G/g+ClLk89zgXfxKFWWR+iDjSvA0hgaiRj1V3C2HIyS8f CLpalf6ao2+O008rUiaiqJyxWuwLujcdYokay2HXvTYc45rXrVwvlaDajxqs2eer lekUA4ZbX2g6qvB0lna6PNlv8JLQ1XPdzhWD2eeQIi7JgVSgwg++kUJqglsuai56 eg5zNo6891GL9zFW10/A =0JbT -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The diff is dominated by the Allwinner A10/A20 SoCs getting converted to the sunxi-ng framework. Otherwise, the heavy hitters are various drivers for SoCs like AT91, Amlogic, Renesas, and Rockchip. There are some other new clk drivers in here too but overall this is just a bunch of clk drivers for various different pieces of hardware and a collection of non-critical fixes for clk drivers. New Drivers: - Allwinner R40 SoCs - Renesas R-Car Gen3 USB 2.0 clock selector PHY - Atmel AT91 audio PLL - Uniphier PXs3 SoCs - ARC HSDK Board PLLs - AXS10X Board PLLs - STMicroelectronics STM32H743 SoCs Removed Drivers: - Non-compiling mb86s7x support Updates: - Allwinner A10/A20 SoCs converted to sunxi-ng framework - Allwinner H3 CPU clk fixes - Renesas R-Car D3 SoC - Renesas V2H and M3-W modules - Samsung Exynos5420/5422/5800 audio fixes - Rockchip fractional clk approximation fixes - Rockchip rk3126 SoC support within the rk3128 driver - Amlogic gxbb CEC32 and sd_emmc clks - Amlogic meson8b reset controller support - IDT VersaClock 5P49V5925/5P49V6901 support - Qualcomm MSM8996 SMMU clks - Various 'const' applications for struct clk_ops - si5351 PLL reset bugfix - Uniphier audio on LD11/LD20 and ethernet support on LD11/LD20/Pro4/PXs2 - Assorted Tegra clk driver fixes" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (120 commits) clk: si5351: fix PLL reset ASoC: atmel-classd: remove aclk clock ASoC: atmel-classd: remove aclk clock from DT binding clk: at91: clk-generated: make gclk determine audio_pll rate clk: at91: clk-generated: create function to find best_diff clk: at91: add audio pll clock drivers dt-bindings: clk: at91: add audio plls to the compatible list clk: at91: clk-generated: remove useless divisor loop clk: mb86s7x: Drop non-building driver clk: ti: check for null return in strrchr to avoid null dereferencing clk: Don't write error code into divider register clk: uniphier: add video input subsystem clock clk: uniphier: add audio system clock clk: stm32h7: Add stm32h743 clock driver clk: gate: expose clk_gate_ops::is_enabled clk: nxp: clk-lpc32xx: rename clk_gate_is_enabled() clk: uniphier: add PXs3 clock data clk: hi6220: change watchdog clock source clk: Kconfig: Name RK805 in Kconfig for COMMON_CLK_RK808 clk: cs2000: Add cs2000_set_saved_rate ... |
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e90937e756 |
ARM: arm64: Devicetree updates for v4.14
As usual, device tree updates is the bulk of our material in this merge window. This time around, 559 patches affecting both 32- and 64-bit platforms. Changes are too many to list individually, but some of the larger ones: New platform/SoC support: - Automotive: + Renesas R-Car D3 (R8A77995) + TI DT76x + MediaTek mt2712e - Communication-oriented: + Qualcomm IPQ8074 + Broadcom Stingray + Marvell Armada 8080 - Set top box: + Uniphier PXs3 Besides some vendor reference boards for the SoC above, there are also several new boards/machines: - TI AM335x Moxa UC-8100-ME-T open platform - TI AM57xx Beaglebone X15 Rev C - Microchip/Atmel sama5d27 SoM1 EK - Broadcom Raspberry Pi Zero W - Gemini-based D-Link DIR-685 router - Freescale i.MX6: + Toradex Apalis module + Apalis and Ixora carrier boards + Engicam GEAM6UL Starter Kit - Freescale i.MX53-based Beckhoff CX9020 Embedded PC - Mediatek mt7623-based BananaPi R2 - Several Allwinner-based single-board computers: + Cubietruck plus + Bananapi M3, M2M and M64 + NanoPi A64 + A64-OLinuXino + Pine64 - Rockchip RK3328 Pine64/Rock64 board support - Rockchip RK3399 boards: + RK3399 Sapphire module on Excavator carrier (RK3399 reference design) + Theobroma Systems RK3399-Q7 SoM - ZTE ZX296718 PCBOX Board -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZtdtjAAoJEIwa5zzehBx3PzgP/iCQyUk5wklG9E5YNl8a9m/o djBkelabTm52s5ZTu6Awsq5rx8jUMqcb0vo+9v9yPWFG6On2oTZyZ/rE1Wbj3+gG +ENVyRgxmzYDTXqQLiu1UOV9wSA0gHwQCRZvE7i32NNfLu+tAsvu9e/AuznQ1xhR 4G7dGCRRlRkZkrVKrJ7JjklmW578pFQkZLmz8K2nWqwh1tKpK3fY19SrwUKx+YCR tnMPYAPjB5zxR9tfcDS4FUKdiC7dMiMzZNGiYl5a26X6wsNR7xYtNzFMaGZn1ecG PwOS+DAnj8J+AfpQBLWu9xytHbJdqITRuNcF+OXNVW9TKmb0syf7VgRUDkhjIMxP aGZc4Q6PwgTRwnX+w6fTzJTyk+uXtieCicZaaZ1jlgcQq0pfbzJ1vZMpq4aoVlxU mS84i1bd8AiavmHuyIRNB3/T4aAsVhTUIBndXluKV8yWroXhAukfI1YmGr1Eux7C fy5pPeDqk9lXR3bqIhfnaLoVsApEXTOWMC8X48vwfaQHiCGR9JJwpfsGcaNi1bri Col1qRzkXWGA6KqTWtpo+o12rYuMGc0mpZTCmejKuBoxMXOU+wLyJYgaxa7pyesX S5rLaIe2l9ppXHjjEERp7AzczzLS5W20Tez5vYnZAQb1dYuJzwXwiATt8NT+XG3V Wu92UwUfjxYk8vGz48ph =R45j -----END PGP SIGNATURE----- Merge tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM/arm64 Devicetree updates from Olof Johansson: "As usual, device tree updates is the bulk of our material in this merge window. This time around, 559 patches affecting both 32- and 64-bit platforms. Changes are too many to list individually, but some of the larger ones: New platform/SoC support: - Automotive: + Renesas R-Car D3 (R8A77995) + TI DT76x + MediaTek mt2712e - Communication-oriented: + Qualcomm IPQ8074 + Broadcom Stingray + Marvell Armada 8080 - Set top box: + Uniphier PXs3 Besides some vendor reference boards for the SoC above, there are also several new boards/machines: - TI AM335x Moxa UC-8100-ME-T open platform - TI AM57xx Beaglebone X15 Rev C - Microchip/Atmel sama5d27 SoM1 EK - Broadcom Raspberry Pi Zero W - Gemini-based D-Link DIR-685 router - Freescale i.MX6: + Toradex Apalis module + Apalis and Ixora carrier boards + Engicam GEAM6UL Starter Kit - Freescale i.MX53-based Beckhoff CX9020 Embedded PC - Mediatek mt7623-based BananaPi R2 - Several Allwinner-based single-board computers: + Cubietruck plus + Bananapi M3, M2M and M64 + NanoPi A64 + A64-OLinuXino + Pine64 - Rockchip RK3328 Pine64/Rock64 board support - Rockchip RK3399 boards: + RK3399 Sapphire module on Excavator carrier (RK3399 reference design) + Theobroma Systems RK3399-Q7 SoM - ZTE ZX296718 PCBOX Board" * tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (559 commits) ARM: dts: at91: at91sam9g45: add AC97 arm64: dts: marvell: mcbin: enable more networking ports arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node arm64: dts: marvell: add TX interrupts for PPv2.2 arm64: dts: uniphier: add PXs3 SoC support ARM: dts: uniphier: add pinctrl groups of ethernet phy mode ARM: dts: uniphier: fix size of sdctrl nodes ARM: dts: uniphier: add AIDET nodes arm64: dts: uniphier: fix size of sdctrl node arm64: dts: uniphier: add AIDET nodes Revert "ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2" arm64: dts: uniphier: add reset controller node of analog amplifier arm64: dts: marvell: add Device Tree files for Armada-8KP arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM dt-bindings: add rk3399-q7 SoM ARM: dts: rockchip: enable usb for rv1108-evb ARM: dts: rockchip: add usb nodes for rv1108 SoCs dt-bindings: update grf-binding for rv1108 SoCs ARM: dts: aspeed-g4: fix AHB window size of the SMC controllers ... |
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ae46654bcf |
ARM: SoC driver updates for v4.14
This branch contains platform-related driver updates for ARM and ARM64. Among them: - Reset driver updates: + New API for dealing with arrays of resets + Make unimplemented {de,}assert return success on shared resets + MSDKv1 driver + Removal of obsolete Gemini reset driver + Misc updates for sunxi and Uniphier - SoC drivers: + Platform SoC driver registration on Tegra + Shuffle of Qualcomm drivers into a submenu + Allwinner A64 support for SRAM + Renesas R-Car R3 support + Power domains for Rockchip RK3366 - Misc updates and smaller fixes for TEE and memory driver subsystems -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZtdt7AAoJEIwa5zzehBx3EboP/jR2T9lrMavXR1zL48L14yJb S+fiJlrX1Kr42UF4PQvsfs+uTqOLmycrPVFkMb6IwoUPzQ9UCOSoiMzYm2b7ZPvt uIesHhdM3/xun6wKfieN8GmNA1yDVynTxo0TTYDw5ha7I6s2GHgw0GSFzy3wm0Qg KzerAO3gzf3L5XsKR0cai3IXNjHO9ubpFG1ReR09da28nPElP8ggWg0KnqdO76Ch BGpFj78EC875ZNqwHgnspUqgGDJnBjig3m/uA4FWA0G9Jl38tCyKTZfUR7cEraoV kyCgBlR/UrI8eXVTyEy5k5iTsQ3A1VhX4rGjyH+5NZHTs1yWr4+RDND/qeGl9tSo VASuOtH6Rc3vdUDpHPBNAFNQH8fwwDoKf96dvN1tiffsx6LSKb//NyOfkXzKOtR6 CP5raYfX4YktLtHq0XVTZ/6r3XmLcTHzElR/dCFpQOFcTOYii0pWtfcWouahbZ1w dhoBX/dbNq37MfzrxtHN2VTIEHpn2GU7u+ZGkp2ArokD58BAft/M3Xee1cDnF75g ZDwe5eNFT8aBZKaY7zwG8cdxiw9kACAivDRwW+zgpfUr39c+d0+QmVfnfJh4EGXK Ri6yr2EfBWK6jw3cwkdSyyt7iSzIkB+RiuuD1MjpYhWzAvoDpzqkXYukFGbpXnuy vUFHNuP1ocUsRtCs8mm1 =yBzS -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "This branch contains platform-related driver updates for ARM and ARM64. Among them: - Reset driver updates: + New API for dealing with arrays of resets + Make unimplemented {de,}assert return success on shared resets + MSDKv1 driver + Removal of obsolete Gemini reset driver + Misc updates for sunxi and Uniphier - SoC drivers: + Platform SoC driver registration on Tegra + Shuffle of Qualcomm drivers into a submenu + Allwinner A64 support for SRAM + Renesas R-Car R3 support + Power domains for Rockchip RK3366 - Misc updates and smaller fixes for TEE and memory driver subsystems" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) firmware: arm_scpi: fix endianness of dev_id in struct dev_pstate_set soc/tegra: fuse: Add missing semi-colon soc/tegra: Restrict SoC device registration to Tegra drivers: soc: sunxi: add support for A64 and its SRAM C drivers: soc: sunxi: add support for remapping func value to reg value drivers: soc: sunxi: fix error processing on base address when claiming dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C bus: sunxi-rsb: Enable by default for ARM64 soc/tegra: Register SoC device firmware: tegra: set drvdata earlier memory: Convert to using %pOF instead of full_name soc: Convert to using %pOF instead of full_name bus: Convert to using %pOF instead of full_name firmware: Convert to using %pOF instead of full_name soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC soc: mediatek: add header files required for MT7622 SCPSYS dt-binding soc: mediatek: reduce code duplication of scpsys_probe across all SoCs dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC reset: uniphier: add analog amplifiers reset control reset: uniphier: add video input subsystem reset control ... |
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4dfc278803 |
IOMMU Updates for Linux v4.14
Slightly more changes than usual this time: - KDump Kernel IOMMU take-over code for AMD IOMMU. The code now tries to preserve the mappings of the kernel so that master aborts for devices are avoided. Master aborts cause some devices to fail in the kdump kernel, so this code makes the dump more likely to succeed when AMD IOMMU is enabled. - Common flush queue implementation for IOVA code users. The code is still optional, but AMD and Intel IOMMU drivers had their own implementation which is now unified. - Finish support for iommu-groups. All drivers implement this feature now so that IOMMU core code can rely on it. - Finish support for 'struct iommu_device' in iommu drivers. All drivers now use the interface. - New functions in the IOMMU-API for explicit IO/TLB flushing. This will help to reduce the number of IO/TLB flushes when IOMMU drivers support this interface. - Support for mt2712 in the Mediatek IOMMU driver - New IOMMU driver for QCOM hardware - System PM support for ARM-SMMU - Shutdown method for ARM-SMMU-v3 - Some constification patches - Various other small improvements and fixes -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJZtCFNAAoJECvwRC2XARrjZnQP/AxC/ezQpq82HbegF4sM/cVE Ep7TeTqodEl75FS/6txe2wU0pwodqk/LB9ajfQZUbE1w8vKsNEqi5qf4ZYHGoxYI 5bWyjJBzKIlwENH5lsBpQNt6XLevrYmRsFy7F0tRYy+qPQq8k+js2i7/XkCL3q7L 3xklF847RRoITaTOhhaROx1pF23dSMEsS2XGuWHcZfjORtep4wcFKzd/2SvlCWCo P2bRU7jBzfJuuGSA80gaiUbDmrULTUfYuZNp7njASzCgsDmagERtvDEpdoXPNNSp u6s4LjU1Dp3fgr6g6cFRO7B6JUbWd619nwo9so/c/wZN54yEngBF9EyeeF3mv2O5 ZbM2mOW3RlZcjxFT/AC8G4cZwwP6MpCEQOdqknoqc6ZQwcDqwN0o9I4+po0wsiAU 89ijZZe9Mx0p9lNpihaBEB1erAUWPo5Obh62zo80W3h6x9WzkGQWM+PyFK2DYoaC 8biEZzcc21sLEHvXQkcEGJSKrihHr9sluOqvxmCw5QAkYIFAeZRoeH7JtZWjVCnr T3XvaG1G1Aw6tS7ErxufdKawREAGki0Rm9i1baiH9sqNj5rllM01Y+PgU6E21Nbg iZp9gJLjfwM4vhYLlovvQK5PRoOBsCkyCpEI4GJqjLeam5p/WN06CFFf0ifQofYr qDPCVDkWHWV8nugFFKE7 =EVh9 -----END PGP SIGNATURE----- Merge tag 'iommu-updates-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU updates from Joerg Roedel: "Slightly more changes than usual this time: - KDump Kernel IOMMU take-over code for AMD IOMMU. The code now tries to preserve the mappings of the kernel so that master aborts for devices are avoided. Master aborts cause some devices to fail in the kdump kernel, so this code makes the dump more likely to succeed when AMD IOMMU is enabled. - common flush queue implementation for IOVA code users. The code is still optional, but AMD and Intel IOMMU drivers had their own implementation which is now unified. - finish support for iommu-groups. All drivers implement this feature now so that IOMMU core code can rely on it. - finish support for 'struct iommu_device' in iommu drivers. All drivers now use the interface. - new functions in the IOMMU-API for explicit IO/TLB flushing. This will help to reduce the number of IO/TLB flushes when IOMMU drivers support this interface. - support for mt2712 in the Mediatek IOMMU driver - new IOMMU driver for QCOM hardware - system PM support for ARM-SMMU - shutdown method for ARM-SMMU-v3 - some constification patches - various other small improvements and fixes" * tag 'iommu-updates-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (87 commits) iommu/vt-d: Don't be too aggressive when clearing one context entry iommu: Introduce Interface for IOMMU TLB Flushing iommu/s390: Constify iommu_ops iommu/vt-d: Avoid calling virt_to_phys() on null pointer iommu/vt-d: IOMMU Page Request needs to check if address is canonical. arm/tegra: Call bus_set_iommu() after iommu_device_register() iommu/exynos: Constify iommu_ops iommu/ipmmu-vmsa: Make ipmmu_gather_ops const iommu/ipmmu-vmsa: Rereserving a free context before setting up a pagetable iommu/amd: Rename a few flush functions iommu/amd: Check if domain is NULL in get_domain() and return -EBUSY iommu/mediatek: Fix a build warning of BIT(32) in ARM iommu/mediatek: Fix a build fail of m4u_type iommu: qcom: annotate PM functions as __maybe_unused iommu/pamu: Fix PAMU boot crash memory: mtk-smi: Degrade SMI init to module_init iommu/mediatek: Enlarge the validate PA range for 4GB mode iommu/mediatek: Disable iommu clock when system suspend iommu/mediatek: Move pgtable allocation into domain_alloc iommu/mediatek: Merge 2 M4U HWs into one iommu domain ... |
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5f9cc57036 |
LED updates for 4.14
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJZsZswAAoJEL1qUBy3i3wm2cwQANp9Hufui0BYxD7X9bB3sBvX LJ2lbwQlZ93gmQo176fvE22wYw90wmf4CG12pdx8CB4TIBOuaEl1EUptaIxHjBkP +MOmiGxT0YZgUDmSo+sCL+LHEDWU8gcs8MI5ZkAxgALUb0kYiQySH5UlCJJOJIJv ww1A4K1bo6VONli+y8ZDa3eKgkArg1/pXYl2VejNMSkr88fyzf35fOKD44lMUGos 5KFVWdPMnz1OuVbh199x9vAPZygb4PNzJL1Tf2ntklBfU3mX+582e6uvIPqh4Tuy D5ZianpBNtA0IBV4G0UE+n/9rOy9oAr34+Tq9Gv0BRLlQXsC8FMEM5xcCDd1kFCI L6FeiGc1YnEtJpUVEhcWzmpww2EBBRKIB9lJK5c8VUlWf/yZME72Al5R8c7uffcE hc78eUVwM2fHNmBhmCmK49flC67/LMzHMiaEQ/lSGtGnd8ratclshFuooiPzsJN/ MSTX2B3yxWvBjwmZMNixY6WasduKKJs4K5xHnHJzyLt0mvClLiwgOvi1Dks0t+Ko imE6cdU3LCUeJJb4I9SgHTTjp33CTqq5ZBhbFsgqjNsfj4o/6GmnWxvSZ4ywqJMW HwU4iyBKlx2AVfhzIPozuoE67+HJyRYIexsUZi4vt0Pw2qHxwp1RvH+BMQbXGLLg rJ/H9ef5BAPRkPWxe1HM =E1ff -----END PGP SIGNATURE----- Merge tag 'leds_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds Pull LED updates from Jacek Anaszewski: "LED class drivers improvements: leds-pca955x: - add Device Tree support and bindings - use devm_led_classdev_register() - add GPIO support - prevent crippled LED class device name - check for I2C errors leds-gpio: - add optional retain-state-shutdown DT property - allow LED to retain state at shutdown leds-tlc591xx: - merge conditional tests - add missing of_node_put leds-powernv: - delete an error message for a failed memory allocation in powernv_led_create() leds-is31fl32xx.c - convert to using custom %pOF printf format specifier Constify attribute_group structures in: - leds-blinkm - leds-lm3533 Make several arrays static const in: - leds-aat1290 - leds-lp5521 - leds-lp5562 - leds-lp8501" * tag 'leds_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds: leds: pca955x: check for I2C errors leds: gpio: Allow LED to retain state at shutdown dt-bindings: leds: gpio: Add optional retain-state-shutdown property leds: powernv: Delete an error message for a failed memory allocation in powernv_led_create() leds: lp8501: make several arrays static const leds: lp5562: make several arrays static const leds: lp5521: make several arrays static const leds: aat1290: make array max_mm_current_percent static const leds: pca955x: Prevent crippled LED device name leds: lm3533: constify attribute_group structure dt-bindings: leds: add pca955x leds: pca955x: add GPIO support leds: pca955x: use devm_led_classdev_register leds: pca955x: add device tree support leds: Convert to using %pOF instead of full_name leds: blinkm: constify attribute_group structures. leds: tlc591xx: add missing of_node_put leds: tlc591xx: merge conditional tests |
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b884026a2b |
Merge branch 'next/dt64' into next/dt
* next/dt64: (233 commits) arm64: dts: marvell: mcbin: enable more networking ports arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node arm64: dts: marvell: add TX interrupts for PPv2.2 arm64: dts: uniphier: add PXs3 SoC support arm64: dts: uniphier: fix size of sdctrl node arm64: dts: uniphier: add AIDET nodes arm64: dts: uniphier: add reset controller node of analog amplifier arm64: dts: marvell: add Device Tree files for Armada-8KP arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM dt-bindings: add rk3399-q7 SoM arm64: dts: rockchip: add rk3328-rock64 board arm64: dts: rockchip: add rk3328 pdm node ARM64: dts: meson-gxl-libretech-cc: Add GPIO lines names ARM64: dts: meson-gx: Add AO CEC nodes ARM64: dts: meson-gx: update AO clkc to new bindings arm64: dts: rockchip: add more rk3399 iommu nodes arm64: dts: rockchip: add rk3368 iommu nodes arm64: dts: rockchip: add rk3328 iommu nodes arm64: zynqmp: Add generic compatible string for I2C EEPROM ... |
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126534141b |
MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd
Compared to the old xrx200_phy_fw driver the new version has multiple enhancements. The name of the firmware files does not have to be added to all .dts files anymore - one now configures the GPHY mode (FE or GE) instead. Each GPHY can now also boot separate firmware (thus mixing of GE and FE GPHYs is now possible). The new implementation is based on the RCU syscon-mfd and uses the reeset_controller framework instead of raw RCU register reads/writes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Cc: john@phrozen.org Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17128/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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3e4d618b07 |
clk: stm32h7: Add stm32h743 clock driver
This patch enables clocks for STM32H743 boards. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> for MFD changes: Acked-by: Lee Jones <lee.jones@linaro.org> for DT-Bindings Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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056db9d7c4 |
Allwinner clock changes for 4.14, part 3
Conversion of the last two SoCs (A10, A20) to the sunxi-ng framework. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZno1VAAoJEBx+YmzsjxAgJ4gQALqulaGhH4rEjW5oouZ8JJwd O3s4FFazKMXlgV1q/LYbf1eYrUQhJbr4tHTbCbqm3klaMTz6jOAnRlTjSKkoIssA jrtbP6MzHcWE6RnaIA96z45T2p5ZyMGt18/ZgpdQlmmQ9GcV27I+gQs0VsLLPMY0 PGlG+r6qDnwHbCaEymvbLG16/xLVXHmqXrWQ/9GRWRK1fQ7ffgGw80X1ASuflSnE fJCqfhUc1SG3ZGho0xZXFKUvifoaHg1gyFQrrP5mVhYSeUogYSMrvQim/RwwxSVx 6GkHmNj6O15UvD2A7Y71VqjvjNi5gB054J18Nl8PxFJyHPa33ocC5DkbOXEJI6jL PESH29A6myS+v2cY6lm1PVdWIGrDNcCgocjsZSeyn4xKU6oPmFHzlISt0hZPPoQ3 lxqWZrH9rUeVLVAkX2XzMhi4xHc6wZF2eTsp+e0ylDL09c//Dt2ojKgWoN7DeUlN sRgjcPlGB5KRYMYi1ChH5RSsH8h8S4wzF2mSESkGjLCZ82r1BerRBjvaF1MaIEGd xm5yNBw4Y3HL+AoRSEZiZ9FjERfejiI3Q/oqgcLdAGiYD0pDWMU+wjrfHXnQ1yOj HITZaabZRf19D+pNdLpMlzp1UmQQbflCDfOnXaz1r1q6yuWdXvXmgIL2CfQGPqCD Yn+FyX0JEE6yq4lvJ4fA =Wce+ -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-for-4.14-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next Pull more Allwinner clock changes from Maxime Ripard: * Conversion of the last two SoCs (A10, A20) to the sunxi-ng framework * tag 'sunxi-clk-for-4.14-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: Add sun4i/sun7i CCU driver dt-bindings: List devicetree binding for the CCU of Allwinner A10 dt-bindings: List devicetree binding for the CCU of Allwinner A20 |
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c32e176ac1 |
A lot of attention for the rv1108 soc targetted at media-processing
(usb, operating points, spi, pwm, adc, watchdog, i2c and devices for its evb). RK3228/3229 gets iommu and spi nodes. Similar to the rk3288 which also gets some more iommu nodes as well as getting converted to 64 bit addresses due to wanting to address more than 4GB of memory via LPAE. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlmdoA4QHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgeBtB/9oM4MmVRJ0YX7hk4NuU9c4HHdvCW0f1rJe Q6rE6dP7fW3J27d6PuySVWzvIBmD+3xVA2t0dDm85DIP8f1DFz3vyNhkEsu1VG89 MULTektihczugCy+sh3iHILs4fLXJ8QUjCKJWOcWmZHOaXNXXjJIVjC97m5F4ZAj KVOYXNnCKdaHYIeP0lkjStL8Z9Ua7svkjfgsSPTGTSJQQ+bGcd/8JnmlkzjfHWLw qNz6M7FPoJ1rAffskr1At27oRs7UAVSKNAejl8DWKvLXml6NQPRRRu99sLLanxII 3b6LsC6Vwea4a1Rjwx0LZWdDUtB1W34/ZIEw4JceK/i6HfV5K2Oi =di6U -----END PGP SIGNATURE----- Merge tag 'v4.14-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "second round of Rockchip dts32 changes for 4.14" from Heiko Stübner: A lot of attention for the rv1108 soc targetted at media-processing (usb, operating points, spi, pwm, adc, watchdog, i2c and devices for its evb). RK3228/3229 gets iommu and spi nodes. Similar to the rk3288 which also gets some more iommu nodes as well as getting converted to 64 bit addresses due to wanting to address more than 4GB of memory via LPAE. * tag 'v4.14-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: enable usb for rv1108-evb ARM: dts: rockchip: add usb nodes for rv1108 SoCs dt-bindings: update grf-binding for rv1108 SoCs ARM: dts: rockchip: add cpu power supply for rv1108 evb ARM: dts: rockchip: add cpu opp table for rv1108 ARM: dts: rockchip: add rk322x iommu nodes ARM: dts: rockchip: add accelerometer bma250e dt node for rv1108 evb ARM: dts: rockchip: add pmic rk805 dt node for rv1108 evb ARM: dts: rockchip: add pwm backlight for rv1108 evb ARM: dts: rockchip: add pwm dt nodes for rv1108 ARM: dts: rockchip: add spi dt node for rv1108 ARM: dts: rockchip: add saradc support for rv1108 ARM: dts: rockchip: add watchdog dt node for rv1108 ARM: dts: rockchip: add i2c dt nodes for rv1108 clk: rockchip: fix up indentation of some RV1108 clock-ids clk: rockchip: rename the clk id for HCLK_I2S1_2CH clk: rockchip: add more clk ids for rv1108 ARM: dts: rockchip: add more iommu nodes on rk3288 ARM: dts: rockchip: convert rk3288 device tree files to 64 bits ARM: dts: rockchip: add spi node and spi pinctrl on rk3228/rk3229 Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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c84f5683f6 |
clk: sunxi-ng: Add sun4i/sun7i CCU driver
Introduce a clock controller driver for sun4i A10 and sun7i A20 series SoCs. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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69a6beab08 |
clk: msm8996-gcc: add missing smmu clks
This patch adds missing LPASS smmu clks which are required by the audio driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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535b1100d1 |
clk: renesas: Updates for v4.14
- Add more module clocks for R-Car V2H and M3-W, - Add support for the R-Car Gen3 USB 2.0 clock selector PHY, - Add support for the new R-Car D3 SoC, - Allow compile-testing of all (sub)drivers now all dummy infrastructure is available, - Small fixes and cleanups. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZlVHhAAoJEEgEtLw/Ve77wqwP/1/RgfVlAoAHDL+aIo5FacVk uL5XPembCm7lCB+9OIU7GIrZQbZGWFBRUfL4oqOSfxqsTLv9gAKyZNUBETOKijXo NW0m6gkpN2+AZvZlTsZUzYLgdakNdOXi5atYn41zvAy2wbtww2aUqUHvwHz2PKjz k4ucRJEjljVGzTMu5/yqaADioEnTnb9FZ+uRGiy0/W+sD4UoEum75Ay6u3t7s0bL cmA2rtCFg52GlvC+BsZHntAjTHlSFXn7W8LddP1sb0oVvc9spC3k8q4DR8zVGNU2 VCk6XKyOnWTpHjyw/IYBAjQ+nNainklLyIusnEnG0VyUZY0pvFcC/SOAHxO4NSBS AJqD7ylhkc6gnYL0lqp+n6RJaoY4GOhpSFz+NNtPXFXaDUfuf+WTiYzHnrrCCZ4z jTGcmiynl229jAxN5fYudjfnbydBfvdKGINtVRI7ApP+oZa5K0Wzbd4ZDx4Q2mML 90mCdy+BVFGUcosh91kpL9vKazEm8EBYArMVhRDTFog6c4VyUrzL77fWleoptc4M yWlWB/KwfAhr0/NM1cxguax9bG1eOJbwq5FxHGwUqUCjxUxUWItNM9E1RMJ89drm zIsRO3CseOVFJcsm/75owYc/vXNbWcZ09wHyt8RExygPUPxRj3iCCvI5Y+tDqDIG zb2H5/e0HI7PjHt+hLEW =77l6 -----END PGP SIGNATURE----- Merge tag 'clk-renesas-for-v4.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next Pull Renesas clk driver updates from Geert Uytterhoeven: * Add more module clocks for R-Car V2H and M3-W, * Add support for the R-Car Gen3 USB 2.0 clock selector PHY, * Add support for the new R-Car D3 SoC, * Allow compile-testing of all (sub)drivers now all dummy infrastructure is available, * Small fixes and cleanups. * tag 'clk-renesas-for-v4.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: r8a7796: Add USB3.0 clock clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHY clk: renesas: cpg-mssr: Add R8A77995 support clk: renesas: rcar-gen3: Add support for SCCG/Clean peripheral clocks clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3 clk: renesas: Add r8a77995 CPG Core Clock Definitions clk: renesas: rcar-gen3-cpg: Refactor checks for accessing the div table clk: renesas: rcar-gen3-cpg: Drop superfluous variable clk: renesas: Allow compile-testing of all (sub)drivers clk: renesas: r8a7792: Add IMR-LX3/LSX3 clocks clk: renesas: div6: Document fields used for parent selection |
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cf657bb940 |
The biggest change is fixing the jitter on the fractional clock-type
Rockchip socs experience with the default approximation. For that we introduce the ability to override it with a clock-specific approximation and use that to create the needed rate settings as described in the Rockchip soc manuals (same for all Rockchip socs). Apart from that we have support for the rk3126 clock controller which is similar to the rk3128 with some minimal differences and a lot of improvements and fixes for the rv1108 clock controller (missing clocks, some clock-ids, naming fixes, register fixes). -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlmcl8sQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgeiBB/wIf5LHDu09HuOb1bjtYASMc//ve2ymhpd7 QsccJ0nteJTWnYQlrJUPYN8YhRVqPNrz7Fq8PkMMkzm89fQQ6lr5DxOy6olKTPM4 sGf+242eE3XttHjJxcshNPS98A56zBa9OgNC9sUsTex8r7NaJn+Gvlf0sXEgQRQi 5FprJf49/4rlHZypVMg1j+aMEWM8ZAmXLP3F77Qch+rfxE74POV9/HI7EEoSQ9MX TxwEewmM8IGXY9aVTvtADPmX31CgdOD3qm4giwGkBf2F8SajP8R63wi+BYpNfUTX +TrexLXEfeKEVtU+xPXsNYmEnAOW6sRvfyUnq4oA1hVSnFoexFA1 =Upwy -----END PGP SIGNATURE----- Merge tag 'v4.14-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next Pull Rockchip clk driver updates from Heiko Stuebner: The biggest change is fixing the jitter on the fractional clock-type Rockchip socs experience with the default approximation. For that we introduce the ability to override it with a clock-specific approximation and use that to create the needed rate settings as described in the Rockchip soc manuals (same for all Rockchip socs). Apart from that we have support for the rk3126 clock controller which is similar to the rk3128 with some minimal differences and a lot of improvements and fixes for the rv1108 clock controller (missing clocks, some clock-ids, naming fixes, register fixes). * tag 'v4.14-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: fix the rv1108 clk_mac sel register description clk: rockchip: rename rv1108 macphy clock to mac clk: rockchip: add rv1108 ACLK_GMAC and PCLK_GMAC clocks clk: rockchip: add rk3228 SCLK_SDIO_SRC clk id clk: rockchip: add rv1108 ACLK_GAMC and PCLK_GMAC ID clk: rockchip: add rk3228 sclk_sdio_src ID clk: rockchip: add special approximation to fix up fractional clk's jitter clk: fractional-divider: allow overriding of approximation clk: rockchip: modify rk3128 clk driver to also support rk3126 dt-bindings: add documentation for rk3126 clock clk: rockchip: add some critical clocks for rv1108 SoC clk: rockchip: rename some of clks for rv1108 SoC clk: rockchip: fix up some clks describe error for rv1108 SoC clk: rockchip: support more clks for rv1108 clk: rockchip: fix up the pll clks error for rv1108 SoC clk: rockchip: support more rates for rv1108 cpuclk clk: rockchip: fix up indentation of some RV1108 clock-ids clk: rockchip: rename the clk id for HCLK_I2S1_2CH clk: rockchip: add more clk ids for rv1108 |
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1fea70bc18 |
Allwinner clock changes for 4.14, round 2
Usual improvements: - Added support for fixed post-divider on divider and NKM-style clocks - Added driver for R40 CCU Non critical fixes (from round 1): - Fix sunxi-ng/ccu-sunxi-r.h header file guard macro typo - Make fractional clock modes really used and correctly configured - Make H3 cpu clock rate change correctly to be used with cpufreq -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAlmaR6AOHHdlbnNAY3Np ZS5vcmcACgkQOJpUIZwPJDC8YA//aLULoosISnyHs+wKowVHuDb7/mQ82O1gOAxC oE/vscd/WCRm7A5tfy+xHfajX/YRf32Qc09wB7fxUF4R0lgkO9QjUO0yX74a6bPh HCh/+bcmeNl9TZAYpTs72Q4nfc1x63OZwxMqTRnBmh3cevyIBJiFvqPjoMeD+Ari n32QEBgGE+A8bWshVFpNFyId6iyfMfozSYninIkVkwMGr7QgBgJRK1/5sftyZMR+ NQ2IGkaUfICnXofF//pNKsH7TN770gyDtFVWjrKZMrEKoP+gp3mawzMpfePKH/O6 4ihcm5LOo1Kdg5UzRTpQ2B/9fNUn2EvFYT6RuIBfddQcaflT1AzWtNK52j2L/crD tFyamcCSsNY5LzeySbVW+pQMRfrq6UCYtssiL7HYEcwMzvv61PfyDtKq5dxtJd0Q W8S6wPE/foj0i0JQWs0K70AacGU6XdEanUAtc5r3AsniCwwOtlwnaQqOlE5CiwAo HOSItOxX4Y/9QglnntsDyhNUaKpaSiG21XdE3ho3xq1/CS9ED3p5Ljbshem5fnPi mPisF6Ca6NVvCZ+sjH2RVvmGyh3d+BPfQLWC/sTamC4rnpDalrMq6IsCOivzbxqQ ltkYwUO1nmz5NMloeWYCUWWmLUOECCQu7Mppf2UQxpidrEEY0mbBYFdOlehrlHZT bWt2NdQ= =DKSp -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next Pull Allwinner clock changes from Chen-Yu Tsai: * Added support for fixed post-divider on divider and NKM-style clocks * Added driver for R40 CCU * Fix sunxi-ng/ccu-sunxi-r.h header file guard macro typo * Make fractional clock modes really used and correctly configured * Make H3 cpu clock rate change correctly to be used with cpufreq * tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: support R40 SoC dt-bindings: add compatible string for Allwinner R40 CCU clk: sunxi-ng: nkm: add support for fixed post-divider clk: sunxi-ng: div: Add support for fixed post-divider dt-bindings: clock: sunxi-ccu: Add compatibles for sun5i CCU driver clk: sunxi-ng: allow set parent clock (PLL_CPUX) for CPUX clock on H3 clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change clk: sunxi-ng: Wait for lock when using fractional mode clk: sunxi-ng: Make fractional helper less chatty clk: sunxi-ng: multiplier: Fix fractional mode clk: sunxi-ng: Fix fractional mode for N-M clocks clk: sunxi-ng: Fix header guard of ccu-sun8i-r.h |
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a9467d9542 |
iommu/mediatek: Move MTK_M4U_TO_LARB/PORT into mtk_iommu.c
The definition of MTK_M4U_TO_LARB and MTK_M4U_TO_PORT are shared by all the gen2 M4U HWs. Thus, Move them out from mt8173-larb-port.h, and put them into the c file. Suggested-by: Honghui Zhang <honghui.zhang@mediatek.com> Signed-off-by: Yong Wu <yong.wu@mediatek.com> Signed-off-by: Joerg Roedel <jroedel@suse.de> |
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c7d0045b08 |
clk: rockchip: rename rv1108 macphy clock to mac
This MAC has no internal phy for rv1108 and the whole clock infrastructure hasn't been used yet, so is safe to fix. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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1858698e0a |
clk: rockchip: add rv1108 ACLK_GAMC and PCLK_GMAC ID
This patch exports gmac aclk and pclk for dts reference. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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9762e7ff16 |
clk: rockchip: add rk3228 sclk_sdio_src ID
This patch exports sdio src clock for dts reference. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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cd030a78f7 |
clk: sunxi-ng: support R40 SoC
Allwinner R40 SoC have a clock controller module in the style of the SoCs beyond sun6i, however, it's more rich and complex. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Chen-Yu Tsai <wens@csie.org> |
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e517030e26 |
Reset controller changes for v4.14
- constify zx2967 reset_ops - add a convenience API to manage an array of resets - let deassert report success and let assert report success for shared resets if the reset controller driver does not implement (de)assert. - add HSDKv1 reset driver - remove Gemini reset controller, the driver is made obsolete by a combined clock/reset driver in drivers/clk - fix the total number of reset lines in the sunxi driver - various uniphier updates and fixes: - remove sLD3 SoC support - simplify system reset register and bit definitions - add audio systems, video input subsystem, and analog amplifiers reset controls -----BEGIN PGP SIGNATURE----- iQJMBAABCAA2FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlmWg5MYHHBoaWxpcHAu emFiZWxAZ21haWwuY29tAAoJEFDCiBxwnmDrEqoQAKSQDhwA5ZyBd216PoUSaLqf tTGrJc/atfs+cDiqSyQDQ5vN0dTMnPV+YjGmwITg55ZGQTJRTq5nVhwM6y0CaASN PE7U/9Ma/8GWOjtC+6hun6tAHeuX3fMq2cYK8BSL+D7MQr+zkIgEQx3YsbR/0Np7 qmawpZSKAvIxrpVkQiVrsxmVvxi23GdncGUPDHtKhAW4N1T3ywogpW/7t6AcDZZl XIa09fIRxfB9VECIXPfe/CDkTHPcKgrxP80/AQJksRmWKBtFU3dRktYVscqUplz7 gS3EelAJ3NYscqWQevCXSvGsSpiNJfePKNLRrDSTKX+eKbAignHvcRhJ6YuP4QrY t7ZGm7VZf+HSY/XYXbcXEO8zcaf3LFT1lO3KAQ3/nmFie/CuVCC+Dpl74OPsBvcD +3uhQHqvm8AwnxBmTRtMNH3AtaDFPxT9hbebhsoJKujSb5+5aC4ygDAnY0E6QWfJ wYG/qKz6+dtrFVIOZG3TFjz2/kgjXRd8zegYtxn20KH1Qk/i+JqaIofbwPvPWAKS A5vi6sLt6AruRUh213E9+Pi+EWQs1Qhexqjk1rtna9RUkMmu2Qbx50hKkgdgE4Q7 EWcQSB43bpGRo5xt4zhy7fnBPj3zxjJK9gAzeGNrbN16z5gulHarpLWb9X5ujli4 9zv7wk00SQIaSqlVFKBM =YW4N -----END PGP SIGNATURE----- Merge tag 'reset-for-4.14' of git://git.pengutronix.de/git/pza/linux into next/drivers Pull "Reset controller changes for v4.14" from Philipp Zabel: - constify zx2967 reset_ops - add a convenience API to manage an array of resets - let deassert report success and let assert report success for shared resets if the reset controller driver does not implement (de)assert. - add HSDKv1 reset driver - remove Gemini reset controller, the driver is made obsolete by a combined clock/reset driver in drivers/clk - fix the total number of reset lines in the sunxi driver - various uniphier updates and fixes: - remove sLD3 SoC support - simplify system reset register and bit definitions - add audio systems, video input subsystem, and analog amplifiers reset controls * tag 'reset-for-4.14' of git://git.pengutronix.de/git/pza/linux: reset: uniphier: add analog amplifiers reset control reset: uniphier: add video input subsystem reset control reset: uniphier: add audio systems reset control reset: sunxi: fix number of reset lines reset: uniphier: do not use per-SoC macro for system reset block reset: uniphier: remove sLD3 SoC support Revert "reset: Add a Gemini reset controller" ARC: reset: introduce HSDKv1 reset driver reset: make (de)assert report success for self-deasserting reset drivers reset: Add APIs to manage array of resets reset: zx2967: constify zx2967_reset_ops. |
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9da95d8f5b |
- add mt7623a smp support
- scpsys: reduce code duplication - scpsys: add mt7622 support - pmic wrapper: make of_device_ids constant -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlmVfMEXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00MGyw//b1Ax9tAl+eX1phkU5r/sdyd6 KS72i4pMo4yyyuoPCLKhpwH2rL1UrgY/T6f6bEyVf6KNhzgUvx1P4Y5PSpo2R+Jv AJ9lIypXCxUvmrQL5FOuQ+8SY694SSm1IBsoJ70pNA+/m7//Yfk0eiueUa7epNI0 dhrHOvNaZPQbnCUjFa+qdkK8x04MoAKUQcq9sp1vpcvYTL7V6OrW2V6kc0iqwaN1 G91QW2r+XAgO1KA1PIMqC8E9v06dhYWuaPI3SMCIqp/NFnNZA8j58KySzW7+nB/B 7IlDARYDyzokw/JTUuWSlOOPh425xVSExidkTbCgb7m0Lt8i3CvW89yXsqKSL/+U Ezek9w/rJNGb5OoLhT1xQfy6XrXFCW78gl9HKZhbrM1eBiEeJctLlmQula57nyJH qIlCMjuueKYHUKTGT5LXidNbGesfx4vLt6v803XouF4D3NCIqPahdFqtBnEfsOEO l1xwbTSq44VSFtUKSdRrgt6e8Uxa25ftOkbKlS8vIPcsYJ7gnK7r2/ERWNJF8F+f x4toGOKhOVRTRwAZIx9ncKnQp08g6jegiRHW4JrJNmPnUwwC00I06+Jiltg5KJIP ZqgfjXesdjD660pWl70YGMRtdUNLuNgZRnyXg1CM94CfOimUBZi2PXhoK1Wm/7sj Db0QrPV4DQHti15Q0ig= =IW3o -----END PGP SIGNATURE----- Merge tag 'v4.13-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers Pull "arm: mediatek: soc updates for v4.14" from Matthias Brugger: - add mt7623a smp support - scpsys: reduce code duplication - scpsys: add mt7622 support - pmic wrapper: make of_device_ids constant * tag 'v4.13-next-soc' of https://github.com/mbgg/linux-mediatek: soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC soc: mediatek: add header files required for MT7622 SCPSYS dt-binding soc: mediatek: reduce code duplication of scpsys_probe across all SoCs dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC soc: mtk-pmic-wrap: make of_device_ids const. ARM: mediatek: add MT7623a smp bringup code |
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2de8161251 |
ARM: Keystone DTS for 4.14
Contents: - ti-sci power domain, clock and reset controller support - DSP nodes for k2h/k2l/k2e evms - DSP CMA memory pools for k2h/k2l/k2e/keg evms - MMC/hsmmc suport for k2g - eDMA support for k2g - DCAN support for k2g -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZlOAZAAoJEHJsHOdBp5c/ZNIP/3wCj+qddu92u7PKknIKptKQ zMKfXnSI01DnjBiuUM3qD6N/ELJCmYrFs2mdYhxjSPNNzKIhMwfg6fSHMWoAmFIN juP5VGCs61e2PWOOL74vw93f1+GEWawgG8VpreeFOgkmDXM1t2jHGFdNkOQH64to B6ONt423UodLIUp8VQzEcH5sluVHErv2OwizO/EWBKAnioQDlKUIS9KDG3eXb98E oVuoso4v8WIoZQj7Rtwpj7gAjnFxCl6DbEWsD5upJ1XLmUtAjqbnGe5PZihYQolJ Klc1qqk0gJPQxfkVzesEOn6k0J5y9+SwYELX9DGnno1yDCA98InCtYdTEDENKqlr dWAvlsbC0JjaHJnC9hU83Y62rMLZsO/fTV7EZU6Cu1M2Suu8O66LFjlnx77uB21g pES0y8bPFdre5JdHXwtvLtyeaDQR2HnTwhzS3Ul1VeMP6gjsiD4FoHAYeqE7tfOE dIaYnORlvMbDE5qP7aeFR3blIPIGXtMyI1ARD+NY4uLUtOUevttCQh+pSasaJ/pF HcYdL9aH1EvTGCS+WY+oes8+6oII1YQo/ASmV200OFHrg1Ucme9iEiaeFAqrR4rO tIXtcOSR4LMjiDHqRBtw5/Ei8hiprRz4070oVAHaKQ190XpmmQe2AkgthrgsKmXM THbU5V8bDRTvNKLmYU7U =9ZLH -----END PGP SIGNATURE----- Merge tag 'keystone_dts_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt Pull "ARM: Keystone DTS for 4.14" from Santosh Shilimkar: Contents: - ti-sci power domain, clock and reset controller support - DSP nodes for k2h/k2l/k2e evms - DSP CMA memory pools for k2h/k2l/k2e/keg evms - MMC/hsmmc suport for k2g - eDMA support for k2g - DCAN support for k2g * tag 'keystone_dts_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (22 commits) ARM: dts: keystone-k2g-ice: Add and enable DSP CMA memory pool ARM: dts: keystone-k2g-evm: Add and enable DSP CMA memory pool ARM: dts: keystone-k2g: Add DSP node ARM: dts: k2g: Add DCAN nodes dt-bindings: net: c_can: Update binding for clock and power-domains property ARM: dts: keystone-k2g-evm: Enable MMC0 and MMC1 ARM: dts: keystone-k2g: add MMC0 and MMC1 nodes ARM: dts: keystone-k2g: Add eDMA nodes dt-bindings: ti,omap-hsmmc: Add 66AK2G mmc controller dt-bindings: ti,edma: Add 66AK2G specific information ARM: dts: keystone-k2g: Add gpio nodes ARM: dts: keystone-k2e-evm: Add and enable DSP CMA memory pool ARM: dts: keystone-k2l-evm: Add and enable common DSP CMA memory pool ARM: dts: keystone-k2hk-evm: Add and enable common DSP CMA memory pool ARM: dts: keystone-k2e: Add DSP node ARM: dts: keystone-k2l: Add DSP nodes ARM: dts: keystone-k2hk: Add DSP nodes ARM: dts: keystone-k2g: Add TI SCI reset-controller node ARM: dts: keystone-k2g: Add ti-sci clock provider node ARM: dts: keystone-k2g: Add ti-sci power domain node ... |
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f822e60085 |
Renesas ARM Based SoC Drivers Updates for v4.14
Add R-Car D3 (r8a77995) support to the Renesas-specific SoC drivers - SoC identification - System controller - Reset controller -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZf0DrAAoJENfPZGlqN0++LacP/jcymVeUMDpkkPTcoM6b37Qq ADSDdiR+1Szu29wtfNDTFUoAlh4UvlpAN93GGJLZ/iYsMDyZYIhcUhnE4l119fdy 6iMwDhctXHlQ8VNhY0Z9MUXZyyN2Fu/9L2ZDJ2briM2xoNiMgdUYvMlsZI8ZaN1/ JRmfP+lzCM25Rkdi9sLYolj8szaxbW9RgLBgvXD7ERJ5bsJRKGs6aDrJ2AXMZpwn BVOeughlPTxvv+NVFA1qZXWh63/7RjW5t6OMgHw3eNOABKv+o5YfdqOZAa8PHgn9 LhNAkR90Il9hsGesWwHMKPuCgGHE0R/2nQppWM0xBWO/HfMRnpx8DEt+em/Kjpep uxex+bqMOJB0GksVWPM73ci1CQmQxKS6xrTXeTE9kiN+6WD+b0Fsntoz2XN62uJO df0z46N6T3I4jFc00vOBnXxCdgDCBCJLxtU8NFg8jzmGP+NkKxxYiwCEs1auKlLF CUVX+o8H4V9FKnD3h0/mNsNyw/gCw6TWXlyr/Ba6AjBuZ8TghhMjQ+zbY+xCN9sb IFONbr69pVBJ9N2ssGWdf2iLfa+JNcaJdEPZUkumgUlZ9M5RgS+yg3YoTFtlAO6R JN2uP1E20qBLlrvAu7pv9HQEim80RyDT2DU2a1qFNx32vhqfl6g3sccJJvGpzodj 7y7per6KkpvUGrck0kAI =AO// -----END PGP SIGNATURE----- Merge tag 'renesas-drivers-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Pull "Renesas ARM Based SoC Drivers Updates for v4.14" from Simon Horman: Add R-Car D3 (r8a77995) support to the Renesas-specific SoC drivers - SoC identification - System controller - Reset controller * tag 'renesas-drivers-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: rcar-rst: Add support for R-Car D3 soc: renesas: rcar-sysc: Add support for R-Car D3 power areas soc: renesas: Add r8a77995 SYSC PM Domain Binding Definitions soc: renesas: Identify R-Car D3 |
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714c53aa2e |
clk: renesas: Add r8a77995 CPG Core Clock Definitions
Add all R-Car D3 Clock Pulse Generator Core Clock Outputs, as listed in Table 8.2f ("List of Clocks [R-Car D3]") of the R-Car Series, 3rd Generation Hardware User's Manual (Rev. 0.55, Jun. 30, 2017). Note that internal CPG clocks (S0, S1, S2, S3, S1C, S3C, SDSRC, and SSPSRC) are not included, as they are used as internal clock sources only, and never referenced from DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org> |
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d7b5f5cc5e |
pinctrl: qcom: spmi-gpio: Add support for GPIO LV/MV subtype
GPIO LV (low voltage)/MV (medium voltage) subtypes have different features and register mappings than 4CH/8CH subtypes. Add support for LV and MV subtypes. Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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561099a1a2 |
leds: pca955x: add GPIO support
The PCA955x family of chips are I2C LED blinkers whose pins not used to control LEDs can be used as general purpose I/Os (GPIOs). The following adds such a support by defining different operation modes for the pins (See bindings documentation for more details). The pca955x driver is then extended with a gpio_chip when some of pins are operating as GPIOs. The default operating mode is to behave as a LED. The GPIO support is conditioned by CONFIG_LEDS_PCA955X_GPIO. Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com> |
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4f04ff03dc |
soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
Add relevant header files required for dt-bindings of SCPSYS power domain control for all subsystems found on MT7622 SoC. Signed-off-by: Chen Zhong <chen.zhong@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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eba6130b31 |
ARM: dts: Add dra7 iodelay configuration
Add dra7 iodelay configuration. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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a376a4b045 |
clk: rockchip: fix up indentation of some RV1108 clock-ids
Make the code look better. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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1b6428a286 |
clk: rockchip: rename the clk id for HCLK_I2S1_2CH
i2s1 has 2 channels but not 8 channels. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> [and the clock id hasn't been used in either clock-driver nor dts, so is safe to rename] Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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cbbd6c2f55 |
clk: rockchip: add more clk ids for rv1108
Add new clk ids for the peripherals on rv1108 soc. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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596f2b78da |
dt-bindings: clock: gxbb-aoclk: Add CEC 32k clock
This patchadds the clock binding entry for the CEC 32K AO Clock. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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a5841de691 |
clk: meson: gxbb: Add sd_emmc clk0 clkids
Add the clkids for the clocks feeding the input0 of the mmc controllers Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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90640fd05e |
clk: meson-gxbb: expose almost every clock in the bindings
Expose all clocks which maybe used as DT bindings Only clock ids internal the controller remain un-exposed Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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31128822ce |
clk: meson8b: expose every clock in the bindings
Expose all clocks which maybe used as DT bindings Only clock ids internal the controller remain un-exposed (none on this particular controller at the moment) Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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0f9b973b65 |
dt-bindings: clock: meson8b: describe the embedded reset controller
The Amlogic Meson8/Meson8b/Meson8m2 clock controller provides some reset lines. These are used for example to boot the secondary CPU cores. This patch describes the reset controller which is embedded into the clock controller on these SoCs. A header file is provided which provides preprocessor macros for each reset line (to make the .dts files easier to read). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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ee011c5b4c |
soc: renesas: Add r8a77995 SYSC PM Domain Binding Definitions
Add power domain indices for R-Car D3. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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d16645054d |
dt-bindings: Drop k2g genpd device ID macros
Commit
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8bf3560f6c |
dt-bindings: power: add RK3366 SoCs header for power-domain
According to a description from TRM, add all the power domains. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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e0be864f14 |
ARC: reset: introduce HSDKv1 reset driver
The HSDK v1 periphery IPs can be reset by accessing some registers from the CGU block. The list of available reset lines is documented in the DT bindings. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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ff60dcedbd |
pinctrl: samsung: dt-bindings: Use better name for external interrupt function
On Exynos, 0xf is always used as value of external interrupt in pin mux function thus a more descriptive macro name can be used. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> |
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568d135d33 |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "Boston platform support: - Document DT bindings - Add CLK driver for board clocks CM: - Avoid per-core locking with CM3 & higher - WARN on attempt to lock invalid VP, not BUG CPS: - Select CONFIG_SYS_SUPPORTS_SCHED_SMT for MIPSr6 - Prevent multi-core with dcache aliasing - Handle cores not powering down more gracefully - Handle spurious VP starts more gracefully DSP: - Add lwx & lhx missaligned access support eBPF: - Add MIPS support along with many supporting change to add the required infrastructure Generic arch code: - Misc sysmips MIPS_ATOMIC_SET fixes - Drop duplicate HAVE_SYSCALL_TRACEPOINTS - Negate error syscall return in trace - Correct forced syscall errors - Traced negative syscalls should return -ENOSYS - Allow samples/bpf/tracex5 to access syscall arguments for sane traces - Cleanup from old Kconfig options in defconfigs - Fix PREF instruction usage by memcpy for MIPS R6 - Fix various special cases in the FPU eulation - Fix some special cases in MIPS16e2 support - Fix MIPS I ISA /proc/cpuinfo reporting - Sort MIPS Kconfig alphabetically - Fix minimum alignment requirement of IRQ stack as required by ABI / GCC - Fix special cases in the module loader - Perform post-DMA cache flushes on systems with MAARs - Probe the I6500 CPU - Cleanup cmpxchg and add support for 1 and 2 byte operations - Use queued read/write locks (qrwlock) - Use queued spinlocks (qspinlock) - Add CPU shared FTLB feature detection - Handle tlbex-tlbp race condition - Allow storing pgd in C0_CONTEXT for MIPSr6 - Use current_cpu_type() in m4kc_tlbp_war() - Support Boston in the generic kernel Generic platform: - yamon-dt: Pull YAMON DT shim code out of SEAD-3 board - yamon-dt: Support > 256MB of RAM - yamon-dt: Use serial* rather than uart* aliases - Abstract FDT fixup application - Set RTC_ALWAYS_BCD to 0 - Add a MAINTAINERS entry core kernel: - qspinlock.c: include linux/prefetch.h Loongson 3: - Add support Perf: - Add I6500 support SEAD-3: - Remove GIC timer from DT - Set interrupt-parent per-device, not at root node - Fix GIC interrupt specifiers SMP: - Skip IPI setup if we only have a single CPU VDSO: - Make comment match reality - Improvements to time code in VDSO" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (86 commits) locking/qspinlock: Include linux/prefetch.h MIPS: Fix MIPS I ISA /proc/cpuinfo reporting MIPS: Fix minimum alignment requirement of IRQ stack MIPS: generic: Support MIPS Boston development boards MIPS: DTS: img: Don't attempt to build-in all .dtb files clk: boston: Add a driver for MIPS Boston board clocks dt-bindings: Document img,boston-clock binding MIPS: Traced negative syscalls should return -ENOSYS MIPS: Correct forced syscall errors MIPS: Negate error syscall return in trace MIPS: Drop duplicate HAVE_SYSCALL_TRACEPOINTS select MIPS16e2: Provide feature overrides for non-MIPS16 systems MIPS: MIPS16e2: Report ASE presence in /proc/cpuinfo MIPS: MIPS16e2: Subdecode extended LWSP/SWSP instructions MIPS: MIPS16e2: Identify ASE presence MIPS: VDSO: Fix a mismatch between comment and preprocessor constant MIPS: VDSO: Add implementation of gettimeofday() fallback MIPS: VDSO: Add implementation of clock_gettime() fallback MIPS: VDSO: Fix conversions in do_monotonic()/do_monotonic_coarse() MIPS: Use current_cpu_type() in m4kc_tlbp_war() ... |
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7461279bba |
dt-bindings: Document img,boston-clock binding
Add device tree binding documentation for the clocks provided by the MIPS Boston development board from Imagination Technologies, and a header file describing the available clocks for use by device trees & driver. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Frank Rowand <frowand.list@gmail.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16482/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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c7d28eca1d |
This is the bulk of GPIO changes for the v4.13 series:
Core: - Export add/remove for lookup tables so that modules can export GPIO descriptor tables. - Handle GPIO sleep states: it is now possible to flag that a GPIO line may loose its state during suspend/resume of the system to save power. This is used in the Wolfson Micro Arizona driver. - ACPI-based GPIO was tightened up a lot around the edges. - Use bitmap_fill() to speed up a loop. New drivers: - Exar XRA1403 SPI-based GPIO. - MVEBU driver now supports Armada 7K and 8K. - LP87565 PMIC GPIO. - Renesas R-CAR R8A7743 (RZ/G1M). - The new IOT2040 8250 serial/GPIO also comes in through this changeset. Substantial driver changes: - Seriously fix the Exar 8250 GPIO portions to work. - The MCP23S08 was moved out to a pin control driver. - Convert MEVEBU to use regmap for register access. - Drop Vulcan support from the Broadcom driver. - Serious cleanup and improvement of the mockup driver, giving us a better test coverage. Misc: - Lots of janitorial clean up. - A bunch of documentation fixes. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZX1MjAAoJEEEQszewGV1zEYUQALFsjJH7D2mRN4TSSEeVAcYr Uz52uupsou8tgW0IupRb/khO+V6zgd7j+kHDJLMxX+rCTw3pTq5+XGyi5+iNpxof TIIT1XBx4eq7Q/n4nWdGodHbHN9BXw7cGsNmTb1TS/G/6h1wOKxfzjvUNhDAC+2v idPy6B5G+WrDsYpBtTWlKHKQKVqbUlhLFyJYoglzqIeM5L9Ry/UoZ6sGleho3hKn Vlg/hMtkCexnVO9zopBe5CuEfseLrkcCgCvtQ713egzVXApryp4hqm3Xti20Ntgy OxnKhmVyloqd0kU0qLSpvDAf7B1invbHHbeZsag6wluTMrxgUYJONuonrqGeGiwB FBDtw9SGn2GlEXcs7sg8ANmAyr2XxxezKXD9XLBL5jadNB2KCY5yKMv1IK3VnYdq gEpFAiZ5cmlpZxIXqlyeZP6LKHNTci4amb33x1I/ghH2BTkGQ/3E3anXEbPNWF8G DDE6nrSgU0oQcNqRHyZaWNZpUIz4aFUgJtOEO4lYYP4+VzYSKTdrHseTiiJ91J7E WBz9p5JvSnB22+60RhyTAPjVjXgWa30nidf7WGCK0UHiIYffihCxGZRTlrhoEEUB fXgveJpqxLopYvxpUxi1OqlPYYo7zKRF5BzHsjKMpdVYXfdMdvs7eq2g/X889i1D WpbE9LyAH9FY5BM8YjFX =TpW1 -----END PGP SIGNATURE----- Merge tag 'gpio-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v4.13 series. Some administrativa: I have a slew of 8250 serial patches and the new IOT2040 serial+GPIO driver coming in through this tree, along with a whole bunch of Exar 8250 fixes. These are ACKed by Greg and also hit drivers/platform/* where they are ACKed by Andy Shevchenko. Speaking about drivers/platform/* there is also a bunch of ACPI stuff coming through that route, again ACKed by Andy. The MCP23S08 changes are coming in here as well. You already have the commits in your tree, so this is just a result of sharing an immutable branch between pin control and GPIO. Core: - Export add/remove for lookup tables so that modules can export GPIO descriptor tables. - Handle GPIO sleep states: it is now possible to flag that a GPIO line may loose its state during suspend/resume of the system to save power. This is used in the Wolfson Micro Arizona driver. - ACPI-based GPIO was tightened up a lot around the edges. - Use bitmap_fill() to speed up a loop. New drivers: - Exar XRA1403 SPI-based GPIO. - MVEBU driver now supports Armada 7K and 8K. - LP87565 PMIC GPIO. - Renesas R-CAR R8A7743 (RZ/G1M). - The new IOT2040 8250 serial/GPIO also comes in through this changeset. Substantial driver changes: - Seriously fix the Exar 8250 GPIO portions to work. - The MCP23S08 was moved out to a pin control driver. - Convert MEVEBU to use regmap for register access. - Drop Vulcan support from the Broadcom driver. - Serious cleanup and improvement of the mockup driver, giving us a better test coverage. Misc: - Lots of janitorial clean up. - A bunch of documentation fixes" * tag 'gpio-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (70 commits) serial: exar: Add support for IOT2040 device gpio-exar/8250-exar: Make set of exported GPIOs configurable platform: Accept const properties serial: exar: Factor out platform hooks gpio-exar/8250-exar: Rearrange gpiochip parenthood gpio: exar: Fix iomap request gpio-exar/8250-exar: Do not even instantiate a GPIO device for Commtech cards serial: uapi: Add support for bus termination gpio: rcar: Add R8A7743 (RZ/G1M) support gpio: gpio-wcove: Fix GPIO control register offset calculation gpio: lp87565: Add support for GPIO gpio: dwapb: fix missing first irq for edgeboth irq type MAINTAINERS: Take maintainership for GPIO ACPI support gpio: exar: Fix reading of directions and values gpio: exar: Allocate resources on behalf of the platform device gpio-exar/8250-exar: Fix passing in of parent PCI device gpio: mockup: use devm_kcalloc() where applicable gpio: mockup: add myself as author gpio: mockup: improve the error message gpio: mockup: don't return magic numbers from probe() ... |
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dddd564dbb |
This time we've got one core change to introduce a bulk clk_get API,
some new clk drivers and updates for old ones. The diff is pretty spread out across a handful of different SoC clk drivers for Broadcom, TI, Qualcomm, Renesas, Rockchip, Samsung, and Allwinner, mostly due to the introduction of new drivers. Core: - New clk bulk get APIs - Clk divider APIs gained the ability to consider a different parent than the current one New Drivers: - Renesas r8a779{0,1,2,4} CPG/MSSR - TI Keystone SCI firmware controlled clks and OMAP4 clkctrl - Qualcomm IPQ8074 SoCs - Cortina Systems Gemini (SL3516/CS3516) - Rockchip rk3128 SoCs - Allwinner A83T clk control units - Broadcom Stingray SoCs - CPU clks for Mediatek MT8173/MT2701/MT7623 SoCs Removed Drivers: - Old non-DT version of the Realview clk driver Updates: - Renesas Kconfig/Makefile cleanups - Amlogic CEC EE clk support - Improved Armada 7K/8K cp110 clk support - Rockchip clk id exposing, critical clk markings - Samsung converted to clk_hw registration APIs - Fixes for Samsung exynos5420 audio clks - USB2 clks for Hisilicon hi3798cv200 SoC and video/camera clks for hi3660 -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJZXujtAAoJEK0CiJfG5JUl8vIQAKbcH3rX+CS4jrg7Hs2Ghnhn ZbTf7vZYa6K7iuL7JHITEScAQ8+l0Bl7eWSfJZRt4oUW3Jt4F+AIs8qBofZAWn4M m+kDHs/IfAUITZp/unM/ogFfVcboZObjAK/A2yyRVyMxRkIyyUb6r7SDVpCpGyxU 1YDAdis2M3F5J9CGV/tpmobnksMUlCnJlI0OGtMUnvY6mDkf8Re89sayMnQ/1Mgp CL1YwnqZ0L6rT664IMo74bB7UNjXdMZsuCeITkU+hMVq4NMXErKCcn8lHvP9P+uP AoZ8bf9WaQ/CglGFeeFrNQGUf+tiTlYxlVvvNFXR5+rmhu/yKxNI67APaupeERVl jMISKAC/A+C1j6JVMCqjM3d75F47SzuZQuQY0ZD0DWoqP9PBzV6IyThHIqWrN5O4 IceLmD8BrwW+h8bs2SIubIygOGMMqGhVi2XaAAWpmRke7JzmSFOOyE3YGPisaBAq EcIF2i2jJ6Ja4rClgfQKOsx25MOILsIp/sMU6iC7U1h4NDj8yP5A13n60U6DuZhu ttjN+bXugR81R+bWyzC6Zl/KXF83Ka3ZSJs+XblunPRGKt2q6Kj12HBspkWL1QjY aLEEg3fpI/ovQoTMXHj7/G1MD60rxoHCuOjBwSWEQBzA1MiHol+ab/mZKfPsy50C 116G1XJgtgrLxE00iZ6K =Yar+ -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This time we've got one core change to introduce a bulk clk_get API, some new clk drivers and updates for old ones. The diff is pretty spread out across a handful of different SoC clk drivers for Broadcom, TI, Qualcomm, Renesas, Rockchip, Samsung, and Allwinner, mostly due to the introduction of new drivers. Core: - New clk bulk get APIs - Clk divider APIs gained the ability to consider a different parent than the current one New Drivers: - Renesas r8a779{0,1,2,4} CPG/MSSR - TI Keystone SCI firmware controlled clks and OMAP4 clkctrl - Qualcomm IPQ8074 SoCs - Cortina Systems Gemini (SL3516/CS3516) - Rockchip rk3128 SoCs - Allwinner A83T clk control units - Broadcom Stingray SoCs - CPU clks for Mediatek MT8173/MT2701/MT7623 SoCs Removed Drivers: - Old non-DT version of the Realview clk driver Updates: - Renesas Kconfig/Makefile cleanups - Amlogic CEC EE clk support - Improved Armada 7K/8K cp110 clk support - Rockchip clk id exposing, critical clk markings - Samsung converted to clk_hw registration APIs - Fixes for Samsung exynos5420 audio clks - USB2 clks for Hisilicon hi3798cv200 SoC and video/camera clks for hi3660" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (147 commits) clk: gemini: Read status before using the value clk: scpi: error when clock fails to register clk: at91: Add sama5d2 suspend/resume gpio: dt-bindings: Add documentation for gpio controllers on Armada 7K/8K clk: keystone: TI_SCI_PROTOCOL is needed for clk driver clk: samsung: audss: Fix silent hang on Exynos4412 due to disabled EPLL clk: uniphier: provide NAND controller clock rate clk: hisilicon: add usb2 clocks for hi3798cv200 SoC clk: Add Gemini SoC clock controller clk: iproc: Remove __init marking on iproc_pll_clk_setup() clk: bcm: Add clocks for Stingray SOC dt-bindings: clk: Extend binding doc for Stingray SOC clk: mediatek: export cpu multiplexer clock for MT8173 SoCs clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't work clk: renesas: cpg-mssr: Use of_device_get_match_data() helper clk: hi6220: add acpu clock clk: zx296718: export I2S mux clocks clk: imx7d: create clocks behind rawnand clock gate clk: hi3660: Set PPLL2 to 2880M ... |
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a9ceea2674 |
ARM: 64-bit DT updates
Device-tree updates for arm64 platforms. For the first time I can remember, this is actually larger than the corresponding branch for 32-bit platforms overall, though that has more individual changes. A significant portion this time is due to added machine support: - Initial support for the Realtek RTD1295 SoC, along with the Zidoo X9S set-top-box - Initial support for Actions Semi S900 and the Bubblegum-96 single-board-cёmputer. - Rockchips support for the rk3399-Firefly single-board-computer gets added, this one stands out for being relatively fast, affordable and well₋supported, compared to many boards that only fall into one or two of the above categories. - Mediatek gains support for the mt6797 mobile-phone SoC platform and corresponding evaluation board. - Amlogic board support gets added for the NanoPi K2 and S905x LibreTech CC single-board computers and the R-Box Pro set-top-box - Allwinner board support gets added for the OrangePi Win, Orangepi Zero Plus 2, NanoPi NEO2 and Orange Pi Prime single board computers and the SoPine system-on-module. - Renesas board support for Salvator-XS and H3ULCB automotive development systems. - Socionext Uniphier board support for LD11-global and LD20-global, whatever those may be. - Broadcom adds support for the new Stingray communication processor in its iProc family, along with two reference boards. Other updates include: - For the hisicon platform, support for Hi3660-Hikey960 gets extended significantly. - Lots of smaller updates for Renesas, Amlogic, Rockchip, UniPhier, Broadcom, Allwinner, Hisilicon, Qualcomm, Marvell, and NXP. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAWVpZnmCrR//JCVInAQJYsBAAhuoRK5WZawkeAMEbkGeyOXYbnp6qUlKm w1lwXXdStLjkOUmQXo5KNDmWiHbPnuhwHprX9HMPDI0G1+DSaOlxIezNFIlKOUyW fQxZjt4+L3eRXQCetj3P+QAp37ifmFxSg0RmM+fGBwAhNcyf6nH98cn4ZaauZrfu F3cJz9t9MTdIlxXXF1uTAk9g9tR8sCoD4ekmM15MwtLZZTqmZNP1OelRDwwzNoOn 6pp4BUDOFhesynsI7uYoKdj0lt0fGg348FAlt9w1g9xQ819wrdaz/eAmV49eUZQ+ Ps8FY1OvJsVaoe3yGeEG0Ps87VTRCzSOFqstNDftYsz+q5Mm8ImEwG8JhuoqyDQD /VW+DamdXyN4tuUFQfg+Cz8+6WZRwfTeOVmuvC4aRuKNDWV5CC5qP1B7oZ/a2nYR 6M8+1W+RJOgjJ9wa/125Z6edEpzCRzfxDSLKyHbQ2q//0NK0kRrS9+Rdi6FlReV3 mVGtK5gFLVzcCyBSaMY48KnRe0/cjOZ5YXw5o/DIeYJkyPnOlN1pXOEMalQCf+uI 6D8pjO307lt6TLCiq3i2C8bN5k0FBqD4rirsp9PlRw3vTx1LI+KnhJQ8NOrrTheW gtDevoDMssnJdmVj3Wbv8DPWJOGSF6vA/xvsQBe0MglHFtuR/0jp9YC8ncvIP1RC CkFTqmpZXYg= =E8pa -----END PGP SIGNATURE----- Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "Device-tree updates for arm64 platforms. For the first time I can remember, this is actually larger than the corresponding branch for 32-bit platforms overall, though that has more individual changes. A significant portion this time is due to added machine support: - Initial support for the Realtek RTD1295 SoC, along with the Zidoo X9S set-top-box - Initial support for Actions Semi S900 and the Bubblegum-96 single-board-cёmputer. - Rockchips support for the rk3399-Firefly single-board-computer gets added, this one stands out for being relatively fast, affordable and well₋supported, compared to many boards that only fall into one or two of the above categories. - Mediatek gains support for the mt6797 mobile-phone SoC platform and corresponding evaluation board. - Amlogic board support gets added for the NanoPi K2 and S905x LibreTech CC single-board computers and the R-Box Pro set-top-box - Allwinner board support gets added for the OrangePi Win, Orangepi Zero Plus 2, NanoPi NEO2 and Orange Pi Prime single board computers and the SoPine system-on-module. - Renesas board support for Salvator-XS and H3ULCB automotive development systems. - Socionext Uniphier board support for LD11-global and LD20-global, whatever those may be. - Broadcom adds support for the new Stingray communication processor in its iProc family, along with two reference boards. Other updates include: - For the hisicon platform, support for Hi3660-Hikey960 gets extended significantly. - Lots of smaller updates for Renesas, Amlogic, Rockchip, UniPhier, Broadcom, Allwinner, Hisilicon, Qualcomm, Marvell, and NXP" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (243 commits) ARM64: dts: marvell: armada37xx: Fix timer interrupt specifiers Revert "arm64: dts: marvell: add dma-mask in crypto nodes for 7k/8k" arm64: dts: mediatek: don't include missing file ARM64: dts: meson-gxl: Add Libre Technology CC support dt-bindings: arm: amlogic: Add Libre Technology CC board dt-bindings: add Libre Technology vendor prefix arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K arm64: dts: zte: Use - instead of @ for DT OPP entries arm64: dts: marvell: add gpio support for Armada 7K/8K arm64: dts: marvell: add pinctrl support for Armada 7K/8K arm64: dts: marvell: use new binding for the system controller on cp110 arm64: dts: marvell: remove *-clock-output-names on cp110 arm64: dts: marvell: use new bindings for xor clocks on ap806 arm64: dts: marvell: mcbin: enable the mdio node arm64: dts: Add Actions Semi S900 and Bubblegum-96 dt-bindings: Add vendor prefix for uCRobotics arm64: dts: marvell: add xmdio nodes for 7k/8k arm64: dts: marvell: add a comment on the cp110 slave node status arm64: dts: marvell: remove cpm crypto nodes from dts files arm64: dts: marvell: cp110: enable the crypto engine at the SoC level ... |
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e854711291 |
ARM: SoC driver updates
- New SoC specific drivers - NVIDIA Tegra PM Domain support for newer SoCs (Tegra186 and later) based on the "BPMP" firmware - Clocksource and system controller drivers for the newly added Action Semi platforms (both arm and arm64). - Reset subsystem, merged through arm-soc by tradition: - New drivers for Altera Stratix10, TI Keystone and Cortina Gemini SoCs - Various subsystem-wide cleanups - Updates for existing SoC-specific drivers - TI GPMC (General Purpose Memory Controller) - Mediatek "scpsys" system controller support for MT6797 - Broadcom "brcmstb_gisb" bus arbitrer - ARM SCPI firmware - Renesas "SYSC" system controller One more driver update was submitted for the Freescale/NXP DPAA data path acceleration that has previously been used on PowerPC chips. I ended up postponing the merge until some API questions for its unusual MMIO access are resolved. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAWVpDFmCrR//JCVInAQKoihAAosgC3+3IHppOhHid+HepkOcp2teyKknw 42fSXVpTdfWa8Oe7q80Kzmz2CPNfFq2SzHz6oXb9WCcDFqSGr0b9aSE7NnksRjTf 2euHVJ4MnJpkRewvorRmcpK8dPXDcHwEw/8hU3yZtJUGI0IKtlrqXis+evgkz9cn YDynuVdAZgZiEfiNeSeadyNLcxaQCc3x9ovvsBXxBa1/x1pfeRnTbp+6hiHilCJu Szts/yAzZzZE9Jkf9dLKfNlsT6m2SgtjukqqOR+zHAhi7/BdTFSVUP6L8u7QjrR+ +ijTICg8FMJGiWLAOe6ED2qZVByN92EJ2AGwriYlSles9ouoGfRkJ2rwxyjbete7 avy0HP+PSBFXWdwbOcq8HX8CrbuBltagl5fkMokct6biWLLMshNZ33WWdQ6/DsM2 b9mAAZuhbs0g1qWUBD3+q6qBytSuGme6Px6fMoVEc4GQ2YVFUQOoEfZOGKRv1U1o aMWGt/6qeF8SG288rYAnQ/TuYWpOLtksV6yhotA00HUHhkTCy0xVCdyWGZtNyKhG o/x4YnhWFzHsXmqKcR1sM7LzfZY/WNmbrOLvK6i83Z0P7QptqrdaLAylL3iSPEyX ZDUgExf6PYXkWIewc3KwC5sJjuD05z3ZCgIR+mCezwbuD+3Z2fOdjodY/VBZ74hq URcM/BqtuWE= =5L6n -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "New SoC specific drivers: - NVIDIA Tegra PM Domain support for newer SoCs (Tegra186 and later) based on the "BPMP" firmware - Clocksource and system controller drivers for the newly added Action Semi platforms (both arm and arm64). Reset subsystem, merged through arm-soc by tradition: - New drivers for Altera Stratix10, TI Keystone and Cortina Gemini SoCs - Various subsystem-wide cleanups Updates for existing SoC-specific drivers - TI GPMC (General Purpose Memory Controller) - Mediatek "scpsys" system controller support for MT6797 - Broadcom "brcmstb_gisb" bus arbitrer - ARM SCPI firmware - Renesas "SYSC" system controller One more driver update was submitted for the Freescale/NXP DPAA data path acceleration that has previously been used on PowerPC chips. I ended up postponing the merge until some API questions for its unusual MMIO access are resolved" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits) clocksource: owl: Add S900 support clocksource: Add Owl timer soc: renesas: rcar-sysc: Use GENPD_FLAG_ALWAYS_ON firmware: tegra: Fix locking bugs in BPMP soc/tegra: flowctrl: Fix error handling soc/tegra: bpmp: Implement generic PM domains soc/tegra: bpmp: Update ABI header PM / Domains: Allow overriding the ->xlate() callback soc: brcmstb: enable drivers for ARM64 and BMIPS soc: renesas: Rework Kconfig and Makefile logic reset: Add the TI SCI reset driver dt-bindings: reset: Add TI SCI reset binding reset: use kref for reference counting soc: qcom: smsm: Improve error handling, quiesce probe deferral cpufreq: scpi: use new scpi_ops functions to remove duplicate code firmware: arm_scpi: add support to populate OPPs and get transition latency dt-bindings: reset: Add reset manager offsets for Stratix10 memory: omap-gpmc: add error message if bank-width property is absent memory: omap-gpmc: make dts snippet include semicolon reset: Add a Gemini reset controller ... |
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1849f800fb |
ARM: Device-tree updates
Device-tree continues to see lots of updates. The majority of patches here are smaller changes for new hardware on existing platforms, and there are a few larger changes worth pointing out. New machines: - The new Action Semi S500 platform is added along with initial support for the LeMaker Guitar board. - STM32 gains support for three new boards: stm32h743-disco, stm32f746-disco, and stm32f769-disco, along with new device support for the existing stm32f429 boards. - Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H with 10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module plus board. - On Marvell "mvebu", we gain support for the Linksys WRT3200ACM wireless router. - For NXP i.MX, we gain support for the Gateworks Ventana GW5600 and the Technexion Pico i.MX7D single-board computers. - The BeagleBone Blue is added for OMAP, it's the latest variation of the popular Beaglebone Black single-board computer. - The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards are added, these are the latest variations of a seemingly endless supply of similar single-board computers. Other updates: - Linus Walleij improves support for the "Faraday" based SoC platforms from various SoC makers (Moxart, Aspeed, Gemini) - The ARM Mali GPU is now describe on Rockchips SoCs - Mediatek MT7623 is extended significantly, making it much more useful. - Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom, Allwinner, Qualcomm, iMX - For Amlogic, the clock support is extended a lot on meson8b. - We now build the devicetree file for the Raspberry Pi 3 on 32-bit ARM, in addition to the existing ARM64 support, to help users wanting to run a 32-bit system on it. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAWVpLH2CrR//JCVInAQK5hxAAj8u8Y1RFWsfEXqAeGBme7PdiilEfm1ZR U6wu6unW/zUb+QwQj52hzmYB9+FEd/bcNgw4AqEzypqMA+vJ6AP5tpujCrOXREsG sk2LBnhOi/QbYfzIH6MYqjnrMbjSZ3LZpJ8+PSO+DpGwMkSKhWG5Jjjf1V69IbYJ 8eTpsnDbpo1OA4mtj+7fDxKGdH2WFx4922UuqTSzgoIqaTV1X2wcicpiJsfKynXY 3I9Apwhf/gKbtkWkVlNW7gxaAHONZOHEJ9rgIu6XoUCKbQrtbjZWEbKDUM1nJq5J 4ZYbd9r1HZvujuLk2/IuKTidmXj/4Q1FiIn4jqHINVqNj8dPKKYIoW5nU8rlbxG/ Ymy9WRY97YznWai49dnURGRbPNuiGyd9oaVsw7Wi1G2F4PgkAMgHs1rpERtIgnZg ZzPxlXZdowYUgL6Qawk3//81QqGG/YL8VZ+VltPkjFNNYtEk0U+j3xW/n2ORAdvT 8EuNlTKid0Cq045nKkpAd5AWcgHIJe7IE3KiX/SpBtgH5PINlnUnwnm2f2TjRZCh bw3g32er1JLSW9lAl6agu58lxox7NC1AV4Qy7Qk23IsR2mAv5gb5zad5GXwE41nT qcyJ4OnDUpv/3f0LmH3WATQeHNnG8l8RgY8B6fH2GLlTQdmO7W7UTJ8tWU8E2sZ8 5xPePuor0JM= =onXv -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM device-tree updates from Arnd Bergmann: "Device-tree continues to see lots of updates. The majority of patches here are smaller changes for new hardware on existing platforms, and there are a few larger changes worth pointing out. New machines: - The new Action Semi S500 platform is added along with initial support for the LeMaker Guitar board. - STM32 gains support for three new boards: stm32h743-disco, stm32f746-disco, and stm32f769-disco, along with new device support for the existing stm32f429 boards. - Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H with 10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module plus board. - On Marvell "mvebu", we gain support for the Linksys WRT3200ACM wireless router. - For NXP i.MX, we gain support for the Gateworks Ventana GW5600 and the Technexion Pico i.MX7D single-board computers. - The BeagleBone Blue is added for OMAP, it's the latest variation of the popular Beaglebone Black single-board computer. - The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards are added, these are the latest variations of a seemingly endless supply of similar single-board computers. Other updates: - Linus Walleij improves support for the "Faraday" based SoC platforms from various SoC makers (Moxart, Aspeed, Gemini) - The ARM Mali GPU is now describe on Rockchips SoCs - Mediatek MT7623 is extended significantly, making it much more useful. - Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom, Allwinner, Qualcomm, iMX - For Amlogic, the clock support is extended a lot on meson8b. - We now build the devicetree file for the Raspberry Pi 3 on 32-bit ARM, in addition to the existing ARM64 support, to help users wanting to run a 32-bit system on it" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (345 commits) ARM: dts: socfpga: set the i2c frequency ARM: dts: socfpga: Add second ethernet alias to VINING FPGA ARM: dts: socfpga: Drop LED node from VINING FPGA ARM: dts: socfpga: Remove I2C EEPROMs from VINING FPGA ARM: dts: socfpga: Enable QSPI support on VINING FPGA ARM: dts: socfpga: Fix the ethernet clock phandle ARM: pxa: Use - instead of @ for DT OPP entries ARM: dts: owl-s500: Add SPS node ARM: dts: owl-s500: Set CPU enable-method dt-bindings: arm: cpus: Add S500 enable-method ARM: dts: Add Actions Semi S500 and LeMaker Guitar dt-bindings: arm: Document Actions Semi S900 dt-bindings: timer: Document Owl timer ARM: dts: imx6q-cm-fx6: add sdio wifi/bt nodes dt-bindings: arm: Document Actions Semi S500 dt-bindings: Add vendor prefix for Actions Semi ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango) ARM: dts: armada-385-linksys: fixup button node names ARM: dts: armada-385-linksys: group pins in pinctrl ... |
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8ca302e9c6 |
ARM: SoC platform updates
SoC platform changes (arch/arm/mach-*). This merge window, the bulk is for a few platforms: - Andres Färber adds initial support for the Actions Semi S500 (a.k.a. 'owl') platform, a close relative of the S900 platform he adds for arm64. - in mach-omap2, we remove more legacy code - Rockchips gains support for the RV1108 SoC designed for camera applications. - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70) - Minor updates for other platforms, including davinci, s3c64xx, prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAWVo7+GCrR//JCVInAQKbMA//WeEPEDUt0boJCUfuzXfZ35S5ksBMBGQa NaOJvcW3T//7Tfa88YlBEB7h1w22u1Sv4/CfcistdSPbUwZLyYo6aUz53AwlUnLs bVHnd8+h1xN6qSDjzOPIEQQHg9OVIRBD49moBgJ1BkXzyqR/RI1jPPyyRl5vucSW MYRxhPkplmjFL5+6uvFoSOdd3Z/FLoEYRrkIk4iu+KgKtnNlj4P1FNSdm6Yb29dj yzmXoSpxEzbq0ahGlkjrekEJxTWvW1vOq9d+xTKwTbXoM7pbzXnBRzx4q2Fg9GAT BJseMx+uDEG/+eYrFZA7jX/HgpKB1fAlCGp+dK6GIcJoEM6lFKJRsJrP702KPzg0 PqOMM/htq/4hZ7Waz+Yj3lyVF2C+A6Dn/fXPaHJGdTLj4r0OLgZayhBXFHp1VX2G 9ERx1UCnfxeY91VBUM99qo21ECT7j0C/bZLln8MFjwX8tk3OATkElIAtnsEHxJ5d v4TEkI/AcpMW4lMj/u/hp1PJMCvhlSreWPGx1PRax6va+YB5Ov19DshVgyfoTTq9 kArUJWQdKo4aKqB+feg9NHNC01xSLw5ywKb+oIyYP3jZzMexzRyP5L7EAVOu6Cel iHeIRpo8VjX63gltE+9u4aZ/aEMREGVcgkzuwBTKqbVQ3ismrmGYe54VnFAushJS m+XSB250Vz8= =8F3w -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "SoC platform changes (arch/arm/mach-*). This merge window, the bulk is for a few platforms: - Andres Färber adds initial support for the Actions Semi S500 (aka 'owl') platform, a close relative of the S900 platform he adds for arm64. - in mach-omap2, we remove more legacy code - Rockchips gains support for the RV1108 SoC designed for camera applications. - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70) - Minor updates for other platforms, including davinci, s3c64xx, prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits) ARM: owl: smp: Drop bogus holding pen ARM: owl: Drop custom machine ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3 soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating soc: actions: Add Owl SPS dt-bindings: power: Add Owl SPS power domains MAINTAINERS: Update Actions Semi section with SPS ARM: owl: Implement CPU enable-method for S500 MAINTAINERS: Add Actions Semi Owl section ARM: Prepare Actions Semi S500 ARM: socfpga: Increase max number of GPIOs ARM: stm32: Introduce MACH_STM32F469 flag ARM: prima2: remove redundant select CPU_V7 ARM: davinci: fix const warnings ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON ARM: OMAP4: hwmod_data: add SHAM crypto accelerator ARM: OMAP4: hwmod data: add des ARM: OMAP4: hwmod data: add aes2 ARM: OMAP4: hwmod data: add aes1 ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe() ... |
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f4dd029ee0 |
Char/Misc patches for 4.13-rc1
Here is the "big" char/misc driver patchset for 4.13-rc1. Lots of stuff in here, a large thunderbolt update, w1 driver header reorg, the new mux driver subsystem, google firmware driver updates, and a raft of other smaller things. Full details in the shortlog. All of these have been in linux-next for a while with the only reported issue being a merge problem with this tree and the jc-docs tree in the w1 documentation area. The fix should be obvious for what to do when it happens, if not, we can send a follow-up patch for it afterward. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWVpXKA8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ynLrQCdG9SxRjAbOd6pT9Fr2NAzpUG84YsAoLw+I3iO EMi60UXWqAFJbtVMS9Aj =yrSq -----END PGP SIGNATURE----- Merge tag 'char-misc-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc updates from Greg KH: "Here is the "big" char/misc driver patchset for 4.13-rc1. Lots of stuff in here, a large thunderbolt update, w1 driver header reorg, the new mux driver subsystem, google firmware driver updates, and a raft of other smaller things. Full details in the shortlog. All of these have been in linux-next for a while with the only reported issue being a merge problem with this tree and the jc-docs tree in the w1 documentation area" * tag 'char-misc-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (147 commits) misc: apds990x: Use sysfs_match_string() helper mei: drop unreachable code in mei_start mei: validate the message header only in first fragment. DocBook: w1: Update W1 file locations and names in DocBook mux: adg792a: always require I2C support nvmem: rockchip-efuse: add support for rk322x-efuse nvmem: core: add locking to nvmem_find_cell nvmem: core: Call put_device() in nvmem_unregister() nvmem: core: fix leaks on registration errors nvmem: correct Broadcom OTP controller driver writes w1: Add subsystem kernel public interface drivers/fsi: Add module license to core driver drivers/fsi: Use asynchronous slave mode drivers/fsi: Add hub master support drivers/fsi: Add SCOM FSI client device driver drivers/fsi/gpio: Add tracepoints for GPIO master drivers/fsi: Add GPIO based FSI master drivers/fsi: Document FSI master sysfs files in ABI drivers/fsi: Add error handling for slave drivers/fsi: Add tracepoints for low-level operations ... |
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03ffbcdd78 |
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner: "The irq department delivers: - Expand the generic infrastructure handling the irq migration on CPU hotplug and convert X86 over to it. (Thomas Gleixner) Aside of consolidating code this is a preparatory change for: - Finalizing the affinity management for multi-queue devices. The main change here is to shut down interrupts which are affine to a outgoing CPU and reenabling them when the CPU comes online again. That avoids moving interrupts pointlessly around and breaking and reestablishing affinities for no value. (Christoph Hellwig) Note: This contains also the BLOCK-MQ and NVME changes which depend on the rework of the irq core infrastructure. Jens acked them and agreed that they should go with the irq changes. - Consolidation of irq domain code (Marc Zyngier) - State tracking consolidation in the core code (Jeffy Chen) - Add debug infrastructure for hierarchical irq domains (Thomas Gleixner) - Infrastructure enhancement for managing generic interrupt chips via devmem (Bartosz Golaszewski) - Constification work all over the place (Tobias Klauser) - Two new interrupt controller drivers for MVEBU (Thomas Petazzoni) - The usual set of fixes, updates and enhancements all over the place" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (112 commits) irqchip/or1k-pic: Fix interrupt acknowledgement irqchip/irq-mvebu-gicp: Allocate enough memory for spi_bitmap irqchip/gic-v3: Fix out-of-bound access in gic_set_affinity nvme: Allocate queues for all possible CPUs blk-mq: Create hctx for each present CPU blk-mq: Include all present CPUs in the default queue mapping genirq: Avoid unnecessary low level irq function calls genirq: Set irq masked state when initializing irq_desc genirq/timings: Add infrastructure for estimating the next interrupt arrival time genirq/timings: Add infrastructure to track the interrupt timings genirq/debugfs: Remove pointless NULL pointer check irqchip/gic-v3-its: Don't assume GICv3 hardware supports 16bit INTID irqchip/gic-v3-its: Add ACPI NUMA node mapping irqchip/gic-v3-its-platform-msi: Make of_device_ids const irqchip/gic-v3-its: Make of_device_ids const irqchip/irq-mvebu-icu: Add new driver for Marvell ICU irqchip/irq-mvebu-gicp: Add new driver for Marvell GICP dt-bindings/interrupt-controller: Add DT binding for the Marvell ICU genirq/irqdomain: Remove auto-recursive hierarchy support irqchip/MSI: Use irq_domain_update_bus_token instead of an open coded access ... |
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ffe3744a59 |
Actions Semi SoC drivers for 4.13
This adds clock source and power domain drivers for S500/S900. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJZTUdyAAoJEPou0S0+fgE/cxIQALU/QhWWSaHwbGnavU9gKbar lOwfoSmdwlrCR7hUCxH14o11fF03fXxWdEGz825DJjZghEIVn7VEW521DzXzA1dy bF6s95seZXYKUwtcPERgxbRP89itr/cTZiIGnEeKFfAIU1lmd5KNYHme05+e2bcQ G6St+8NbtqKzMaXSaDIHiHpA2ewiMmnsg9exOCcFFYCe2qUzKVOYFtbqeb+cldML yUIfgRQnGHiVqhbzx/aSwwkmZic+j7VCwScaZEL6THJ0pem+ayuTCBdvk9LYk/aM cksZf1Jc5RwFi6ErybpWkVBE0U2voSyNHoK10dmUy0kyS2hj3ttXjtu1yFHV/K/5 /Ebe+aUP37sMoDQn/ZcAEY1+LV4RieL/8ePeUgH1dZ/+57T4Zapq2jE2iUazotF5 VleN1Gn6UDUnPDTXUzwTSPaE2Kw85TMKVeubOy/mbJ71E1ggB02xzHkI8nhw9xMX SzRXykR/lIrWyDufmRDiyczMhNcClgiVrxcwU0VrkgJKXrWa5Nj2xyo06GsPjftd 27P11Hi7aWFwZADw57k7h61yxVzJT9FpSp2ekYipDkgw6VAWiPvkbe90nolGI0zb 3gzWWxOZnqxk1gdfY3eTdLxAhFXituC/iSxAFSmWeLtL6OcFVQqZaJgi5MDL7vPg afrLMF5xasvqA2+zudak =FpP/ -----END PGP SIGNATURE----- Merge tag 'actions-drivers-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/drivers Pull "Actions Semi SoC drivers for 4.13" from Andreas Färber: This adds clock source and power domain drivers for S500/S900. * tag 'actions-drivers-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions: soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating soc: actions: Add Owl SPS dt-bindings: power: Add Owl SPS power domains clocksource: owl: Add S900 support clocksource: Add Owl timer |
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6d599c8d35 |
Amlogic 64-bit DT changes for v4.13 (round 2)
- support new SPI controller driver - several more leaf clocks exposed to DT - New board: S905x LibreTech CC board -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIbBAABCAAGBQJZTDXpAAoJEFk3GJrT+8ZlErwP9RKRooWK3NkF+v9fFz9vCEdR 3RsF67B1TUc9STkTN5XieHVh07qGkEWpBwbAFItuim/sZZKth6cfCX45nRXh0Rjm cz56GHUeuAoY6uVvZUlFz9Oa7vi44XShNc3tztQQ9Bq5Nx1JHDgHRi3TrzjUgUEt zbKHESOAkPMEYu0kDIhQguiKoPjF1uMuyC/8advIa9DJLmx4XeMqDReRcrRzCOs9 AejuT+ZMA6K4YuzBFURpXsNYhKw8LS/K0tt/Qw5tWGN1iq+/JXaOKmY/e5UEo1we +PnwX0QZT96Lhidz1Ha7MmYfxI1MqAC6YifN//w4//ChazgTb0mz6Qokv1jjPNzE FK6c8aDdjHx8yMX1ldOKZ0tRO5IXWotHJU0Ds007WSOVuOyMrDfA0olANCCtBxuc R7j6xIM4OVp53RMVuCXte59MXeJXUwfpS91GQCMUDo+KFsO/ysfs1yaUQXawvLKO hZM5Ojw1ZuK1KekTUCbI3CJ1ALfY4KbHa3fCdLtrAKModqb0MP+hOlU0swt0SOcP vA2XgZxynKVJ2+RmleUxiI48Gkk8e8zDij4qgPCsIZoPjxOnZ2SI9UquHPA2upAi cMKtRX5Vt5I6lC0tGQAuZ32MiKvBslkBgrZI90f4yebMHgz8TzWEXNhaPPNnRFpO Tnt1tBWIh3DWYoi8vnI= =J5Ux -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64 Pull "Amlogic 64-bit DT changes for v4.13 (round 2)" from Kevin Hilman: - support new SPI controller driver - several more leaf clocks exposed to DT - New board: S905x LibreTech CC board * tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gxl: Add Libre Technology CC support dt-bindings: arm: amlogic: Add Libre Technology CC board dt-bindings: add Libre Technology vendor prefix ARM64: dts: meson-gx: Add SPICC nodes clk: meson-gxbb: un-export the CPU clock clk: meson-gxbb: expose UART clocks clk: meson-gxbb: expose SPICC gate clk: meson-gxbb: expose spdif master clock clk: meson-gxbb: expose i2s master clock clk: meson-gxbb: expose spdif clock gates |
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1964babb26 |
Amlogic 32-bit DT changes for v4.13 (round 2)
- greatly expands DT clock support for meson8b -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJZTDWYAAoJEFk3GJrT+8ZlGwsP/0K7Mb81/wkne6Yr7FOQ/PTm QcPG9QGhj/2QyafiAEu5REeg/oraHxt/HCAC9uz7jM0CfrdYLD0imoMTOgqaIGZc BtvdJthSRUZPc91ou6vP527MB46ipTtP/69Ed/hmkSALm9QAhs430HsXfmmU7KnS M0dbQ1KOqQ4Hd/zup3D1LfUlsaOcuiiu73Ys3Xg5zBAq8QWJypLhZL7f9dvVYCQ+ lqEtsjUt/qNvky72oKsSZX6Eb2gHKtC38fOVeYq3Z5xatU2UNWlEBGxmfTyFQP+E T3wBvCVgSPmqW0wD9yGdfqKtH7ZXJ1OBE/21pxjPLq1Rb45kC26jC9FMDOb0RS3w jaPzinjCcJ0AR5wUojmy7xbaVBrAESaldtj32Fxz4LIe6qPUB8AAiUsTAzwve/Bk 17RP5Zf2BsBcmfsai+HYc6zGCwqC2pbmotuX3Sfw/CeE3sRhWqtpkixV9xsidM5f oR7bBsAjAhzRJ+SvMiJ0kPa9iNQdCgE3C2quIns7F35jwuWMAckGe6BeJ6RbX1ZK Mrzq4r7Q1utYldYfBgus/1Tf/RW+iwqGcyarhq6GAFcjx9siKF4lb5tXt237xwK2 vP+KTRAAqii3F0+sUkzKZV2/RpqRDslmCPuq2mQNRfCtm+Px97vl+saRduz2R2jd vcKSfM8Vj2voxITL3nNz =o8Zj -----END PGP SIGNATURE----- Merge tag 'amlogic-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Merge "Amlogic 32-bit DT changes for v4.13 (round 2)" from Kevin Hilman: - greatly expands DT clock support for meson8b * tag 'amlogic-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (22 commits) ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b ARM: dts: meson8b: add the SCU device node ARM: dts: meson: add USB support on Meson8 and Meson8b ARM: dts: meson: add the hardware random number generator ARM: dts: meson8: add reserved memory zones ARM: dts: meson: add the SAR ADC ARM: dts: meson8: add the pins for the SDIO controller ARM: dts: meson8: add the PWM_E and PWM_F pins ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING macros ARM: dts: meson: use C preprocessor friendly include syntax ARM: dts: meson8: fix the IR receiver pins clk: meson8b: export the ethernet gate clock clk: meson8b: export the USB clocks clk: meson8b: export the gate clock for the HW random number generator clk: meson8b: export the SDIO clock clk: meson8b: export the SAR ADC clocks clk: meson-gxbb: un-export the CPU clock clk: meson-gxbb: expose UART clocks clk: meson-gxbb: expose SPICC gate clk: meson-gxbb: expose spdif master clock ... |
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4ca3fbd981 |
dt-bindings: power: Add Owl SPS power domains
Define power domains for all non-reserved S500 power gates. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Andreas Färber <afaerber@suse.de> |
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e0de91a977 |
irqchip/irq-mvebu-icu: Add new driver for Marvell ICU
The Marvell ICU unit is found in the CP110 block of the Marvell Armada 7K and 8K SoCs. It collects the wired interrupts of the devices located in the CP110 and turns them into SPI interrupts in the GIC located in the AP806 side of the SoC, by using a memory transaction. Until now, the ICU was configured in a static fashion by the firmware, and Linux was relying on this static configuration. By having Linux configure the ICU, we are more flexible, and we can allocate dynamically the GIC SPI interrupts only for devices that are actually in use. The driver was initially written by Hanna Hawa <hannah@marvell.com>. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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0d84659619 |
clk: hisilicon: add usb2 clocks for hi3798cv200 SoC
Add usb2 clocks for hi3798cv200 SoC. Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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25146e1e8f |
dt-bindings: clk: Extend binding doc for Stingray SOC
Update iproc clock dt-binding documentation with Stingray pll and clock details. Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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567bf2ed86 |
clk: mediatek: export cpu multiplexer clock for MT8173 SoCs
The patch enables CPU multiplexer clock on MT8173 SoC which fixes up cpufreq driver fails at acquiring intermediate clock source when driver probe is called. Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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43ed50ee5a |
clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs
The patch enables CPU multiplexer clock on MT2701/MT7623 SoC which fixes up cpufreq driver fails at acquiring intermediate clock source when driver probe is called. Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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3ff77275f7 |
clk: hi6220: add acpu clock
Add acpu clock, including sft clock controlling hi6220 coresight module Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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6454504c80 |
clk: zx296718: export I2S mux clocks
Export I2S mux clocks, so that device tree can refer to them for setting a better parent clock for I2S work clock. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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22039d150f |
clk: imx7d: create clocks behind rawnand clock gate
The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT and NAND_CLK_ROOT. However, the gate has been in the chain of the latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT only, e.g. as required by APBH-Bridge-DMA. Add new clocks which represent the clock after the gate, and use a shared clock gate to correctly model the hardware. Signed-off-by: Stefan Agner <stefan@agner.ch> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Han Xu <han.xu@nxp.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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9357c150e6 |
clk: hi3660: add clocks for video encoder, decoder and ISP
This patch adds more clocks for hi3660, including: - video encoder and decoder - ISP (Image Signal Processing) Signed-off-by: Chen Jun <chenjun14@huawei.com> Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org> Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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bcb486f026 |
clk: qcom: Add DT bindings for ipq8074 gcc clock controller
Add the compatible strings and the include file for ipq8074 gcc clock controller. Acked-by: Rob Herring <robh@kernel.org> (bindings) Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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8b979d6258 |
clk: add DT bindings header for Gemini clock controller
This adds the DT binding macros used by the clock controller. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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d8e349af86 |
reset: add DT bindings header for Gemini reset controller
This adds the DT binding macros used by the reset controller. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |