Pull x86 mm updates from Thomas Gleixner:
- Make lazy TLB mode even lazier to avoid pointless switch_mm()
operations, which reduces CPU load by 1-2% for memcache workloads
- Small cleanups and improvements all over the place
* 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/mm: Remove redundant check for kmem_cache_create()
arm/asm/tlb.h: Fix build error implicit func declaration
x86/mm/tlb: Make clear_asid_other() static
x86/mm/tlb: Skip atomic operations for 'init_mm' in switch_mm_irqs_off()
x86/mm/tlb: Always use lazy TLB mode
x86/mm/tlb: Only send page table free TLB flush to lazy TLB CPUs
x86/mm/tlb: Make lazy TLB mode lazier
x86/mm/tlb: Restructure switch_mm_irqs_off()
x86/mm/tlb: Leave lazy TLB mode at page table free time
mm: Allocate the mm_cpumask (mm->cpu_bitmap[]) dynamically based on nr_cpu_ids
x86/mm: Add TLB purge to free pmd/pte page interfaces
ioremap: Update pgtable free interfaces with addr
x86/mm: Disable ioremap free page handling on x86-PAE
Pull perf update from Thomas Gleixner:
"The perf crowd presents:
Kernel updates:
- Removal of jprobes
- Cleanup and consolidatation the handling of kprobes
- Cleanup and consolidation of hardware breakpoints
- The usual pile of fixes and updates to PMUs and event descriptors
Tooling updates:
- Updates and improvements all over the place. Nothing outstanding,
just the (good) boring incremental grump work"
* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (103 commits)
perf trace: Do not require --no-syscalls to suppress strace like output
perf bpf: Include uapi/linux/bpf.h from the 'perf trace' script's bpf.h
perf tools: Allow overriding MAX_NR_CPUS at compile time
perf bpf: Show better message when failing to load an object
perf list: Unify metric group description format with PMU event description
perf vendor events arm64: Update ThunderX2 implementation defined pmu core events
perf cs-etm: Generate branch sample for CS_ETM_TRACE_ON packet
perf cs-etm: Generate branch sample when receiving a CS_ETM_TRACE_ON packet
perf cs-etm: Support dummy address value for CS_ETM_TRACE_ON packet
perf cs-etm: Fix start tracing packet handling
perf build: Fix installation directory for eBPF
perf c2c report: Fix crash for empty browser
perf tests: Fix indexing when invoking subtests
perf trace: Beautify the AF_INET & AF_INET6 'socket' syscall 'protocol' args
perf trace beauty: Add beautifiers for 'socket''s 'protocol' arg
perf trace beauty: Do not print NULL strarray entries
perf beauty: Add a generator for IPPROTO_ socket's protocol constants
tools include uapi: Grab a copy of linux/in.h
perf tests: Fix complex event name parsing
perf evlist: Fix error out while applying initial delay and LBR
...
Pull locking/atomics update from Thomas Gleixner:
"The locking, atomics and memory model brains delivered:
- A larger update to the atomics code which reworks the ordering
barriers, consolidates the atomic primitives, provides the new
atomic64_fetch_add_unless() primitive and cleans up the include
hell.
- Simplify cmpxchg() instrumentation and add instrumentation for
xchg() and cmpxchg_double().
- Updates to the memory model and documentation"
* 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (48 commits)
locking/atomics: Rework ordering barriers
locking/atomics: Instrument cmpxchg_double*()
locking/atomics: Instrument xchg()
locking/atomics: Simplify cmpxchg() instrumentation
locking/atomics/x86: Reduce arch_cmpxchg64*() instrumentation
tools/memory-model: Rename litmus tests to comply to norm7
tools/memory-model/Documentation: Fix typo, smb->smp
sched/Documentation: Update wake_up() & co. memory-barrier guarantees
locking/spinlock, sched/core: Clarify requirements for smp_mb__after_spinlock()
sched/core: Use smp_mb() in wake_woken_function()
tools/memory-model: Add informal LKMM documentation to MAINTAINERS
locking/atomics/Documentation: Describe atomic_set() as a write operation
tools/memory-model: Make scripts executable
tools/memory-model: Remove ACCESS_ONCE() from model
tools/memory-model: Remove ACCESS_ONCE() from recipes
locking/memory-barriers.txt/kokr: Update Korean translation to fix broken DMA vs. MMIO ordering example
MAINTAINERS: Add Daniel Lustig as an LKMM reviewer
tools/memory-model: Fix ISA2+pooncelock+pooncelock+pombonce name
tools/memory-model: Add litmus test for full multicopy atomicity
locking/refcount: Always allow checked forms
...
Pull genirq updates from Thomas Gleixner:
"The irq departement provides:
- A synchronization fix for free_irq() to synchronize just the
removed interrupt thread on shared interrupt lines.
- Consolidate the multi low level interrupt entry handling and mvoe
it to the generic code instead of adding yet another copy for
RISC-V
- Refactoring of the ARM LPI allocator and LPI exposure to the
hypervisor
- Yet another interrupt chip driver for the JZ4725B SoC
- Speed up for /proc/interrupts as people seem to love reading this
file with high frequency
- Miscellaneous fixes and updates"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits)
irqchip/gic-v3-its: Make its_lock a raw_spin_lock_t
genirq/irqchip: Remove MULTI_IRQ_HANDLER as it's now obselete
openrisc: Use the new GENERIC_IRQ_MULTI_HANDLER
arm64: Use the new GENERIC_IRQ_MULTI_HANDLER
ARM: Convert to GENERIC_IRQ_MULTI_HANDLER
irqchip: Port the ARM IRQ drivers to GENERIC_IRQ_MULTI_HANDLER
irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices
dt-bindings: irqchip: renesas-irqc: Document r8a77980 support
dt-bindings: irqchip: renesas-irqc: Document r8a77470 support
irqchip/ingenic: Add support for the JZ4725B SoC
irqchip/stm32: Add exti0 translation for stm32mp1
genirq: Remove redundant NULL pointer check in __free_irq()
irqchip/gic-v3-its: Honor hypervisor enforced LPI range
irqchip/gic-v3: Expose GICD_TYPER in the rdist structure
irqchip/gic-v3-its: Drop chunk allocation compatibility
irqchip/gic-v3-its: Move minimum LPI requirements to individual busses
irqchip/gic-v3-its: Use full range of LPIs
irqchip/gic-v3-its: Refactor LPI allocator
genirq: Synchronize only with single thread on free_irq()
genirq: Update code comments wrt recycled thread_mask
...
Pull EFI updates from Thomas Gleixner:
"The EFI pile:
- Make mixed mode UEFI runtime service invocations mutually
exclusive, as mandated by the UEFI spec
- Perform UEFI runtime services calls from a work queue so the calls
into the firmware occur from a kernel thread
- Honor the UEFI memory map attributes for live memory regions
configured by UEFI as a framebuffer. This works around a coherency
problem with KVM guests running on ARM.
- Cleanups, improvements and fixes all over the place"
* 'efi-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
efivars: Call guid_parse() against guid_t type of variable
efi/cper: Use consistent types for UUIDs
efi/x86: Replace references to efi_early->is64 with efi_is_64bit()
efi: Deduplicate efi_open_volume()
efi/x86: Add missing NULL initialization in UGA draw protocol discovery
efi/x86: Merge 32-bit and 64-bit UGA draw protocol setup routines
efi/x86: Align efi_uga_draw_protocol typedef names to convention
efi/x86: Merge the setup_efi_pci32() and setup_efi_pci64() routines
efi/x86: Prevent reentrant firmware calls in mixed mode
efi/esrt: Only call efi_mem_reserve() for boot services memory
fbdev/efifb: Honour UEFI memory map attributes when mapping the FB
efi: Drop type and attribute checks in efi_mem_desc_lookup()
efi/libstub/arm: Add opt-in Kconfig option for the DTB loader
efi: Remove the declaration of efi_late_init() as the function is unused
efi/cper: Avoid using get_seconds()
efi: Use a work queue to invoke EFI Runtime Services
efi/x86: Use non-blocking SetVariable() for efi_delete_dummy_variable()
efi/x86: Clean up the eboot code
Return statements in functions returning bool should use true or false
instead of an integer value.
This code was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
In order to generate Group0 SGIs, let's add some decoding logic to
access_gic_sgi(), and pass the generating group accordingly.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Although vgic-v3 now supports Group0 interrupts, it still doesn't
deal with Group0 SGIs. As usually with the GIC, nothing is simple:
- ICC_SGI1R can signal SGIs of both groups, since GICD_CTLR.DS==1
with KVM (as per 8.1.10, Non-secure EL1 access)
- ICC_SGI0R can only generate Group0 SGIs
- ICC_ASGI1R sees its scope refocussed to generate only Group0
SGIs (as per the note at the bottom of Table 8-14)
We only support Group1 SGIs so far, so no material change.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
- GICv3 ITS LPI allocation revamp
- GICv3 support for hypervisor-enforced LPI range
- GICv3 ITS conversion to raw spinlock
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Merge tag 'irqchip-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier:
- GICv3 ITS LPI allocation revamp
- GICv3 support for hypervisor-enforced LPI range
- GICv3 ITS conversion to raw spinlock
The 4-way ChaCha20 NEON code implements 16-bit rotates with vrev32.16,
but the one-way code (used on remainder blocks) implements it with
vshl + vsri, which is slower. Switch the one-way code to vrev32.16 too.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The BTF conflicts were simple overlapping changes.
The virtio_net conflict was an overlap of a fix of statistics counter,
happening alongisde a move over to a bonafide statistics structure
rather than counting value on the stack.
Signed-off-by: David S. Miller <davem@davemloft.net>
Spectre variant 1 attacks are about this sequence of pseudo-code:
index = load(user-manipulated pointer);
access(base + index * stride);
In order for the cache side-channel to work, the access() must me made
to memory which userspace can detect whether cache lines have been
loaded. On 32-bit ARM, this must be either user accessible memory, or
a kernel mapping of that same user accessible memory.
The problem occurs when the load() speculatively loads privileged data,
and the subsequent access() is made to user accessible memory.
Any load() which makes use of a user-maniplated pointer is a potential
problem if the data it has loaded is used in a subsequent access. This
also applies for the access() if the data loaded by that access is used
by a subsequent access.
Harden the get_user() accessors against Spectre attacks by forcing out
of bounds addresses to a NULL pointer. This prevents get_user() being
used as the load() step above. As a side effect, put_user() will also
be affected even though it isn't implicated.
Also harden copy_from_user() by redoing the bounds check within the
arm_copy_from_user() code, and NULLing the pointer if out of bounds.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Fixing __get_user() for spectre variant 1 is not sane: we would have to
add address space bounds checking in order to validate that the location
should be accessed, and then zero the address if found to be invalid.
Since __get_user() is supposed to avoid the bounds check, and this is
exactly what get_user() does, there's no point having two different
implementations that are doing the same thing. So, when the Spectre
workarounds are required, make __get_user() an alias of get_user().
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Borrow the x86 implementation of __inttype() to use in get_user() to
select an integer type suitable to temporarily hold the result value.
This is necessary to avoid propagating the volatile nature of the
result argument, which can cause the following warning:
lib/iov_iter.c:413:5: warning: optimization may eliminate reads and/or writes to register variables [-Wvolatile-register-var]
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
__get_user_error() is used as a fast accessor to make copying structure
members as efficient as possible. However, with software PAN and the
recent Spectre variant 1, the efficiency is reduced as these are no
longer fast accessors.
In the case of software PAN, it has to switch the domain register around
each access, and with Spectre variant 1, it would have to repeat the
access_ok() check for each access.
Rather than using __get_user_error() to copy each semops element member,
copy each semops element in full using __copy_from_user().
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
__get_user_error() is used as a fast accessor to make copying structure
members in the signal handling path as efficient as possible. However,
with software PAN and the recent Spectre variant 1, the efficiency is
reduced as these are no longer fast accessors.
In the case of software PAN, it has to switch the domain register around
each access, and with Spectre variant 1, it would have to repeat the
access_ok() check for each access.
Use __copy_from_user() rather than __get_user_err() for individual
members when restoring VFP state.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Almost all architectures include it. Add a ARCH_NO_PREEMPT symbol to
disable preempt support for alpha, hexagon, non-coldfire m68k and
user mode Linux.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Move the source of lib/Kconfig.debug and arch/$(ARCH)/Kconfig.debug to
the top-level Kconfig. For two architectures that means moving their
arch-specific symbols in that menu into a new arch Kconfig.debug file,
and for a few more creating a dummy file so that we can include it
unconditionally.
Also move the actual 'Kernel hacking' menu to lib/Kconfig.debug, where
it belongs.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Instead of duplicating the source statements in every architecture just
do it once in the toplevel Kconfig file.
Note that with this the inclusion of arch/$(SRCARCH/Kconfig moves out of
the top-level Kconfig into arch/Kconfig so that don't violate ordering
constraits while keeping a sensible menu structure.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Pull ARM fix from Russell King:
"Just a single fix this time around for recent binutils causing build
problems when generating Thumb-2 code"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8781/1: Fix Thumb-2 syscall return for binutils 2.29+
Commit 2c4541e24c ("mm: use vma_init() to initialize VMAs on stack and
data segments") tried to initialize various left-over ad-hoc vma's
"properly", but actually made things worse for the temporary vma's used
for TLB flushing.
vma_init() doesn't actually initialize all of the vma, just a few
fields, so doing something like
- struct vm_area_struct vma = { .vm_mm = tlb->mm, };
+ struct vm_area_struct vma;
+
+ vma_init(&vma, tlb->mm);
was actually very bad: instead of having a nicely initialized vma with
every field but "vm_mm" zeroed, you'd have an entirely uninitialized vma
with only a couple of fields initialized. And they weren't even fields
that the code in question mostly cared about.
The flush_tlb_range() function takes a "struct vma" rather than a
"struct mm_struct", because a few architectures actually care about what
kind of range it is - being able to only do an ITLB flush if it's a
range that doesn't have data accesses enabled, for example. And all the
normal users already have the vma for doing the range invalidation.
But a few people want to call flush_tlb_range() with a range they just
made up, so they also end up using a made-up vma. x86 just has a
special "flush_tlb_mm_range()" function for this, but other
architectures (arm and ia64) do the "use fake vma" thing instead, and
thus got caught up in the vma_init() changes.
At the same time, the TLB flushing code really doesn't care about most
other fields in the vma, so vma_init() is just unnecessary and
pointless.
This fixes things by having an explicit "this is just an initializer for
the TLB flush" initializer macro, which is used by the arm/arm64/ia64
people who mis-use this interface with just a dummy vma.
Fixes: 2c4541e24c ("mm: use vma_init() to initialize VMAs on stack and data segments")
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Kirill Shutemov <kirill.shutemov@linux.intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Hugh Dickins <hughd@google.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The UniPhier platform highly relies on the reset controller.
Select RESET_CONTROLLER to enable it forcibly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/mach-uniphier/Makefile has been unused for a long time.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- New support for the ASPEED USB host controller and USB vhub (device)
support
- Descriptions for the ColdFire processor that is part of the ASPEED
SoC
- Small fixes:
* pwm/tach clock
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Merge tag 'aspeed-4.19-devicetree-no-fsi' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
ASPEED device tree updates for 4.19
- New support for the ASPEED USB host controller and USB vhub (device)
support
- Descriptions for the ColdFire processor that is part of the ASPEED
SoC
- Small fixes:
* pwm/tach clock
* tag 'aspeed-4.19-devicetree-no-fsi' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add coprocessor interrupt controller
ARM: dts: aspeed: Use 24MHz fixed clock for pwm
ARM: dts: aspeed: Fix Romulus VGA frame buffer
ARM: dts: aspeed: Enable vhub on port A of AST2500 EVB
ARM: dts: aspeed: Add G5 USB Virtual Hub
ARM: dts: aspeed: Add G4 USB Virtual Hub
ARM: dts: aspeed: Add G5 USB host pinmux
ARM: dts: aspeed: Add G4 USB pinmux
Signed-off-by: Olof Johansson <olof@lixom.net>
On ARMv5 and above, it is beneficial to use compiler built-ins such as
__builtin_ffs() and __builtin_ctzl() to implement ffs(), __ffs(), fls()
and __fls(). The compiler does inline the clz instruction and even the
rbit instruction when available, or provide a constant value when
possible. On ARMv4 the compiler calls out to helper functions for those
built-ins so it is best to keep the open coded versions in that case.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
ARMv8R adds support for virtualisation extension (with some deviation
from v8A). With this patch hyp-unaware boot code can offload to kernel
setting up HYP stuff in a sane state.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
ARMv8R adds support for VBAR and updates ID_PFR1 with the new filed
Sec_frac (bits [23:20]):
Security fractional field. When the Security field is 0000, determines
the support for features from the ARMv7 Security Extensions. Permitted
values are:
0000 No features from the ARMv7 Security Extensions are implemented.
This value is not supported in ARMv8 if ID_PFR1 bits [7:4] are zero.
0001 The implementation includes the VBAR, and the TCR.PD0 and TCR.PD1
bits.
0010 As for 0001, plus the ability to access Secure or Non-secure
physical memory is supported.
All other values are reserved.
This field is only valid when ID_PFR1[7:4] == 0, otherwise it holds
the value 0000.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Since commit 799c434154 ("kbuild: thin archives make default for
all archs"), $(AR) is used instead of $(LD) to combine object files.
The following code in arch/arm/vfp/Makefile:
LDFLAGS +=--no-warn-mismatch
... is no longer used.
Also, arch/arm/Makefile already guards arch/arm/vfp/ by a boolean
symbol, CONFIG_VFP, like this:
core-$(CONFIG_VFP) += arch/arm/vfp/
So, $(CONFIG_VFP) is always evaluated to y in arch/arm/vfp/Makefile.
There is no point to use pseudo object, vfp.o, which never becomes
a module. Add all objects to obj-y directly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
When building the kernel as Thumb-2 with binutils 2.29 or newer, if the
assembler has seen the .type directive (via ENDPROC()) for a symbol, it
automatically handles the setting of the lowest bit when the symbol is
used with ADR. The badr macro on the other hand handles this lowest bit
manually. This leads to a jump to a wrong address in the wrong state
in the syscall return path:
Internal error: Oops - undefined instruction: 0 [#2] SMP THUMB2
Modules linked in:
CPU: 0 PID: 652 Comm: modprobe Tainted: G D 4.18.0-rc3+ #8
PC is at ret_fast_syscall+0x4/0x62
LR is at sys_brk+0x109/0x128
pc : [<80101004>] lr : [<801c8a35>] psr: 60000013
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none
Control: 50c5387d Table: 9e82006a DAC: 00000051
Process modprobe (pid: 652, stack limit = 0x(ptrval))
80101000 <ret_fast_syscall>:
80101000: b672 cpsid i
80101002: f8d9 2008 ldr.w r2, [r9, #8]
80101006: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000
80101184 <local_restart>:
80101184: f8d9 a000 ldr.w sl, [r9]
80101188: e92d 0030 stmdb sp!, {r4, r5}
8010118c: f01a 0ff0 tst.w sl, #240 ; 0xf0
80101190: d117 bne.n 801011c2 <__sys_trace>
80101192: 46ba mov sl, r7
80101194: f5ba 7fc8 cmp.w sl, #400 ; 0x190
80101198: bf28 it cs
8010119a: f04f 0a00 movcs.w sl, #0
8010119e: f3af 8014 nop.w {20}
801011a2: f2af 1ea2 subw lr, pc, #418 ; 0x1a2
To fix this, add a new symbol name which doesn't have ENDPROC used on it
and use that with badr. We can't remove the badr usage since that would
would cause breakage with older binutils.
Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The filechk_offsets in arch/arm/mach-at91/Makefile is never
used because it is always overridden by the equivalent one in
scripts/Makefile.lib
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Pull in arm perf updates, including support for 64-bit (chained) event
counters and some non-critical fixes for some of the system PMU drivers.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Make sure to initialize all VMAs properly, not only those which come
from vm_area_cachep.
Link: http://lkml.kernel.org/r/20180724121139.62570-3-kirill.shutemov@linux.intel.com
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
- Refresh the multi ARMv5 defconfig, and add AST2400 related drivers
- Enable new ASPEED hardware that we've merged in the past few cycles.
There are about 14 different drivers since we last refreshed the
defconfig
- Turn on features required by systemd, and other bits of OpenBMC
userspace
- Enable security related options
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Merge tag 'aspeed-4.19-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/defconfig
ASPEED defconfig updates for 4.19
- Refresh the multi ARMv5 defconfig, and add AST2400 related drivers
- Enable new ASPEED hardware that we've merged in the past few cycles.
There are about 14 different drivers since we last refreshed the
defconfig
- Turn on features required by systemd, and other bits of OpenBMC
userspace
- Enable security related options
* tag 'aspeed-4.19-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: config: aspeed: Enable new FSI drivers
ARM: config: multi_v5: Enable ASPEED drivers
ARM: config: multi_v5: Refresh configuration
ARM: config: aspeed: Update defconfig
arm: configs: Add USB gadget to Aspeed G5 defconfig
arm: configs: Add USB gadget to Aspeed G4 defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
__get_user_error() is used as a fast accessor to make copying structure
members in the signal handling path as efficient as possible. However,
with software PAN and the recent Spectre variant 1, the efficiency is
reduced as these are no longer fast accessors.
In the case of software PAN, it has to switch the domain register around
each access, and with Spectre variant 1, it would have to repeat the
access_ok() check for each access.
It becomes much more efficient to use __copy_from_user() instead, so
let's use this for the ARM integer registers.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Minor cleanups and fixes.
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Merge tag 'samsung-soc-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Samsung mach/soc changes for v4.19
Minor cleanups and fixes.
* tag 'samsung-soc-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: exynos: Clear global variable on init error path
ARM: exynos: Remove outdated maintainer information
ARM: s3c24xx: Fix typo in guard macro of s3c2412.h
Signed-off-by: Olof Johansson <olof@lixom.net>
Our usual bunch of changes shared between arm and arm64.
This time, we have:
- eMMC support for the ALL-H3-CC boards
- EMAC support for the Beelink X2
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Merge tag 'sunxi-h3-h5-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3/H5 changes for 4.19
Our usual bunch of changes shared between arm and arm64.
This time, we have:
- eMMC support for the ALL-H3-CC boards
- EMAC support for the Beelink X2
* tag 'sunxi-h3-h5-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi-h3-h5: Remove unused address-cells/size-cells of dwmac-sun8i
ARM: dts: sunxi: libretech-all-h3-cc: Enable eMMC module
ARM: sun8i: h3: add SY8113B regulator on Banana Pi M2 Zero board
ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2
ARM: dts: sun8i-h3: Add missing cooling device properties for CPUs
Signed-off-by: Olof Johansson <olof@lixom.net>
multi_v7_defconfig and shmobile_defconfig Enhancement:
* Enable support for recently upstreamed RZN1D-DB board
in multi_v7_defconfig and shmobile_defconfig. This is
to give better test coverage.
shmobile_defconfig Clean-Up:
* Drop NET_VENDOR_<FOO>=n
This reduces the size of the defconfig without any change in the
resulting kernel config.
shmobile_defconfig Enhancements:
* Disable long deprecated /sbin/hotplug helper
* Enable reset controller support
This is to give better test coverage.
This may be used by reset controller support in the Renesas CPG/MSSR
driver when used by R-Car Gen2 and RZ/G1 SoCs.
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Merge tag 'renesas-arm-defconfig-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/defconfig
Renesas ARM Based SoC Defconfig Updates for v4.19
- Enable new RZN1D-DB board in multi_v7_defconfig and shmobile_defconfig
- shmobile_defconfig:
+ Drop NET_VENDOR_<FOO>=n
+ Disable long deprecated /sbin/hotplug helper
+ Enable reset controller support
* tag 'renesas-arm-defconfig-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: multi_v7_defconfig: Enable support for RZN1D-DB
ARM: shmobile: defconfig: Disable /sbin/hotplug fork-bomb
ARM: shmobile: defconfig: Enable support for RZN1D-DB
ARM: shmobile: defconfig: Enable reset controller support
ARM: shmobile: defconfig: Drop NET_VENDOR_<FOO>=n
Signed-off-by: Olof Johansson <olof@lixom.net>
There's a number of additions for the ARMv7 SoCs for this merge window, and
especially:
- Addition of the system controller for a number of SoCs, as part of the
VPU effort
- Addition of the R40 HDMI support
- Addition of the Mali GPU node for the A10
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Merge tag 'sunxi-dt-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.19
There's a number of additions for the ARMv7 SoCs for this merge window, and
especially:
- Addition of the system controller for a number of SoCs, as part of the
VPU effort
- Addition of the R40 HDMI support
- Addition of the Mali GPU node for the A10
* tag 'sunxi-dt-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits)
ARM: dts: sun4i: Add GPU node
ARM: dts: sun5i: Fix the SRAM A3-A4 declaration
ARM: dts: sun8i: r40: Remove unused address-cells/size-cells of dwmac-sun8i
ARM: dts: sun8i: a83t: Remove unused address-cells/size-cells of dwmac-sun8i
dt-bindings: net: dwmac-sun8i: Remove unused address-cells/size-cells
ARM: dts: sun8i: h3: Add SRAM controller node and C1 SRAM region
ARM: dts: sun8i: a23-a33: Add SRAM controller node and C1 SRAM region
ARM: dts: sun7i: Add support for the C1 SRAM region with the SRAM controller
ARM: dts: sun5i: Add support for the C1 SRAM region with the SRAM controller
ARM: dts: sun7i: Use most-qualified system control compatibles
ARM: dts: sun5i: Use most-qualified system control compatibles
ARM: dts: sun4i: Switch to new system control compatible string
ARM: dts: sun8i: r40: Disable TCONs by default.
ARM: dts: sun8i: r40: Add missing TCON-TOP - TCON connections
ARM: dts: sun8i: r40: Remove fallback compatible for TCON TV
ARM: dts: sun8i: r40: Add mixer ids to TCON TOP
ARM: dts: sun8i: r40: Remove fallback display engine compatible
ARM: dts: sun8i: a83t: Add CPU regulator supplies for A83T boards
ARM: dts: sun8i: r40: Enable HDMI output on BananaPi M2 Ultra
ARM: dts: sun8i: r40: Add HDMI pipeline
...
Signed-off-by: Olof Johansson <olof@lixom.net>
With ti-sysc driver working for most use cases, we can start converting
the omap variant SoCs to use device tree data for the interconnect target
modules instead of the legacy hwmod platform data.
We start with omap4 l4 devices excluding the ones that still depend on
a reset controller driver like DSP MMU. And we don't yet convert the l4
ABE instance as that needs a bit more work.
We also add a proper interconnect hierarchy for the devices while at it
to make further work on genpd easier and to avoid most deferred probe
issues.
At this point we are not dropping any platform data, and we initially
still use it to validate the dts data. Then in later merge cycles we
can start dropping the related platform data.
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Merge tag 'omap-for-v4.19/dt-pt3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Start using ti-sysc with device tree data for omap4 l4 devices
With ti-sysc driver working for most use cases, we can start converting
the omap variant SoCs to use device tree data for the interconnect target
modules instead of the legacy hwmod platform data.
We start with omap4 l4 devices excluding the ones that still depend on
a reset controller driver like DSP MMU. And we don't yet convert the l4
ABE instance as that needs a bit more work.
We also add a proper interconnect hierarchy for the devices while at it
to make further work on genpd easier and to avoid most deferred probe
issues.
At this point we are not dropping any platform data, and we initially
still use it to validate the dts data. Then in later merge cycles we
can start dropping the related platform data.
* tag 'omap-for-v4.19/dt-pt3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4: Add l4 ranges for 4460
ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc
ARM: dts: omap4: Probe watchdog 3 with ti-sysc
ARM: dts: omap4: Add l4 interconnect hierarchy and ti-sysc data
dt-bindings: Update omap l4 binding for optional registers
Signed-off-by: Olof Johansson <olof@lixom.net>
* RZ/G1C (r8a77470) SoC: Use r8a77470-cpg-mssr binding definitions
* Add GR-Peach audio camera shield support with MT9V111 image sensor
* Add initial support for RZ/N1D (r9a06g032) SoC and its RZN1D-DB board
* Use SPDX identifiers in DT for all SoCs and boards
* Add missing OPP properties for all CPUs on various SoCs
* Add missing PMIC nodes to R-Car Gen2 M2-W (r8a7791) based porter board
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Merge tag 'renesas-arm-dt-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Updates for v4.19
* RZ/G1C (r8a77470) SoC: Use r8a77470-cpg-mssr binding definitions
* Add GR-Peach audio camera shield support with MT9V111 image sensor
* Add initial support for RZ/N1D (r9a06g032) SoC and its RZN1D-DB board
* Use SPDX identifiers in DT for all SoCs and boards
* Add missing OPP properties for all CPUs on various SoCs
* Add missing PMIC nodes to R-Car Gen2 M2-W (r8a7791) based porter board
* tag 'renesas-arm-dt-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r8a77470: Use r8a77470-cpg-mssr binding definitions
ARM: dts: gr-peach: Add GR-Peach audiocamerashield support
ARM: dts: Renesas R9A06G032 SMP enable method
ARM: dts: Renesas RZN1D-DB Board base file
ARM: dts: Renesas R9A06G032 base device tree file
ARM: dts: convert to SPDX identifier for Renesas boards
ARM: dts: r8a77(43|9[013]): Add missing OPP properties for CPUs
ARM: dts: porter: Add missing PMIC nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
This turns on the FSI-attached I2C bus driver, and the ColdFire
offloaded FSI master which are new to 4.19.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Building on arm 32 with LPAE enabled we don't include asm-generic/tlb.h,
where we have tlb_flush_remove_tables_local and tlb_flush_remove_tables
defined.
The build fails with:
mm/memory.c: In function ‘tlb_remove_table_smp_sync’:
mm/memory.c:339:2: error: implicit declaration of function ‘tlb_flush_remove_tables_local’; did you mean ‘tlb_remove_table’? [-Werror=implicit-function-declaration]
...
This bug got introduced in:
2ff6ddf19c ("x86/mm/tlb: Leave lazy TLB mode at page table free time")
To fix this issue we define them in arm 32's specific asm/tlb.h file as well.
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: dave.hansen@intel.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@armlinux.org.uk
Cc: riel@surriel.com
Cc: songliubraving@fb.com
Fixes: 2ff6ddf19c ("x86/mm/tlb: Leave lazy TLB mode at page table free time")
Link: http://lkml.kernel.org/r/20180725095557.19668-1-anders.roxell@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Add a node for the CVIC (the coprocessor interrupt controller) and
add a label to the SRAM node so it can be referenced from the board
device-tree file.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This enables the devices used in the AST2400 family of BMC SoCs:
- VUART
- SPI NOR
- LPC controller
- LPC snoop (port 80)
- Ethernet
- GPIO
- ADC
- I2C
- Random number generator
- IPMI KCS
- IPMI BT
- Fan/Tach
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is the result of a make mutli_v5_defconfig && make savedefconfig.
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
- Enable new support:
hardware random number generator
FSI and client drivers
DRM GFX driver
- Disable unwanted features:
ARM_APPENDED_DTB
ARM_ATAG_DTB_COMPAT
BLK_DEV_RAM
- Sync G4 and G5 with OpenBMC configurations
BLK_DEV_LOOP, for updater mechanic
CRYPTO_HMAC, for libsdbus features
CRYPTO_SHA256
CRYPTO_USER_API_HASH
- Enable security related features:
SLAB_FREELIST_RANDOM
STRICT_KERNEL_RW
CC_STACKPROTECTOR_STRONG
HARDENED_USERCOPY
FORTIFY_SOURCE
- Increase kernel log buffer size
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
S5Pv210 and Exynos5433/Exynos7 have different address of
EINT_WAKEUP_MASK register. Rename existing S5P_EINT_WAKEUP_MASK to
avoid confusion and add new ones.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Sylwester Nawrocki <snawrocki@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
For most of Exynos SoCs, Power Management Unit (PMU) address space is
mapped into global variable 'pmu_base_addr' very early when initializing
PMU interrupt controller. A lot of other machine code depends on it so
when doing iounmap() on this address, clear the global as well to avoid
usage of invalid value (pointing to unmapped memory region).
Properly mapped PMU address space is a requirement for all other machine
code so this fix is purely theoretical. Boot will fail immediately in
many other places after following this error path.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The current maintainers are specified in MAINTAINERS file, so remove
in-sources information with outdated e-mail address (Thomas Abraham's
email does not work, Kukjin Kim uses @kernel.org).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add mali gpu node to sun4i a10 platforms.
Tested with offscreen rendering with lima mesa (freedesktop gitlab)
Signed-off-by: Steven Vanden Branden <stevenvandenbrandenstift@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This pin is externally pulled up, so we need to disable the SoC's
internal pull down resistor to allow it to function properly.
Signed-off-by: Simon Shields <simon@lineageos.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This pin is externally pulled up, so we need to disable the
SoC's internal pull-down.
Signed-off-by: Simon Shields <simon@lineageos.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This pin is externally pulled up, so we should disable the SoC's
pull down resistor in order for the interrupt to function properly.
Signed-off-by: Simon Shields <simon@lineageos.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This pins are externally pulled up, and so we should explicitly
configure them to disable the SoC-internal pull-downs. Previously
we relied on the bootloader doing this in order to allow the buttons
to function properly.
Signed-off-by: Simon Shields <simon@lineageos.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Currently, we assume that the bootloader has correctly configured
the interrupt pin for max77693. This might not actually be the case -
so it's better to configure it explicitly.
Signed-off-by: Simon Shields <simon@lineageos.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Enable support for the Renesas RZN1D-DB Board:
- RZ/N1D (R9A06G032) base SoC support.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the hardcoded clock indices by R8A77470_CLK_* symbols.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add device tree header for GR-Peach's audiocamerashield with MT9V111
image sensor.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a special enable method for the second CA7 of the R9A06G032
as well as the default value for the "cpu-release-addr" property.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds a base device tree file for the RZN1-DB board, with only the
basic support allowing the system to boot to a prompt. Only one UART is
used, with only a single CPU running.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds the Renesas R9A06G032 bare bone support.
This currently only handles the SYSCTRL block note,
generic parts (gic, architected timer) and a UART.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: updated MAINTAINERS file
[simon: do not use r9a06g032-sysctrl.h as it is not in the renesas tree yet]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The OPP properties, like "operating-points", should either be present
for all the CPUs of a cluster or none. If these are present only for a
subset of CPUs of a cluster then things will start falling apart as soon
as the CPUs are brought online in a different order. For example, this
will happen because the operating system looks for such properties in
the CPU node it is trying to bring up, so that it can create an OPP
table.
Add such missing properties.
Fix other missing properties (like, clock latency, voltage tolerance,
etc) as well to make it all work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
No recent mainstream system uses the /sbin/hotplug fork-bomb any more.
Commit 7934779a69 ("Driver-Core: disable
/sbin/hotplug by default") disabled it in Kconfig, but the various
defconfigs weren't updated.
According to the systemd requirements, this option must be disabled, as
it slows down the system and confuses udev.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the Renesas RZN1D-DB Board:
- RZ/N1D (R9A06G032) base SoC support,
- Synopsys DesignWare 8250 serial port support.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car Gen2 and RZ/G1 SoCs can make use of the optional reset controller
support in the Renesas CPG/MSSR driver.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enabling NET_VENDOR_* Kconfig options does not directly affect the
kernel, so there is no need to explicitly disable them.
The individual network drivers under them are still disabled.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
There's one ARM, one x86_32 and one x86_64 version of efi_open_volume()
which can be folded into a single shared version by masking their
differences with the efi_call_proto() macro introduced by commit:
3552fdf29f ("efi: Allow bitness-agnostic protocol calls").
To be able to dereference the device_handle attribute from the
efi_loaded_image_t table in an arch- and bitness-agnostic manner,
introduce the efi_table_attr() macro (which already exists for x86)
to arm and arm64.
No functional change intended.
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/20180720014726.24031-7-ard.biesheuvel@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
- Fix interrupt type on ethernet switch for i.MX-based RDU2
- GPC on i.MX exposed too large a register window which resulted in
userspace being able to crash the machine.
- Fixup of bad merge resolution moving GPIO DT nodes under pinctrl
on droid4.
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
- Fix interrupt type on ethernet switch for i.MX-based RDU2
- GPC on i.MX exposed too large a register window which resulted in
userspace being able to crash the machine.
- Fixup of bad merge resolution moving GPIO DT nodes under pinctrl on
droid4.
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: imx6: RDU2: fix irq type for mv88e6xxx switch
soc: imx: gpc: restrict register range for regmap access
ARM: dts: omap4-droid4: fix dts w.r.t. pwm
- Enable ISL29018 sensor and MMA8452 accelerometer driver support for
imx6qdl-sabreauto board.
- Enable DMATEST support which is useful for DMA driver development
testing.
- Use the DRM driver for MXSFB LCD controller found on i.MX23, i.MX28,
i.MX6SX and i.MX7 SoCs.
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Merge tag 'imx-defconfig-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
i.MX defconfig update for 4.19:
- Enable ISL29018 sensor and MMA8452 accelerometer driver support for
imx6qdl-sabreauto board.
- Enable DMATEST support which is useful for DMA driver development
testing.
- Use the DRM driver for MXSFB LCD controller found on i.MX23, i.MX28,
i.MX6SX and i.MX7 SoCs.
* tag 'imx-defconfig-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: add DMATEST support
ARM: imx_v6_v7_defconfig: use MXSFB DRM driver
ARM: mxs_defconfig: use MXSFB DRM driver
ARM: imx_v6_v7_defconfig: Enable imx6qdl-sabreauto sensors
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add device tree support for i.MX6SLL SoC.
- New board support: ConnectCore 6UL System-On-Module and SBC Express;
ZII SCU2 Mezz, SCU3 ESB, SSMB SPU3 and CFU1 board; i.MX6SLL EVK
board; Engicam i.CoreM6 1.5 Quad/Dual MIPI; LogicPD MX31Lite board;
i.MX53 HSC/DDC boards from K+P.
- Remove fake regulator bus container node and enable USB OTG support
for i.MX6 wandboard and riotboard.
- Populate RAVE SP EEPROM, backlight, power button and watchdog devices
for ZII boards.
- Add cooling-cells for cpufreq cooling device, and add OPP properties
for all CPUs.
- A series from Anson Huang to enable LCD panel and backlight support
for imx6sll-evk board.
- Make pfuze100 sw4 regulator always-on for for a few Freescale/NXP
development boards, because the regulator is critical there and
cannot be turned off.
- Add more device support for i.MX5: AIPSTZ, SAHARA Crypto, M4IF,
Tigerp, PMU, CodaHx4 VPU.
- Enable PMU secure-reg-access for imx51-babbage, imx51-zii-rdu1 and
imx53-ppd board.
- Switch more device tree license to use SPDX identifier.
- Switch to use OF graph to describe the display for imx7d-nitrogen7.
- Add chosen/stdout-path for more boards, so that earlycon can be
enabled more easily on kernel cmdline.
- Convert GPC to new device tree bindings and add Vivante gpu nodes
for i.MX6SL SoC.
- Add more device support for imx6dl-mamoj board: parallel display,
WiFi and USB.
- A series from Stefan Agner to update i.MX6 apalis/colibri boards on
various aspects: SD/MMC card detection, regulators, etc.
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Merge tag 'imx-dt-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree update for 4.19:
- Add device tree support for i.MX6SLL SoC.
- New board support: ConnectCore 6UL System-On-Module and SBC Express;
ZII SCU2 Mezz, SCU3 ESB, SSMB SPU3 and CFU1 board; i.MX6SLL EVK
board; Engicam i.CoreM6 1.5 Quad/Dual MIPI; LogicPD MX31Lite board;
i.MX53 HSC/DDC boards from K+P.
- Remove fake regulator bus container node and enable USB OTG support
for i.MX6 wandboard and riotboard.
- Populate RAVE SP EEPROM, backlight, power button and watchdog devices
for ZII boards.
- Add cooling-cells for cpufreq cooling device, and add OPP properties
for all CPUs.
- A series from Anson Huang to enable LCD panel and backlight support
for imx6sll-evk board.
- Make pfuze100 sw4 regulator always-on for for a few Freescale/NXP
development boards, because the regulator is critical there and
cannot be turned off.
- Add more device support for i.MX5: AIPSTZ, SAHARA Crypto, M4IF,
Tigerp, PMU, CodaHx4 VPU.
- Enable PMU secure-reg-access for imx51-babbage, imx51-zii-rdu1 and
imx53-ppd board.
- Switch more device tree license to use SPDX identifier.
- Switch to use OF graph to describe the display for imx7d-nitrogen7.
- Add chosen/stdout-path for more boards, so that earlycon can be
enabled more easily on kernel cmdline.
- Convert GPC to new device tree bindings and add Vivante gpu nodes
for i.MX6SL SoC.
- Add more device support for imx6dl-mamoj board: parallel display,
WiFi and USB.
- A series from Stefan Agner to update i.MX6 apalis/colibri boards on
various aspects: SD/MMC card detection, regulators, etc.
* tag 'imx-dt-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (96 commits)
ARM: dts: imx7d: remove "operating-points" property for cpu1
ARM: dts: vf610-zii-ssmb-spu3: Fix W=1 level warnings
ARM: dts: vf610: Add ZII CFU1 board
ARM: dts: imx6dl-mamoj: Add usb host and device support
ARM: dts: imx6dl-mamoj: Add Wifi support
ARM: dts: imx6dl-mamoj: Add parallel display support
ARM: dts: vf610: Add ZII SSMB SPU3 board
ARM: dts: imx6ul-pico-hobbit: Do not hardcode the memory size
ARM: dts: imx6sl-evk: make pfuze100 sw4 always on
ARM: dts: imx6sll-evk: make pfuze100 sw4 always on
ARM: dts: imx6sx-sdb-reva: make pfuze100 sw4 always on
ARM: dts: imx6qdl-sabresd: make pfuze100 sw4 always on
ARM: dts: imx6sl-evk: add missing GPIO iomux setting
ARM: dts: imx51-zii-scu3-esb: Fix RAVE SP watchdog compatible string
ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
ARM: dts: imx6sx-nitrogen6sx: remove obsolete display configuration
ARM: dts: imx7d-nitrogen7: use OF graph to describe the display
ARM: dts: imx: Switch Boundary Devices boards to SPDX identifier
ARM: dts: imx6sl: Add vivante gpu nodes
ARM: dts: imx6sll-evk: enable SEIKO 43WVF1G lcdif panel
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- New boards from Laird: WB45N, WB50N, SOM60 modules and DVK, Gatwick
- fix the PMC compatibles
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Merge tag 'at91-ab-4.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt
AT91 DT for 4.19:
- New boards from Laird: WB45N, WB50N, SOM60 modules and DVK, Gatwick
- fix the PMC compatibles
* tag 'at91-ab-4.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91: fix typos for SSC TD functions
ARM: dts: add support for Laird SOM60 module and DVK boards
ARM: dts: add support for Gatwick board based on WB50N
ARM: dts: add support for Laird WB50N cpu module and DVK
ARM: dts: add support for Laird WB45N cpu module and DVK
ARM: dts: at91: add labels to soc dtsi for derivative boards
dt-bindings: add laird and giantec vendor prefix
ARM: dts: fix PMC compatible
ARM: at91: fix USB clock detection handling
dt-bindings: clk: at91: Document all the PMC compatibles
dt-bindings: arm: remove PMC bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
The OPP properties, like "operating-points", should either be present
for all the CPUs of a cluster or none. If these are present only for a
subset of CPUs of a cluster then things will start falling apart as soon
as the CPUs are brought online in a different order. For example, this
will happen because the operating system looks for such properties in
the CPU node it is trying to bring up, so that it can create an OPP
table.
Add such missing properties.
Fix other missing properties (clocks, clock latency) as well to
make it all work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds dts files for two new beaglebone variants for
Octavo Systems OSD3358-SM-RED and Sancloud am335x-sancloud-bbe.
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Merge tag 'omap-for-v4.19/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Few more beaglebone variants for v4.19 merge window
This adds dts files for two new beaglebone variants for
Octavo Systems OSD3358-SM-RED and Sancloud am335x-sancloud-bbe.
* tag 'omap-for-v4.19/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x: add am335x-sancloud-bbe board support
dt-bindings: Add vendor prefix for Sancloud
ARM: dts: Add DT support for Octavo Systems OSD3358-SM-RED based on TI AM335x
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series from Anson Huang to add power management for i.MX6SLL,
including standby and mem mode suspend, cpuidle support, and bus
clock auto gating function, etc.
- A couple of fix-ups on i.MX6SLL cpuidle random build issues.
- A couple of cleanups on stale EPIT timer initialization and RNGA
platform device registration function.
- Configure i.MX51 SoC M4IF to avoid visual artifacts during video
playback.
- Set up i.MX51 and i.MX53 DBGEN bit of ARM_GPC register, so that
clocks within the debug system can be activated.
- Add a Cortex-M4 platform support which will be useful for running
a Linux instance on Cortex-M4 core integrated in i.MX7D SoC.
- Flag of_iomap failure in imx_aips_allow_unprivileged_access()
function by giving a warning in there.
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Merge tag 'imx-soc-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
i.MX SoC update for 4.19:
- A series from Anson Huang to add power management for i.MX6SLL,
including standby and mem mode suspend, cpuidle support, and bus
clock auto gating function, etc.
- A couple of fix-ups on i.MX6SLL cpuidle random build issues.
- A couple of cleanups on stale EPIT timer initialization and RNGA
platform device registration function.
- Configure i.MX51 SoC M4IF to avoid visual artifacts during video
playback.
- Set up i.MX51 and i.MX53 DBGEN bit of ARM_GPC register, so that
clocks within the debug system can be activated.
- Add a Cortex-M4 platform support which will be useful for running
a Linux instance on Cortex-M4 core integrated in i.MX7D SoC.
- Flag of_iomap failure in imx_aips_allow_unprivileged_access()
function by giving a warning in there.
* tag 'imx-soc-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: mx5: Set the DBGEN bit in ARM_GPC register
ARM: imx51: Configure M4IF to avoid visual artifacts
ARM: imx: call imx6sx_cpuidle_init() conditionally for 6sll
ARM: imx: fix i.MX6SLL build
ARM: imx: flag failure of of_iomap
ARM: i.MX31: remove rnga registration as a platform device
ARM: imx: Provide support for NXP i.MX7D Cortex-M4
ARM: imx: enable bus auto clock gating function for i.mx6sll
ARM: imx: remove i.MX6SLL support in i.MX6SL cpu idle driver
ARM: imx: add cpu idle support for i.MX6SLL
ARM: imx: add L2 page power control for GPC
ARM: imx: add mem mode suspend for i.MX6SLL
ARM: imx: add standby mode suspend for i.MX6SLL
ARM: imx: remove inexistant EPIT timer init
Signed-off-by: Olof Johansson <olof@lixom.net>
* Always enable ARCH_TIMER on SoCs with A7 or A15
All such SoCs have ARCH_TIMER so there is no need for it to be optional.
This allows clean-up which is included in this change.
* Do not compile r8a7779_platform_cpu_kill when it is unused
This avoids a warning by shuffling code into an existing #ifdef
r8a7779 is the R-Car H1 SoC
* Add SMP enabler driver for the RZ/N1D (r9a06g032) SoC
This is to allow SMP to be enabled via DT on the r9a06g032
* Stop compiling headsmp-apmu for non-SMP configs
This is a minor clean-up allowing removal of an #ifdef
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Merge tag 'renesas-arm-soc2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Second Round of Renesas ARM Based SoC Updates for v4.19
* Always enable ARCH_TIMER on SoCs with A7 or A15
All such SoCs have ARCH_TIMER so there is no need for it to be optional.
This allows clean-up which is included in this change.
* Do not compile r8a7779_platform_cpu_kill when it is unused
This avoids a warning by shuffling code into an existing #ifdef
r8a7779 is the R-Car H1 SoC
* Add SMP enabler driver for the RZ/N1D (r9a06g032) SoC
This is to allow SMP to be enabled via DT on the r9a06g032
* Stop compiling headsmp-apmu for non-SMP configs
This is a minor clean-up allowing removal of an #ifdef
* tag 'renesas-arm-soc2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
soc: r9a06g032: don't build SMP files for non-SMP config
ARM: shmobile: Add the R9A06G032 SMP enabler driver
ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP
Signed-off-by: Olof Johansson <olof@lixom.net>
The OPP properties, like "operating-points", should either be present
for all the CPUs of a cluster or none. If these are present only for a
subset of CPUs of a cluster then things will start falling apart as soon
as the CPUs are brought online in a different order. For example, this
will happen because the operating system looks for such properties in
the CPU node it is trying to bring up, so that it can create an OPP
table.
Add such missing properties.
Fix other missing property (clock latency) as well to make it all
work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
- check of_iomap and add missing of_node_put since of_find_compatible_node
is invoked on hisilicon SoCs like hip01, hix5hd2 and hi3xxx.
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Merge tag 'hisi-armv7-soc-for-4.19' of git://github.com/hisilicon/linux-hisi into next/soc
ARM: mach-hisi: Hisilicon SoC updates for 4.19
- check of_iomap and add missing of_node_put since of_find_compatible_node
is invoked on hisilicon SoCs like hip01, hix5hd2 and hi3xxx.
* tag 'hisi-armv7-soc-for-4.19' of git://github.com/hisilicon/linux-hisi:
ARM: hisi: handle of_iomap and fix missing of_node_put
ARM: hisi: check of_iomap and fix missing of_node_put
ARM: hisi: fix error handling and missing of_node_put
Signed-off-by: Olof Johansson <olof@lixom.net>
IPQ8064 and IPQ4019 boards contain NAND flash
memory for which these configs need to be enabled.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Fix all nodes to use proper GIC_* macros for the interrupt type and the
interrupt trigger settings to avoid the boot warnings.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Abhishek Sahu <absahu@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
arm64's new use of KVMs get_events/set_events API calls isn't just
or RAS, it allows an SError that has been made pending by KVM as
part of its device emulation to be migrated.
Wire this up for 32bit too.
We only need to read/write the HCR_VA bit, and check that no esr has
been provided, as we don't yet support VDFSR.
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Dongjiu Geng <gengdongjiu@huawei.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Linus Torvalds