We need to init vop aclk and hclk incase the U-Boot does not do
the initialize.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
There are 4 pwm channels built in rk3328 soc, need to configure
the both APB clock and bus clock.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
According to rt5514 dt-binding, it should be "realtek,dmic-init-delay-ms".
Fixes: 48f4d9796d (arm64: dts: rockchip: add Gru/Kevin DTS)
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Moving the x86_64 and arm64 PIE base from 0x555555554000 to 0x000100000000
broke AddressSanitizer. This is a partial revert of:
eab09532d4 ("binfmt_elf: use ELF_ET_DYN_BASE only for PIE")
02445990a9 ("arm64: move ELF_ET_DYN_BASE to 4GB / 4MB")
The AddressSanitizer tool has hard-coded expectations about where
executable mappings are loaded.
The motivation for changing the PIE base in the above commits was to
avoid the Stack-Clash CVEs that allowed executable mappings to get too
close to heap and stack. This was mainly a problem on 32-bit, but the
64-bit bases were moved too, in an effort to proactively protect those
systems (proofs of concept do exist that show 64-bit collisions, but
other recent changes to fix stack accounting and setuid behaviors will
minimize the impact).
The new 32-bit PIE base is fine for ASan (since it matches the ET_EXEC
base), so only the 64-bit PIE base needs to be reverted to let x86 and
arm64 ASan binaries run again. Future changes to the 64-bit PIE base on
these architectures can be made optional once a more dynamic method for
dealing with AddressSanitizer is found. (e.g. always loading PIE into
the mmap region for marked binaries.)
Link: http://lkml.kernel.org/r/20170807201542.GA21271@beast
Fixes: eab09532d4 ("binfmt_elf: use ELF_ET_DYN_BASE only for PIE")
Fixes: 02445990a9 ("arm64: move ELF_ET_DYN_BASE to 4GB / 4MB")
Signed-off-by: Kees Cook <keescook@chromium.org>
Reported-by: Kostya Serebryany <kcc@google.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
- Select PINCTRL for ZTE platform, so that pinctrl driver for ZX296718
can be enabled.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJZlpAcAAoJEFBXWFqHsHzOsIUIAJ1AonMc+E4nx4Y1TC02QCxL
I0ddb8fZRYhttW/o/6bkSAi1kxeaR2c1KfgtshgRRTQbs3+PFIu5TNDtIlSKhaAy
aDeTLqJCBdqxHk6e3dqAuOWY+3g/3cIgx8UYxHf49l5D5AwjHIb3y3x+GkC9Ne27
nsTFDWiJx05eZ01oT6w6FbXjFjR7FgUx5ckONIoE6Xpts4NccUh5cgyh7yTk77GP
Nu49eur9zBX4Dp3VeeKeuQouxXFfsCblqd1Yl2bHzNdqIfokxockIl+45u/uu49b
eltyVBDDWLdCGf/s+SZtnHyKUOXrjMaTuXiOUshTWv0tn3r3Q5EhWyLh1TullAE=
=hSae
-----END PGP SIGNATURE-----
Merge tag 'zte-soc-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/arm64
Pull "ZTE SoC updates for 4.14" from Shawn Guo:
- Select PINCTRL for ZTE platform, so that pinctrl driver for ZX296718
can be enabled.
* tag 'zte-soc-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: select PINCTRL for ZTE platform
SoCs for 4.14, please pull the following:
- Markus enables the Broadcom STB AVS thermal monitoring driver as a module
which is currently queued in Rui Zhang's tree
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZldFbAAoJEIfQlpxEBwcEZQcP/2XN6xFj3M+O2Ynl9IQmy30L
E7liU0F+I2jjl8oFlZs2MtHykKYPvcInMPCuA0AsImJRVfabFEZVG6/vE1IVkOt/
YCVcnxuA22HHjY+XJdRqL8WbvaHl9EqRaZApAs0XNiZzBTSkG56aYkT/HehdAh19
OaX0zpBHY4xS3D0UTQzorlQbpH572nqPZeG2QBNLGrJ/+N7gv1+2SXxIyRPPgJKg
cCLJH2FQqkJBfKL0U+mfDNhJGHeOvg67gcScDIbV6kyhTUqldyWeNt3gcGtjKUZa
/2wcsC/0mXnXAfi9xt4ocU4hs6+HrihDG1wkxCVs21FTS6h7Hh1tTst0+I3oO29Z
Uo0Ktg3RNfKglylSSKxJYtz0pyKz3lhjq9iJzWSZxR5LoFDPuBMgGlall1xDF3LV
IEkmYw9kMRCJ6MQQvrRWRaVnr4YW6k5aI99rh19wzKYCNqvq1TyEO60EDY4S+/Xv
986unwlKpQvA/xAX7Na6B03M1MGSK1uTN6FTJdVR3yrprMafjs7JpVceAQojOwAP
6BS4tXkyxJ3QtYtHFfbWWzrv3W4FxkmFb5vgDMUGTDTuI4rtnTVPfVoBrb5niAKA
Q1DIOxfxCpgXjAho/8dTcnFyG5AyekzZULHcl2T/3+dV1EQLhpyAPlvlw0Aylxz4
0Pou+My6cZnyZF58liR2
=xrY6
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.14/defconfig-arm64' of http://github.com/Broadcom/stblinux into next/arm64
Pull "Broadcom defconfig-arm64 changes for 4.14" from Florian Fainelli:
This pull request contains ARM64 defconfig changes for Broadcom ARM64-based
SoCs for 4.14, please pull the following:
- Markus enables the Broadcom STB AVS thermal monitoring driver as a module
which is currently queued in Rui Zhang's tree
* tag 'arm-soc/for-4.14/defconfig-arm64' of http://github.com/Broadcom/stblinux:
arm64: defconfig: add CONFIG_BRCMSTB_THERMAL
- Enable uSD on ESPRESSObin (Armada 37xx based board)
- Add NAND support on Armada 7K/8K SoCs
- Enable USB host on Armada-7040-DB and Armada-8040-DB boards
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlmWtIYACgkQCwYYjhRyO9V67ACfUFPrkPl8Qn34OAjklU+hVPR9
YJIAn0EI8S47gAuQe0bzEmU45qALL/Xv
=Vf0A
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.14-2' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt64 for 4.14 (part 2)" from Gregory CLEMENT:
- Enable uSD on ESPRESSObin (Armada 37xx based board)
- Add NAND support on Armada 7K/8K SoCs
- Enable USB host on Armada-7040-DB and Armada-8040-DB boards
* tag 'mvebu-dt64-4.14-2' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: enable USB host on Armada-8040-DB
ARM64: dts: marvell: enable USB host on Armada-7040-DB
ARM64: dts: marvell: add NAND support on the CP110
ARM64: dts: marvell: armada-37xx: Enable uSD on ESPRESSObin
arm64: dts: marvell: Fully re-order nodes in Marvell CP110 dtsi files
* Add PFC device node to R-Car D3 (r8a77995)
This is a step towards enabling devices that use multiplexed pins
- including ethernet - on boards that use the r8a7796 SoC.
* Add USB nodes to R-Car M3-W (r8a7796)
This is a step towards enabling USB devices on boards that
use the r8a7796 SoC.
* Use newly added Gen-3 fallback compat string
This is consistent with ongoing efforts to use per-generation
fallback strings where appropriate across devices found
on R-Car SoCs. The aim of the effort being to strike a balance
between the limited information available about the compatibility
of devices found on different SoCs and the desire to ease enabling
devices on new SoCs.
This has no run-time effect due to the presence of a per-SoC
compat string.
* Cleanup whitespace and extra LVDS port label
Minor cleanups, no run-time effect.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZlV36AAoJENfPZGlqN0++cwMQAIieFfQzDET0/2dGSWB6oDAt
fSCCHh4l6B5vufUyhV4rDjm8drKgT5sMTkAYh4Y1oq69NV3BFnFb0gr3BY58Qwyv
yz4s2o3UNShVcCuSK8rJaMdr8BOBmKoS2WBMjIOBO+znfhfP1zCbBgDNIanSGMY2
8fmBBB3CF76NM0Juh5FmD1bUsxvzX3ZboyWxQY9u5aIrvcvhau4dcifkKJpcp5gT
b/0z0Vi2ZraPE1JOlIHghc0ph10TYVl1pYINgWhhtybNSd9D2TXgGFfn5XZkdk2+
+Az+mookjAsXIm7hj/3la1KflnT67oWNb6rJkz3TWHkNSFW0AbZb0iEnzP02mIMX
6DsUW8jaAxxviMavLB8+Qi5UMM4q7PY78AWB4VA4etkQf5GL/98Lr/jLayd4vyOt
tJLeE+c89J+eEbql4UfrTl/fdUIjJzH5P9RMG/DUpqAZpw8GlFjx5ZttPKOMUU7V
dN5wuG+ujneedn6Kb0RHeI09/q4MVPcEjxbOGq/Xqljp1wYPf44tkDkBd9ecs047
A9fXEuv3qgU5N8iNyT31nudzNbDTIfDYFg7XBcX5pY7BAnXKbTvfl1mFzHyX9Pm8
GBGFndOrX4b9aPj3JqXMldQOVpKT5YMyFbA2vl4Z1bbqFqE3cdgHSEp5NcC93qRv
1colO4fJ/JaDLKsP5dfH
=6XqO
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt2-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64
Pull "Second Round of Renesas ARM64 Based SoC DT Updates for v4.14" from Simon Horman:
* Add PFC device node to R-Car D3 (r8a77995)
This is a step towards enabling devices that use multiplexed pins
- including ethernet - on boards that use the r8a7796 SoC.
* Add USB nodes to R-Car M3-W (r8a7796)
This is a step towards enabling USB devices on boards that
use the r8a7796 SoC.
* Use newly added Gen-3 fallback compat string
This is consistent with ongoing efforts to use per-generation
fallback strings where appropriate across devices found
on R-Car SoCs. The aim of the effort being to strike a balance
between the limited information available about the compatibility
of devices found on different SoCs and the desire to ease enabling
devices on new SoCs.
This has no run-time effect due to the presence of a per-SoC
compat string.
* Cleanup whitespace and extra LVDS port label
Minor cleanups, no run-time effect.
* tag 'renesas-arm64-dt2-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a77995: add pfc device node
arm64: dts: r8a7796: Add HSUSB device node
arm64: dts: r8a7796: Add USB-DMAC device nodes
arm64: dts: r8a7796: Add USB3.0 host device node
arm64: dts: r8a7796: add USB2.0 Host (EHCI/OHCI) device nodes
arm64: dts: r8a7796: add usb2_phy device nodes
arm64: dts: r8a7795: correct whitespace of companion property
arm64: dts: r8a7795: Use R-Car SATA Gen3 fallback compat string
arm64: dts: salvator-common: Remove extra LVDS port label
* Add IPQ8074 SoC and HK01 board support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZl1PKAAoJEFKiBbHx2RXVq40QAIoFRYmWBywq/UquEf0qH6UF
y7Y0Ig7ba6lXLhKJlUx8bQYXtU97CLDuJXw9pIvh8IxPZmYKWQd9zG3FfZZIaRSf
/zN9SDBZV7Q8JyZXL7u1GCxFC4bouhc6L9n8ttYUGjeiYh4Xq2ZqwOL+YAQhnSQn
UuYS3eb21/0rCZmWzkdOU7rYSutkhhaCtRWh9QcndZKoOquvnvQgWlVkOELnTbND
4kc2txOJ8juRnzwpvlfYsOnFet4XQC/RCz1vGSgu3ljXCC5rTYMKd7AstHnsAc2x
NNJCyi0fdMEbPSAvI3nK7fFinS8rppKfNmAG4T4UjmAtu19wCKmlPblRYhIgZwk9
YngZh2FbHLSdV/rDJG4E6UoktvV+PeRlajTZofT0su4wLJPxFiTTZWlOPmg/Y9Gf
dVBw+FRFJRj2L4gu5n+8pKvsQsc9zAv1h+YMJoVRv8Zz45M9QoihPMapAjwDu2hz
PtCSjKO9ebnl6J8GpI3FaKtzjywLCG12/xp+6NUmSa8lz6sxkTPFwcgRU4Dm+bj6
xa8Tt63lz/rEfuOBj/+niadSh/mATEiOvUlt0AEVNt/JfjOIxq/s0FDpGwYzJRFE
z63TvqNZ7V+irEweJPmkyvMR2huqYHo32FqGkXkZQIIyUHzEnnQJWJn3D1wmhYWX
btJBe1OV0SKm9+xc8XwY
=JCl4
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-4.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Pull "Qualcomm ARM64 Updates for v4.14 Part 2" from Andy Gross:
* Add IPQ8074 SoC and HK01 board support
* tag 'qcom-arm64-for-4.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: Add ipq8074 SoC and HK01 board support
4.14, please pull the following:
- Eric moves the bcm2837 DT file from arm64 to arm because it created a maintenance
problem and would have required either duplication or cross merges
- Stefan changes how the pinmuxing is defined and pushes it at the board level
to support Raspberry Pi Zero Wireless. He then adds supports for the actual
Raspberry Pi Zero Wireless board along with binding documentation. Stefan
also defines a proper SMP enable-method property and binding for BCM2836
(Raspbery Pi 2)
- Rafal describes the BCM5301X USB ports correctly in Device Tree such that
it becomes possible to assign them to specific LED triggers (e.g: USB activity).
He does the same thing for BCM53573 and defines default LED triggers for USB.
- Jon provides a fix for Northstar Plus which consists in correctly defining
the "dma-coherent" property for peripherals which are DMA coherent. He also
does a bit of re-arrangement of the USB DT nodes and finally adds USB 3 PHY
and host controller support for NorthStar Plus
- Florian adds support for Broadcom's BCM947189ACDBMR reference board which is
based on BCM47182/53573 and which supports external MoCA (BCM6802)
- Ray fixes the wrong UART2 base address for Cygnus
- Scott moves the v3d node in the proper unit address order and defines the correct
UART alias for the BCM91130_entphn reference board to be UART3
- Jason adds the DT node for the Cygnus Cortex-A9 Performance Monitoring Unit
- Jonathan adds a bunch of additional peripherals to the Cygnus DTS include file:
SDHCI, Keypad, SPI, DMA and pinmux configurations
- Raveendra adds the Cygnus OHCI and EHCI Device Tree nodes
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZldUgAAoJEIfQlpxEBwcEUIgQAIdyDJn+q+mxVhtY8m5xd7ru
+pnSvzJoL0nNUALPez4SGRBSBsv8oH3zO77aLQcPEcy1W+FCvjGI3eh22bm5PkOO
UASbrw5c5RfwYI/fVVkTqoZT3d4Xo4ZXTe+ML0wVS7x9Hw8ozQPBCc5hRJ7PQYaO
U1Ttvpud354xgCFXnvtadDwwTa2W9MdPtsTkrk42Q+p06KZTlONUslAL+DI1RlUw
Zf81r/93YzmEbsPpnG4nlW1dJTTILPE7AFQfJQ47Fg+aJ/suhYMlEH2EvxqgXhh0
FzAWd0Zo1p83chArSQdKGEkS+RvSGuSX1D1n1ZVMO2NJZd3RSqLVy6zUB38f+5Eu
0nOxwxWaG/isyGJ9DtMSyM7ZdgZhYSEI847DC3zOah3/kNquF/NmFFUOPzW79D53
WJ/qvjxYZ9fcy3p2W3Vk8LSNiBeiQGQ+zodpRjTrHIBocqQUf2yxSeepGV9zeHk8
ZwwUmtSE/qZd+MAqiki1DdUIWqHvkvOx0BbYZHLqA3ND2Vz6n6hVvMMMDo2+TyN7
WNhOdrM7Gwt+LNYyW6Gjrvxe5wIYn6Gw3+wPbxTSZH7lBbBC/c56cR0V3nJkpuiS
C5OwCx1Miocz61GPjKtkaYat3cnRum96X5hsadTLJ/cNscNKdIXqUkPtZ6jLs7VI
SbSQS4Im7fdGaGeRRsj1
=WUr3
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.14/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.14" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoCs Device Tree changes for
4.14, please pull the following:
- Eric moves the bcm2837 DT file from arm64 to arm because it created a maintenance
problem and would have required either duplication or cross merges
- Stefan changes how the pinmuxing is defined and pushes it at the board level
to support Raspberry Pi Zero Wireless. He then adds supports for the actual
Raspberry Pi Zero Wireless board along with binding documentation. Stefan
also defines a proper SMP enable-method property and binding for BCM2836
(Raspbery Pi 2)
- Rafal describes the BCM5301X USB ports correctly in Device Tree such that
it becomes possible to assign them to specific LED triggers (e.g: USB activity).
He does the same thing for BCM53573 and defines default LED triggers for USB.
- Jon provides a fix for Northstar Plus which consists in correctly defining
the "dma-coherent" property for peripherals which are DMA coherent. He also
does a bit of re-arrangement of the USB DT nodes and finally adds USB 3 PHY
and host controller support for NorthStar Plus
- Florian adds support for Broadcom's BCM947189ACDBMR reference board which is
based on BCM47182/53573 and which supports external MoCA (BCM6802)
- Ray fixes the wrong UART2 base address for Cygnus
- Scott moves the v3d node in the proper unit address order and defines the correct
UART alias for the BCM91130_entphn reference board to be UART3
- Jason adds the DT node for the Cygnus Cortex-A9 Performance Monitoring Unit
- Jonathan adds a bunch of additional peripherals to the Cygnus DTS include file:
SDHCI, Keypad, SPI, DMA and pinmux configurations
- Raveendra adds the Cygnus OHCI and EHCI Device Tree nodes
* tag 'arm-soc/for-4.14/devicetree' of http://github.com/Broadcom/stblinux:
ARM: BCM53573: Specify ports for USB LED for Tenda AC9
ARM: dts: cygnus: Add generic-ehci/ohci nodes
ARM: dts: cygnus: add serial0 alias for uart3 on bcm91130_entphn
ARM: dts: cygnus: Add additional peripherals to dtsi
ARM: dts: cygnus: Enable Performance Monitoring Unit
ARM: dts: cygnus: place v3d in proper address ordered location
ARM: dts: cygnus: Fix incorrect UART2 register base
ARM: dts: bcm283x: Add 32-bit enable method for SMP
dt-bindings: arm: add SMP enable-method for BCM2836
ARM: dts: BCM53573: Add Broadcom BCM947189ACDBMR board support
ARM: dts: BCM5301X: Specify USB ports for USB LEDs of few devices
ARM: dts: NSP: Add USB3 and USB3 PHY to NSP
ARM: dts: NSP: Rearrage USB entries
ARM: dts: NSP: Add dma-coherent to relevant DT entries
ARM: dts: bcm2835: Add Raspberry Pi Zero W
dt-bindings: bcm: Add Raspberry Pi Zero W
ARM: bcm283x: Define UART pinmuxing on board level
ARM: dts: BCM5301X: Specify USB ports for each controller
ARM: dts: bcm283x: Move the BCM2837 DT contents from arm64 to arm.
These configs are required for booting kernel in QCOM
IPQ8074 boards.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
- A clean up patch from Shawn Lin to remove the deprecated dwmmc
property 'num-slots' from ZX296718 device tree.
- Enable various devices for ZX296718 SoC support, VGA display, I2S
audio, pinctrl, GPIO, PWM and IRDEC.
- Update zx296718-evb support to use audio-graph-card for HDMI audio
and add I2S sound card.
- Add initial zx296718-pcbox board support with storage, audio,
display devices enabled.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJZlo4KAAoJEFBXWFqHsHzOee0H/RcMMznh0cKg8UjjlbAuhArW
4IxmA05TzYBN0VeLNwAzPMn3yrbSZPk5bm7MD/+csv6NuFF2NDlvshyAqWAYueaY
cLXnQvqE3axK5X9xkfQYKvk0OHhj/xIKzEdnJ3++EwEtnibUEl9g8kunopzTQOaq
BsOFTTfuey98hCg4WQSpGIqRhfpKXt/UV63e93TuPs1g0/fpmoooMTQdUE+Wmctq
y1JJb3OC5HMp/NkQRJobmUa2r6R+3T8gmvgFopoBVP543zR5kwJ7bCDXgkzZwIbV
jtLDVCfg+DAapSFpCbULkvOMMZo/rxjAFxP2b8ICFCzNC9zgWpoSAN8ut1Oznk0=
=hAsg
-----END PGP SIGNATURE-----
Merge tag 'zte-dt64-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Pull "ZTE arm64 device tree updates for 4.14" from Shawn Guo:
- A clean up patch from Shawn Lin to remove the deprecated dwmmc
property 'num-slots' from ZX296718 device tree.
- Enable various devices for ZX296718 SoC support, VGA display, I2S
audio, pinctrl, GPIO, PWM and IRDEC.
- Update zx296718-evb support to use audio-graph-card for HDMI audio
and add I2S sound card.
- Add initial zx296718-pcbox board support with storage, audio,
display devices enabled.
* tag 'zte-dt64-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: zte: add initial zx296718-pcbox board support
arm64: dts: zx296718-evb: add I2S sound card support
arm64: dts: zx296718-evb: use audio-graph-card for HDMI audio
arm64: dts: zx296718: add irdec device for remote control
arm64: dts: zx296718: add PWM device support
arm64: dts: zx296718: add voltage data into OPP table
arm64: dts: zx296718: set a better parent clock for I2S0
arm64: dts: zx296718: add pinctrl and gpio devices
arm64: dts: zx296718: add I2S and I2C audio codec
arm64: dts: zx296718: add VGA device support
arm64: dts: zte: remove num-slots from zx296718
- Correct the typo in fsl-ls1088a-rdb board name.
- A series from Horia Geantă to consolidate aliases node and enable
crypto support for ls208xa and ls1088a.
- Enable USB host support for ls1012a.
- Enable cpuidle support for ls1088a and ls208xa.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJZlodKAAoJEFBXWFqHsHzOLYAIAIs6YEEhjbJiet6EMmwpneJo
hTGcU/Gv6q6ozF3uV1+oMqnv64rlzwPR8jTjt29+lCS2I4/zv7Zfr83GR1iMtW90
hIKUMnWwX/ATY1BC4YB36E0Z0WRolNoKU6iKBujMsfxPFRBXulEQwngZoFS5EvHy
TDqCTTRHBHhnzPqMPSJ3q/3r6VPTHDtj1ap+zF8EsS156ybPHhajHm/+u3Kvh6Kh
MnI+Y/SHPFCmy2Pj34SsixGKBEwAukyeddbufUlnrP3wcDnIvv64SWURCsBygEww
jhAD8rYWCFyhqM4vBbQ8AvXrKJkJDZETRy1GTTwDK2MjWeIzY6JtZ+cOGtyBTwU=
=6GLX
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Pull "Freescale arm64 device tree updates for 4.14" from Shawn Guo:
- Correct the typo in fsl-ls1088a-rdb board name.
- A series from Horia Geantă to consolidate aliases node and enable
crypto support for ls208xa and ls1088a.
- Enable USB host support for ls1012a.
- Enable cpuidle support for ls1088a and ls208xa.
* tag 'imx-dt64-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls1088: Correction in Board name from "L1088A" to "LS1088A"
arm64: dts: ls208xa: add cpu idle support
arm64: dts: ls1088a: add cpu idle support
arm64: dts: freescale: ls1088a: add crypto node
arm64: dts: freescale: ls208xa: add crypto node
arm64: dts: freescale: ls208xa: share aliases node
arm64: dts: ls1012a: add USB host controller nodes
4.14, please pull the following:
- Scott moves all the Northstar 2 DTS files into a sub-directory to be consistent
with what was done for stingray and to future proof the addition of new board
DTS files
- Velibor adds the ARM CCN-502 interconnect DT node to the Stingray SoC
DTS include file
- Srinath adds the MDIO multiplexer and SATA nodes to the Stingray DTS
include files
- Anup adds the SP804 timers, FlexRM (mailbox) and RAID engine DT nodes
to the Stingray DTS include files
- Abishek adds the BGMAC (Ethernet controller) node to the Stingray DTS
files
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZldDiAAoJEIfQlpxEBwcEez0P+gPrCZ+Qr8/oXF6Ho8iLlvCM
jjj6bfQduQRCe3Gc03Z/+rERyEsOKaDA9JKkCY5aBf7mvcCtKGSqjXV3TwugOEnV
tgMytTBZvhfQcXCN4fIsCMFPB9OVSThV6x9ZObF3vuiMBDVM5t8+t0dCwuCKv/XJ
0+Dw+TRaXcwu6X9hY8ulgyI9LcnnYQHY3FZ7IzkU+KyCu4wJlCK9mDdPW07+vyl9
iEC6tXJ2/cn4uPllRuj4hT9O+QAKnjxhoj+ngkO5fc+QprmQV/q+GfILVXqW6uEG
09Ed15EVsws9mf5YciyeIhBTjvGF6YtKrzOgl29AzUnrX2XYxV7ZfD8PSfnmK/lN
WDynU9Rz609582q/oCw4rftYhWzVBQP9BjcC7PH5nSDLc+r2bU/V66Hg3NB0kAGq
x90ug7x3Tddph2d9C9RaoFJ3yx0A9tgspflLlueW0c+rSQq75ysphTH7y3y2QBw9
4mbwKIK1i7LtbB0k7eweinlh+8OyrCRMbF6CREH738EKAP/I2kDHIoqIm8llOr41
9quyBR6MIyw8rvINRr1eT0eQ+sEHzyM9Trvne2FoTXKNA9GsDnwsxzjXceliiVJm
FQjg79HQ3WH1PJ5+cu/+i6qZWDnS/UlnRmIPholO4GQ4bRok/sRCzkwVAgU69A/k
F35MH4K9X3nTKLan2UyP
=0wLC
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.14/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom devicetree-arm64 changes for 4.14" from Florian Fainelli:
This pull request contains Broadcom ARM64-based SoCs Device Tree changes for
4.14, please pull the following:
- Scott moves all the Northstar 2 DTS files into a sub-directory to be consistent
with what was done for stingray and to future proof the addition of new board
DTS files
- Velibor adds the ARM CCN-502 interconnect DT node to the Stingray SoC
DTS include file
- Srinath adds the MDIO multiplexer and SATA nodes to the Stingray DTS
include files
- Anup adds the SP804 timers, FlexRM (mailbox) and RAID engine DT nodes
to the Stingray DTS include files
- Abishek adds the BGMAC (Ethernet controller) node to the Stingray DTS
files
* tag 'arm-soc/for-4.14/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: Add SBA-RAID DT nodes for Stingray SoC
arm64: dts: Add FlexRM DT nodes for Stingray
arm64: dts: Add SATA DT nodes for Stingray SoC
arm64: dts: Add DT node to enable BGMAC driver on Stingray
arm64: dts: Add sp804 DT nodes for Stingray SoC
arm64: dts: Add MDIO multiplexer DT node for Stingray
arm64: dts: Enable stats for CCN-502 interconnect on Stingray
arm64: dts: move ns2 into northstar2 directory
* 'for-next/perf' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
arm64: perf: add support for Cortex-A35
arm64: perf: add support for Cortex-A73
arm64: perf: Remove redundant entries from CPU-specific event maps
arm64: perf: Connect additional events to pmu counters
arm64: perf: Allow standard PMUv3 events to be extended by the CPU type
perf: xgene: Remove unnecessary managed resources cleanup
arm64: perf: Allow more than one cycle counter to be used
The percpu variables efi_fpsimd_state and efi_fpsimd_state_used,
used by the FPSIMD save/restore routines for EFI calls, are
unintentionally global.
There's no reason for anything outside fpsimd.c to touch these, so
this patch makes them static (as they should have been in the first
place).
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Three fixes adding a missing alias for the Ethernet controller on A64
boards. One adding a missing interrupt for the pin controller.
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAlmWY8IOHHdlbnNAY3Np
ZS5vcmcACgkQOJpUIZwPJDCarBAA5ZLXl9Zp/JugO0JNuCyJpY3Z418hMMieqJ/P
k2iTdnxSZ3ZhZGqDy/yJtEVS4T1jEe3r+VumUqQI81u6LTKcSCTgngBp0X4pDjKP
VrPuvJZnaIQXGyxD+WRjeEZ9LwfU1KKwmkNF8ASnx53OyXF/qghl1OcCjV9nTfh8
HcMBuSK/qqEQ1LoF2gyM1XXHkSD1jSoA/Nzwxgp8ivSlRGzuwbHO0fv42eQfgI7h
D1Ufz3bAHh58YcarHMp53+6mMcaYNyTYwAzMH6/IAxwQ6CSSN6ZOsoe17+agEmoX
65pQJWeVx+i4n8WtGPX0uWcz9K/jKyXEdpCLY85ZYHZKTabb6ZTuhMkYyOvXzhMD
EvSas/dB6nhForHSPHVRYsS9zlwpwO5+LSAufYET0u/ec9RYL3S1f7JHNzYuLvgJ
/W5EEu063XyrTEF5/xEv7FEd30J2k9418dCPyjXknuDdXbq1/TFAX/fwW+9I/I6W
oguQbbuO7Op/LClVk15nPLIsdLwv2+QMbuWoqfqtK767x+cEpSYT2KY+s2OUjL8Y
m7baoPpbAFPWq34ZtWCQzXH3pQ1ghgvnDRVfsskCpNpC3uB0C7Y+/lexRHd2A1j4
ADf4k3jg2ybFUqADwHnCg7A+/wKCMDgIPLAfWgumgefUnZT0+YT7bP3xINks6/wi
eguEAXA=
=lSDD
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.13-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Pull "Allwinner fixes for 4.13, round 2" from Chen-Yu Tsai:
Three fixes adding a missing alias for the Ethernet controller on A64
boards. One adding a missing interrupt for the pin controller.
* tag 'sunxi-fixes-for-4.13-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: h5: fix pinctrl IRQs
arm64: allwinner: a64: sopine: add missing ethernet0 alias
arm64: allwinner: a64: pine64: add missing ethernet0 alias
arm64: allwinner: a64: bananapi-m64: add missing ethernet0 alias
RK3399 USB DWC3 controller has a issue that FS/LS devices not
recognized if inserted through USB 3.0 HUB. It's because that
the inter-packet delay between the SSPLIT token to SETUP token
is about 566ns, more then the USB spec requirement.
This patch adds a quirk "snps,dis-tx-ipgap-linecheck-quirk" to
disable the u2mac linestate check to decrease the SSPLIT token
to SETUP token inter-packet delay from 566ns to 466ns.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
There is no agreed-upon definition of spin_unlock_wait()'s semantics,
and it appears that all callers could do just as well with a lock/unlock
pair. This commit therefore removes the underlying arch-specific
arch_spin_unlock_wait() for all architectures providing them.
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: <linux-arch@vger.kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Andrea Parri <parri.andrea@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Boqun Feng <boqun.feng@gmail.com>
Implement MEMBARRIER_CMD_PRIVATE_EXPEDITED with IPIs using cpumask built
from all runqueues for which current thread's mm is the same as the
thread calling sys_membarrier. It executes faster than the non-expedited
variant (no blocking). It also works on NOHZ_FULL configurations.
Scheduler-wise, it requires a memory barrier before and after context
switching between processes (which have different mm). The memory
barrier before context switch is already present. For the barrier after
context switch:
* Our TSO archs can do RELEASE without being a full barrier. Look at
x86 spin_unlock() being a regular STORE for example. But for those
archs, all atomics imply smp_mb and all of them have atomic ops in
switch_mm() for mm_cpumask(), and on x86 the CR3 load acts as a full
barrier.
* From all weakly ordered machines, only ARM64 and PPC can do RELEASE,
the rest does indeed do smp_mb(), so there the spin_unlock() is a full
barrier and we're good.
* ARM64 has a very heavy barrier in switch_to(), which suffices.
* PPC just removed its barrier from switch_to(), but appears to be
talking about adding something to switch_mm(). So add a
smp_mb__after_unlock_lock() for now, until this is settled on the PPC
side.
Changes since v3:
- Properly document the memory barriers provided by each architecture.
Changes since v2:
- Address comments from Peter Zijlstra,
- Add smp_mb__after_unlock_lock() after finish_lock_switch() in
finish_task_switch() to add the memory barrier we need after storing
to rq->curr. This is much simpler than the previous approach relying
on atomic_dec_and_test() in mmdrop(), which actually added a memory
barrier in the common case of switching between userspace processes.
- Return -EINVAL when MEMBARRIER_CMD_SHARED is used on a nohz_full
kernel, rather than having the whole membarrier system call returning
-ENOSYS. Indeed, CMD_PRIVATE_EXPEDITED is compatible with nohz_full.
Adapt the CMD_QUERY mask accordingly.
Changes since v1:
- move membarrier code under kernel/sched/ because it uses the
scheduler runqueue,
- only add the barrier when we switch from a kernel thread. The case
where we switch from a user-space thread is already handled by
the atomic_dec_and_test() in mmdrop().
- add a comment to mmdrop() documenting the requirement on the implicit
memory barrier.
CC: Peter Zijlstra <peterz@infradead.org>
CC: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
CC: Boqun Feng <boqun.feng@gmail.com>
CC: Andrew Hunter <ahh@google.com>
CC: Maged Michael <maged.michael@gmail.com>
CC: gromer@google.com
CC: Avi Kivity <avi@scylladb.com>
CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
CC: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Tested-by: Dave Watson <davejwatson@fb.com>
After adding the clock subsystem to the SOC, the dummy
clock clk32k is not longer needed. Delete it.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Use newly added R-Car SATA Gen3 fallback compat string
in the DT of the r8a7795 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before the fallback compat string is considered.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
The DU LVDS output is on port 3 on R8A7795 but on port 2 on R8A7796. The
lvds_connector label thus can't be defined in salvator-common.dtsi,
common to the two SoCs.
The lvds_connector label is meant for convenience to be referenced from
panel device tree files, such as r8a77xx-aa104xd12-panel.dtsi or
r8a77xx-aa121td01-panel.dtsi. As those files are not included in any
device tree source, and the label never used elsewhere, we can simply
remove it. Out-of-tree patches that include panel device tree files can
then add a
#define lvds_connector du_out_lvds0
before including the panel device tree file.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Avoid audio_clkout naming conflict for salvator boards using
Renesas R-Car Gen 3 SoCs
Morimoto-san says "The clock name of "audio_clkout" is used by the
Renesas sound driver. This duplicated naming breaks its clock
registering/unregistering. Especially when unbind/bind it can't handle
clkout correctly. This patch renames "audio_clkout" to "audio-clkout" to
avoid the naming conflict."
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZlVkYAAoJENfPZGlqN0++JKsP/i0hKyjgmvL983609fRwWcq9
i3nkGw+kxcv0ZBLSjWR++mPsQ3PPTgOk1MpJL3ioL8WZBuaTghCpsGrsVRnNViq8
RlDhShNPlvqcq9MOoAcc6rgqxron7P97Eykt1IXIDqgPlRNRRlSjil0MovLonzDW
S2T1W6gRjKKSOdPpZbXhxDeBwv2lEr7+688kU9ZTvzKN4KWdsShuuVSnW786wWgM
SJ8ZFzI5RzUsqcqvpeEWpe+z5eZo/GFDtmQ3E/ngCzrwbAwbVUeEXjvLLJF9oHSs
sMU66eOoU7erRqTe6KjpW+qIIRkaAR3rH5vVQB0tCJVl4kORWTVFcUGWiQ3ON3cP
wPrObeBCzzKamWoH6QJ7oWFvFYOVFOQtm3PaXBuSkWjlldLA9FdhLZJ1mYdrk5i6
PnIdvJGXRC0nH/+yJkbheG8FRNhz92eCG1u3gUBEGVKMwYDBWlztYVAI32MypKcm
+2xnR1Fs2uMzD/WxsM/PHaeU2LeTt/pnazgUInwnjDEFUR6fRP1MpkoFcspRk3Ix
QqF7HmLmn7ezho+Z+PXFYKPJvLHwTyHRI8TQtFzarFWXm+Y/ve5GVdbDLVkw31Aa
jy/w10dGmh9Q3z3sD2jhQKYuNVE0fhsZC1xkVCIodtYpyULfcLJvGJuUazlqpFZz
z3hXHslR7p1se40FdP6k
=meey
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes4-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Pull "Fourth Round of Renesas ARM Based SoC Fixes for v4.13" from Simon Horman:
* Avoid audio_clkout naming conflict for salvator boards using
Renesas R-Car Gen 3 SoCs
Morimoto-san says "The clock name of "audio_clkout" is used by the
Renesas sound driver. This duplicated naming breaks its clock
registering/unregistering. Especially when unbind/bind it can't handle
clkout correctly. This patch renames "audio_clkout" to "audio-clkout" to
avoid the naming conflict."
* tag 'renesas-fixes4-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: renesas: salvator-common: avoid audio_clkout naming conflict
1. Replaces old coresight ATB programmable replicator compatible with
new and more generic one
2. Replaces incorrect usage of underscores for device node names in the
device tree with hyphen
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJZjbz8AAoJEABBurwxfuKY+JkP/1xDAZBQHLGbr2p9x6Za/Ozs
N8+5p4o2c07K8Gc8YsmcruxtdrtXIgCZk2cp+m0jTaO6ox68TuMMwIF69BR12SaK
oqxxmk8VNSU5SaOr3KrdQDpGTFrBm9yq0PZkBtGyzlxeWgbSOLmcrFDP2jc9NbQ3
0fvKzybF/8VvzdaO9CNUO9oYXLZeZdLKAjcOIkaUWqVmX12/D+akTXEVt8eTgEik
w56qP4RYYOywb3v2qqyD+0oPB59pAjyjW/QOjokPCb8YLat3pR6VH9FKtmYr44hU
JpHw4bl/CdYSgS1e8ZT1RSy14GqcTOJ4yPJGgChPVWf//ue4impvAldR0tm9gOS6
ooc9PCsz22FxlfPAoNpG0TEvC/tzYYyiagBCb/hFQqnN/lqbVs9RcTG6lbyLb5KE
DnTPVNapt5Eqn74TBwUvr1J7z4q9LqyuhBNAl12QUeHtfTPp9KVrntiLadpYk5Lh
0qFavNAI9Q9FZRN11G0IuEMHm2PNl3XjEpQE/oVGHGTiHVmClIwiWOinMB9AmRrJ
K2XF/nKS6+/wqsWxezXO6RvJPkO1thkBpVkgImlPNRXY2FvzUSXeLu9c3ImL13K5
BsXAmuU4nnhH1Oe6WWFbhQ6lCitUAfq2l3HS+8SH0hPw2J8iMX6tNLAK+i3FQY5Z
LAvjk2l3n/QLkXnZA2CO
=jaSe
-----END PGP SIGNATURE-----
Merge tag 'juno-updates-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64
Pull "ARMv8 Vexpress/Juno DT updates for v4.14" from Sudeep Holla:
1. Replaces old coresight ATB programmable replicator compatible with
new and more generic one
2. Replaces incorrect usage of underscores for device node names in the
device tree with hyphen
* tag 'juno-updates-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: replace underscores with hyphen in device node names
arm64: dts: juno: Use the new coresight replicator string
The usual improvement patches:
- R_INTC interrupt controller enabled for the A64 SoC
- AXP803 PMIC added and enabled on the Pine64 and SoPine boards
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAlmH2GYOHHdlbnNAY3Np
ZS5vcmcACgkQOJpUIZwPJDC7IhAAji5wcYjwiRSBD042AvatWWRvNKvzvtbcUxVZ
W1NmQBGfrFDDDZ2eipRfct/xGViAmnAPt2F5YnDY1CtcNOZDJOi1NmThC9qMUawO
qfIAIo7Ay59JehImq+cxzN0vovUKtNLxY8DDFRgqhNzCgooQN8a0an5Zv51BtQhP
wqAyJJDleS8OLLVHUZjQ/+cwFgQvt1mFp4ctkgK8vNsWjGjUYqIFzbxmQDmpi6WX
yvUQmyK9sB7tCC/UYaQKOuqNIiidsstRpKHAdPR7K3yJaSu5F4980cNGVizdP8Zv
9F2toU6gfzT8kXUUG7bC0Op+O+2bukFcbl/rDpjKGNQGMPZWtPIO+z+r6+Np60xm
zpyfJGI72oq0LrJwwHwFqYBecr/94ACf+IJf/arOhBflhQWndgLo0ZklfXIJu9do
FjLYaIR65ZP1A/d8HTIlJwI+FPqGV9gSLwyHSkud0CAe/EqugazXq4eWg19nG/e/
gplOr+pZQsmQeIbWFXDqi4wDyKnM5PAkaM9yMm6HXbEqa54a3peE73cZfDNHiA8n
ccg42U/p9sueX9+2lAoR0WamnvO6gP2RAF28Z2UN/oN5zz7gbLde+dBE0vAWKYQC
G1ECV04h7KjWQrZJHdKWVUSTsrZsImwG6looV4vhNPsu5uvQnegaudDNnDf0PBKV
VnXL6Uc=
=9oen
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt64-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64
Pull "Allwinner arm64 DT changes for 4.14" from Chen-Yu Tsai:
The usual improvement patches:
- R_INTC interrupt controller enabled for the A64 SoC
- AXP803 PMIC added and enabled on the Pine64 and SoPine boards
* tag 'sunxi-dt64-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: a64: add AXP803 PMIC support to SoPine and the baseboard
arm64: allwinner: a64: enable AXP803 regulators for Pine64
arm64: allwinner: a64: add DTSI file for AXP803 PMIC
arm64: allwinner: a64: add AXP803 node to Pine64 device tree
arm64: allwinner: a64: add NMI (R_INTC) controller on A64
and the use of keep-power-in-suspend in non-sdio nodes as well as the
removal of the deprecated num-slots property from dwmmc nodes.
rk3328 gets support for spdif, io-domains and usb (including enablement
of usb on the evaluation board), while rk3368 gains support for spdif.
The biggest chunk of course aims for the rk3399 with a number of pcie
changes, support for the mali gpu, a new power-domain, sdmmc support
on the firefly board and dynamic-power-coefficients.
The gru family also gets support for their quite central pwm regulators
using the newly introduced vctrl regulator types.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlmET9EQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgZbjCACKFO9Hp8Xwwg2nEM8DL3i+MlGaqxjIrcsb
WskuVOJjkAA4hMnrd7XvbpzJJusAquGqMd042ZCWtrNa1AwzCy0ZkYjDFNL27rXH
DqrHmJZowSoTHxlo8QKaevXH3ZZnp8TDz4IqaD0+UZx7DgZSOjR1a+feseh1Jn/V
9WBUJhNAFtKMiJBkTIpaDUk0E6OxIspdvlJurYmwUvDbfZKlpZrXHYKXSuUhFS9s
JX4Dqi5eF96Mctpi8GhaHGf7awPQf4oQBZfsXxhhS/efzX/v0HWqUPt40o2THi0F
ZbFFE3xAFaWisA+cbg8xnzJc8ZAwz2UmS6FgQ9lrqKyGN74buwgP
=spNi
-----END PGP SIGNATURE-----
Merge tag 'v4.14-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Pull "Rockchip dts64 changes for 4.14" from Heiko Stübner:
64bit Rockchip devicetree changes containing fixes for pinctrl typos
and the use of keep-power-in-suspend in non-sdio nodes as well as the
removal of the deprecated num-slots property from dwmmc nodes.
rk3328 gets support for spdif, io-domains and usb (including enablement
of usb on the evaluation board), while rk3368 gains support for spdif.
The biggest chunk of course aims for the rk3399 with a number of pcie
changes, support for the mali gpu, a new power-domain, sdmmc support
on the firefly board and dynamic-power-coefficients.
The gru family also gets support for their quite central pwm regulators
using the newly introduced vctrl regulator types.
* tag 'v4.14-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: update dynamic-power-coefficient for rk3399
arm64: dts: rockchip: add rk3328 spdif node
arm64: dts: rockchip: add rk3368 spdif node
arm64: dts: rockchip: enable sdmmc controller on rk3399-firefly
arm64: dts: rockchip: Add rk3328 io-domain node
arm64: dts: rockchip: kill pcie_clkreqn and pcie_clkreqnb for rk3399
arm64: dts: rockchip: change clkreq mode for rk3399-firefly
arm64: dts: rockchip: enable the GPU for RK3399-GRU
arm64: dts: rockchip: add ARM Mali GPU node for RK3399 SoCs
dt-bindings: gpu: add the RK3399 mali for rockchip specifics
arm64: dts: rockchip: remove abused keep-power-in-suspend
arm64: dts: rockchip: remove num-slots from all platforms
arm64: dts: rockchip: change clkreq mode for rk3399-evb
arm64: dts: rockchip: add SdioAudio pd control for rk3399
arm64: dts: rockchip: enable usb2 for RK3328 evaluation board
arm64: dts: rockchip: add usb2 nodes for RK3328 SoCs
arm64: dts: rockchip: set rk3399 dynamic CPU power coefficients
arm64: dts: rockchip: Use vctrl regulators for dynamic CPU voltages on Gru/Kevin
arm64: dts: rockchip: Update CPU regulator voltage ranges for Gru
arm64: dts: rockchip: fix typo in mmc pinctrl
* Add usb2.0 for R-Car H3 (r8a7795) ES2.0 SoC
* Add R-Car D3 (r8a77995) SoC and Draak board support
Adds minimal support for the R-Car D3 SoC and the Draak development
board, allowing to boot from a ramdisk using a serial console.
* Add Add VC6 clock generator to R-Car H3 (r8a7795)/Salvator-XS board
The VC6 is an I2C-controlled programmable clock generator, used on the
board to provide a display dot clock. Add it to DT.
* Add missing second pair of DMA names to MSIOF nodes to
R-Car M3-W (r8a7796) SoC
MSIOF0 and MSIOF1 are tied to two DMA controllers through two pairs of
DMA specifiers. However, the second pair of corresponding DMA names was
missing.
* Add support for the DU to R-Car H3 (r8a7795) SoC
Add a compatible string and VSP links to the DU node. The H3 ES1.x and H3
ES2.0 are compatible save for the links to the VSPs that are described
explicitly in DT, so there's no need for a new ES2-specific compatible
string.
* Enable HDMI on R-Car H3 (r8a7795) and M3-W (r8a7796) ULCB boards
* Enable DU on R-Car M3-W (r8a7796) Salvator-X board
* Enable I2C for DVFS on R-Car H3 (r8a7795) and M3-W (r8a7796) ULCB boards
* Add Add DRIF support to R-Car H3 (r8a7795) and M3-W (r8a7796) SoCs
Ramesh Shanmugasundaram says, "R-Car Gen3 DRIF is a SPI like receive only
slave device."
* Move CPG_AUDIO_CLK_I from board to soc files
Geert Uytterhoeven says, "The definition of CPG_AUDIO_CLK_I is
SoC-specific, not board-specific."
* Add IMR-LX4 support to R-Car H3 (r8a7795) and M3-W (r8a7796) SoCs
Sergei Shtylyov says, "The image renderer light extended 4 (IMR-LX4) or
the distortion correction engine is a drawing processor with a simple
instruction system capable of referencing data on an external memory as
2D texture data and performing texture mapping and drawing with respect
to any shape that is split into triangular objects."
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZfzd9AAoJENfPZGlqN0++Sv0QAKHcf5jviX3oYKnriTvK3G44
f2M5joczCbKagS26RO769bCHQHuylD4t6sa3gLyWsg2Ir8QXwmdNpIcx0DUmErf2
mFp07tuCe2JlGmLuN1N8zq/0mL0TFX7L7OR38vg4D7WGpyuAkLeVZdAwVqcefNJX
h6ANpkF2VX/CZJZTWLIFbe8LdxcJoJc7Usu0ElFcwBg6XdaBxWDBieJevg+1I7pP
vCjGozbuGx8cvZmKUp+KUtLuL7muhX6hVu6E2pQ4vnmGGYZFJCwAsf5en5nZyJfu
vbDC2ja2OIo9vQORJFboFvZOhzzmH2kTHUpO26DwTLLMoCLiqeB9Es3grD0rHP/y
8BNlj6JYcCOCwTMlSuKCcbLWUQedn50EtfSjS/3R9sV5ZG3149Cf+ls3yz2OtAsX
aFWExRyS2OJaq06uHK+oxsSd+tEbQuDJtY83ohGYyY/WzdFUNCEJHEseSVg5uOID
+as9uOTdSn0a+mJT4eQPMWKinQfElmUoe6tK7SV5Enz0e3TgSuNw0GdtAgJ2rNZr
XqOeUzNpY+s85bW6rYqrv44Si9haMik/jJqMzI4fGV9/GoKCYVfn7DZCrm1N5k+o
py377mcp078BBnmaFefp20skcqWN7Qy66R3eJ7S7v6zLI5jUphT89Z0y4lNj1hAy
5+j7l7Y0vvAYGlZiT0bb
=ehXW
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64
Pull "Renesas ARM64 Based SoC DT Updates for v4.14" from Simon Horman:
* Add usb2.0 for R-Car H3 (r8a7795) ES2.0 SoC
* Add R-Car D3 (r8a77995) SoC and Draak board support
Adds minimal support for the R-Car D3 SoC and the Draak development
board, allowing to boot from a ramdisk using a serial console.
* Add Add VC6 clock generator to R-Car H3 (r8a7795)/Salvator-XS board
The VC6 is an I2C-controlled programmable clock generator, used on the
board to provide a display dot clock. Add it to DT.
* Add missing second pair of DMA names to MSIOF nodes to
R-Car M3-W (r8a7796) SoC
MSIOF0 and MSIOF1 are tied to two DMA controllers through two pairs of
DMA specifiers. However, the second pair of corresponding DMA names was
missing.
* Add support for the DU to R-Car H3 (r8a7795) SoC
Add a compatible string and VSP links to the DU node. The H3 ES1.x and H3
ES2.0 are compatible save for the links to the VSPs that are described
explicitly in DT, so there's no need for a new ES2-specific compatible
string.
* Enable HDMI on R-Car H3 (r8a7795) and M3-W (r8a7796) ULCB boards
* Enable DU on R-Car M3-W (r8a7796) Salvator-X board
* Enable I2C for DVFS on R-Car H3 (r8a7795) and M3-W (r8a7796) ULCB boards
* Add Add DRIF support to R-Car H3 (r8a7795) and M3-W (r8a7796) SoCs
Ramesh Shanmugasundaram says, "R-Car Gen3 DRIF is a SPI like receive only
slave device."
* Move CPG_AUDIO_CLK_I from board to soc files
Geert Uytterhoeven says, "The definition of CPG_AUDIO_CLK_I is
SoC-specific, not board-specific."
* Add IMR-LX4 support to R-Car H3 (r8a7795) and M3-W (r8a7796) SoCs
Sergei Shtylyov says, "The image renderer light extended 4 (IMR-LX4) or
the distortion correction engine is a drawing processor with a simple
instruction system capable of referencing data on an external memory as
2D texture data and performing texture mapping and drawing with respect
to any shape that is split into triangular objects."
* tag 'renesas-arm64-dt-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
arm64: dts: renesas: r8a7795: add hsusb ch3 device node
arm64: dts: renesas: r8a7795: add usb-dmac ch2 and ch3 device nodes
arm64: dts: renesas: r8a7795: add usb2.0 host ch3 device nodes
arm64: dts: renesas: r8a7795: add usb2_phy ch3 device node
arm64: dts: renesas: r8a7795: Add usb companion property in EHCI
arm64: dts: renesas: Add Renesas Draak board support
arm64: dts: renesas: Add Renesas R8A77995 SoC support
arm64: renesas: Add Renesas R8A77995 Kconfig support
arm64: dts: r8a7795: salvator-xs: Connect DU dot clocks 0 and 3
arm64: dts: salvator-xs: Add VC6 clock generator
arm64: dts: r8a7796: Add missing second pair of DMA names to MSIOF nodes
arm64: dts: r8a7795: Add all MSIOF nodes
arm64: dts: r8a7795: Add support for the DU
arm64: dts: ulcb: Enable HDMI output
arm64: dts: ulcb: Add HDMI output connector
arm64: dts: r8a7796: m3ulcb: Add DU external dot clocks
arm64: dts: r8a7795: h3ulcb: Add DU external dot clocks
arm64: dts: ulcb: Add DU external dot clock sources
arm64: dts: r8a7796: salvator-x: Enable HDMI output
arm64: dts: r8a7796: salvator-x: Add DU external dot clocks
...
1. Remove deprecated and unneeded properties from Exynos boards.
2. Implement proper (working) support for USB On-The-Go on Exynos5433
TM2/TM2E boards.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZdj1rAAoJEME3ZuaGi4PX+goP/1F2rvi5nRu/IAPwpm7iplMx
IbTtEYHH6IfL4Qhp2TPbxBNc3VKpL1Nc/e0DM60GWyFqevZXjDsiP6UhwyqTx61m
eHX19+LkKEyCifUoce4c3Z5Y/lI3k1oLYTSWp3DvmVd5JS+y1AAMAojnh2O4wWve
0RA3BlLMPfaydjVD44CKOjJiKdT90B/Qdgpy36OkgX2i0t7pZeuenMbZSKwW8jvs
rgFjD9iN5oQWFrXPDscFc/oL46aaD9Xll3QWBe70eUvrkum+4+RXCmdMxhIr8Rs2
NHzmuDZTezUPHjdCOvgNpmYPSN5dcWeeck3HvVQQaXFztqGr8RZ8Wk3gDnc9Xbfy
OUBreQquFew62nMhbUsglgl+umoIw+fdzphjxp50mvq22YpsoGEShN3HU4ZiUHul
9ISPZspAevk/2Al/McY85wqLrofcTpoUydsja46hxmAQrjuGzJqLt9HI7azG4JLZ
iIXZK6+comEqxK3ei7P4q1D82/Hwy5nLStSEdYQU7mUMcLIl+HDWaq80RzebImoh
oldBkRPqayU51vDOG9RiVm7vSH6gHCSEVdMgjdOTOoQMq9UN/CqLVe60VL6R1m3e
U5Kh0QcxNVFnxzOeVwikPN1s35sw4JEyHofu3rqIeBTxnckCjQvE6JSdYJqipCYD
jrNMAHC1cknv+FhSPzND
=hQn1
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Pull "Samsung DTS ARM64 changes for v4.14" from Krzysztof Kozłowski:
1. Remove deprecated and unneeded properties from Exynos boards.
2. Implement proper (working) support for USB On-The-Go on Exynos5433
TM2/TM2E boards.
* tag 'samsung-dt64-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Remove num-slots from exynos platforms
arm64: dts: exynos: Add extcon property for TM2 and TM2E
arm64: dts: exynos: Fix wrong label for USB 3.0 controller node
arm64: dts: exynos: Remove the OF graph from DSI node
This patch adds the IOMMU node for the IOMMU that resides on the
Qualcomm MSM8916 platforms.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the Qualcomm Venus video codec node for the video
codec hardware residing on MSM8916 platforms.
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch is to add watchdog binding for Hi3660 on Hikey960 board.
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This patch reserves some memory in the DTS and sets up a
pstore device tree node to enable pstore support on HiKey960.
Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add support to hikey960 dts for the syscon-reboot-mode driver.
Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
There are two clusters on the Hi3660, the first one is Cortex-A53 based
and the other one is Cortex-A73 based. These two clusters have different
idle states.
Thanks to Daniel Lezcano's recent changes, the generic ARM cpuidle
driver can now support several clusters with different idle states, thus
supporting the big.Little architecture.
In addition to the WFI idle state which is the default shallowest state
for all ARM cpus, the Hi3660 supports the following states:
- CA53 CPUs:
- CPU_SLEEP: CPU power off state
- CLUSTER_SLEEP_0: Cluster power off state
- CA73 CPUs:
- CPU_NAP: CPU retention state
- CPU_SLEEP: CPU power off state
- CLUSTER_SLEEP_1: Cluster power off state
This patch adds the idle states description for the Hi3660 to the device
tree.
Cc: Kevin Wang <jean.wangtao@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This patch adds the Qualcomm Adreno GPU node that exists in the
MSM8916.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Both unwind_frame() and dump_backtrace() try to check whether a stack
address is sane to access, with very similar logic. Both will need
updating in order to handle overflow stacks.
Factor out this logic into a helper, so that we can avoid further
duplication when we add overflow stacks.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
This patch enables arm64 to be built with vmap'd task and IRQ stacks.
As vmap'd stacks are mapped at page granularity, stacks must be a multiple of
PAGE_SIZE. This means that a 64K page kernel must use stacks of at least 64K in
size.
To minimize the increase in Image size, IRQ stacks are dynamically allocated at
boot time, rather than embedding the boot CPU's IRQ stack in the kernel image.
This patch was co-authored by Ard Biesheuvel and Mark Rutland.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
We allocate our IRQ stacks using a percpu array. This allows us to generate our
IRQ stack pointers with adr_this_cpu, but bloats the kernel Image with the boot
CPU's IRQ stack. Additionally, these are packed with other percpu variables,
and aren't guaranteed to have guard pages.
When we enable VMAP_STACK we'll want to vmap our IRQ stacks also, in order to
provide guard pages and to permit more stringent alignment requirements. Doing
so will require that we use a percpu pointer to each IRQ stack, rather than
allocating a percpu IRQ stack in the kernel image.
This patch updates our IRQ stack code to use a percpu pointer to the base of
each IRQ stack. This will allow us to change the way the stack is allocated
with minimal changes elsewhere. In some cases we may try to backtrace before
the IRQ stack pointers are initialised, so on_irq_stack() is updated to account
for this.
In testing with cyclictest, there was no measureable difference between using
adr_this_cpu (for irq_stack) and ldr_this_cpu (for irq_stack_ptr) in the IRQ
entry path.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Given that adr_this_cpu already requires a temp register in addition
to the destination register, tweak the instruction sequence so that sp
may be used as well.
This will simplify switching to per-cpu stacks in subsequent patches. While
this limits the range of adr_this_cpu, to +/-4GiB, we don't currently use
adr_this_cpu in modules, and this is not problematic for the main kernel image.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
[Mark: add more commit text]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
In subsequent patches, we will detect stack overflow in our exception
entry code, by verifying the SP after it has been decremented to make
space for the exception regs.
This verification code is small, and we can minimize its impact by
placing it directly in the vectors. To avoid redundant modification of
the SP, we also need to move the initial decrement of the SP into the
vectors.
As a preparatory step, this patch introduces kernel_ventry, which
performs this decrement, and updates the entry code accordingly.
Subsequent patches will fold SP verification into kernel_ventry.
There should be no functional change as a result of this patch.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
[Mark: turn into prep patch, expand commit msg]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
The EFI stub is intimately coupled with the kernel, and takes advantage
of this by relocating the kernel at a weaker alignment than the
documented boot protocol mandates.
However, it does so by assuming it can align the kernel to the segment
alignment, and assumes that this is 64K. In subsequent patches, we'll
have to consider other details to determine this de-facto alignment
constraint.
This patch adds a new EFI_KIMG_ALIGN definition that will track the
kernel's de-facto alignment requirements. Subsequent patches will modify
this as required.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Currently we define SEGMENT_ALIGN directly in our vmlinux.lds.S.
This is unfortunate, as the EFI stub currently open-codes the same
number, and in future we'll want to fiddle with this.
This patch moves the definition to our <asm/memory.h>, where it can be
used by both vmlinux.lds.S and the EFI stub code.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Before we add yet another stack to the kernel, it would be nice to
ensure that we consistently organise stack definitions and related
helper functions.
This patch moves the basic IRQ stack defintions to <asm/memory.h> to
live with their task stack counterparts. Helpers used for unwinding are
moved into <asm/stacktrace.h>, where subsequent patches will add helpers
for other stacks. Includes are fixed up accordingly.
This patch is a pure refactoring -- there should be no functional
changes as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Currently we define THREAD_SIZE and THREAD_SIZE_ORDER separately, with
the latter dependent on particular CONFIG_ARM64_*K_PAGES definitions.
This is somewhat opaque, and will get in the way of future modifications
to THREAD_SIZE.
This patch cleans this up, defining both in terms of a common
THREAD_SHIFT, and using PAGE_SHIFT to calculate THREAD_SIZE_ORDER,
rather than using a number of definitions dependent on config symbols.
Subsequent patches will make use of this to alter the stack size used in
some configurations.
At the same time, these are moved into <asm/memory.h>, which will avoid
circular include issues in subsequent patches. To ensure that existing
code isn't adversely affected, <asm/thread_info.h> is updated to
transitively include these definitions.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Some headers rely on PAGE_* definitions from <asm/page.h>, but cannot
include this due to potential circular includes. For example, a number
of definitions in <asm/memory.h> rely on PAGE_SHIFT, and <asm/page.h>
includes <asm/memory.h>.
This requires users of these definitions to include both headers, which
is fragile and error-prone.
This patch ameliorates matters by moving the basic definitions out to a
new header, <asm/page-def.h>. Both <asm/page.h> and <asm/memory.h> are
updated to include this, avoiding this fragility, and avoiding the
possibility of circular include dependencies.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
For historical reasons, we leave the top 16 bytes of our task and IRQ
stacks unused, a practice used to ensure that the SP can always be
masked to find the base of the current stack (historically, where
thread_info could be found).
However, this is not necessary, as:
* When an exception is taken from a task stack, we decrement the SP by
S_FRAME_SIZE and stash the exception registers before we compare the
SP against the task stack. In such cases, the SP must be at least
S_FRAME_SIZE below the limit, and can be safely masked to determine
whether the task stack is in use.
* When transitioning to an IRQ stack, we'll place a dummy frame onto the
IRQ stack before enabling asynchronous exceptions, or executing code
we expect to trigger faults. Thus, if an exception is taken from the
IRQ stack, the SP must be at least 16 bytes below the limit.
* We no longer mask the SP to find the thread_info, which is now found
via sp_el0. Note that historically, the offset was critical to ensure
that cpu_switch_to() found the correct stack for new threads that
hadn't yet executed ret_from_fork().
Given that, this initial offset serves no purpose, and can be removed.
This brings us in-line with other architectures (e.g. x86) which do not
rely on this masking.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
[Mark: rebase, kill THREAD_START_SP, commit msg additions]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Our __die() implementation tries to dump the stack memory, in addition
to a backtrace, which is problematic.
For contemporary 16K stacks, this can be a lot of data, which can take a
long time to dump, and can push other useful context out of the kernel's
printk ringbuffer (and/or a user's scrollback buffer on an attached
console).
Additionally, the code implicitly assumes that the SP is on the task's
stack, and tries to dump everything between the SP and the highest task
stack address. When the SP points at an IRQ stack (or is corrupted),
this makes the kernel attempt to dump vast amounts of VA space. With
vmap'd stacks, this may result in erroneous accesses to peripherals.
This patch removes the memory dump, leaving us to rely on the backtrace,
and other means of dumping stack memory such as kdump.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
- Enable Kirin PCIe host, hi6421v530 mfd and regulator,
syscon reboot mode, serdev bus, OP-TEE and K3 DMA support
for hikey and hikey960
- Enable pcie based sas controller support for hip08 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZkc7VAAoJEAvIV27ZiWZcud0QAK6Pi/oB8qLy0xUCdkcIYHhI
XJD+PKMkZNdgWccW9bTqxVjb7iecEBA3IO1KqKvAOlQ9psjDZYuY7pJlXxhlNgmP
ulYvZpMQeKosUB/cT4ZjcTNQ/OB1Z+GNmP/HbWC6vGFyZH8ZDbXpd195+q4KKi+c
fs53ULbu5bJ22i6WYMId7fufRDXFwZoJHZWQaDUVYsmOOeFKHoS0m+NeEwZHXB2k
ruoJKF117t3xScp2GCfBIJH28cfRcmirNv6UKconX7IpuQqhZqBiYi3xYrM3bfsd
xqH9iY+SX6xb1J/gvP4zyPVrcMAB24eJI/1jSf9ipjpPBFA1iAECsVgnZ0xR8SUI
U62JGV+w/qOq/5A5En9izUY+TSmxqTsmBp5/sj7uQqM8MBIkUvD98i9PAC5fdNBh
rqKGl2qwa+VJLdfrI7U1fNJiwWCJrFWGytCTWEF0A+8ZKVVbIBvcl8pkz76kaTb6
PfQzSUSuL6sqZXXzQqVfJ89llu31C5kkIyUdaMd0JgqVnZ9NKUaOhkVlTIOKsbTl
Nrf9fta2g6xXjVjU7NEeacrtN4+kUKzARfzzAWNi5AumKuL/dhjP98QO5LF/87SC
UbVWeb2fftV5g8Yv9tFVA0vWRRJKGnBzRxwJw7ext7fKOesVnnQntwX5bl55KRqa
3lC8l/KnXp95x3z5ZrSF
=AEey
-----END PGP SIGNATURE-----
Merge tag 'hisi-defconfig-for-4.14' of git://github.com/hisilicon/linux-hisi into next/arm64
Pull "ARM64: hisilicon: defconfig updates for 4.14" from Wei Xu:
- Enable Kirin PCIe host, hi6421v530 mfd and regulator,
syscon reboot mode, serdev bus, OP-TEE and K3 DMA support
for hikey and hikey960
- Enable pcie based sas controller support for hip08 SoC
* tag 'hisi-defconfig-for-4.14' of git://github.com/hisilicon/linux-hisi:
arm64: defconfig: enable DMA driver for hi3660
arm64: defconfig: enable OP-TEE
arm64: defconfig: enable support for serial port connected device
arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE
arm64: defconfig: enable support hi6421v530 PMIC
arm64: defconfig: enable Kirin PCIe
arm64: defconfig: enable SCSI_HISI_SAS_PCI
Add the arm64 crypto drivers that have been added over the past
couple of kernel releases to its defconfig as modules.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enabling nop-xceiv PHY driver in the defconfig, needed for USB support
on A8K SoC based board.
Enabling fine-grained task level IRQ time accounting for ARMv8 as it was
already done for x86
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlmNg88ACgkQCwYYjhRyO9UgWwCeLnJikdCOF4YoN3fxw6NxNivN
cAwAn0z2IYh42j7UoBwxINih2byehBL8
=ZHwt
-----END PGP SIGNATURE-----
Merge tag 'mvebu-arm64-4.14-1' of git://git.infradead.org/linux-mvebu into next/arm64
Pull "mvebu arm64 for 4.14 (part 1)" from Gregory CLEMENT:
Enabling nop-xceiv PHY driver in the defconfig, needed for USB support
on A8K SoC based board.
Enabling fine-grained task level IRQ time accounting for ARMv8 as it was
already done for x86
* tag 'mvebu-arm64-4.14-1' of git://git.infradead.org/linux-mvebu:
arm64: defconfig: enable fine-grained task level IRQ time accounting
arm64: defconfig: enable nop-xceiv PHY driver
* compile ak4613 and renesas sound as modules
This is intended to reduce the size of a kernel image compiled
using the defconfig. This is timely as it brings the kernel image
back below the size that can be booted in my environment, a limit
it crept over in v4.13-rc1.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZfziqAAoJENfPZGlqN0++yFIQAIHtAfEpIKff7ELoEGgNOzs2
8F89igteIxumVy5to1XNVvWksoYSakWzjrOMV3dzj+llYxsjg5d7Mfc+oadNsfWy
40dFQw84QHzobqJ0I2NbhV8+1M0K4DslfzphFjB6KQK/WfDa9iw4G/GeoahX/SHP
smNd/etE0YULwnO0rujzhC3dcGiusU7u80D8yc/VlDLgAGalZP5HYP0QZ3cwBf0P
ONwjkBO6rU8e+HRYLbQkAKR9UWKXZHruM1KUrPhxkDk/+KNaEOfTDQWSuIUFokxl
bU+LV750nT8hIXXLBlX4WtkaT5uaHJoUfHXEpQnEKjXaPC4u2zVqhofZxcaIFW5R
0c/MhRmC4e8BnPQLljZqU5180qCKKXWAejYX3dRT9yUvTnHzZU8LVSn1QY4+Pvrf
CixTdXjLQOcn9G8WpInZ63xCT1j9aVY28KOVSLtUtVl/08LbEuD66PxNje45MEpp
yvi8khhvaWzpY2wPK7I3hmFIO55IYMNBfqmnNlGnuBkxNn1j1ZXSl+4P8Q41Q2GD
jXqu8cK9mJlyxwf0OSUQJQNY5c+uzcX2rKtDbf9Lkb9OnUBv8gqtvDVdaHKJzpTg
gRpvVs3mEEuT8sntECONBqsTfOEziZofwOgOSPiXoQqRHaY0NnUVW7TlBHQY4xAA
zLpnjzlpgkw6sJNU3t0h
=PAs6
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-defconfig-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/arm64
Pull "Renesas ARM64 Based SoC Defconfig Updates for v4.14" from Simon Horman:
* compile ak4613 and renesas sound as modules
This is intended to reduce the size of a kernel image compiled
using the defconfig. This is timely as it brings the kernel image
back below the size that can be booted in my environment, a limit
it crept over in v4.13-rc1.
* tag 'renesas-arm64-defconfig-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: defconfig: compile ak4613 and renesas sound as modules
commit cee22a1505 ("workqueues: Introduce new flag WQ_POWER_EFFICIENT
for power oriented workqueues") introduced the concept of power
efficient workqueues (4 years back), but it was never enabled in
upstream kernel configs.
Power efficient workqueues are simply marked as "unbound," so that jobs
queued to them can run on any CPU in the system. It leaves the target
CPU selection to the scheduler, which is the best place for such
decision making. This improves power efficiency for workqueues which are
otherwise pinned to a CPU.
Enable it for ARM64 platforms as ARM platforms were the main target for
the introduction of power efficient workqueues.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit a7be6e5a7f ("mm: drop useless local parameters of
__register_one_node()") removes the last user of parent_node().
The parent_node() macro in ARM64 platform is unnecessary.
Remove it for cleanup.
Reported-by: Michael Ellerman <mpe@ellerman.id.au>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
NanoPi A64 is a new board of high performance with low cost
designed by FriendlyElec., using the Allwinner A64 SOC.
Nanopi A64 features
- Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS
- 1GB DDR3 RAM
- MicroSD
- Gigabit Ethernet (RTL8211E)
- Wi-Fi 802.11b/g/n
- IR receiver
- Audio In/Out
- Video In/Out
- Serial Debug Port
- microUSB 5V 2A DC power-supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This patch enables these configs:
+CONFIG_SERIAL_DEV_BUS=y
+CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
As example, a bluetooth device connected to UART port can be supported by
this.
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Enable HiSilicon SAS controller based on PCI device,
which is included in hip08 SoC.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Enable USB host on Armada-8040-DB by adding USB PHY nodes for the
following ports:
- host 0 and 1 of CPM
- host 0 of CPS
These PHY are enabled by lanes coming from regulators based on two
I2C expanders.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add I2C expander and USB host PHY (host 0 and host 1) to enable
USB VBUS on USB ports of type A on Armada-7040-DB.
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The NAND controller used in A7K/A8K is present on the CP110. It is
compatible with the pxa-nand driver.
However, due to the limiation of the pins available this controller is
only usable on the CPM for A7K and on the CPS for A8K.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add one PCIe host controller node for HiSilicon Hip07 SoC and enable it in
D05 board.
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The Allwinner A64 SoC is paired with the X-Powers AXP803 PMIC over the
Reduced Serial Bus (RSB). The regulators of this PMIC supply all power
rails of the SoC and many external peripherals.
Enable the driver for the regulators of this PMIC.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[wens@csie.org: refined commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The Allwinner A64 SoC is paired with the X-Powers AXP803 PMIC over the
Reduced Serial Bus (RSB).
Enable the driver for this PMIC.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[wens@csie.org: Refined commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The pin controller of H5 has three IRQs at the chip's GIC, which
represents three banks of pinctrl IRQs. However, the device tree used to
miss the third IRQ of the pin controller, which makes the PG bank IRQ
not usable.
Add the missing IRQ to the pinctrl node.
Fixes: 4e36de179f ("arm64: allwinner: h5: add Allwinner H5 .dtsi")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
It adds the initial zx296718-pcbox board support with devices like
storage, audio and VGA output enabled.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It enables the I2S sound card support, which is used to drive audio
through aud96p22 codec in case of TV output.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instead of simple-audio-card, audio-graph-card is recommended for audio
bindings. Let's change to it, so that the HDMI/SPDIF audio card can
align with the new I2S/Codec card which will be added later.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
We will enable PWM device to control voltage through pwm-regulator
support. So let's add voltage data into OPP table.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The default I2S0 parent clock AUDIO_24M can not be divided into required
sample rate in some cases, for example when 48KHz is needed. Change the
parent clock to AUDIO_99M which works for most sample rates.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It adds VGA device in zx296718.dtsi, so that boards with VGA connector
can enable the support by changing 'status' in board DTS file.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ls208xa supports another cpu idle state which is pw20 which saves
more power when cpu is idle.
It was implemented through psci firmware.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
ls1088a supports another cpu idle state which is ph20 which saves
more power when cpu is idle.
It was implemented through psci firmware.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
When adding the rk3399 sapphire som, two more of the recently removed
num-slots properties of dw-mmc nodes slipped in.
Remove them again.
Fixes: 8164a84cca ("arm64: dts: rockchip: Add support for rk3399 sapphire SOM")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Pull clockevents fixes from Daniel Lezcano:
" - Fix error check against IS_ERR() instead of NULL for the timer-of code (Dan Carpenter)
- Fix infinite recusion with ftrace for the ARM architected timer (Ding Tianhong)
- Fix the error code return in the em_sti's probe function (Gustavo A. R. Silva)
- Fix Kconfig dependency for the pistachio driver (Matt Redfearn)
- Fix mem frame loop initialization for the ARM architected timer (Matthias Kaehlcke)"
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Add NAND controller node to LD11 and LD20. Neither of them supports
the CS1 line, so pinctrl is set up for a single CS line.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Enable the gmac2phy, make the gmac2phy work on
the rk3328-evb board.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The gmac2phy controller of rk3328 is connected to integrated PHY
directly inside, add the node for the integrated PHY support.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Make the rockchip PHY driver built into the kernel.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
add thermal zone and dynamic CPU power coefficients for rk3328
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
add tsadc needed main information for rk3328 SoC.
50000Hz is the max clock rate supported by tsadc module.
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
On platforms with an arch timer erratum workaround, it's possible for
arch_timer_reg_read_stable() to recurse into itself when certain
tracing options are enabled, leading to stack overflows and related
problems.
For example, when PREEMPT_TRACER and FUNCTION_GRAPH_TRACER are
selected, it's possible to trigger this with:
$ mount -t debugfs nodev /sys/kernel/debug/
$ echo function_graph > /sys/kernel/debug/tracing/current_tracer
The problem is that in such cases, preempt_disable() instrumentation
attempts to acquire a timestamp via trace_clock(), resulting in a call
back to arch_timer_reg_read_stable(), and hence recursion.
This patch changes arch_timer_reg_read_stable() to use
preempt_{disable,enable}_notrace(), which avoids this.
This problem is similar to the fixed by upstream commit 96b3d28bf4
("sched/clock: Prevent tracing recursion in sched_clock_cpu()").
Fixes: 6acc71ccac ("arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs")
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Commit a1d5ebaf8c ("arm64: big-endian: don't treat code as data when
copying sigret code") moved the 32-bit sigreturn trampoline code from
the aarch32_sigret_code array to kuser32.S. The commit removed the
array definition from signal32.c, but not its declaration in
signal32.h. Remove the leftover declaration.
Signed-off-by: Kevin Brodsky <kevin.brodsky@arm.com>
Signed-off-by: Mark Salyzyn <salyzyn@android.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Defining the two functions as 'static inline' and exporting them
leads to the interesting case where we can use the interface
from loadable modules, but not from built-in drivers, as shown
in this link failure:
vers/nvdimm/claim.o: In function `nsio_rw_bytes':
claim.c:(.text+0x1b8): undefined reference to `arch_invalidate_pmem'
drivers/nvdimm/pmem.o: In function `pmem_dax_flush':
pmem.c:(.text+0x11c): undefined reference to `arch_wb_cache_pmem'
drivers/nvdimm/pmem.o: In function `pmem_make_request':
pmem.c:(.text+0x5a4): undefined reference to `arch_invalidate_pmem'
pmem.c:(.text+0x650): undefined reference to `arch_invalidate_pmem'
pmem.c:(.text+0x6d4): undefined reference to `arch_invalidate_pmem'
This removes the bogus 'static inline'.
Fixes: d50e071fda ("arm64: Implement pmem API support")
Acked-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The Cortex-A35 uses some implementation defined perf events.
The Cortex-A35 derives from the Cortex-A53 core, using the same event mapings
based on Cortex-A35 TRM r0p2, section C2.3 - Performance monitoring events
(pages C2-562 to C2-565).
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The Cortex-A73 uses some implementation defined perf events.
This patch sets up the necessary mapping for Cortex-A73.
Mappings are based on Cortex-A73 TRM r0p2, section 11.9 Events
(pages 11-457 to 11-460).
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Now that the event mapping code always looks into the PMUv3 events
before any extended mappings, the extended mappings can be reduced to
only those events that are not discoverable through the PMCEID registers.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Last level caches and node events were almost never connected in current
supported cores.
We connect last level caches to the actual last level within the core and
node events are connected to bus accesses.
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Generate irqentry and softirqentry text sections without
any Kconfig dependencies. This will add extra sections, but
there should be no performace impact.
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: David S . Miller <davem@davemloft.net>
Cc: Francis Deslauriers <francis.deslauriers@efficios.com>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: linux-arch@vger.kernel.org
Cc: linux-cris-kernel@axis.com
Cc: mathieu.desnoyers@efficios.com
Link: http://lkml.kernel.org/r/150172789110.27216.3955739126693102122.stgit@devbox
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Now that there are no users of smp_mb__before_spinlock() left, remove
it entirely.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Since its inception, our understanding of ACQUIRE, esp. as applied to
spinlocks, has changed somewhat. Also, I wonder if, with a simple
change, we cannot make it provide more.
The problem with the comment is that the STORE done by spin_lock isn't
itself ordered by the ACQUIRE, and therefore a later LOAD can pass over
it and cross with any prior STORE, rendering the default WMB
insufficient (pointed out by Alan).
Now, this is only really a problem on PowerPC and ARM64, both of
which already defined smp_mb__before_spinlock() as a smp_mb().
At the same time, we can get a much stronger construct if we place
that same barrier _inside_ the spin_lock(). In that case we upgrade
the RCpc spinlock to an RCsc. That would make all schedule() calls
fully transitive against one another.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The uaccess_flushcache.c file was inadvertently dropped by the
maintainer in a previous commit. Add it back.
Fixes: 5d7bdeb1ee ("arm64: uaccess: Implement *_flushcache variants")
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
BPi M64 has an AP6212 Wi-Fi/Bluetooth combo module, and the Wi-Fi SDIO
card is connected to the mmc1 controller.
The pwrseq of the mmc1 (used to reset the card) used to missing, and the
out-of-band interrupt line of the card is not specified.
Fix these issues for proper Wi-Fi support of BPi M64.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Banana Pi M64 board uses an AXP803 PMIC.
Enable the PMIC and its regulators.
As we have now proper regulators support, missing or dummy regulators
are changed to the correct ones.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Banana Pi M64 connects the USB host-only controller on A64 SoC to a USB
hub, which provided the two USB Type-A ports on the board.
Enable the USB host controller.
The OTG function of the Micro-USB port needs the drivevbus function of
the AXP803 driver implemented, so it's not enabled now.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The EMAC Ethernet controller was enabled, but an accompanying alias
was not added. This results in unstable numbering if other Ethernet
devices, such as a USB dongle, are present. Also, the bootloader uses
the alias to assign a generated stable MAC address to the device node.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Fixes: 96219b0048 ("arm64: allwinner: a64: add device tree for SoPine
with baseboard")
[wens@csie.org: Rewrite commit log as fixing a previous patch with Fixes]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The EMAC Ethernet controller was enabled, but an accompanying alias
was not added. This results in unstable numbering if other Ethernet
devices, such as a USB dongle, are present. Also, the bootloader uses
the alias to assign a generated stable MAC address to the device node.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Fixes: 9702394374 ("arm64: allwinner: pine64: Enable dwmac-sun8i")
[wens@csie.org: Rewrite commit log as fixing a previous patch with Fixes]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The EMAC Ethernet controller was enabled, but an accompanying alias
was not added. This results in unstable numbering if other Ethernet
devices, such as a USB dongle, are present. Also, the bootloader uses
the alias to assign a generated stable MAC address to the device node.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Fixes: e729549990 ("arm64: allwinner: bananapi-m64: Enable dwmac-sun8i")
[wens@csie.org: Rewrite commit log as fixing a previous patch with Fixes]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This work implements jiting of BPF_J{LT,LE,SLT,SLE} instructions
with BPF_X/BPF_K variants for the arm64 eBPF JIT.
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
On UniPhier platform, some DTSI files are shared between arm and arm64.
Recently, inclusion of DT material of different architectures has been
supported by the build system level. Use #include <arm/...>, which
will work without relying on the exact same hierarchy as the kernel.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, may_use_simd() can return true if IRQs are disabled. If
the caller goes ahead and calls kernel_neon_begin(), this can
result in use of local_bh_enable() in an unsafe context.
In particular, __efi_fpsimd_begin() may do this when calling EFI as
part of system shutdown.
This patch ensures that callers don't think they can use
kernel_neon_begin() in such a context.
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The unwind code sets the sp member of struct stackframe to
'frame pointer + 0x10' unconditionally, without regard for whether
doing so produces a legal value. So let's simply remove it now that
we have stopped using it anyway.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
As it turns out, the unwind code is slightly broken, and probably has
been for a while. The problem is in the dumping of the exception stack,
which is intended to dump the contents of the pt_regs struct at each
level in the call stack where an exception was taken and routed to a
routine marked as __exception (which means its stack frame is right
below the pt_regs struct on the stack).
'Right below the pt_regs struct' is ill defined, though: the unwind
code assigns 'frame pointer + 0x10' to the .sp member of the stackframe
struct at each level, and dump_backtrace() happily dereferences that as
the pt_regs pointer when encountering an __exception routine. However,
the actual size of the stack frame created by this routine (which could
be one of many __exception routines we have in the kernel) is not known,
and so frame.sp is pretty useless to figure out where struct pt_regs
really is.
So it seems the only way to ensure that we can find our struct pt_regs
when walking the stack frames is to put it at a known fixed offset of
the stack frame pointer that is passed to such __exception routines.
The simplest way to do that is to put it inside pt_regs itself, which is
the main change implemented by this patch. As a bonus, doing this allows
us to get rid of a fair amount of cruft related to walking from one stack
to the other, which is especially nice since we intend to introduce yet
another stack for overflow handling once we add support for vmapped
stacks. It also fixes an inconsistency where we only add a stack frame
pointing to ELR_EL1 if we are executing from the IRQ stack but not when
we are executing from the task stack.
To consistly identify exceptions regs even in the presence of exceptions
taken from entry code, we must check whether the next frame was created
by entry text, rather than whether the current frame was crated by
exception text.
To avoid backtracing using PCs that fall in the idmap, or are controlled
by userspace, we must explcitly zero the FP and LR in startup paths, and
must ensure that the frame embedded in pt_regs is zeroed upon entry from
EL0. To avoid these NULL entries showin in the backtrace, unwind_frame()
is updated to avoid them.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
[Mark: compare current frame against .entry.text, avoid bogus PCs]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
vDSO VMA address is saved in mm_context for the purpose of using
restorer from vDSO page to return to userspace after signal handling.
In Checkpoint Restore in Userspace (CRIU) project we place vDSO VMA
on restore back to the place where it was on the dump.
With the exception for x86 (where there is API to map vDSO with
arch_prctl()), we move vDSO inherited from CRIU task to restoree
position by mremap().
CRIU does support arm64 architecture, but kernel doesn't update
context.vdso pointer after mremap(). Which results in translation
fault after signal handling on restored application:
https://github.com/xemul/criu/issues/288
Make vDSO code track the VMA address by supplying .mremap() fops
the same way it's done for x86 and arm32 by:
commit b059a453b1 ("x86/vdso: Add mremap hook to vm_special_mapping")
commit 280e87e98c ("ARM: 8683/1: ARM32: Support mremap() for sigpage/vDSO").
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: Pavel Emelyanov <xemul@virtuozzo.com>
Cc: Christopher Covington <cov@codeaurora.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Dmitry Safonov <dsafonov@virtuozzo.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Implement the set of copy functions with guarantees of a clean cache
upon completion necessary to support the pmem driver.
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Add a clean-to-point-of-persistence cache maintenance helper, and wire
up the basic architectural support for the pmem driver based on it.
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
[catalin.marinas@arm.com: move arch_*_pmem() functions to arch/arm64/mm/flush.c]
[catalin.marinas@arm.com: change dmb(sy) to dmb(osh)]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cache clean to PoP is subject to the same access controls as to PoC, so
if we are trapping userspace cache maintenance with SCTLR_EL1.UCI, we
need to be prepared to handle it. To avoid getting into complicated
fights with binutils about ARMv8.2 options, we'll just cheat and use the
raw SYS instruction rather than the 'proper' DC alias.
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The ARMv8.2-DCPoP feature introduces persistent memory support to the
architecture, by defining a point of persistence in the memory
hierarchy, and a corresponding cache maintenance operation, DC CVAP.
Expose the support via HWCAP and MRS emulation.
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
__inval_cache_range() is already the odd one out among our data cache
maintenance routines as the only remaining range-based one; as we're
going to want an invalidation routine to call from C code for the pmem
API, let's tweak the prototype and name to bring it in line with the
clean operations, and to make its relationship with __dma_inv_area()
neatly mirror that of __clean_dcache_area_poc() and __dma_clean_area().
The loop clearing the early page tables gets mildly massaged in the
process for the sake of consistency.
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Clearly, set_memory_valid() has never been seen in the same room as its
declaration... Whilst the type mismatch is such that kexec probably
wasn't broken in practice, fix it to match the definition as it should.
Fixes: 9b0aa14e31 ("arm64: mm: add set_memory_valid()")
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch switches to the stable UART bindings but also add the correct
gate clock to the non-AO UART nodes for GXBB and GXL SoCs.
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Helmut Klein <hgkr.klein@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the smd-edge node for the adsp, to allow SMD communication with the
ADSP.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the SMP2P nodes for the modem.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Adding required device node for couple of DWC3 controllers
present on msm8996 chipset to enable High speed and Super
speed USB support.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add required device node for QMP phy based 3-lane PCIe phy
present on msm8996 chipset to enable support for the same.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Adding required device node for USB3 QMP phy present on
msm8996 chipset to enable support for the same. This phy
provides super speed usb functionality for dwc3 controller
on msm8996.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Adding device node for QUSB2 phy and the required infrastructure
to enable support for the same. This phy is used by dwc3 controller
present on msm8996.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The adv7533 on this board needs a cec clock. Hook it up in the dtsi
to enable CEC for the HDMI transmitters.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Replace the obsolete compatible string for Coresight programmable
replicator with the new one.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Commit ed75d6a969 ("arm64: dts: qcom: Collapse usb support into
one node") breaks host mode support on apq8016-sbc boards. This
is because the mux driver (tc7usb40mu) hasn't been merged.
Without that driver, we can't toggle the GPIO going to the mux to
route out the D+/D- lines to the USB hub that's on the board.
One solution would be to totally revert this change, but that
opens us up to other problems when two USB drivers are operating
the same hardware block at the same time. Let's modify the DT so
that the USB controller is always in host mode and connected to
the hub so that things like USB keyboards and mouses work. This
is the mode that most people prefer anyway with these devices. We
also delete the usb-switch node because the binding was never
accepted upstream.
In the future, we can add muxing support and then update the DT
to support both modes at runtime. Patches to support this are
already on the mailing list.
Fixes: ed75d6a969 ("arm64: dts: qcom: Collapse usb support into one node")
Reported-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Rather than continue adding CPU-specific event maps, instead look up by
default in the PMUv3 event map and only fallback to the CPU-specific maps
if either the event isn't described by PMUv3, or it is described but
the PMCEID registers say that it is unsupported by the current CPU.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Currently, when unwinding the call stack, we validate the frame pointer
of each frame against frame.sp, whose value is not clearly defined, and
which makes it more difficult to link stack frames together across
different stacks. It is far better to simply check whether the frame
pointer itself points into a valid stack.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Our IRQ_STACK_PTR() and on_irq_stack() helpers both take a cpu argument,
used to generate a percpu address. In all cases, they are passed
{raw_,}smp_processor_id(), so this parameter is redundant.
Since {raw_,}smp_processor_id() use a percpu variable internally, this
approach means we generate a percpu offset to find the current cpu, then
use this to index an array of percpu offsets, which we then use to find
the current CPU's IRQ stack pointer. Thus, most of the work is
redundant.
Instead, we can consistently use raw_cpu_ptr() to generate the CPU's
irq_stack pointer by simply adding the percpu offset to the irq_stack
address, which is simpler in both respects.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Currently, cpu_switch_to and ret_from_fork both live in .entry.text,
though neither form the critical path for an exception entry.
In subsequent patches, we will require that code in .entry.text is part
of the critical path for exception entry, for which we can assume
certain properties (e.g. the presence of exception regs on the stack).
Neither cpu_switch_to nor ret_from_fork will meet these requirements, so
we must move them out of .entry.text. To ensure that neither are kprobed
after being moved out of .entry.text, we must explicitly blacklist them,
requiring a new NOKPROBE() asm helper.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
In most cases, our exception entry assembly branches to C handlers with
a BL instruction, but in cases where we do not expect to return, we use
B instead.
While this is correct today, it means that backtraces for fatal
exceptions miss the entry assembly (as the LR is stale at the point we
call C code), while non-fatal exceptions have the entry assembly in the
LR. In subsequent patches, we will need the LR to be set in these cases
in order to backtrace reliably.
This patch updates these sites to use a BL, ensuring consistency, and
preparing for backtrace rework. An ASM_BUG() is added after each of
these new BLs, which both catches unexpected returns, and ensures that
the LR value doesn't point to another function label.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Currently. we can only use BUG() from C code, though there are
situations where we would like an equivalent mechanism in assembly code.
This patch refactors our BUG() definition such that it can be used in
either C or assembly, in the form of a new ASM_BUG().
The refactoring requires the removal of escape sequences, such as '\n'
and '\t', but these aren't strictly necessary as we can use ';' to
terminate assembler statements.
The low-level assembly is factored out into <asm/asm-bug.h>, with
<asm/bug.h> retained as the C wrapper.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Dave Martin <dave.martin@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Currently:
$ perf stat -e cycles:u -e cycles:k true
Performance counter stats for 'true':
2,24,699 cycles:u
<not counted> cycles:k (0.00%)
0.000788087 seconds time elapsed
We can not count more than one cycle counter in one instance,because we
allow to map cycle counter into PMCCNTR_EL0 only. However, if I did not
miss anything then specification do not prohibit to use PMEVCNTR<n>_EL0
for cycle count as well.
Modify the code so that it still prefers to use PMCCNTR_EL0 for cycle
counter, however allow to use PMEVCNTR<n>_EL0 if PMCCNTR_EL0 is already
in use.
After this patch:
$ perf stat -e cycles:u -e cycles:k true
Performance counter stats for 'true':
2,17,310 cycles:u
7,40,009 cycles:k
0.000764149 seconds time elapsed
Signed-off-by: Pratyush Anand <panand@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This implements the kvm_arch_vcpu_in_kernel() for ARM, and adjusts
the calls to kvm_vcpu_on_spin().
Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
If a vcpu exits due to request a user mode spinlock, then
the spinlock-holder may be preempted in user mode or kernel mode.
(Note that not all architectures trap spin loops in user mode,
only AMD x86 and ARM/ARM64 currently do).
But if a vcpu exits in kernel mode, then the holder must be
preempted in kernel mode, so we should choose a vcpu in kernel mode
as a more likely candidate for the lock holder.
This introduces kvm_arch_vcpu_in_kernel() to decide whether the
vcpu is in kernel-mode when it's preempted. kvm_vcpu_on_spin's
new argument says the same of the spinning VCPU.
Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This patch adds Broadcom SBA-RAID DT nodes for Stingray SoC.
The Stingray SoC has total 32 SBA-RAID FlexRM rings and it has
8 CPUs so we create 8 SBA-RAID instances (one for each CPU).
This way Linux DMAENGINE will have one SBA-RAID DMA device for
each CPU.
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
We have two instances of FlexRM on Stingray. One for SBA RAID
offload engine and another for SPU2 Crypto offload engine.
This patch adds FlexRM mailbox controller DT nodes for Stingray.
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add DT nodes for SATA host controllers and SATA PHYs
on Stingray SoC
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
We have 8 instances of sp804 in Stingray SoC. Let's enable
it in Stingray DT.
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Added MDIO multiplexer iproc DT node for Stingray, which contains
the child nodes of PCIe serdes, RGMII, SATA and USB phy MDIO slaves.
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This patch enables stats for CCN-502 interconnect on Stingray.
Signed-off-by: Velibor Markovski <velibor.markovski@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
may_use_simd() can be invoked from loadable modules and it accesses
kernel_neon_busy. Make sure that the latter is exported.
Fixes: cb84d11e16 ("arm64: neon: Remove support for nested or hardirq kernel-mode NEON")
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
When receiving unhandled faults from the CPU, description is very sparse.
Adding information about faults decoded from ESR.
Added defines to esr.h corresponding ESR fields. Values are based on ARM
Archtecture Reference Manual (DDI 0487B.a), section D7.2.28 ESR_ELx, Exception
Syndrome Register (ELx) (pages D7-2275 to D7-2280).
New output is of the form:
[ 77.818059] Mem abort info:
[ 77.820826] Exception class = DABT (current EL), IL = 32 bits
[ 77.826706] SET = 0, FnV = 0
[ 77.829742] EA = 0, S1PTW = 0
[ 77.832849] Data abort info:
[ 77.835713] ISV = 0, ISS = 0x00000070
[ 77.839522] CM = 0, WnR = 1
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
[catalin.marinas@arm.com: fix "%lu" in a pr_alert() call]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The -1 "no syscall" value is written in various ways, shared with
the user ABI in some places, and generally obscure.
This patch attempts to make things a little more consistent and
readable by replacing all these uses with a single #define. A
couple of symbolic helpers are provided to clarify the intent
further.
Because the in-syscall check in do_signal() is changed from >= 0 to
!= NO_SYSCALL by this patch, different behaviour may be observable
if syscallno is set to values less than -1 by a tracer. However,
this is not different from the behaviour that is already observable
if a tracer sets syscallno to a value >= __NR_(compat_)syscalls.
It appears that this can cause spurious syscall restarting, but
that is not a new behaviour either, and does not appear harmful.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The upper 32 bits of the syscallno field in thread_struct are
handled inconsistently, being sometimes zero extended and sometimes
sign-extended. In fact, only the lower 32 bits seem to have any
real significance for the behaviour of the code: it's been OK to
handle the upper bits inconsistently because they don't matter.
Currently, the only place I can find where those bits are
significant is in calling trace_sys_enter(), which may be
unintentional: for example, if a compat tracer attempts to cancel a
syscall by passing -1 to (COMPAT_)PTRACE_SET_SYSCALL at the
syscall-enter-stop, it will be traced as syscall 4294967295
rather than -1 as might be expected (and as occurs for a native
tracer doing the same thing). Elsewhere, reads of syscallno cast
it to an int or truncate it.
There's also a conspicuous amount of code and casting to bodge
around the fact that although semantically an int, syscallno is
stored as a u64.
Let's not pretend any more.
In order to preserve the stp x instruction that stores the syscall
number in entry.S, this patch special-cases the layout of struct
pt_regs for big endian so that the newly 32-bit syscallno field
maps onto the low bits of the stored value. This is not beautiful,
but benchmarking of the getpid syscall on Juno suggests indicates a
minor slowdown if the stp is split into an stp x and stp w.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
clock name of "audio_clkout" is used by Renesas sound driver.
This duplicated naming breaks its clock registering/unregistering.
Especially, when unbind/bind it can't handle clkout correctly.
This patch renames "audio_clkout" to "audio-clkout" to avoid
naming conflict.
Fixes: 8a8f181d2c ("arm64: renesas: salvator-x: use CS2000 as AUDIO_CLK_B")
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for the rk3399 excavator main board.
This board works in a combination with the sapphire SOM.
This board have been sold as the rk3399 evaluation board for commercial customers.
You can get more info from below link:
http://opensource.rock-chips.com/wiki_Excavator_sapphire_board
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add support for the rk3399 sapphire SOM board.
This board works in a combination with the excavator main board.
You can get more info from below link:
http://opensource.rock-chips.com/wiki_Excavator_sapphire_board
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add an hdmi node, and also add hdmi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add an mipi node, and also add mipi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add an edp node, and also add edp endpoints to vopb and vopl
output port nodes.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1. add pd node for RK3399 Soc
2. create power domain tree
3. add qos node for domain
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add devicetree nodes for rk3399 VOP (Video Output Processors), and the
top level display-subsystem root node.
Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the
VOPs' output ports.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add opp tables for cpu cluster0 and cluster1 by including
rk3399-opp.dtsi.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Kever Yang