- Delete some unused U8540 UART platform data.
- MMC/SD-fixes from Ulf Hansson so everything works with
the device tree again.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJSzBk0AAoJEEEQszewGV1zNocP/ib50Xx8PgUZISdD8Waq8Yvr
NGu+vYAU+YQpCUbsxNY4UtXzkvvOeRyaLtt3MwefiEaFpB4YDSRXWXdOe9HSE599
Oc6Q1FckoV6soyu/Bm9uyClxKqxlzFN4zv3hoKpm9SUxT51BHWfYMkd2nKE1yy/F
uroyPb1BhX5PX+65yFzn7qwuPIfbBsk8cr34YbHHvEmeLPdJXCp7I0sx+PY3AX80
DSfVQPOIFv2Y+lGwnF9FOmtloM5gv8bcxmH2NPLPWE8xoXCODY/3iME5thSOP4vq
uIb0bfkgh26y9zZzK/SX355f/PTc2mfbneFRvHUP/cuzPC83aHeg5U/aQVB5k00P
0DHhKlJuiDUVHJldhkg3IcweyEL+MCfbCfffGAZWhmdvOw/RO/ptNYT7XXdN/YXM
zI9gURLzFeyknApEGAdBt3YX//hcMQh1VKVpaIV1dlNzUXNrulnX8p86ma15x5LD
Ht/ShWbWD1F6efEt0wQ6KFh8E2ZagZVaAXAgHjuyjCbC69NduVzeiJHIxk+/DJ0p
msWBq6agQ2GcF7Y1fQCtG1/6w1E11OaXmIQym04hI5mupeOwrbmutRNiTjsgpgfT
0spyka9G2fXwNwvcayC7jNGxUo6hQoUcp5SKZpBQOucoBBV9D3IRvnrbFErpagE0
0TFWoIrYcP75Tc7LzJO5
=vC9c
-----END PGP SIGNATURE-----
Merge tag 'ux500-devicetree-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
From Linus Walleij:
Ux500 device tree patches for v3.14, take 2
- Delete some unused U8540 UART platform data.
- MMC/SD-fixes from Ulf Hansson so everything works with
the device tree again.
* tag 'ux500-devicetree-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: regulators: Remove dead code for SD-card regulator
ARM: ux500: Configure regulator for I/O voltage for SD-card slot
ARM: ux500: Refactor common DT configs for sdi[n] devices
ARM: ux500: delete U8540 UART auxdata
Signed-off-by: Olof Johansson <olof@lixom.net>
Revert the addition of SSI clocks to DT for the
r8a7790 (R-Car H2) and r8a7791 (R-Car M2) SoCs.
Unfortunately these patches prevent booting the
r8a7790-based Lager board and r8a7791-based Koelsch board
to the point where a serial output is available.
A solution to this problem is being sought but has not
yet been finalised so in the mean time revert the changes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSy1+EAAoJENfPZGlqN0++jeQP/2iOdEyu6u7MW0Sz/4qy8Ak/
7jPl1czO9zsaB2nKmWTyqDvXeBIUONkvNs01vKAcc0/62xQ1AhKllkoBXsWkM9DP
gdQCsIj/FJYpLY3+H/Nndd+lMFv+HKHxh6QJp+R5EI4e8h2LOhYvW18pfRTnNOfK
MDattpOgnu0PyK9mPLXGupxxMxlMku1+5XwCBrycule66Bm8vsG4IQK65jKnZA7w
ND+8rd2k5ARM1hOxtRCHo6rJ4u1C6WSWSt2p8R9pvDQTPZPbX+FYz1GZ3YkvQxf7
pud4AuJHnhIccapaEHXP2/e8xryP13UDBj3PuLedbfiaoiji34QcHbwHyQQVhWrY
rzezzAOFhbT3fhLbp3urcECPlXC0BuJgTzXcZrX8LjIPm9GGqSe9QyKTVCl3CJcp
9+nvtNUtzcC2RtGvt4fnYAxgIr+lETsR3EGyeC4lk4gVY5EnCmxUxn0Ku74qJr80
BweuVLlkCJ7L+5ul4NcQlXnOh3DKQMLp2X+xQBzoNUv9VheafUqs5e7glVOlbALZ
353LSp92Ru6sMTB8jcsQqTFWMeOMz0z4Zwi9TNzRpxn1g93CroM8p6dLdMpLFwuQ
EApzBGutQuoLYepEz0U1J022xsJMJ8tuHxMfxU/vqpVmSGRD3aFdgywihv9hzvrq
8s+xeBLTFrJa90R7HZU9
=pTPp
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-fixes-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Renesas ARM Based SoC DT Fixes for v3.14
Revert the addition of SSI clocks to DT for the
r8a7790 (R-Car H2) and r8a7791 (R-Car M2) SoCs.
Unfortunately these patches prevent booting the
r8a7790-based Lager board and r8a7791-based Koelsch board
to the point where a serial output is available.
A solution to this problem is being sought but has not
yet been finalised so in the mean time revert the changes.
* tag 'renesas-dt-fixes-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
Revert "ARM: shmobile: r8a7791: Add SSI clocks in device tree"
Revert "ARM: shmobile: r8a7790: Add SSI clocks in device tree"
Signed-off-by: Olof Johansson <olof@lixom.net>
trace.h was included twice. Remove duplicate inclusion.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The THP code in KVM/ARM is a bit restrictive in not allowing a THP
to be used if the VMA is not 2MB aligned. Actually, it is not so much
the VMA that matters, but the associated memslot:
A process can perfectly mmap a region with no particular alignment
restriction, and then pass a 2MB aligned address to KVM. In this
case, KVM will only use this 2MB aligned region, and will ignore
the range between vma->vm_start and memslot->userspace_addr.
It can also choose to place this memslot at whatever alignment it
wants in the IPA space. In the end, what matters is the relative
alignment of the user space and IPA mappings with respect to a
2M page. They absolutely must be the same if you want to use THP.
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The irq data for rng module defined in hwmod data previously
missed the OMAP_INTC_START relative offset, so the interrupt
number is probably misconfigured during the DT node addition
adjusting for this OMAP_INTC_START. Interrupt #36 is associated
with a watchdog timer, so fix the rng module's interrupt to the
appropriate interrupt #52.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The pl330 dmac won't be added to the list of amba devices, as it doesn't have
a clock entry.
Add the clock.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
This patch adds a label and #clock-cells property to device node of
max77686 PMIC to allow using it as a clock provider.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
After the introduction of gpmc_set_legacy(), move the GPMC width setting
to be done inside it. Currently, in the DT probed case, this is (wrongly)
done twice: first at gpmc_read_settings_dt(), and then based in the
NAND width setting.
Fix this and use only the value obtained from the DT.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Introduce a helper function to complete the setting of some GPMC
parameters, only used when the gpmc is probed from a board file.
As such, it will go away once the DT conversion is completed.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit moves a bunch of initialization previously enclosed
under a 'if (gpmc_t)' check, to be outside such condition.
These initializations are not related to gpmc_t (timings) in any way
so it's nonsense to enclose them under such check.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now that we have standardized SoC definitions, update the
compatibility strings in board machine descriptors. Eventually, we
should just have SoC compatiblity here and all board specific stuff
should disappear.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Modifying the omap2plus_defconfig to enable the audio support for
AM335x EVM and other AM33xx based devices with TLV320AIC3X connected
to McASP.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Specify the remaining input clocks (pll_ref, pll_in, and sclk_pcm_in)
for the AudioSS clock controller.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Specify pll_ref, pll_in, sclk_audio, and sclk_pcm_in for the AudioSS
clock controller.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
fiq.h contains only a function declaration and is not used by anyone
else. Move the declaration to the driver header file and remove the
unnecessary platform dependency from the driver.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
When enabling device tree on the S3C an additional build
bug appears in the Osiris DVS board file:
CC arch/arm/mach-s3c24xx/mach-osiris-dvs.o
archh/arm/mach-s3c24xx/mach-osiris-dvs.c:
In function ‘osiris_dvs_notify’:
arch/arm/mach-s3c24xx/mach-osiris-dvs.c:77:4:
error: implicit declaration of function ‘S3C2410_GPB’
[-Werror=implicit-function-declaration]
gpio_set_value(OSIRIS_GPIO_DVS, 1);
^
Fix this by explicitly including
<linux/platform_data/gpio-samsung-s3c24xx.h>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: linux-samsung-soc@vger.kernel.org
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Enable this option as it's required to use USB on AM335x SoC.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Cubietruck makes use of the first three i2c controllers found on the
Allwinner A20; i2c-0 is used internally for the PMIC, i2c-1 is exposed on
the board headers, and i2c-2 is used for DDC on the VGA connector. This
patch enables them in the device tree.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The omap3_pmx_core pinmux device in the device tree handles the system
controller module (SCM) PADCONFS fonction. Its control registers are
split in two distinct areas, with other SCM registers in-between. Those
other registers can't thus be requested by other drivers as the memory
region gets reserved by the pinmux driver.
Split the omap3_pmx_core device tree node in two for the two memory
regions. The second region address and size depends on the SoC model.
The change in omap3.dtsi fixes an "external abort on non-linefetch" when
doing
cat /sys/kernel/debug/pinctrl/.../pins
on a Nokia N900.
Note that the core2 padconf region is different for 3430 vs 3630,
and does not exist on 3517 as noted by Nishanth Menon <nm@ti.com>.
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-By: Sebastian Reichel <sre@debian.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: updated for 3430 vs 3630 core2 based on Nishant's patch]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This reverts commit 787b0d5c1c since
it is no longer required after 7909/1 was applied, and it causes
build regressions when ARM_PATCH_PHYS_VIRT is disabled and DMA_ZONE
is enabled.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When building for CONFIG_SUSPEND, add the platform suspend callbacks
to enable system suspend for ux500.
At this initial step, only WFI state is supported, which is reached
for both PM_SUSPEND_MEM and PM_SUSPEND_STANDBY.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
I recently noticed slow booting of a board, and without printk timestamps it's
harder to tell just where the delays are coming from. Enable it.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Conflicts:
drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c
net/ipv6/ip6_tunnel.c
net/ipv6/ip6_vti.c
ipv6 tunnel statistic bug fixes conflicting with consolidation into
generic sw per-cpu net stats.
qlogic conflict between queue counting bug fix and the addition
of multiple MAC address support.
Signed-off-by: David S. Miller <davem@davemloft.net>
The 'xen_hvm_resume_frames' used to be an 'unsigned long'
and contain the virtual address of the grants. That was OK
for most architectures (PVHVM, ARM) were the grants are contiguous
in memory. That however is not the case for PVH - in which case
we will have to do a lookup for each virtual address for the PFN.
Instead of doing that, lets make it a structure which will contain
the array of PFNs, the virtual address and the count of said PFNs.
Also provide a generic functions: gnttab_setup_auto_xlat_frames and
gnttab_free_auto_xlat_frames to populate said structure with
appropriate values for PVHVM and ARM.
To round it off, change the name from 'xen_hvm_resume_frames' to
a more descriptive one - 'xen_auto_xlat_grant_frames'.
For PVH, in patch "xen/pvh: Piggyback on PVHVM for grant driver"
we will populate the 'xen_auto_xlat_grant_frames' by ourselves.
v2 moves the xen_remap in the gnttab_setup_auto_xlat_frames
and also introduces xen_unmap for gnttab_free_auto_xlat_frames.
Suggested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
[v3: Based on top of 'asm/xen/page.h: remove redundant semicolon']
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
To make the driver multiplatform-friendly, unconditional initialization
in an initcall is replaced with a platform driver probed only if
respective platform device is registered.
Tested at: Exynos4210 (TRATS) and Exynos4412 (TRATS2)
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org>
Tested-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* Several patches fixing up incorrectly defined register addresses and
bitfield offsets that could lead to undefined operation when accessing
respective registers or bitfields.
1) clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
2a) clk: samsung: exynos5250: Fix ACP gate register offset
2b) clk: samsung: exynos5250: Add MDMA0 clocks
2c) ARM: dts: exynos5250: Fix MDMA0 clock number
3) clk: samsung: exynos4: Correct SRC_MFC register
All three issues have been present since Exynos5250 and Exynos4 clock
drivers were added by commits 6e3ad26816 ("clk: exynos5250:
register clocks using common clock framework") and e062b57177
("clk: exynos4: register clocks using common clock framework")
respectively.
* Patch to fix automatic disabling of Exynos5250 sysreg clock that could
cause undefined operation of several peripherals, such as USB, I2C,
MIPI or display block.
4) clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg
clock
Present since Exynos5250 clock drivers was added by commits
6e3ad26816 ("clk: exynos5250: register clocks using common clock
framework").
* Patch fixing compilation warning in clk-exynos-audss driver when
CONFIG_PM_SLEEP is disabled.
5) clk: exynos: File scope reg_save array should depend on PM_SLEEP
Present since the driver was added by commit 1241ef94cc ("clk:
samsung: register audio subsystem clocks using common clock
framework").
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJSxY6TAAoJEIv3Hb8G/XruUcgP/001H5qqDZWtEk2Z1XvOUPgF
MfFprrNcPpLhLmBnvDpR5mUrcMIp4t/4GcWClmX58zcsZfcQP5YF81oGGiQy+U13
Yu94H+sWihrms5h8GSkqEhB5YSvcIOfs4rtAeNl/g2su7i+l4loF/xofXpj09+qp
xnmKJ8yfB5RD822StgrkoMu7vxzYyK05j8IasSH54vsO9X3Z3jTWuAKdQFKZoZp4
xBGjtIwoyyHndWAlhl1nIj1dvaDgx+gF25qRUrfShfE51R4BNzmvpgiN1mpQTjCl
JpYDJqZ1h7FL883ZXiz7SfRVv4H2GaEWqz+zxgVfHkO45lIL3Eyn1zhSKas4pRFH
KZscKBvT/YEgIQjBW4+VdMuMM0NWIzvYp1BM2/l88KvUgXYiS0EOM5UjYJatKwIO
MW4ZLpIsMiJlN8OygBTaZOZQaY8rbbdVn5KFsgkL0zl7uZzmbYCqhxKrXZfTKyx/
ieEGRmqjrcuguVDPNSsd9TZ/LUm3kTCSzpr3gvAXjK+29DbVrs6fX1lQ0RCxvACQ
8gBjD6ZsVFcsGSbWbPEoDi+qtKielZBjbSrgTDNkRqE/6yqg+UUZVSJJ6kkEA14o
swE+8mGrUhdv5TvpTjJactnBZeUpFbmLm4TE/r695dfwcr6wX7cK41gMVo7bE9fk
2rYzz35ed29q8OfJI/54
=0B0x
-----END PGP SIGNATURE-----
Merge tag 'samsung-clk-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-fixes
Samsung Clock fixes for 3.13-rc7
* Several patches fixing up incorrectly defined register addresses and
bitfield offsets that could lead to undefined operation when accessing
respective registers or bitfields.
1) clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
2a) clk: samsung: exynos5250: Fix ACP gate register offset
2b) clk: samsung: exynos5250: Add MDMA0 clocks
2c) ARM: dts: exynos5250: Fix MDMA0 clock number
3) clk: samsung: exynos4: Correct SRC_MFC register
All three issues have been present since Exynos5250 and Exynos4 clock
drivers were added by commits 6e3ad26816 ("clk: exynos5250:
register clocks using common clock framework") and e062b57177
("clk: exynos4: register clocks using common clock framework")
respectively.
* Patch to fix automatic disabling of Exynos5250 sysreg clock that could
cause undefined operation of several peripherals, such as USB, I2C,
MIPI or display block.
4) clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg
clock
Present since Exynos5250 clock drivers was added by commits
6e3ad26816 ("clk: exynos5250: register clocks using common clock
framework").
* Patch fixing compilation warning in clk-exynos-audss driver when
CONFIG_PM_SLEEP is disabled.
5) clk: exynos: File scope reg_save array should depend on PM_SLEEP
Present since the driver was added by commit 1241ef94cc ("clk:
samsung: register audio subsystem clocks using common clock
framework").
This fixes the issue introduced by the following commit:
b448c904f5 "ARM: shmobile: r8a7790: add I2C support"
The R8A7790 is an R-Car Gen2 SoC. The clock division factor
(CDF) width is 3 bits on Gen2 as opposed to 2 bits on Gen1.
Fix the device names for R8A7790 SoC to make the R-Car I2C
driver configure the hardware properly.
Changes in V2:
* rebased on top of the latest branch;
* capitalized ARM in the subject line;
* noted the commit that caused the issue in the log.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pull ARM fixes from Russell King:
"Another set of small fixes for ARM, covering various areas.
Laura fixed a long standing issue with virt_addr_valid() failing to
handle holes in memory. Steve found a problem with dcache flushing
for compound pages. I fixed another bug in footbridge stuff causing
time to tick slowly, and also a problem with the AES code which can
cause linker errors.
A patch from Rob which fixes Xen problems induced by a lack of
consistency in our naming of ioremap_cache() - which thankfully has
very few users"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 7933/1: rename ioremap_cached to ioremap_cache
ARM: fix "bad mode in ... handler" message for undefined instructions
CRYPTO: Fix more AES build errors
ARM: 7931/1: Correct virt_addr_valid
ARM: 7923/1: mm: fix dcache flush logic for compound high pages
ARM: fix footbridge clockevent device
ioremap_cache is more aligned with other architectures.
There are only 2 users of this in the kernel: pxa2xx-flash and Xen.
This fixes Xen build failures on arm64:
drivers/tty/hvc/hvc_xen.c:233:2: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration]
drivers/xen/grant-table.c:1174:3: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration]
drivers/xen/xenbus/xenbus_probe.c:778:4: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration]
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The array was missing the final entry for the undefined instruction
exception handler; this commit adds it.
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Building a multi-arch kernel results in:
arch/arm/crypto/built-in.o: In function `aesbs_xts_decrypt':
sha1_glue.c:(.text+0x15c8): undefined reference to `bsaes_xts_decrypt'
arch/arm/crypto/built-in.o: In function `aesbs_xts_encrypt':
sha1_glue.c:(.text+0x1664): undefined reference to `bsaes_xts_encrypt'
arch/arm/crypto/built-in.o: In function `aesbs_ctr_encrypt':
sha1_glue.c:(.text+0x184c): undefined reference to `bsaes_ctr32_encrypt_blocks'
arch/arm/crypto/built-in.o: In function `aesbs_cbc_decrypt':
sha1_glue.c:(.text+0x19b4): undefined reference to `bsaes_cbc_encrypt'
This code is already runtime-conditional on NEON being supported, so
there's no point compiling it out depending on the minimum build
architecture.
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Enable the DCP by default on both i.MX23 and i.MX28.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David S. Miller <davem@davemloft.net>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add a minimal board dts file for EXYNOS4412 based FriendlyARM's
TINY4412 board. This patch including support peripherals like
UART, SD card on SDMMC2 port and GPIO connected LEDs.
Signed-off-by: Alex Ling <kasimling@gmail.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Arndale Octa board is based on Exynos5420 SoC. This patch
adds the basic support required for booting it through DT.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
- Use PATCH_PHYS_TO_VIRT and AUTO_ZRELADDR.
- Support cascaded interrupts on the SIC.
- Complete clock implementation for the IM-PD1.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJSxyvwAAoJEEEQszewGV1zObQQAI7bN0/vmtZkoBbIeoXTAolZ
KTEqf+Gdtlny4AvW4PUeutDRr4zvFHKYo5uBbr9bQFl4S89ke29nLXhyrvJbAWJs
tujyX0mWb38fosEGeVo3YGbDIw9+O3CMRM+zaHyt/yzcHANnPeecpt3dFNheaTKs
W7Axw5YFszpfxs5xQYMrrudbXd6TbsZWSn1pJpNlPvoo8b0HV72ARZNDAM2NO2rY
rOSUzl8MKb0tAW7Nj4D8vLqAtYkjA7lX6sdXQBbqpUyTINR5/35ifW/K74q1miMS
3T5ECbwrW9CHSW2jrTt28knafasAsJKCMdJ9SXu7uzOZogglTuBSw52MIhP2QvHS
mxOXBHkCazCMum4WndLe1ygSigQZR2SAufmjzESsE82RBF2UmkgqR34aaxag9x/X
avxUM/3Opgosa12AD8buSP5NfYqMjvqXzwdNs6YbC1UPqRYIgn9FcJ6cFzkVXoKi
GWgz6Ko6MiR9HVDBqw8uHrIBKuaa3oZ5+jt0x54ZuI3tOxV1wUxR3AcgWQsF2tSN
nPg8GTvZNiEfo6fWSIx7V2H/txFfAj1Z3JG6tFQTfLtE5G7MssxyNitoxZsIeWuB
x1+tnsOQRpBlkUb92LS37ndLJoFfknbCgFUAIgMozntfCRQi/6REWAKGDo0fTOmG
+uN+Q6JMFj62jZ6dgumd
=cCZc
-----END PGP SIGNATURE-----
Merge tag 'integrator-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/drivers
From Linus Walleij:
Some Integrator patches that matured for v3.14:
- Use PATCH_PHYS_TO_VIRT and AUTO_ZRELADDR.
- Support cascaded interrupts on the SIC.
- Complete clock implementation for the IM-PD1.
* tag 'integrator-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
clk: versatile: fixup IM-PD1 clock implementation
clk: versatile: pass a name to ICST clock provider
ARM: integrator: pass parent IRQ to the SIC
irqchip: versatile FPGA: support cascaded interrupts from DT
ARM: integrator: Default enable ARM_PATCH_PHYS_VIRT, AUTO_ZRELADDR
Signed-off-by: Olof Johansson <olof@lixom.net>
This mostly adds the reset controller initialisation for the A31 and the SMP
operations for this SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJStMEHAAoJEBx+YmzsjxAgOjcP/1Dqe9RobUEnNjP+zPDJgMPK
fCC5f+lsBZze5I/pQRoZEXr8L2iKXipmdiECMm/c/1j8LnvHDPG3fvfe2asz35P/
gtuy17TfT1FiE/OJmNG5w0u8+EgSKQ/wXuz6MWAaOzOP5+MJ1YqV3/Arnd4pjz5s
ynjuSS+2TcEa+LtoqzdYGwbnqmjJxaJ3YJstiJCNXIXBxfm9253fVIDlQcZj6L9i
Zkwss51ztWxHTcurIRMreS5uZgaWcbUTnboVA5+qq77GjUqo08en/xY7zTKnc5X3
oNSyM7H1ROQtilxyG9mW83OXF365xrb4xpFq0Vn742MTPr33AFozi0ovbMm3DMbi
wxr3YBxLF999nSZXOYWdg3hTfRklQ8SKNDt2PaEWQE21tYF9Eq69ePSzMpkrv5Sp
1KxoT8DheMyya1aiSN4tY3dNTnupSNmUrg9Sb1OFR0ogjxsj0BvhyUGT5gfy3Zmp
+EI5HSCcEPphElqAzqhvUn+wFwB93e1u9YBJUQ2BgPoKyIz6nPnmwJJ7/l995JAa
XHDs0gYI9yBfAJLnv/afw74uY1WVomk+7aQSnbLx+ZyiUz7pVQHtzLAhLYFsIKts
OGLdvpABHlnKWmTPyU+sR+hm+owTm9d0LBocG6UXp7ppzbRQYsh2nZdIrH9wNBzo
rpQ21zLV8VBwB/koXtVi
=zEQv
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-3.14' of https://github.com/mripard/linux into next/drivers
From Maxime Ripard:
Allwinner core changes for 3.14
This mostly adds the reset controller initialisation for the A31 and the SMP
operations for this SoC.
* tag 'sunxi-core-for-3.14' of https://github.com/mripard/linux:
ARM: sun6i: Add SMP support for the Allwinner A31
dt-bindings: fix example of allwinner interrupt controller
ARM: sunxi: Register the A31 reset IP in init_time
ARM: sunxi: Select ARCH_HAS_RESET_CONTROLLER
Signed-off-by: Olof Johansson <olof@lixom.net>
Architectures which might use an i8042 for serial IO to keyboard,
mouse, etc should select ARCH_MIGHT_HAVE_PC_SERIO.
Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
- Add the initial i.MX50 SoC support
- Support device tree boot for i.MX35
- Move imx5 clock driver to use macros for clock ID
- Some random updates and non-critical fixes on clock drivers
- A few defconfig updates and minor cleanups
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJSwiPBAAoJEFBXWFqHsHzO3/AIALlP6m/7taIQW5wO4o4aqdwk
GsN7IdsfWH/biG9VyxgpIoJKUqaOJckGA0eyLSeEG7p78xlf0n7cVPUNwzz9z1Vc
zxLSaVNznVOa4fTIsbMK9U+gUP931hjXskxD3tH98MUFqlM0JLQYoofr/lXG7Esf
N2p8B9aUND3WSxDa+d+CsW0B3FBj1piOQDMDgrdc3p7kjcAJs31KaKfUa06o7gzM
a81OaD9Vk0ONf44wh1LGlg0hDRsatQOa4tUTimeV14CnESKqsKxT4qAJ6pZLdfOt
KyRqSk4f4mkpimv4bGdhXTIsIko1CD9wg7G9fsSaolh3OEP0yyNf1savR1fmwCI=
=Hhbl
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo:
i.MX SoC changes for 3.14:
- Add the initial i.MX50 SoC support
- Support device tree boot for i.MX35
- Move imx5 clock driver to use macros for clock ID
- Some random updates and non-critical fixes on clock drivers
- A few defconfig updates and minor cleanups
* tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6: (37 commits)
ARM: imx: improve the comment of CCM lpm SW workaround
ARM: imx: improve status check of clock gate
ARM: imx: add necessary interface for pfd
ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100
ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support
ARM: imx: Add cpu frequency scaling support
ARM i.MX35: Add devicetree support.
ARM: imx: update imx_v6_v7_defconfig
ARM: imx6sl: Add missing spba clock to clock tree
ARM: imx6sl: Add missing pll4_audio_div to the clock tree
ARM: imx6: Derive spdif clock from pll3_pfd3_454m
ARM: imx: use __initconst for const init definition
ARM i.MX5: fix obvious typo in ldb_di0_gate clk definition
ARM i.MX5: set CAN peripheral clock to 24 MHz parent
ARM: imx: pllv1: Fix PLL calculation for i.MX27
ARM i.MX5: fix "shift" value for lp_apm_sel on i.MX50 and i.MX53
ARM: imx: imx53: Add SATA PHY clock
ARM: imx_v6_v7_defconfig: Enable STMPE touchscreen
ARM: imx: rename IMX6SL_CLK_CLK_END to IMX6SL_CLK_END
ARM: imx: select PINCTRL at sub-architecure level
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Rebuild bcm2835_defconfig using "make bcm2835_defconfig;
make savedefconfig", and add the following features:
* Enable the DWC2 USB controller present in the BCM2835 SoC.
* Enable drivers for various USB-hosted devices, which make the
controller useful.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The BCM2835 SoC contains a DWC2 USB controller. Add this to the DT.
Set up the pin controller to fully enable the USB controller on the
Raspberry Pi. The GPIO setup works because the default output value for
GPIO 6 (LAN_RUN/n_reset) just happens to be 1, which enables the
USB/LAN chip.
Note that you'll need a U-Boot which enables power to the USB controller;
search for U-Boot patch "ARM: rpi_b: power on SDHCI and USB HW modules".
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Replace "is use" by "is used" and remove a comma.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Various DT related patches, but mostly:
- Support for the Olimex A13-olinuxino-micro
- Added the needed IP in the A31 for the HS timer support and SMP bringup
- A10 and A20 RTC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJStMQZAAoJEBx+YmzsjxAg2HkQAIm+PLqzY6kZrMi6MikFqJdB
TI86zOkfWdN3pxPZAd1t/8r5Dx0LCnThWB0gu+ME8HN21rIs7UGvxlURlEFzkScH
S9nN9+WKDGss58QIS/AE4e+sMkCTpdA1vB6ZDpNb/96Z5q/9fGQmIJeOqy8KIiqY
QFeXBaqqI17qFGn6bZAOSmwkkZHQ35DB5ZlNzMiVpwv4qdPD8l7340XNHE991MXy
maTJZUQU8DCwXSD1TeAULlgfdaM/F/K6msr6zwOTBGYEQpZev9a4zRUko9AAySae
D0DisPntkkKsblGVouIg1sYDNe/OnkCiBZYBtZeqSAhH/EoAytR489BHS4fuN2Fm
tuxBbEGn94kLm4IrzriYvnUQ3EodDUmAABkM/SsrcC0a4hnSEwy0Er3NscaVWT4n
pycfBCyaaVv+0GZ4WrhjxiRPTac4BdckVvSGQshn6Anbw79H4yom8yp56RdEHeYo
PsQv4s7vw4fiQ9TIqb8lDBk3rtGKaJqspih6nd+scCwTpcc9TzbhNrY5QfQUnMal
b31XtF0P2oXdjILUrj3XvjNp2cyLZ6RD7+2BWdq/hqoZN+6N7RUYBzxSc1VeKVLx
7sAbNJh5cL2rKx9+uGbnFZEEzpYAULWkWQ1PMZYeuhgWU4THYBjidmJvWd6mcokp
4NXOqplYPExlxcfZoPFl
=kYub
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-3.14' of https://github.com/mripard/linux into next/dt
From Maxime Ripard:
Allwinner sunXi DT Additions for 3.14
Various DT related patches, but mostly:
- Support for the Olimex A13-olinuxino-micro
- Added the needed IP in the A31 for the HS timer support and SMP bringup
- A10 and A20 RTC
* tag 'sunxi-dt-for-3.14' of https://github.com/mripard/linux:
ARM: sun6i: dt: Add IP needed to bring up the additional cores
ARM: dts: sun5i: Add new sun5i-a13-olinuxino-micro board
ARM: sun6i: Add the reset controller to the DTSI
ARM: sunxi: dt: add EMAC aliases
ARM: dts: sun4i/sun7i: add RTC node
Signed-off-by: Olof Johansson <olof@lixom.net>
- Timekeeping patch from Uwe.
- DT 0x0 cleanup from Lee.
- Return value check from Wei.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQIcBAABAgAGBQJStAGjAAoJEEEQszewGV1zDj4QAJPcM7vFsgDSCGmSvaeS6NfF
bqyLnTo8JVF0FCAbUTtWWYdA1s7fpcOXsQxm/R73UJ5/2m5vqCxJf2ldXuD0rkM2
sPvVH7lfMJb0JjZK/6D7xyUQwCmrl6UULztcVvK+2vEts+cZa/kasRSI4Ea6GLiA
RpD3M3Bt8NGT6/WUfLGYPDGNKFk+nzix2lQ6yQnfZWf0zg5g/0tlsf9GPN7lJNgN
QQ0SKSXZt9jMcn0L/q3rSrTRL7qCcAELkNea03WPbhyhmYUucYDsZ2NWgPdYbPaL
2HMV9xwy7pPfykM8W7BPwcMsHz6YIxOuQY0oeMapz2LX5vE98IZuN/aYRI1LGYKM
weEHEao8vXpUhDGLBSPUbA6REVFg9HPhUm775F9wh65Bn4N1FfoR9W1FNwQxyELj
kq1VW9oUxzEdTeITyqxJ+izxhObhGY12u5D1f4TxY8RAzYNE+Nd3RHNVl2wOCoJ/
4wa8+atDSw1TVIRI0rExBupJZ4wN1bshrYda1qvmkGv8Mmn6HQZDri15xuZdUxyG
SNrENOc3jd3uXQWCcKppnViM+10xsUdOx7yvze8obZbm9gjCyD1j4zYyqr9yGCkd
f5r6hmG6a7cjaTmn24wSJiuvIqWHIzl1IjeOrSsWg8ct5AjdS4R+n2SCk5O7vUFU
2WWZlaOiZ7oKOyXWviji
=cBuO
-----END PGP SIGNATURE-----
Merge tag 'u300-for-arm-soc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/fixes-non-critical
From Linus Walleij:
Misc U300 development for the v3.14 series:
- Timekeeping patch from Uwe.
- DT 0x0 cleanup from Lee.
- Return value check from Wei.
* tag 'u300-for-arm-soc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: u300: fix timekeeping when periodic mode is used
ARM: u300: Remove '0x's from U300 DTS file
ARM: u300: fix return value check in __u300_init_boardpower()
Signed-off-by: Olof Johansson <olof@lixom.net>
---------------------------
This pull request contains updates
to DaVinci GPIO driver and the
resultant platform code changes. The
updates include DT-conversion and
changes to make the driver cross-platform
ready.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJSuycQAAoJEGFBu2jqvgRNIdMP/jE7LW16dF2dGq79Gy26GWcM
dNSSXzwEm2q5vT49H8ADzkbnsI2PlFpcH0mwn5BpPuVRl+RKHfNEZxwuAthqKduu
BIKVGBkNECrliIIUecCwBjAYpQknynvLAGHRhYmibEnZCH45kZ8g7DLJMeBL4Huz
smDkz2yWWoHjnIaCk/kIbQfeETKSx5GP+OwnnrU/4HPpndxqZ6KU/MXb8ZeMiLfa
piMl10o/YIJcfZcKBbkI1I2PuHNgNAzjVnMMsCVF+B5vgLiYmj9P+6l1Sfau6y8A
kimW34q4HNuQ07hkDAIALz0AH7y8bL9SoKprT4NX10DvGHwl21a/Ji5QS8N49krM
+HAiSIUdsFwie5M8286owGAJ/TBFReStWY1a/sIghx9idU6ejuM/Pj8/bfTS+Vu+
8wyos8hTYVBDOEwoRzw48S5x93U5W6dsjOacOJ+blHBtPmADlWSNG8HwzSfWxHEI
PMaVhu2EKtgD1ZFgU5Zlt+f5h3E4ezAIEpiPIhdLcg/3hqNSpFRmNV3nJsx+KwE+
JyZXcHkyq42i6wL5Sdf6W/Dpd5knPyqP3BBWBTeg+BDLnH8F2+Vtws95I4dlit0T
RtQ9Ms6QmznPTs9fMaviURiVIUBK6XIG5UHDU10bhL0h8vOR/hXAVrAB+wZntvPU
uIXAapK/78LTBX92opDz
=DxLt
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v3.14/gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/drivers
From Sekhar Nori:
DaVinci GPIO driver updates
---------------------------
This pull request contains updates to DaVinci GPIO driver and the
resultant platform code changes. The updates include DT-conversion and
changes to make the driver cross-platform ready.
* tag 'davinci-for-v3.14/gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
gpio: davinci: don't create irq_domain in case of unbanked irqs
gpio: davinci: use chained_irq_enter/chained_irq_exit API
gpio: davinci: add OF support
gpio: davinci: remove unused variable intc_irq_num
gpio: davinci: convert to use irqdomain support.
gpio: introduce GPIO_DAVINCI kconfig option
gpio: davinci: get rid of DAVINCI_N_GPIO
gpio: davinci: use {readl|writel}_relaxed() instead of __raw_*
Signed-off-by: Olof Johansson <olof@lixom.net>
- mvebu
- some Armada cleanup to prep for a new SoC in mach-mvebu/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJSxX7VAAoJEP45WPkGe8ZnvNMP/2xELuMr5mA2HkAAYPpXHWFo
as4a0UygKxp+7EhPe4JkSSFzEBW/XnuFwCKOGt2Hcfcyq83kh4lYL9nF06CZq5bK
eaMW4SqwsWsCpApcWpqlWw29tFSHruChYrge6lGU9mS8cQGfH4P08PzxwudfzZFv
me+wnyedPfXuqA8pgmpXDp4bcuHhhLSC60FvFrszASgJgu94InWIVs+x/0t7+oEL
OT2wNOJfK+UTzwfcK9EgLq4mtSnA8YLzoLQQTMz4Ab0lCzioHjo0Yek03c9DCH2M
0ygNagudWwsBCaI2u7D48jBUMpfmBqgYQkaj0nSoo+rz/LWxrxP0S/oswDeK2lwx
PTlK29b2kuftZ0+qu+9bQY6gJhVOIEKxQoKIZD9Dbjzafi/JgH27gRmrG4IZVtrZ
oK6/6aLP1Krd/1Ok/z15HrTYiVZ9J1FOFUQyzGoWehp2JmHS6YeXuJ7EmnGYgaMH
5zgeicJbjx81zOzL5V70HHdz7KdGTS4/oVBFFKMi9NpoHZbUiz0U9vNqHRzXNusK
oCEgCC/NPt6Px/5A+bjnp6oppS+dv0h/ElzexnYoFSLHL0ASycydrdUWZwmK0rZ7
dWxznIht3PIA2lCkwTik3aLK+Js0naNpGUe8xtuGGGEdB+pJVPDB+7wI46zSx2YD
LCdiiGjTgxA2n3IAENKm
=J4tF
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-3.14-2' of git://git.infradead.org/linux-mvebu into next/cleanup
From Jason Cooper:
mvebu SoC changes for v3.14 (incremental #2)
- mvebu
- some Armada cleanup to prep for a new SoC in mach-mvebu/
* tag 'mvebu-soc-3.14-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: move Armada 370/XP specific definitions to armada-370-xp.h
ARM: mvebu: remove prototypes of non-existing functions from common.h
ARM: mvebu: move ARMADA_XP_MAX_CPUS to armada-370-xp.h
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch enables MSM8974 build support.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds basic board support for APQ8074 Dragonboard
which belongs to the Snapdragon 800 family.
For now, just support a basic machine with device tree.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Acked-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
[olof: Split off SoC and board support in separate patches]
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add Device Tree Support
* Remove platform data mapbase and irqs fields
* Remove platform data scbrr_algo_id field
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSuYavAAoJENfPZGlqN0++iBQP/iRLdbZzrBtIqfPOAx7kOKC5
14kMul6tggT556xW++JhpUR/s5HdGZoUwq2XhWbzMm9rhE9FFsIOsjSROU9qwItG
4indJRS7p/2/c0vVD988QcgOK9yD++t4hMM42lZ4FsTZL7RT7t5di/Dx2OP8OyU8
LwTLYNRM8icePh+KVtEXyFKjCu22/tuj8FyPJoSruJPsPkd3w8Wt9o7ZLqp58DkG
91EYVWzbKC9JOfXhW/nybDpLpaaNC/MaeIfh2K9HFhAUnhOYDJp1dU7xIz7Wj8/j
PS9RXuNr+Vyj0ov5Y5VqgFwXz1bPFBHsMXvnh7HBwNoaxK6Nvs9ZMREfVLvsAZCS
jiWIYJLozAQX+Xmj7oYBb1kUkEE/WE8ec5GufNp43Eg6mSWsEx/YVFvSfPO/PYvG
3be9jUglpZFmh9i2f2ZtB0AG2q45HieK8i9glufg+wkKnahhOYgynV4dxTvfIEts
qQCZSoAL8KbmrMZpsW0Q9D3SvEFxcuhEtVk8h6X2lg+XcjJ9dwbH8BsBCI8W6Y+m
tOc0yeK8DQhpNastoo1xATQO1MpSTqnSWwP7j6oAS4W44iuJmGLEYLiDCLuamOto
CzGBDCluic3vMMnr3BmJLd/8P+T7IxUZ/0W8aPX786sVBMjsNJPRlyal5sA4/EJl
7Swi8gxCsasfSQLbHsab
=IZCI
-----END PGP SIGNATURE-----
Merge tag 'renesas-sh-sci3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
From Simon Horman:
Third Round of Renesas SH SCI Updates for v3.14
* Add Device Tree Support
* Remove platform data mapbase and irqs fields
* Remove platform data scbrr_algo_id field
* tag 'renesas-sh-sci3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
serial: sh-sci: Add OF support
serial: sh-sci: Add device tree bindings documentation
serial: sh-sci: Remove platform data mapbase and irqs fields
serial: sh-sci: Remove platform data scbrr_algo_id field
Signed-off-by: Olof Johansson <olof@lixom.net>
* Global
- Don't set plat_sci_port scbrr_algo_id field
- Declare SCIF register base and IRQ as resources
- Don't define SCIF platform data in an array
- Use macros to declare SCIF devices
* r7s72100 SoC (RZ/A1H)
- Add i2c clocks
* r8a7778 (R-Car M1)
- Add sound SCU clock support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSuYCjAAoJENfPZGlqN0++5uEQAICvtZMbC5Q04G22ePlzTTk1
/AHZTLRifgo8nNvGi0vky5tt3fuLBmNTixNFF1qCT7gTy9J+CzNz0OmSbg7sWY3h
km8IrTVWfY7lCMQ7UxbHW/3KjEOLG371B2edVunTb9JYHrrCte0q+4I4A7xmV1HA
mwoF+tziXXK5xCo6P0iAL7bAV04AE/r1fUD/zuH8CSm8xS8FJ2z7ZD1EIxcMNMbb
Xl7J2NkP1ntlazrElupuYxY+zDImI1mc0FIBtkV+ft4C2REKCs1q9fGC0xq+hN10
EkO0WYqezphcwSHXiHqApcjBwKHZoI6W+VmISl197FsY5zbtqLwpD+8mHeqd+WuG
qqK67m6BrcXTmM5pdsxy7QF81FdETX1e14zVkRaNBxw08kkFYbndFJz4ffNPIWUq
9N3q7Do8vZCnksM9XxQ95mpLIvfM8itlf4FDGr0O0ACEu+uQfUczXykSJVx5sGqu
0SV8ESCb3LRpRCGbwEIUgMDHM36aESqaIOWbmK6QHoTYWlg9Ka88dB2s2We71yuS
+PRZ7CpIsWMe7zb30TuiBPokYloHneiIVRf4RJWeGsyCgkN0DfkxorHK9UB7Adzy
jmkaqp5ebQ8CQplIVgldCcJngi2PmbUWeJcKlSNfg8aVpl8BRW8/Xv9RFuL8x/Cc
3jmFoXD12pJavs8T9dgi
=7k3L
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Third Round of Renesas ARM Based SoC Updates for v3.14
* Global
- Don't set plat_sci_port scbrr_algo_id field
- Declare SCIF register base and IRQ as resources
- Don't define SCIF platform data in an array
- Use macros to declare SCIF devices
* r7s72100 SoC (RZ/A1H)
- Add i2c clocks
* r8a7778 (R-Car M1)
- Add sound SCU clock support
* tag 'renesas-soc3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (43 commits)
arm: shmobile: r7s72100: add i2c clocks
ARM: shmobile: r8a7791: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7779: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7790: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7740: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a73a4: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7778: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r7s72100: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: sh73a0: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7790: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7791: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7778: Declare SCIF register base and IRQ as resources
ARM: shmobile: sh7372: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7779: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7740: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a73a4: Declare SCIF register base and IRQ as resources
ARM: shmobile: r7s72100: Declare SCIF register base and IRQ as resources
ARM: shmobile: sh73a0: Declare SCIF register base and IRQ as resources
ARM: shmobile: sh7372: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7790: Don't define SCIF platform data in an array
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the mmio architected timer node.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This doesn't need to be a def_bool y. Instead we can have every
DT supported platform select ARCH_MSM_DT and we achieve the same
thing with less chance of conflicts.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the restart node so we can reboot the device.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the Snapdragon 800 MSM8974 SoC, used on the Dragonboard
and others. Board support added in separate patch.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Acked-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
[olof: split off SoC support in separate patch]
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix the following warning when !CONFIG_MMC:
arch/arm/mach-msm/board-trout.c: In function 'trout_init':
arch/arm/mach-msm/board-trout.c:67:6: warning: unused variable 'rc' [-Wunused-variable]
int rc;
^
Also, while we're here, rework explicit printk(KERN_CRIT..) to use
pr_crit.
Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit adds the two external clock outputs available on A20 to
its device tree. A dummy fixed factor clock is also added to serve as
the first input of the clock outputs, which according to AW's A20 user
manual, is the 24MHz oscillator divided by 750.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Device tree naming conventions state that node names should match
the nodes function. Change external low speed oscillator node name
to match.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds the clock output pin options on the A20.
The 2 pins can output a configurable clock to be used by
external modules. This is used on the CubieTruck, to supply
a 32768 Hz low power clock to the onboard Wifi+BT module.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On Allwinner sun7i (A20) SoCs, the SMP operations are implemented in
u-boot, and exposed to the kernel through PSCI.
We thus need to enable PSCI support for Allwinner SoCs so that the
kernel uses it to bring up the additionnal cores.
Signed-off-by: Signed-off-by: Zalan Blenessy <zalan.blenessy@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The current code selects ARCH_HAS_RESET_CONTROLLER, that enables the
RESET_CONTROLLER option by default, but doesn't select it, so a configuration
might unselect it, leading to compilation error.
Explictly select RESET_CONTROLLER so that we can't have this breakage anymore.
Reported-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
plat/regs-ata.h is used only by Samsung PATA driver.
Move this file to the drivers folder to remove platform
dependency required for multiplatform support.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Improve the comment of SW workaround for CCM lpm issue using
hardware errata description to avoid confusion.
ERR007265: CCM: When improper low-power sequence is used, the SoC
enters low power mode before the ARM core executes WFI.
Software workaround:
1) Software should trigger IRQ #32 (IOMUX) to be always pending
by setting IOMUX_GPR1_GINT.
2) Software should then unmask IRQ #32 in GPC before setting CCM
Low-Power mode.
3) Software should mask IRQ #32 right after CCM Low-Power mode is
set (set bits 0-1 of CCM_CLPCR).
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
For ccm clock gate, both 2b'11 and 2b'01 should be treated
as clock enabled, see below description in CCM, whenver CPU
trys to check clock gate's status, system will be in run mode.
2b'00: clock is off during all modes;
2b'01: clock is on in run mode, but off in wait and stop mode;
2b'10: Not applicable;
2b'11: clock is on during all modes, except stop mode.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Common clk framework will disable unused clks in late init only if
they are enabled by default and no one is using it, so we need to
add is_enabled callback for clk framework to get clks' status.
PFD clocks are enabled by hardware reset, so we need to add
interface for common clk framework to disable those unused ones for
saving power.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
PFUZE100 regulator is commonly found on mx6 based designs.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Let MX35 and MX50 device tree support be built by default.
Generated by doing:
- Selected CONFIG_MACH_IMX35_DT and CONFIG_SOC_IMX50 via 'make menuconfig'
- make savedefconfig
- cp defconfig arch/arm/configs/imx_v6_v7_defconfig
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Update the IMX v6/v7 defconfig for the SolidRun HummingBoard:
- Add AT803X ethernet phy
- Add consumer IR devices
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
We are missing spba clock in imx6sl's clock tree, thus add it.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
SPDIF can derive a TX clock for playback from one of its clock sources --
spdif root clock to match its supporting sample rates. So this patch set
the spdif root clock's parent to pll3_pfd3_454m since the pll3_pfd3_454m
can approximately meet its sample rate requirement.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
0-DAY kernel build testing backend reports the following.
scripts/checkpatch.pl 0001-ARM-imx-add-support-code-for-IMX50-based-machines.patch
# many are suggestions rather than must-fix
ERROR: Use of const init definition must use __initconst
#80: arch/arm/mach-imx/mach-imx50.c:26:
+static const char *imx50_dt_board_compat[] __initdata = {
While at it, fix the error globally for IMX platform.
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ldb_di0_gate is registerd with the clk index of IMX5_CLK_LDB_DI1_GATE,
thus the DI0 interface will be turned off inadvertently during boot.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch sets the parent of CAN peripheral clock (a.k.a. CPI clock) to the
lp_apm clock, which has a rate of 24 MHz.
In the CAN world a base clock with multiple of 8 MHz is suited best for all CIA
recommented bit rates. Without this patch the CAN peripheral clock on i.MX53
has a rate of 66.666 MHz which produces quite large bit rate errors.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
MFN bit 9 on i.MX27 has a different meaning than in other SOCs. This
is a just sign bit. This patch makes different calculation for i.MX27.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
According to the i.MX50 Rev. 1 and i.MX53 Rev. 2.1 datasheet the lp_apm_sel is
bit 10 in the CCM_CCSR register not bit 9. On the i.MX51 it's bit 9.
This patch fixes this issue.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add SATA PHY clock which are derived from the USB PHY1 clock. Note that this
patch derives the SATA PHY clock from USB PHY1 clock gate so that the SATA
driver can ungate both the SATA PHY clock and USB PHY1 clock for the SATA to
work correctly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Linux-IDE <linux-ide@vger.kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instead of selecting PINCTRL on individual SoC, let's select it at IMX
sub-architecure level.
While at it, it also adds the missing PINCTRL_IMX50 selection for
SOC_IMX50.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ARM clock is sourcing from pll1_sw, and pll1_sw can be either from
pll1_sys or step, so we should enable arm clock during clock
initialization instead of pll1_sys, otherwise, arm clock's usecount
would be incorrect and PLL1 will never be disabled even it is not
used.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Use clock defines in order to make devicetrees more
human readable.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Due to incorrect clock specified in MDMA0 node, using MDMA0 controller
could cause system failures, due to wrong clock being controlled. This
patch fixes this by specifying correct clock.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
[t.figa: Corrected commit message and description.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
The chosen nodes are nowadays pretty useless, since they will be overriden by
the bootloader anyway.
We can thus safely remove them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Allwinner sunXi SoCs DT changes for clocks
This contains the DT parts of the "[PATCH v3 00/13] clk: sunxi: add PLL5
and PLL6 support" series. It adds DT nodes for PLL4/5/6 and mod0 clocks
on most sunxi platforms.
* r7s72100 SoC (RZ/A1H) based Genmai Board
- Fixup I2C device on defconfig
- Add gpio regulator support on defconfig
* r8a7791 (R-Car M2) based Koelsch board
- Do not disable CONFIG_{INOTIFY_USER,UNIX} in defconfig
- Enable CONFIG_PACKET in defconfig
- Enable Ether in defconfig
* r8a7740 (R-Mobile A1) based Armadillo board
- Enable backlight control in defconfig
* r8a7740 (R-Mobile A1) based Armadillo board
- Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSuP0OAAoJENfPZGlqN0++MhsP/iV7i5qhbzKV6oPVFlBjpgMk
cp/6KikJ/9e5Nz8nGd1Q3n22/Vkw+U2JYQ0wkofJerO4AEm/Ikwf1FSRlDG4l1OR
q4/a8/ajIkZaExiztXQgwN73AyAE0vo8TWq+7qRlz6pmar8F3q32Lp1PwS7qK5zJ
NfK/JkiYJ0wH1X9Z3l3oHvKKZtoveTBYUyP/wYyfipbmesumpytWESQHWvANm0LQ
WL5haaT2F0auDLkMxnb9yIx+334oVDeRIyD/iDb3pu5OvA2Q1Xa5xWrnRYXSkOpq
UfylrS2N5LEs2teHfHiU2Rce7PDtml5TDv+uORrqMd/l76+huJYmxZcMK88NepGb
Si5Zl2GTdueAwdS1B0qdDQvkz7RYeETVwBagtQ16P6bWPbExivtqJa4zhdlm43jM
tGvU6MVv5nrqgPLUOoFRJuwutU3mIQ8+36i+MMKnePjoEvG2iCgb/X/F5x2M3Cag
xs6hsLlAkNOC/yr2A5DABzb3FPjhKvEjy0yNJFmJ0pyiHcUKuxO4HPEh74Dp0TTm
q3UHLkjXBQf5IZo0U7qUuFL+rjz6u3EbvOgddfPnPCMKJIdEWe6OtYK2N2X+BFTJ
g1tGWA2PeyO7XrNzEJ2Z5x10VTGjWywgAHRVmdBXJd0kIOARYdXRqB0Vy+M7LwKL
5mjeK9mRR3u1Lbouuzs3
=M9DB
-----END PGP SIGNATURE-----
Merge tag 'renesas-defconfig2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Second Round of Renesas ARM Based SoC Defconfig Updates for v3.14
* r7s72100 SoC (RZ/A1H) based Genmai Board
- Fixup I2C device on defconfig
- Add gpio regulator support on defconfig
* r8a7791 (R-Car M2) based Koelsch board
- Do not disable CONFIG_{INOTIFY_USER,UNIX} in defconfig
- Enable CONFIG_PACKET in defconfig
- Enable Ether in defconfig
* r8a7740 (R-Mobile A1) based Armadillo board
- Enable backlight control in defconfig
* r8a7740 (R-Mobile A1) based Armadillo board
- Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY
* tag 'renesas-defconfig2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: koelsch: Do not disable CONFIG_{INOTIFY_USER,UNIX} in defconfig
ARM: shmobile: koelsch: Enable CONFIG_PACKET in defconfig
ARM: shmobile: armadillo800eva: Enable backlight control in defconfig
ARM: shmobile: Koelsch: enable Ether in defconfig
ARM: shmobile: genmai: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY
ARM: shmobile: lager: fixup I2C device on defconfig
ARM: shmobile: lager: add gpio regulator support on defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
* Global
- Kconfig: Mention Renesas ARM SoCs instead of SH-Mobile
* r7s72100 SoC (RZ/A1H) based Genmai Board
- Add Multiplatform support
- Add Reference DT
* r8a7791 (R-Car M2) based Koelsch board
- Add pinctrl_register_mappings() for Koelsch
- Hook up SW30-SW36 on Koelsch
- Mark GPIO keys as wake-up sources
- Use ->init_late()
- Add Multiplatform support
- Set .debounce_interval for GPIO keys
- Add SW2 to GPIO keys
- Add Led 6, 7 and 8 support
- Add reference DT
- Enable PFC/GPIO
* r8a7790 (R-Car H2) based Lager board
- Add gpio/fixed regulator for SDHI
- Add SPI FLASH support on QSPI
- Mark GPIO keys as wake-up sources
- Use ->init_late()
- Set .debounce_interval for GPIO keys
* r8a7778 (R-Car M1) based Bock-W board
- bockw: remove unused RSND_SSI_CLK_FROM_ADG
- Set .debounce_interval for GPIO keys
- Correct FPGA ioremap area
- Use regulator for MMCIF
* r8a7740 (R-Mobile A1) based Armadillo board
- Correct FSI address size
* sh7374 (SH-Mobile AP4) based Mackerel board
- Use pinconf API to configure pin pull-down
- clk_round_rate() can return a zero to indicate an error
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSt5cHAAoJENfPZGlqN0++xIoP/jBunLyY+xAZ+06gukAdKEw4
hLoUH55GsvpaL5cuDT+LSXWafIol4A/wvME5sZJsKoCHRnDqQYKvyE7hDLIlvLRI
KvcmFvdUcN6plbD/wz/SPzur/Lq3+DcX4ep8pmI7OUXupYWomibwylv/5UgY++PN
Uymmre4CiHK7/wzWOyS79ujcGzdwk4o1ari5P2lC4fUlVM7jZ7DQswglo+jGxscw
CXHtEfqto4NEh2+05sAGdmRHwb3xwOndPYwHaFWy+X6uce/BZXsgDipWihHI5ZKr
FT+TemFlYwXc2In2F/E4T7aXqNDXSjEcX/x2/VHS5W2EoWbSk+Mz6zlFZduAv4oG
c35AQjHMktlo6voZm0L4WgH0JYT4dyu6DJG3mo7adRyYKvjv/OC48wt4jhYa0LGZ
XLcYBoaK1zqpG2M6ZIv138a9krGtkfSCy/Pt7YQ4WpA8CQyJlYqaoW9Yrpkhw13b
OcO22myGbjMnxTwpqS9rwDPnNR2PjG9ExDHmO3x4k+zsLqyJHxzv6ikKJWl0eiUF
JUv/mzxiaYsOBiMTYYuueNYegzhzGiW8jzp+j6E3WXTPxwCP2It8/31aBfyuaKcG
B807//VKcHulPONe3emBK7I2KzsJ6UOUs7iHuqrdwoglQKqMC0iyy2/ZFXbu7JJU
cMlHObCNFOGPZxKGsYXG
=5zhn
-----END PGP SIGNATURE-----
Merge tag 'renesas-boards-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Renesas ARM based SoC board updates for v3.14
* Global
- Kconfig: Mention Renesas ARM SoCs instead of SH-Mobile
* r7s72100 SoC (RZ/A1H) based Genmai Board
- Add Multiplatform support
- Add Reference DT
* r8a7791 (R-Car M2) based Koelsch board
- Add pinctrl_register_mappings() for Koelsch
- Hook up SW30-SW36 on Koelsch
- Mark GPIO keys as wake-up sources
- Use ->init_late()
- Add Multiplatform support
- Set .debounce_interval for GPIO keys
- Add SW2 to GPIO keys
- Add Led 6, 7 and 8 support
- Add reference DT
- Enable PFC/GPIO
* r8a7790 (R-Car H2) based Lager board
- Add gpio/fixed regulator for SDHI
- Add SPI FLASH support on QSPI
- Mark GPIO keys as wake-up sources
- Use ->init_late()
- Set .debounce_interval for GPIO keys
* r8a7778 (R-Car M1) based Bock-W board
- bockw: remove unused RSND_SSI_CLK_FROM_ADG
- Set .debounce_interval for GPIO keys
- Correct FPGA ioremap area
- Use regulator for MMCIF
* r8a7740 (R-Mobile A1) based Armadillo board
- Correct FSI address size
* sh7374 (SH-Mobile AP4) based Mackerel board
- Use pinconf API to configure pin pull-down
- clk_round_rate() can return a zero to indicate an error
* tag 'renesas-boards-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (75 commits)
ARM: shmobile: lager: add gpio/fixed regulator for SDHI
ARM: shmobile: bockw: remove unused RSND_SSI_CLK_FROM_ADG
ARM: shmobile: armadillo: fixup FSI address size
ARM: Kconfig: Mention Renesas ARM SoCs instead of SH-Mobile
ARM: shmobile: mackerel: Use pinconf API to configure pin pull-down
ARM: shmobile: Lager:add SPI FLASH support on QSPI
ARM: shmobile: mackerel: clk_round_rate() can return a zero to indicate an error
ARM: shmobile: Add pinctrl_register_mappings() for Koelsch
ARM: shmobile: Use ->init_late() on Lager
ARM: shmobile: Hook up SW30-SW36 on Koelsch
ARM: shmobile: koelsch: mark GPIO keys as wake-up sources
ARM: shmobile: Use ->init_late() on Koelsch
ARM: shmobile: lager: mark GPIO keys as wake-up sources
ARM: shmobile: r7s72100 Genmai Multiplatform
ARM: shmobile: r7s72100 Genmai DT reference C bits
ARM: shmobile: r7s72100 Genmai DT reference DTS bits
ARM: shmobile: Initial r8a7791 and Koelsch multiplatform support
ARM: shmobile: koelsch: set .debounce_interval
ARM: shmobile: lager: set .debounce_interval
ARM: shmobile: bockw: add pin pull-up setting for SDHI
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds low level debug uart support to Broadcom mobile based
SOCs.
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Tested-by: Markus Mayer <markus.mayer@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Tested-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There are two SCHED_HRTICK config entries in Kconfig.
This looks like a merge mistake. Fix it.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Modern ARM CPUs can perform efficient unaligned memory accesses in
hardware and this feature is relied up on by code such as the dcache
word-at-a-time name hashing.
This patch selects HAVE_EFFICIENT_UNALIGNED_ACCESS for these cores and
reworks the kconfig select logic for DCACHE_WORD_ACCESS to use the new
symbol.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With commit 11ec50caed ("word-at-a-time: provide generic big-endian
zero_bytemask implementation"), the asm-generic word-at-a-time code now
provides a zero_bytemask implementation, allowing us to make use of
DCACHE_WORD_ACCESS on big-endian CPUs, providing our
load_unaligned_zeropad function is endianness-clean.
This patch reworks the load_unaligned_zeropad fixup code to work for
both big- and little-endian CPUs, then removes the !CPU_BIG_ENDIAN check
when selecting DCACHE_WORD_ACCESS.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ASID allocator has to deal with some pretty horrible behaviours by
the CPU, so expand on some of the comments in there so I remember why
we can never allocate ASID zero to a userspace task.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since we only clear entries in the ASID bitmap on a rollover event, the
bitmap tends to consist of a block of consecutive set bits followed by
a block of consecutive clear bits. The exception to this rule is for
ASIDs which have been carried over from a previous generation, but
these are bound by the number of CPUs.
This patch optimises our bitmap searching strategy, so that we search
from the last successful allocation, rather than search from index 1
each time we allocate a new ASID.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With the new ASID allocation algorithm, active ASIDs at the time of a
rollover event will be marked as reserved, so active mm_structs can
continue to operate with the same ASID as before. This in turn means
that we don't need to worry about allocating a new ASID to an mm that
is currently active (installed in TTBR0).
Since updating the pgd and ASID is atomic on LPAE systems (by virtue of
the two being fields in the same hardware register), we can dispose of
the reserved TTBR0 and rely on whatever tables we currently have live.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The definition of virt_addr_valid is that virt_addr_valid should
return true if and only if virt_to_page returns a valid pointer.
The current definition of virt_addr_valid only checks against the
virtual address range. There's no guarantee that just because a
virtual address falls bewteen PAGE_OFFSET and high_memory the
associated physical memory has a valid backing struct page. Follow
the example of other architectures and convert to pfn_valid to
verify that the virtual address is actually valid. The check for
an address between PAGE_OFFSET and high_memory is still necessary
as vmalloc/highmem addresses are not valid with virt_to_page.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Nicolas Pitre <nico@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When given a compound high page, __flush_dcache_page will only flush
the first page of the compound page repeatedly rather than the entire
set of constituent pages.
This error was introduced by:
0b19f93 ARM: mm: Add support for flushing HugeTLB pages.
This patch corrects the logic such that all constituent pages are now
flushed.
Cc: stable@vger.kernel.org # 3.10+
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The IDE code used to specify the IDE IRQs for chipsets operating in
legacy mode. This appears to no longer work, and this information must
be provided by the arch. Do so. This partially fixes CY82C693 (and
probably others) on Footbridge platforms.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The clockevents code was being told that the footbridge clock event
device ticks at 16x the rate which it actually does. This leads to
timekeeping problems since it allows the clocksource to wrap before
the kernel notices. Fix this by using the correct clock.
Fixes: 4e8d76373c ("ARM: footbridge: convert to clockevents/clocksource")
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: <stable@vger.kernel.org>
Cleanup the LEDs code to use ioremap()/writeb() to access the register.
This allows us to move the definitions out of a header file directly
into the ebsa285 support code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Make pgd allocation retry on failure; we really need this to succeed
otherwise fork() can trigger OOMs.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a one-shot mode for the DC21285 timer. This allows us to use the
NO_HZ modes on this platform.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This adds support for the Marvell Tauros3 cache controller which
is compatible with pl310 cache controller but broadcasts L1 cache
operations to L2 cache. While updating the binding documentation,
clean up the list of possible compatibles. Also reorder driver
compatibles to allow non-ARM derivated to be compatible to ARM
cache controller compatibles.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Enable the compiler intrinsic for byte swapping on arch ARM. This
allows the compiler to detect and be able to optimize out byte
swappings, and has a very modest benefit on vmlinux size (Linaro gcc
4.8):
text data bss dec hex filename
2840310 123932 61960 3026202 2e2d1a vmlinux-lart #orig
2840152 123932 61960 3026044 2e2c7c vmlinux-lart #builtin-bswap
6473120 314840 5616016 12403976 bd4508 vmlinux-mxs #orig
6472586 314848 5616016 12403450 bd42fa vmlinux-mxs #builtin-bswap
7419872 318372 379556 8117800 7bde28 vmlinux-imx_v6_v7 #orig
7419170 318364 379556 8117090 7bdb62 vmlinux-imx_v6_v7 #builtin-bswap
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
sync_cache_w already includes a dsb, so we can just use sev() directly
then following a cache-sync.
Acked-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
These symbols are only referenced in this source file so can be made
static, and the efficiency table is constant data so can be declared as
such. This avoids polluting the global namespace and fixes warnings
from sparse.
The function arch_scale_freq_power() is still not prototyped or static,
this is a separate issue as this is overriding a weak symbol from the
scheduler which neglects to provide a prototype.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There is a miscompilation of csum_tcpudp_magic() due to the way we pass
the asm() operands in. Fortunately, this doesn't affect the IP code,
but can affect anyone who passes ntohs(udp->len) as the length argument,
or protocols with more than 8 bits.
The problem stems from passing 16-bit operands into an asm() - GCC makes
no guarantees about what may be in the high 16-bits of such a register
passed into assembly which is in the "HI" machine mode.
Address this by changing the way we handle the 16-bit arguments - since
accumulating the protocol and length can never overflow, we can delegate
this to the compiler to perform, and then accumulate it into the
checksum inside the asm(), taking account of the endian-ness via an
appropriate 32-bit rotation.
While we are here, also realise that there's a chance to optimise this
a little: several callers from IP code pass a constant zero as the
initial sum. This is wasteful - if we detect this condition, we can
optimise away one instruction.
Tested-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Set-associative caches on all v7 implementations map the index bits
to physical addresses LSBs and tag bits to MSBs. As the last level
of cache on current and upcoming ARM systems grows in size,
this means that under normal DRAM controller configurations, the
current v7 cache flush routine using set/way operations triggers a
DRAM memory controller precharge/activate for every cache line
writeback since the cache routine cleans lines by first fixing the
index and then looping through ways (index bits are mapped to lower
physical addresses on all v7 cache implementations; this means that,
with last level cache sizes in the order of MBytes, lines belonging
to the same set but different ways map to different DRAM pages).
Given the random content of cache tags, swapping the order between
indexes and ways loops do not prevent DRAM pages precharge and
activate cycles but at least, on average, improves the chances that
either multiple lines hit the same page or multiple lines belong to
different DRAM banks, improving throughput significantly.
This patch swaps the inner loops in the v7 cache flushing routine
to carry out the clean operations first on all sets belonging to
a given way (looping through sets) and then decrementing the way.
Benchmarks showed that by swapping the ordering in which sets and
ways are decremented in the v7 cache flushing routine, that uses
set/way operations, time required to flush caches is reduced
significantly, owing to improved writebacks throughput to the DRAM
controller.
Benchmarks results vary and depend heavily on the last level of
cache tag RAM content when cache is cleaned and invalidated, ranging
from 2x throughput when all tag RAM entries contain dirty lines
mapping to sequential pages of RAM to 1x (ie no improvement) when
all tag RAM accesses trigger a DRAM precharge/activate cycle, as the
current code implies on most DRAM controller configurations.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We have a handy macro to replace open coded __cpuc_flush_dcache_area(()
and outer_clean_range() sequences. Let's use it. No functional change.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Clean up the setup ARM printks a bit. Add printk level to a few
that were missing (CPU: <...> ones, in particular), and switch from
printk(KERN_* ..) to pr_*().
Finally, un-wrap some long lines since it makes it harder to grep the
sources from where an error came from and tweak some cases of indentation.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Driver core clears the driver data to NULL after device_release
or on probe failure, so just remove it from here.
Driver core change:
"device-core: Ensure drvdata = NULL when no driver is bound"
(sha1: 0998d06310)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The only v7-M platform only has some unused stubs in its
mach/entry-macro.S file. So don't include it which allows efm32 to drop
the file.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We don't need the offset for the first function name in each backtrace
entry; this needlessly consumes screen space. This is virtually always
the first or second instruction in the called function.
Also, recognise stmfd instructions which include r10 as a valid stack
saving instruction, and when dumping the registers, dump six registers
per line rather than five, and fix the wrapping.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ioremap_cache is more aligned with other architectures. There are only
2 users of this in the kernel: pxa2xx-flash and Xen.
This fixes Xen build failures on arm64 caused by commit c04e8e2fe5 (arm64:
allow ioremap_cache() to use existing RAM mappings)
drivers/tty/hvc/hvc_xen.c:233:2: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration]
drivers/xen/grant-table.c:1174:3: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration]
drivers/xen/xenbus/xenbus_probe.c:778:4: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration]
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQEcBAABAgAGBQJSt1TYAAoJEHm+PkMAQRiGvWgH/iWg8TmEWz4KUKuHthuUi0uh
9+2YDN+4k577Xa0obaG24giQeqkCdxMr3oJrS3FO9jeAmaNRHEGhxUPneisb7RtN
9jIVsz5bPa9/DcK9nqtaUQdvA0O5AWTE6AAPmwleTVy+8CygBo987T2uGELnQCSR
FrKCrMePc7Pj0uthMVXrpJ17Ffm/j7jkfRtPhrxHJyngh3jEux+tPbpynH/aKuO2
47unsSQimoFk7n2SPFvNu3E/vZE2xVbu5SH9MCl5yyiCifFjpi3B71LV/FW51lvm
cK8Jzn2BmYDygRFjnZfq4zJHqYJCBHzpjCLWmR37Dm/JS91aGq3+Cg0stDP8UTs=
=+Hcn
-----END PGP SIGNATURE-----
Merge tag 'v3.13-rc5' into next/boards
Need a newer base version to get a regulator fix for Samsung platforms that
they enable building in a defconfig.
Linux 3.13-rc5
the sparse IRQ conversion, fix DRA7 console output for earlyprintk,
and fix the LDP LCD backlight when DSS is built into the kernel and
not as a loadable module.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQIcBAABAgAGBQJSvcG1AAoJEBvUPslcq6VzU+gP/0AvO/aJVJNt2rpjH13RSmyo
3omMN06pxyqYUgtr4rXY2av8okSmJXWGjtUYVRKry0uMfXjIFFf7PNUX6K3j82cC
kiYUsZ42WFUbQ5F5KptVYXXHk6FFgxHCh1lmtbL7ZwDttTdoqCNZ+s6ufeGFDNl8
93tTaBhuwbPOmTUXZdCnhcfiZ8jZS3ZOz/sVx98c31aQ1jtZU74HomJMGC4t5pFY
NPAkEMD3EJHdNTJfNc+wvpA/oEfCDqJSc83RmWGIcbFwihz++0dApKstZstVco4m
5pj2fKVUI4cpe0wxbdZJnQmzSOWLPCuDBoWNQ1MYrh6i6ykcMYibOXJyvNmLtd9Y
JtqAYao2+hfLlYlWiBCuFqkfdttYDl5aTkzimAzQGXU1l0VnnMa4VD+nUdpW8F/+
Nb8MckhukKnfHEjnCRwb3wgXJzOYlAg5iekUqo0y1bZWpBC8rUzgW2qDkAYXT+Ul
eRi4AEgrmPNkSvLFWSm1aWJSt2yP+Xd9fA+P7EUHmBMXYa7mQyxaI/Xpr/qO0Oqd
Ewm9BOoKzLKvn6IeOLQ4JgUERocbB0hH38efP6h/qf4LlFcygF5pAPfXNK3/WHlt
2gaVHCi4x4deFwZA/u2x0bDcwTebvTxZ7PZJftwI6O3KjSFGcxP6pN16cvtCJaOV
bt+CkiBjkFl7gNWhFiwa
=3A1e
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.13/intc-ldp-fix' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
From Tony Lindgren:
Fix a regression for wrong interrupt numbers for some devices after
the sparse IRQ conversion, fix DRA7 console output for earlyprintk,
and fix the LDP LCD backlight when DSS is built into the kernel and
not as a loadable module.
* tag 'omap-for-v3.13/intc-ldp-fix' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Fix LCD panel backlight regression for LDP legacy booting
ARM: OMAP2+: hwmod_data: fix missing OMAP_INTC_START in irq data
ARM: DRA7: hwmod: Fix boot crash with DEBUG_LL
+ v3.13-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
* r8a7790 (R-Car H2) based Lager board
- Correct SHDI resource sizes
This bug has been present since sdhi resources were added to the r8a7790 by
8c9b1aa418 ("ARM: shmobile: r8a7790: add MMCIF and SDHI DT
templates") in v3.11-rc2.
* r8a7778 (R-Car M1) based Bock-W board
- Correct DMA mask
This resolves a regression introduced by 4dcfa60071
("ARM: DMA-API: better handing of DMA masks for coherent allocations")
in v3.12-rc1.
* r8a7740 (R-Mobile A1) based Armadillo board
- Add PWM backlight power supply
This resolves a regression introduced by 22ceeee16e
("pwm-backlight: Add power supply support") in v3.12.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSuQF7AAoJENfPZGlqN0++83IP/3AyhSixjpxUagqxsOkI8FJu
uL5Z5gNVfV+/inNWptM94L/T5pZ9IL2uhcoDGKyISs78UMGCTh5gqwC8ZsXGm0IZ
3Y2nkgx4Ohgx+62KJLYt/by6RX+Hrx/O09E+1o7BAyF26Lq6ncKczrIR5+n7Sak5
mHea7P+uk2njVjj7oM1Sbvk+3wJ1yoEdRkI/s4iORA7sCgQTEyxMbIS2aDHOkRx1
3jwlA/BbXUCEeWf45TC7MQCd7OuHEj1bGGocdSC59wqvTLd+IFQviK+EHjAXgUIf
vnuTLpXZMihJ19FZbcOrEndjlM9W+opZ775x1IrKU+w/C9JmlI9Gf1D5IWxbTdD2
bQ/mXBHmFo9IMO+i/Q2mqfPYzAGCBpz7ITyt1IVzXd6EYVsPXYWzQsW+j+BE4vsp
XGhQ+vh0Au7o3KABnvjxVQvWIkZUpqGr4n3SKoJ74X1+eZOEyNQ31kg14zr5Xsz3
rAY9taP2r3uNZiaQJzFOsbaPKxe81pjbx34TmHiKEKzmdAhwKjeb94o2HkoY90z2
us3tBVjjIr9f4Yyc3JLB0VLRsfW4fu6ovzJYdxe2lo5EFpq8zlMVY4XbgP0QUFxD
tAHvO9FeS2jtxxk0OS7N2MiqWBmTTsluUuxu9cXyBO0afHVqWhhWR3Upkt82f46u
BGEKCgd9mXKP8M5FHTZE
=6ai1
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
From Simon Horman:
Second Round of Renesas ARM based SoC Fixes for v3.13
* r8a7790 (R-Car H2) based Lager board
- Correct SHDI resource sizes
This bug has been present since sdhi resources were added to the r8a7790 by
8c9b1aa418 ("ARM: shmobile: r8a7790: add MMCIF and SDHI DT
templates") in v3.11-rc2.
* r8a7778 (R-Car M1) based Bock-W board
- Correct DMA mask
This resolves a regression introduced by 4dcfa60071
("ARM: DMA-API: better handing of DMA masks for coherent allocations")
in v3.12-rc1.
* r8a7740 (R-Mobile A1) based Armadillo board
- Add PWM backlight power supply
This resolves a regression introduced by 22ceeee16e
("pwm-backlight: Add power supply support") in v3.12.
* tag 'renesas-fixes2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: fix shdi resource sizes
ARM: shmobile: bockw: fixup DMA mask
ARM: shmobile: armadillo: Add PWM backlight power supply
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Olof Johansson <olof@lixom.net>
After commit 88f718e3fa
"ARM: pxa: delete the custom GPIO header" a compilation
error was introduced in the PXA25x gadget driver.
An attempt to fix the problem was made in
commit b144e4ab1e
"usb: gadget: fix pxa25x compilation problems"
by explictly stating the driver needs the <mach/hardware.h>
header, which solved the compilation for a few boards,
such as the pxa255-idp and its defconfig.
However the Lubbock board has this special clause in
drivers/usb/gadget/pxa25x_udc.c:
This include file has an implicit dependency on
<mach/irqs.h> having been included before <mach/lubbock.h>
was included.
Before commit 88f718e3fa
"ARM: pxa: delete the custom GPIO header" this implicit
dependency for the pxa25x_udc compile on the Lubbock was
satisfied by <linux/gpio.h> implicitly including
<mach/gpio.h> which was in turn including <mach/irqs.h>,
apart from the earlier added <mach/hardware.h>.
Fix this by having the PXA25x <mach/lubbock.h> explicitly
include <mach/irqs.h>.
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Greg Kroah-Hartmann <gregkh@linuxfoundation.org>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- remove <mach/regs-clock.h> for exynos
- remove <mach/regs-irq.h> for exynos
- local <mach/regs-pmu.h> into mach-exynos
- select PM_GENERIC_DOMAINS for ARCH_EXYNOS4
instead of each SOC_EXYNOS4XXX in Kconfig
- call pm_genpd_poweroff_unused() instead of via
exynos_pm_late_initcall() because no need to
handle whether CONFIG_PM_GENERIC_DOMAINS is enalbed
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJStdAiAAoJEA0Cl+kVi2xqNQ4P/j+t1mbZWnn8n5iwDyEkS0cQ
xYH97eewSFFgbiO54eFCNM1xQoAyJhASxPuxi8wIVvYriOjgZ+IGsWXQqyGf0un9
Zui4v6dinuoQFqxhMsy10qSm4BH5URNlf8ApFFPdhReO3zNTD0SWzou3PAsFSoE4
DMCboHQ6z7ku+tELjN56fQHcDRmUx4MpHc4Mj57ESr4LXMHbajTQhfq1M+F//SWh
wnsuD1lFDDS2MnpRclhVajT7Rogl7CXVpXB8FYN6/ZxdwraJbPh3qpubsYVJpcwQ
Z0h0dXXPplw2HQRcruhSO5POEK16Q5TtFRw2YlUdN+Zd9rljwwlc5tBDl6UMi+RQ
6p82BMl+LGpt2tAI3R1Tgj/V9BX5ijmLpXQAG9dLi/6CQAEKEGJJhsUWZV8DIo6g
4BARQNR+I13izvI1MYLg4QS2Yx2H5jvR1ewPyMuSH6DuK7ZrHICQhSbslyqfAKH4
xGie6HVPAm+t0dhUrwppcDDI9TWE4TFeiilV+Tl8nLHAnSBdZvDSMKW94nYxzlsb
uQJZHXMI+OgzgND4HCyE7vc7PCwvkF1YPtmt6/zkH4D++gk64LIxojyVAiEm8bAJ
7a2vCnIjOLaaC3/s5hN2dZQG6IeXX70eqG0NE1cHqwTxlj5dCxmNds1nHUgBiyHq
FJ/S/ns7cGNkOgbHB9LV
=NgIt
-----END PGP SIGNATURE-----
Merge tag 'samsung-cleanup-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
From Kukjin Kim:
Samsung cleanup 2nd for v3.14
- remove <mach/regs-clock.h> for exynos
- remove <mach/regs-irq.h> for exynos
- local <mach/regs-pmu.h> into mach-exynos
- select PM_GENERIC_DOMAINS for ARCH_EXYNOS4
instead of each SOC_EXYNOS4XXX in Kconfig
- call pm_genpd_poweroff_unused() instead of via
exynos_pm_late_initcall() because no need to
handle whether CONFIG_PM_GENERIC_DOMAINS is enalbed
* tag 'samsung-cleanup-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Kill exynos_pm_late_initcall()
ARM: EXYNOS: Consolidate selection of PM_GENERIC_DOMAINS for Exynos4
PM / devfreq: use inclusion <mach/map.h> instead of <plat/map-s5p.h>
ARM: EXYNOS: remove <mach/regs-clock.h> for exynos
ARM: EXYNOS: local definitions for cpuidle.c into mach-exynos dir
cpufreq: exynos: move definitions for exynos-cpufreq into drivers/cpufreq/
ARM: EXYNOS: local definitions for pm.c into mach-exynos dir
PM / devfreq: move definitions for exynos4_bus into drivers/devfreq
ARM: EXYNOS: cleanup <mach/regs-clock.h>
ARM: EXYNOS: cleanup <mach/regs-irq.h>
ARM: EXYNOS: local regs-pmu.h header file
ARM: EXYNOS: remove inclusion <mach/regs-pmu.h> into another headers
ARM: EXYNOS: cleanup <mach/regs-pmu.h>
Signed-off-by: Olof Johansson <olof@lixom.net>
mbus is the memory bus clock, and it is present on both sun5i and sun7i
machines. Its register layout is compatible with the mod0 one.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit adds all the mod0 clocks available on A20 to its device
tree. This list was created by looking at AW's code release.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit adds all the mod0 clocks available on A10 and A13. The list
has been constructed by looking at the Allwinner code release for A10S
and A13.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit adds all the mod0 clocks present on sun4i to its device tree
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit adds PLL5 and PLL6 nodes to the sun4i, sun5i and sun7i
device trees.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit adds the PLL4 definition to the sun4i, sun5i and sun7i
device trees. PLL4 is compatible with PLL1.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This branch contains changes to tegra_defconfig that came in after
I sent the previous pull-request/tag tegra-for-3.14-defconfig. We enable:
* DRM_PANEL/DRM_PANEL_SIMPLE, which implements the built-in LCD panel
support for Harmony, Cardhu, and Dalmore.
This branch is based on tag tegra-for-3.14-defconfig, for which I sent a
previous pull request.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJStIafAAoJEMzrak5tbycx92QQAL3LyEJIAp3zUkT4QJXVEowh
OnnwMiedwQZg07pT03VENznPGXkmP3jdvZv/QCe2UAdA02luyvX7ukWBnEuF43IY
88VcgwXwObUsrdMYfJR6OtW7qOxobTN9lcuVjctixgI+mHrul0GnV6b7kYDNTa1m
lWI9g12Tk2UFbvCzhXPFcU3es4S4g7F8Ffs8KHjTf/kpolXlXu1WcGoTgrYhr1mn
qvI2FVsLnBcxbDZb5Prv0RO8pr9efgoXU4eDY30Od+/NYqWL4iVT56M6VdmFo/5P
Ne3Plsg7LajJKilliUo/WPuKWsU1RepfG+6LNY+4WJAQNEhrrN2iSpUWfKOVbK4+
Au7M/y1ObbtpnZLO0pzj7KBLOLPXXrhtkJm7NetuNcb7J57/HjPtq9y7FgouOdfz
vpxjc1KRbZPXIS+QYFUfkmq6giS72hXRv4psySWUjwoLfojnsXx9E5YUoyQO7k1H
SBulEUEQVy+l9VBssl6hrMaLqx4iN9hJ10nGsimjgwUxSZyTiYng8E/1D4wlkZrm
4uakuYYKeLWVODURJNRpVBxmZe0U6MO7dzQkRZX1M/fAMtCqBUB94tdtCrKoq6o3
xyRma7dUWeN/ohIckRRN5BPjfJ7m0Hg4Z/QlJ3+2EUH8FFnDcClbOxGbDbrM0SZW
I7mL461zb1K8pW+8X8Y/
=6BvU
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.14-defconfig-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/boards
From Stephen Warren:
ARM: tegra: second set of defconfig changes
This branch contains changes to tegra_defconfig that came in after
I sent the previous pull-request/tag tegra-for-3.14-defconfig. We enable:
* DRM_PANEL/DRM_PANEL_SIMPLE, which implements the built-in LCD panel
support for Harmony, Cardhu, and Dalmore.
This branch is based on tag tegra-for-3.14-defconfig, for which I sent a
previous pull request.
* tag 'tegra-for-3.14-defconfig-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable DRM panel support
Signed-off-by: Olof Johansson <olof@lixom.net>
This branch contains changes to Tegra's device tree that came in after
I sent the previous pull-request/tag tegra-for-3.14-dt. Changes are:
* Set up aliases for RTCs, so that the correct RTC is chosen to
initialize the system date/time.
* Venice2 pinctrl and regulator configuration.
* Built-in panel enablement for Harmony, Cardhu, Dalmore.
* HDMI enablement for Dalmore.
* USB2 port enablement for Beaver.
* Keyboard and power key enablement for Venice2.
This branch is based on tag tegra-for-3.14-dt, for which I sent a
previous pull request.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJStIY4AAoJEMzrak5tbycxv2gP/AmghgUu2S3JJLTBfwpRLcz9
Cwppop9MtHDSg+PnZgDdX3wZEJhGXSBad0GUa+blaThJjpvtxGr7wdQFI2QYM0/9
DuSaeqnl9Vw+dRoVugWJSu78DXBs5mwxaGSOJi5PO+dPJtPc+wro/+aZLCqYxegH
hIMyHqIW8jpv0cRTcwoPxwwFbfH9NTCIbcOK1N2xyZa7QTrxCZJKHuJNqhaimPdx
9B+hqMCcx9Y+Uzg6PFHq27RIA5LWqIpM/5gsBV9+FJcUZWvYLWlkI3sxFaC238LB
YMqv0t1T18ZbPhr/z+ixY+rPOzHGLjqcq2HCpZU/irYS7ysmoMHhFeDXrF5y2Kqr
fEIac40GsohxX9DxJJ+f1Xb1tKc9s8ynG84QHJfqhBUafjXHeKBofYYK+XZ8OMna
D15vnaDtA2nujLzJA4FGCttAgkADYLaoNE7TRyyPLGaSuA4DTJJtVApy97YJAWMS
qNsLDkGWgj6fTwpG7WRACAAmxfGK6ARXjQGKjyXicC5LP135lRdTufrKCTG7gIqS
C3wlEEgxNlFuigLqhsvWiIkMCBfyTujmApUgDMBotSApwVF5l2wuMMdB31AL3SYI
YU7IMcvRXi41La9JOAuVXcPT92/S+YVqt5KlemxEcGy6hl2vzuOv6JcUBgv4WnSU
A+qsKuhPFJd5BzLMGRov
=CUm7
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.14-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
From Stephen Warren:
ARM: tegra: second set of device tree changes
This branch contains changes to Tegra's device tree that came in after
I sent the previous pull-request/tag tegra-for-3.14-dt. Changes are:
* Set up aliases for RTCs, so that the correct RTC is chosen to
initialize the system date/time.
* Venice2 pinctrl and regulator configuration.
* Built-in panel enablement for Harmony, Cardhu, Dalmore.
* HDMI enablement for Dalmore.
* USB2 port enablement for Beaver.
* Keyboard and power key enablement for Venice2.
* tag 'tegra-for-3.14-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable power key on Venice2
ARM: tegra: Enable Venice2 keyboard
ARM: tegra: enable USB2 on Tegra30 Beaver
ARM: tegra: modify Tegra30 USB2 default phy_type to UTMI
ARM: tegra: Enable HDMI support on Dalmore
ARM: tegra: Enable DSI support on Dalmore
ARM: tegra: Add Tegra114 gr3d support
ARM: tegra: Add Tegra114 gr2d support
ARM: tegra: Add Tegra114 DSI support
ARM: tegra: Add host1x, DC and HDMI to Tegra114 device tree
ARM: tegra: Add MIPI calibration DT entries for Tegra114
ARM: tegra: Enable LVDS on Cardhu
ARM: tegra: Enable LVDS on Harmony
ARM: tegra: set up /aliases for RTCs on Venice2
ARM: tegra: add ams AS3722 device to Venice2 DT
ARM: tegra: fix missing pincontrol configuration for Venice2
ARM: tegra: set up /aliases entries for RTCs
Signed-off-by: Olof Johansson <olof@lixom.net>
In preparation to the introduction of the support for additional SoC,
the mvebu/common.h should be clear of Armada 370/XP-specific
definitions. Therefore, move the Armada 370/XP SMP specific
definitions to the armada-370-xp.h file.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The mach-mvebu/common.h file contains prototypes of functions that
have been removed, so this commit removes the corresponding
prototypes.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
problems with GPMC, RNG, and ISP/IVA MMUs on OMAP2/3. The other fixes
some problems with DEBUG_LL on DRA7xx.
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/hwmod_fixes_b_v3.13-rc/20131226021920/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQIcBAABAgAGBQJSvANxAAoJEMePsQ0LvSpLd0AP/1Toh0oIX7xdj9zaTosZgovZ
UsNbkzilxKWVGwyjEHj0510YL/v3YuYYPmF+UtZcOVEybz+EWP21BXJc0y+jX7QV
ma21i3abK0uKJ1Dq0CGmolnq9NRswvS2TR9SKgXmG/1HGF1wo5MIjzx3ZCtFdni4
+PZYG1RFJEFUBWtQoWnkqm16QS6wwzfIHlfLBy5kEu70ueFuAyLd7yKWgtjDkpWP
Yvf5mjvIdbDlK6sn9388UydYq4Puy8k0KWHlcQn/jA0uQecjt7gcsk6B24RPhPzt
l9H2wMRxoTBgx6di8ywGdU0XV6pa6A7DWQGhve2AjQlBZ5hug7i4oEOO4Iod6cMm
c3lqA2DEbLLt3Xwjj97EZYKiIlIxnYbqFdw/Ql0KdnlAwtZw333EkcRKW5+15Jsg
qcYU2GtsvGRqBgUD13eE7OLM9Ovgdkt18PYLEs5Vzsi08n+LDwuoZj4lpCHOsBZl
1xO38Q3M9NCmMUubfxbY0HvzW3EqgBZHFGgf3hWsbxkV89htCrDD+kwo1OTXCLXE
s3FFIAaa7HDdWJCD/CPfKoaY0upqv/DwsHwKNpvT8SiiVb90mNXumJauC1H8GeW9
gQqscy2u+UhtXtuPiYpG2h4tEGC95ySwzbolT4d84fbqmkMQLcfzSofgJ98iYg2N
vRGMA2I8U142M2HaCxZx
=kOrX
-----END PGP SIGNATURE-----
Merge tag 'for-v3.13-rc/hwmod-fixes-b' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into debug-ll-and-ldp-backlight-fix
A few OMAP hwmod fixes for v3.13-rc. One patch fixes some IRQ
problems with GPMC, RNG, and ISP/IVA MMUs on OMAP2/3. The other fixes
some problems with DEBUG_LL on DRA7xx.
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/hwmod_fixes_b_v3.13-rc/20131226021920/
Looks like the LCD panel on LDP has been broken quite a while, and
recently got fixed by commit 0b2aa8bed3 (gpio: twl4030: Fix regression
for twl gpio output). However, there's still an issue left where the panel
backlight does not come on if the LCD drivers are built into the
kernel.
Fix the issue by registering the DPI LCD panel only after the twl4030
GPIO has probed.
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[tony@atomide.com: updated per Tomi's comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable new features required by the Venice2 board.
This branch is based on v3.13-rc1, and shouldn't cause any conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSr3LxAAoJEMzrak5tbycxEl4P/0in5tXY+k4ZxR2OyiBtCcgr
sJLsaCCUE3vW1WpxKD/HlxFWxoAF1nC7jB0PlQsH0R/AFzGchrWRBZ+9OFe4jdcn
PpN199r0kEk3cyniGlftbvvubbqPYrHO9RmeUtRIGN2BWZiYy2/IUhjdWMFOnlBD
uSXNNCiTJtPPSjIhj02V1jmIMHNhDCi6Sk4Wzb079EAFA8kRC8a5fbuz78Q/W2wU
3MAlL5MVBI2pfUeBk4c0B006hrES4cpErg/QtZSsWdpPEDowid0Zmg7hqWeKg8X2
0N3gQo0UJfj5qc/CjzJ5nUr4qKCcaC8hXpKt6gkOqQnt0cZh6xBxaCxkphJoxFvJ
/08A11UXsBw1iNeGMP2nv+bxlkECdgE2n7+IfB52eDszq7lAJGoE5Wvp2GHyvVkQ
9uwQ7Lb5FL2mO27ASwnihcK7ND65XztyqJuO22oS/sEF99rrGLxXDeNOwgqCvCUi
j39I4u064O/jtotza9K1yOhMdo3JW0n8qAyxM8/aljYvSF50lvQiuEyXgvwezSRr
r6a4QiDpvDN964WxRNr/ALqKRu1mymz0oiQ0acc7f+0QAK37RFVpVJaJwzONHIY/
+/PiseBRskDzqK/Rc1hTLquMRGCmzyQGeWSdgD52OAjWF98xtlLAFQsuFf7QZfAz
Mnn5fB+GfiiSKMkyJ/ZU
=8cB3
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.14-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/boards
From Stephen Warren:
ARM: tegra: defconfig changes
Enable new features required by the Venice2 board.
This branch is based on v3.13-rc1, and shouldn't cause any conflicts.
* tag 'tegra-for-3.14-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: tegra_defconfig updates
Signed-off-by: Olof Johansson <olof@lixom.net>
This branch contains all the changes to Tegra's device tree. The
highlights are:
* Many patches for Tegra124 SoC support, and the Venice2 board which
uses that SoC.
* Conversion to use more headers providing named constants for pinctrl
and key codes, which improves readability.
* A few cleanups.
This branch is based on tag tegra-for-3.14-dmas-resets-rework in order
to avoid conflicts with the DT changes required to use the common
bindings for DMAs and resets.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSr3KtAAoJEMzrak5tbycxWpIP/A1zpgEBb8f0k/6aBRmiKisW
G97QGbKVGL9ZJzi/CC12nD68URwN8mVfSRn9d+r7jN5zcEh+RAnCflj6LzX5c0nV
XZndE9GnnpqpbsoWY+ubDPRvJnG2ZWPciMoR1p/ftNOHweELPG/5qTCoZLvi3abI
7L0EzMcNY6pC5RB0unCkTHWbmCsgTjDFQ0UI/iKJy+WYzSt0YLFW7TCMkEUBDfcg
ElD2qhNYEZI5eRWO/ccl5lsoBwg47YSCXFti1rAZEyp7/SXRGm7gbdW0d/UpywoY
66V2GMP6mHeAMk6RFHSo1R2XGP5uxTY/n9UThtX5YuKTFYUwy541+xK4qWlVlpf+
SIukOFbHexPqvBbZWSB7lgdUemh2Cw/RTSDkp//hAHDcxMN5exjswgJIo9eIjzdi
W78JaBZVBmsfJx+jEan6kNTV0TEbNLLnEhDdulLZjF2XxbGcWsYeJa3BmEGP8Lf1
VlzEOMXCkbar9kO8nJxCLXCK7JFR+GGZr2pF0hV9PIjrAao67INqDZpXvIZg5TnB
aNoT+vzO19AoA7vj/aGmjVoahr/U3z+wFeHWoWyagq2Kxmx8RdYuV8IAo7CK9wo0
ok6J/MSdqq8WZYhIA/5BZffSl0RrlY2fHOpj3Jga72fjzgoH4BGmUQaWrHjQlzhh
uqLwJymOSLsFIUD6itof
=3M5I
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.14-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
From Stephen Warren:
ARM: tegra: device tree changes
This branch contains all the changes to Tegra's device tree. The
highlights are:
* Many patches for Tegra124 SoC support, and the Venice2 board which
uses that SoC.
* Conversion to use more headers providing named constants for pinctrl
and key codes, which improves readability.
* A few cleanups.
This branch is based on tag tegra-for-3.14-dmas-resets-rework in order
to avoid conflicts with the DT changes required to use the common
bindings for DMAs and resets.
* tag 'tegra-for-3.14-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (24 commits)
ARM: tegra: Add SPI controller nodes for Tegra124
ARM: tegra: Fix misconfiguration of pin PH2 on Venice2
ARM: tegra: fix pinctrl misconfiguration on Venice2
ARM: tegra: add default pinctrl nodes for Venice2
ARM: tegra: correct Colibri T20 regulator settings
ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines
ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl defines
ARM: tegra: convert dts files of Tegra114 platforms to use pinctrl defines
ARM: tegra: Add header file for pinctrl constants
ARM: tegra: convert device tree files to use key defines
ARM: tegra: Enable PWM on Venice2
ARM: tegra: Add Tegra124 PWM support
ARM: tegra: add sound card to Venice2 DT
ARM: tegra: add audio-related device to Tegra124 DT
ARM: tegra: enable I2C controllers on Venice2
ARM: tegra: add I2C controllers to Tegra124 DT
ARM: tegra: add MMC controllers to Tegra124 DT
ARM: tegra: add Tegra124 pinmux node to DT
ARM: tegra: add APB DMA controller to Tegra124 DT
ARM: tegra: add reset properties to Tegra124 DTs
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Bringing in the tegra dma/reset framework cleanup as a base for the DT changes.
* tegra/dma-reset-rework: (320 commits)
spi: tegra: checking for ERR_PTR instead of NULL
ASoC: tegra: update module reset list for Tegra124
clk: tegra: remove bogus PCIE_XCLK
clk: tegra: remove legacy reset APIs
ARM: tegra: remove legacy DMA entries from DT
ARM: tegra: remove legacy clock entries from DT
USB: EHCI: tegra: use reset framework
Input: tegra-kbc - use reset framework
serial: tegra: convert to standard DMA DT bindings
serial: tegra: use reset framework
spi: tegra: convert to standard DMA DT bindings
spi: tegra: use reset framework
staging: nvec: use reset framework
i2c: tegra: use reset framework
ASoC: tegra: convert to standard DMA DT bindings
ASoC: tegra: allocate AHUB FIFO during probe() not startup()
ASoC: tegra: call pm_runtime APIs around register accesses
ASoC: tegra: use reset framework
dma: tegra: register as an OF DMA controller
dma: tegra: use reset framework
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This branch contains various miscellaneous changes to code in the
mach-tegra/ directory. It is baased on v3.13-rc1, and shouldn't conflict
with anything else.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSr3IGAAoJEMzrak5tbycxVVUP/09VfeFYOidIm6mgbWSMlL4l
DEPzrGBOvyO60og4LIbDIgwDzkcEsxIF9erlrVTz1Fvh2p0P0sQycIKjvyhvNXeh
Ft9TQ1kDHjoJcfHI9f8tapkmwhOG+6vy2gDrTPmyxjnLpiE5ccM18CCr5CMK+y2v
Ojzmf2paPBFyI84gcdWuwF4Ze2YmwdHmG7TksG/PZrpicizSxe+d9wNVDBMkJnP6
QFicMU6DEFZVwwDkFx4qPYrFDJPk8dqcAmNl+F+9jGEqTmxA+7M8eOF/SQa62lwa
OJrVugD8YigT5NjRW/9btOVY/jUHbg0Ekj5DXd7Q9rO5KNUrFDRSia5XiWmms/S8
QNJezmjNgA83OQDefuAkpsKydf1XGoyIQ9EjDUb4i807PRwTO4En+1pD0EpEWSet
0c1mfDvU5uC6L9A5VvR0pzyGz2U2EhNhkUz03WAqtWYdrR68vIZHNZVIvHOLuwWF
fDkS26KxziOmKM1ePdL7wemuNOod8ACeyzXMa2dhR68l6LH1X1pnMaoxvk2AjETk
SMat9tsxY827+TtQlAQ+4bdR3qXqYsQLD7VWOPO0V3fs5T08jVZrpJ9pHDRYW88K
dGHmIW4sHXKXP4Qw9rDGWSkWZeOVJYr72U6uH9vbg8hK6Wi2eAMxZ27ngFiqahSK
PIhnAfsdM2/FX+C+vu58
=Oztt
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.14-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
From Stephen Warren:
ARM: tegra: SoC-specific core code changes
This branch contains various miscellaneous changes to code in the
mach-tegra/ directory. It is baased on v3.13-rc1, and shouldn't conflict
with anything else.
* tag 'tegra-for-3.14-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: select PINCTRL_TEGRA124 for Tegra124 SoC
ARM: tegra: use section-sized static mappings for LPAE too
ARM: tegra: don't hard-code DEBUG_LL baud rate
ARM: tegra: fix DEBUG_LL combined with LPAE
ARM: tegra: switch FUSE clock on before usage
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the Trusted Foundations secure-mode firmware, as found
on NVIDIA SHIELD. This allows Linux to run in non-secure mode on this
board; all previous Tegra support has assumed the kernel is running in
secure mode.
This branch is based on v3.13-rc1, and shouldn't cause any merge
conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSr3NgAAoJEMzrak5tbycxRXkP/imK6IQn5cAtXY7nfKnn4Rke
RjvERwURDpi6QDrXaRe6NUVg3PgZ0Z7kXLqSuj/cAPinMyhQDR5DxlJVjYiduJ50
CmMhV+RWkA/cmaU2oPjpD3YEm68txYXTyf3iWfX1ScFSuNNN0yGel3eY2rFjX/aT
RgAWm8HbQTR7NDazAAt9gOqeJUtfs3msXwMxtZvD6OhRougyaPlqfuafjVpfM9vK
JLDAbJuMEl6/dI2UYVvDBJvL//TOOjnwy6YFwQCZsqhYGHhT3Xc9hQABilUQmJ1d
mbu29cPBrRgGiu3anpjZeh0KxVB3xDPp1a+o4lSH0iJztAPy4WTUZ1Sc3y2qwKaS
qZ5Zu5SXVI1O/ywv1FChL2syuJbgOH+HGBMFslacVniQ/U1o4PmKZCJOB0pnpf8B
dESAQgvDqIZeyt2eXxsAMAOw01xMTotngAaJpAtYFv0plP+PxAhr+dkHHjCwwkde
7+OKeVE5TDDwlhz5PE35/4EWdWM0622aL3sK1IxrR2q66LGpKAoQpFeKaAUr0d6z
OQnQiS+uNSNrCvAEeyEL2bQfv1xsjOFpFy6PV7ShrUrAgPVR3+wj82RvwTciMdbd
tv3Y7LXCugSUOdq/abc3VgAnlgMzlhH5vlj6CMcKSSPbzZ3lbRB37iBmxpJLm9qa
o3Ah/MaWSqtqmIueFrpa
=c5t/
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.14-trusted-foundations' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
From Stephen Warren:
ARM: tegra: Trusted Foundations firmware support
Add support for the Trusted Foundations secure-mode firmware, as found
on NVIDIA SHIELD. This allows Linux to run in non-secure mode on this
board; all previous Tegra support has assumed the kernel is running in
secure mode.
(The base TF support has been discussed back and forth a lot; for now
the most logical place for it seems to be under arch/arm, so we're adding
it here. We can move it out to a common location in the future if needed).
* tag 'tegra-for-3.14-trusted-foundations' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: support Trusted Foundations by default
ARM: tegra: set CPU reset handler using firmware
ARM: tegra: split setting of CPU reset handler
ARM: tegra: add support for Trusted Foundations
of: add Trusted Foundations bindings documentation
of: add vendor prefix for Trusted Logic Mobility
ARM: add basic support for Trusted Foundations
Signed-off-by: Olof Johansson <olof@lixom.net>
This branch includes all the changes to Tegra's powergate driver for 3.14.
These are separate out, since the Tegra DRM changes for 3.14 rely on the
new APIs introduced here.
A few cleanups and fixes are included, plus additions of Tegra124 SoC
support, and a new API for manipulating Tegra's IO rail deep power down
states.
This branch is based on tag tegra-for-3.14-dmas-resets-rework, in order
to avoid conflicts with the addition of common reset controller support
to the powergate driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSr3G5AAoJEMzrak5tbycxHaEP/2YP1KIUTINzF9JlTaFWLd38
dlqCOdDjcIow6QvaI0H2xdD7OhWqbiK2gAKz10PH0TYVr5AJZKyC7uxAw1gvV5bI
2hgP9ZBVQY8qfveZuyQhL9jCwAg52TfG2LBO4Iw3wng9tO00uo8knjoHURmiewuY
fLY8CQxYydwK8MmqabPI/L0gQhSlswyDByaeB0ixHJncSVT8KHmbSX8kx7FnYsI6
/r/D7IQtMyx52XJRbInN83UIdONKP9vkPAXmptKBU2SGwdXOzqPqfxFuNRKN85Gq
a4wlJUQAfBAndiemaZIH5O7gmmUht1lB0L9JWDFw9nBr6EHDVOpgRgi/OgVFaFE+
Qer3LdrpEvyXsRe3AjeQgta8716KaRMW3IbaqkdS0F+HwyFGL9/nGRttu9JLHSCR
oo7FVscaE7tC2d/LGNqI0y4pprgbrjROT70hWoNDF8oS5qDsI3rxEjB0FXyzE2by
Bd702Sc9heh60Hnov/vZy9WFcWETEKVEF5hgIL3lrjA6pMKdH7fEylOD+bxVAmE2
t5wePXc7OSdciaLN/D1GhtCD+R58u+idHadKnU9uRYB1wmeIAeJMi9D/ZnpKftX4
M5Ts7t8k1jxZlRXXgiara3SwJ6tIOlc5vEvhQWEeInzL0yishFDy2mmq1lMaV0mJ
cFgQUdhufycI0Yprfwjt
=jJOV
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.14-powergate' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
From Stephen Warren:
ARM: tegra: powergate driver changes
This branch includes all the changes to Tegra's powergate driver for 3.14.
These are separate out, since the Tegra DRM changes for 3.14 rely on the
new APIs introduced here.
A few cleanups and fixes are included, plus additions of Tegra124 SoC
support, and a new API for manipulating Tegra's IO rail deep power down
states.
This branch is based on tag tegra-for-3.14-dmas-resets-rework, in order
to avoid conflicts with the addition of common reset controller support
to the powergate driver.
* tag 'tegra-for-3.14-powergate' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Add IO rail support
ARM: tegra: Special-case the 3D clamps on Tegra124
ARM: tegra: Add Tegra124 powergate support
ARM: tegra: Export tegra_powergate_remove_clamping()
ARM: tegra: Export tegra_powergate_power_off()
ARM: tegra: Rename cpu0 powergate to crail
ARM: tegra: Fix some whitespace oddities
Signed-off-by: Olof Johansson <olof@lixom.net>
Bringing in the tegra dma/reset rework as a base for new SoC branches.
* tegra/dma-reset-rework: (81 commits)
spi: tegra: checking for ERR_PTR instead of NULL
ASoC: tegra: update module reset list for Tegra124
clk: tegra: remove bogus PCIE_XCLK
clk: tegra: remove legacy reset APIs
ARM: tegra: remove legacy DMA entries from DT
ARM: tegra: remove legacy clock entries from DT
USB: EHCI: tegra: use reset framework
Input: tegra-kbc - use reset framework
serial: tegra: convert to standard DMA DT bindings
serial: tegra: use reset framework
spi: tegra: convert to standard DMA DT bindings
spi: tegra: use reset framework
staging: nvec: use reset framework
i2c: tegra: use reset framework
ASoC: tegra: convert to standard DMA DT bindings
ASoC: tegra: allocate AHUB FIFO during probe() not startup()
ASoC: tegra: call pm_runtime APIs around register accesses
ASoC: tegra: use reset framework
dma: tegra: register as an OF DMA controller
dma: tegra: use reset framework
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This series converts the Tegra DTs and drivers to use the common/
standard DMA and reset bindings, rather than custom bindings. It also
adds complete documentation for the Tegra clock bindings without
actually changing any binding definitions.
This conversion relies on a few sets of patches in branches from outside
the Tegra tree:
1) A patch to add an DMA channel request API which allows deferred probe
to be implemented.
2) A patch to implement a common part of the of_xlate function for DMA
controllers.
3) Some ASoC patches (which in turn rely on (1) above), which support
deferred probe during DMA channel allocation.
4) The Tegra clock driver changes for 3.14.
Consequently, this branch is based on a merge of all of those external
branches.
In turn, this branch is or will be pulled into a few places that either
rely on features introduced here, or would otherwise conflict with the
patches:
a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid
conflicts.
b) The DRM tree, which introduces new code that relies on the reset
controller framework introduced in this branch, and to avoid
conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSr3AnAAoJEMzrak5tbycxfMwQAMeffTFreJqDiQ4Vj0XmuhSn
RFlXiZQsWtQ6gGgNfKyDsXzDMaz1KDAabcUYRcZwrluxuSCPBcK1JirCj5R8uRY7
LDZFX92CO8zRgiij0mhgokV4zzuEQ56q1uhPxqI3o+wG3v44jlMSMgFHQJUevdET
aKr2Pss8Hb00XDztnpxprs6FUoU/W99NRH0i/5znbBwuHqYFP37zlKe2MRwbqDwR
AMgkrnGoawe85Stz4p/iR9pCLpAMa0dH94V4JrAP4+IQrl0DEKWbrolpQHii4gzh
NCGazMELTqkaZaorC/n1SmczH1kTj4vcjbbmeB8dwS8Vqhr+uf7W1oLlJ46TUOsp
ESO0uD2GfpHKQQwLxEfgjfmwsIUMbdWHef8f2HUuvl6Js+LCpaPkxd52Pt/qL4sU
0sKqTbldRZXzGhvwa0/MK32WhmH4v31s7IZAg5A2YxqDR6yWryl7legWyvrI96C0
OlmVe1C/2NGk0QCfK0G/xTa9V7YzMfj8k4ICSZOgUoF4BeGGj6d3svWvLbKbbrU1
0fVvR7aCm78pRXixI6kURpj9D0mEfqus9Hx7VoWcL0TS4QH2dSYlGI+jDCiliQmj
+kWrZWHsASSvPmUZk4RBNaviCbnGU8/t5nNdJSdFIUM/PIswzZ4GaAu6gdVksIY8
hcx410PyAzTZL2lENamE
=8T7+
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup
From Stephen Warren:
ARM: tegra: implement common DMA and resets DT bindings
This series converts the Tegra DTs and drivers to use the common/
standard DMA and reset bindings, rather than custom bindings. It also
adds complete documentation for the Tegra clock bindings without
actually changing any binding definitions.
This conversion relies on a few sets of patches in branches from outside
the Tegra tree:
1) A patch to add an DMA channel request API which allows deferred probe
to be implemented.
2) A patch to implement a common part of the of_xlate function for DMA
controllers.
3) Some ASoC patches (which in turn rely on (1) above), which support
deferred probe during DMA channel allocation.
4) The Tegra clock driver changes for 3.14.
Consequently, this branch is based on a merge of all of those external
branches.
In turn, this branch is or will be pulled into a few places that either
rely on features introduced here, or would otherwise conflict with the
patches:
a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid
conflicts.
b) The DRM tree, which introduces new code that relies on the reset
controller framework introduced in this branch, and to avoid
conflicts.
* tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits)
spi: tegra: checking for ERR_PTR instead of NULL
ASoC: tegra: update module reset list for Tegra124
clk: tegra: remove bogus PCIE_XCLK
clk: tegra: remove legacy reset APIs
ARM: tegra: remove legacy DMA entries from DT
ARM: tegra: remove legacy clock entries from DT
USB: EHCI: tegra: use reset framework
Input: tegra-kbc - use reset framework
serial: tegra: convert to standard DMA DT bindings
serial: tegra: use reset framework
spi: tegra: convert to standard DMA DT bindings
spi: tegra: use reset framework
staging: nvec: use reset framework
i2c: tegra: use reset framework
ASoC: tegra: convert to standard DMA DT bindings
ASoC: tegra: allocate AHUB FIFO during probe() not startup()
ASoC: tegra: call pm_runtime APIs around register accesses
ASoC: tegra: use reset framework
dma: tegra: register as an OF DMA controller
dma: tegra: use reset framework
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit 4dcfa60071 ("ARM: DMA-API: better
handing of DMA masks for coherent allocations") added an additional
check to the coherent DMA mask that results in an error when the mask is
larger than what dma_addr_t can address.
Set the LCDC coherent DMA mask to DMA_BIT_MASK(32) instead of ~0 to fix
the problem.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit 4dcfa60071 ("ARM: DMA-API: better
handing of DMA masks for coherent allocations") added an additional
check to the coherent DMA mask that results in an error when the mask is
larger than what dma_addr_t can address.
Set the LCDC coherent DMA mask to DMA_BIT_MASK(32) instead of ~0 to fix
the problem.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit 4dcfa60071 ("ARM: DMA-API: better
handing of DMA masks for coherent allocations") added an additional
check to the coherent DMA mask that results in an error when the mask is
larger than what dma_addr_t can address.
Set the LCDC coherent DMA mask to DMA_BIT_MASK(32) instead of ~0 to fix
the problem.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This reverts commit b652896b02.
Unfortunately this commit prevents multiplatform from booting to
the point where a serial console is available. Revert it while
a solution is sought.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This reverts commit 6dea2c1ebc.
Unfortunately this commit prevents multiplatform from booting to
the point where a serial console is available. Revert it while
a solution is sought.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit 7d7e1eb (ARM: OMAP2+: Prepare for irqs.h removal) and commit
ec2c082 (ARM: OMAP2+: Remove hardcoded IRQs and enable SPARSE_IRQ)
updated the way interrupts for OMAP2/3 devices are defined in the
HWMOD data structures to being an index plus a fixed offset (defined
by OMAP_INTC_START).
Couple of irqs in the OMAP2/3 hwmod data were misconfigured completely
as they were missing this OMAP_INTC_START relative offset. Add this
offset back to fix the incorrect irq data for the following modules:
OMAP2 - GPMC, RNG
OMAP3 - GPMC, ISP MMU & IVA MMU
Signed-off-by: Suman Anna <s-anna@ti.com>
Fixes: 7d7e1eba7e ("ARM: OMAP2+: Prepare for irqs.h removal")
Fixes: ec2c0825ca ("ARM: OMAP2+: Remove hardcoded IRQs and enable SPARSE_IRQ")
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
With commit '7dedd34: ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with
DEBUG_LL' we moved from parsing cmdline to identify uart used for earlycon
to using the requsite hwmod CONFIG_DEBUG_OMAPxUARTy FLAGS.
On DRA7 though, we seem to be missing this flag, and atleast on the DRA7 EVM
where we use uart1 for console, boot fails with DEBUG_LL enabled.
Reported-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com> # on a different base
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Fixes: 7dedd34694 ("ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with DEBUG_LL")
Signed-off-by: Paul Walmsley <paul@pwsan.com>
As the davinci-gpio driver is migrated to use irqdomain
there is no need to pass the irq base for the gpio driver.
This patch removes this variable from davinci_gpio_platform_data
and also the refrences from the machine file.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This patch adds DT board setup for the LaCie NAS LaPlug.
Chipset list:
- CPU MARVELL 88FR131 800Mhz
- SDRAM memory: 128MB DDR2-800 400Mhz
- 1 Ethernet Gigabit port (PHY MARVELL 88E1318)
- 1 Mini PCI-Express port
- 1 NAND 512 MB
- 1 push button
- 2 LEDs (red and blue)
- 4 USB Ports
Signed-off-by: Maxime Hadjinlian <maxime.hadjinlian@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This file is mainly a copy of kirkwood-6281.dtsi.
The pinctrl seems to be the same.
These platforms differs only with their CPU, memory capabilities and the
number of GPIO available (36 on 6192, 50 on 6281).
Signed-off-by: Maxime Hadjinlian <maxime.hadjinlian@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The per-CPU PMSU registers documented in the datasheet start at
0x22100 and the last register for CPU3 is at 0x22428. However, the DT
informations use <0x22100 0x430>, which makes the region end at
0x22530 and not 0x22430.
Moreover, looking at the datasheet, we can see that the registers for
CPU0 start at 0x22100, for CPU1 at 0x22200, for CPU2 at 0x22300 and
for CPU3 at 0x22400. It seems clear that 0x100 bytes of registers have
been used per CPU.
Therefore, this commit reduces the length of the PMSU per-CPU register
area from the incorrect 0x430 bytes to a more logical 0x400 bytes.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The ARMADA_XP_MAX_CPUS definition was in common.h, which as its name
says, is common to all mvebu SoCs. It is more logical to have this XP
specific definition in the already existing armada-370-xp.h header
file, especially in preparation to the addition of the support for
other SOCs in mach-mvebu.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that the DTS file r8a7790-koelsch.dts can be used with
board-koelsch.c and board-koelsch-reference.c, proceed with removing
r8a7790-koelsch-reference.dts.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Tested with RIIC2 on a genmai board. Others untested but hopefully
trivial enough to be added.
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Passing the register base address and IRQ through platform data is
deprecated. Use resources instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Passing the register base address and IRQ through platform data is
deprecated. Use resources instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Passing the register base address and IRQ through platform data is
deprecated. Use resources instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Passing the register base address and IRQ through platform data is
deprecated. Use resources instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Passing the register base address and IRQ through platform data is
deprecated. Use resources instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Passing the register base address and IRQ through platform data is
deprecated. Use resources instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Passing the register base address and IRQ through platform data is
deprecated. Use resources instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Passing the register base address and IRQ through platform data is
deprecated. Use resources instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Passing the register base address and IRQ through platform data is
deprecated. Use resources instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SCIF driver is transitioning to platform resources. Board code will
thus need to define an array of resources for each SCIF device. This is
incompatible with the macro-based SCIF platform data definition as an
array. Rework the macro to define platform data as individual
structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SCIF driver is transitioning to platform resources. Board code will
thus need to define an array of resources for each SCIF device. This is
incompatible with the macro-based SCIF platform data definition as an
array. Rework the macro to define platform data as individual
structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SCIF driver is transitioning to platform resources. Board code will
thus need to define an array of resources for each SCIF device. This is
incompatible with the macro-based SCIF platform data definition as an
array. Rework the macro to define platform data as individual
structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SCIF driver is transitioning to platform resources. Board code will
thus need to define an array of resources for each SCIF device. This is
incompatible with the macro-based SCIF platform data definition as an
array. Rework the macro to define platform data as individual
structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SCIF driver is transitioning to platform resources. Board code will
thus need to define an array of resources for each SCIF device. This is
incompatible with the macro-based SCIF platform data definition as an
array. Rework the macro to define platform data as individual
structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace copy-n-paste SCIF platform data and device declaration with a
macro. This reduces the amount of code and improves readability.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace copy-n-paste SCIF platform data and device declaration with a
macro. This reduces the amount of code and improves readability.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace copy-n-paste SCIF platform data and device declaration with a
macro. This reduces the amount of code and improves readability.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace copy-n-paste SCIF platform data and device declaration with a
macro. This reduces the amount of code and improves readability.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This is needed to use SRC (= Sampling Rate Converter)
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- Correct HSMMC1 card detection type for s3c6410-mini6410
- Fix different key mapping backslash and search key for exynos5250-snow
- Fix definitions of div_mmc_pre4 divider for CLK_SET_RATE_PARENT
- Fix clock provider for mshc on exynos4412
- Fix definitions of mshc dt nodes for exynos4x12
- use mshc controller for eMMC for exynos4412-trats2
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJStdJKAAoJEA0Cl+kVi2xq3JwQAKBmII+LxTO5GPYHfXa1lXq+
xJD48qkDJf8VXM1LfoFR6Hv5hq/76TjxW9WnkLQtdZNT7g6sBysSP83AVCx1cmVj
stvn1j3pqG4FAh3z6tALx6D/SqtgZjE3tqNMV8+5sadZ6g3k1D2cHqvCNfvac2a9
Sf0igi1SmHnVhuFbwjOfDtgDmhyYyLsiCQTtaCbz5raikYeAY5LLSEEYykPiOqSp
4cGtyOnfIoOS7+1JK4WKz38FYag9AN3nTVhcST70tdKRk5yhZdDOGgERS1DB3kcc
14hZQ1YIm/Z/xHA9fqbY337ttSMyE2yt8rYYxwYZ/25y0RkqGMbLj3w/Prrccfn/
14JU6mogBZQgZg08cST8lvxjBfCsYPo2iOeSOEIs2QB5ZLsmN4BleG6G8Pw6Vz2D
S2cU3Y43vxcnTDLzR3SzyYSWKMArY5wEFl7Z07eZ16pJp6a5G+rBSJF7MCQ1/Rtn
KH1+jKzuNmHhFw2sxUC4t3m0ED+kHSEmhy+v7xaU2rHqB2Gjfs4512migR6cLhks
Lj2S7MEmMKcTFsT25TToU/GKhtN6VljbAMdB2kYJqJBMYNpZMqJqZ7faL6/k2SE6
OwlvY9x2975I0w+JFm11IPxUTDfTvXC7Ga9i12gabxmiq8yy3aIL1kiAqsGYI+KT
DDeSqKAdcGNlTRKmcFQ+
=GEJ/
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/fixes-non-critical
From Kukjin Kim:
Samsung non-critical 2nd fixes for v3.14
- Correct HSMMC1 card detection type for s3c6410-mini6410
- Fix different key mapping backslash and search key for exynos5250-snow
- Fix definitions of div_mmc_pre4 divider for CLK_SET_RATE_PARENT
- Fix clock provider for mshc on exynos4412
- Fix definitions of mshc dt nodes for exynos4x12
- use mshc controller for eMMC for exynos4412-trats2
* tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2
ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12
ARM: dts: add clock provider for mshc node for Exynos4412 SOC
clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider
ARM: dts: Fix exynos5250-snow's search key to be L_META
ARM: dts: Add the missing "\" key in non-US keyboards for exynos5250-snow
ARM: S3C64XX: Correct card detect type for HSMMC1 for MINI6410
Signed-off-by: Olof Johansson <olof@lixom.net>
- add DMA controller, SPI, and TMU DT nodes for exynos5420
- add PWM DT nodes for exynos5250 and exynos5420
- drop interrupt controller properties from MCT nodes
because MCT is not an interrupt controller
- move MCT nodes to exynos4x12 from board because it is
a per-processor interrupt and same 4212 and 4412
- use one cell for MCT interrupt map for exynos4 SoCs
- update Exynos MCT DT bindings accordingly
- fix missing spaces after labels for exynos
- fix mmc status property for exynos5250-snow
- add MCLK for codec for exynos5250-smdk5250
- disable SPI and I2C by default for exynos5250 SoC
and enable into requiring some boards
- rename cros5250-common to exynos5250-cros-common
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJStdZ4AAoJEA0Cl+kVi2xqKLoQAJ8olXLjuttLfQ/devNh/d3T
Asm2d0Ure05aGBij0TnjeBpjc7nxqBVWTrmDAbFWVT5ySKy/q3ujlk0OUdybDBZE
iclvgmX8TnQYLxM4uxVljv6SUrf82fDFyYmuhVVG0YnouZmc0CPNmtJITdsk5b4g
HagFfCzcigWYMULsByADL7REOSa4qzB1pwHAI/cQTH0KkYbmBgFCVTCnW9DnTCD0
jH30MwDgdb9P7c9ZD7DfDngs7hmAiB6++syx9/o1DkjtoGl2GFsOUI8Er8bqwxF/
5j/fm1DYz194T9DT9PF143xKiOuxNUvZkP9azWfVPg7w8PwPrDsk+W5XBZ4flH9z
M9Qm/onQAkZI7kiQz0sSoYukZ76Cm8pLt8XlYrwg1+s5lD/UAjolr312w9ZOOP3I
M/36W7PUcfYSbi3DNJJThiRU9q5kySSfs0128AKzO/8P2qiXXUq3wtZAQsOAjeBn
oHsPypdyv43dCC2spVop87ZRCk9uocLEWV54imJsVBrUX/MPWJLvcz33/GMqCCNq
H5R+QJQrDhiDi/O5rvs+Nnlv5NRzS6HP6ZSFFvqrnZ7ilpYSEUNbKDe+gaP5gXbV
iIAaKgMj8lRe57eC1Vpa3PnBRoitI80x50ABNcxztX9BqW9jW3e0bnE1dsh0B80O
WzTYqfT7hsNpXFYseyMv
=YqMd
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
From Kukjin Kim:
Samsung DT 2nd updates for v3.14
- add DMA controller, SPI, and TMU DT nodes for exynos5420
- add PWM DT nodes for exynos5250 and exynos5420
- drop interrupt controller properties from MCT nodes
because MCT is not an interrupt controller
- move MCT nodes to exynos4x12 from board because it is
a per-processor interrupt and same 4212 and 4412
- use one cell for MCT interrupt map for exynos4 SoCs
- update Exynos MCT DT bindings accordingly
- fix missing spaces after labels for exynos
- fix mmc status property for exynos5250-snow
- add MCLK for codec for exynos5250-smdk5250
- disable SPI and I2C by default for exynos5250 SoC
and enable into requiring some boards
- rename cros5250-common to exynos5250-cros-common
* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (27 commits)
ARM: dts: Rename Exynos5250 ChromeOS common file to have exynos prefix
ARM: dts: Disable I2C controllers by default on Exynos5250
ARM: dts: Leave Exynos5250 SPI controller disabled by default
ARM: dts: Add CODEC MCLK for SMDK5250
ARM: dts: Add device nodes for TMU blocks for exynos5420
ARM: dts: Fix status property of mmc nodes for snow board
ARM: dts: Fix missing spaces after labels for exynos
ARM: dts: Simplify MCT interrupt map for exynos4 SoCs
ARM: dts: Move MCT node to exynos4x12.dtsi
ARM: dts: Drop interrupt controller properties from MCT nodes for exynos4 SoCs
Documentation: devicetree: Update Exynos MCT bindings description
ARM: dts: add pwm DT nodes to Exynos5250 and Exynos5420
ARM: dts: Add SPI nodes to the exynos5420 device tree file
ARM: dts: Add DMA controller node info on Exynos5420
ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2
ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12
ARM: dts: add clock provider for mshc node for Exynos4412 SOC
clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider
ARM: dts: Fix exynos5250-snow's search key to be L_META
ARM: dts: Add the missing "\" key in non-US keyboards for exynos5250-snow
...
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQEcBAABAgAGBQJSt1TYAAoJEHm+PkMAQRiGvWgH/iWg8TmEWz4KUKuHthuUi0uh
9+2YDN+4k577Xa0obaG24giQeqkCdxMr3oJrS3FO9jeAmaNRHEGhxUPneisb7RtN
9jIVsz5bPa9/DcK9nqtaUQdvA0O5AWTE6AAPmwleTVy+8CygBo987T2uGELnQCSR
FrKCrMePc7Pj0uthMVXrpJ17Ffm/j7jkfRtPhrxHJyngh3jEux+tPbpynH/aKuO2
47unsSQimoFk7n2SPFvNu3E/vZE2xVbu5SH9MCl5yyiCifFjpi3B71LV/FW51lvm
cK8Jzn2BmYDygRFjnZfq4zJHqYJCBHzpjCLWmR37Dm/JS91aGq3+Cg0stDP8UTs=
=+Hcn
-----END PGP SIGNATURE-----
Merge tag 'v3.13-rc5' into next
Linux 3.13-rc5
* tag 'v3.13-rc5': (231 commits)
Linux 3.13-rc5
aio: clean up and fix aio_setup_ring page mapping
aio/migratepages: make aio migrate pages sane
aio: fix kioctx leak introduced by "aio: Fix a trinity splat"
Don't set the INITRD_COMPRESS environment variable automatically
mm: fix build of split ptlock code
pstore: Don't allow high traffic options on fragile devices
mm: do not allocate page->ptl dynamically, if spinlock_t fits to long
mm: page_alloc: revert NUMA aspect of fair allocation policy
Revert "mm: page_alloc: exclude unreclaimable allocations from zone fairness policy"
mm: Fix NULL pointer dereference in madvise(MADV_WILLNEED) support
qla2xxx: Fix scsi_host leak on qlt_lport_register callback failure
target: Remove extra percpu_ref_init
arm64: ptrace: avoid using HW_BREAKPOINT_EMPTY for disabled events
ARC: Allow conditional multiple inclusion of uapi/asm/unistd.h
target/file: Update hw_max_sectors based on current block_size
iser-target: Move INIT_WORK setup into isert_create_device_ib_res
iscsi-target: Fix incorrect np->np_thread NULL assignment
mm/hugetlb: check for pte NULL pointer in __page_check_address()
fix build with make 3.80
...
Conflicts:
drivers/usb/phy/Kconfig
Adds USB OTG/PHY and clock support to BCM281xx and enables
UDC support on the bcm11351-brt and bcm28155-ap boards.
Signed-off-by: Matt Porter <mporter@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Specify the external clock label in the timer node.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Specify the external clock label in each SDHCI node.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
The frequency property in "snps,dw-apb-uart" entries are no longer
required if the rate of the external clock can be determined using the
clk api (see e302cd9 serial: 8250_dw: add support for clk api).
This patch replaces the frequency property in the UART nodes of
bcm11351.dtsi with references to the relevant clocks following the
common clock binding.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Add the DTS nodes for all the i2c busses in the SoC.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Declare clocks that are enabled and configured by bootloaders as fixed
rate clocks in the DTS such that device drivers may use standard clock
function calls.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Enable all available i2c busses.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
- now that PWM driver is on its way to mainline,
we can integrate the DT entries
- As an example, use PWM for at91sam9m10g45ek leds
- Addition of clock specification for newly introduced
crypto DT entries
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJSs3m1AAoJEAf03oE53VmQCDoIAKZ/pNYodYajIozdsYb0+WEw
VKYMkwBwA02tq2XNcbIty5no47kt4516bm6rQ+KWwtMeWXnQChbh1d/cZQSu0xQi
ULbJX5HgRmtgYWR38+T4CkdqG2RmP4UOQjBv4nB0O1vuIEx6CAXbI3NU5zrcgsJu
AbzpR5oImwsQJjjeRQ5qpuRSAfcUZVmDKN7f/SG3s77xNJYhBcVhWAshZDy67sMY
ZYs+2dihUZH2CbZS/Cd6lx2tg5EkTFsZzdX3ZccotE858EMHIF3Ft/1OtuKOXFpm
t3Q6pzOLgOTFzMQbZzZz3jd0kG9GAxiqx5ownPSklV6boUXoLllXR5LzdwQ13qs=
=vTcc
-----END PGP SIGNATURE-----
Merge tag 'at91-dt2' of git://github.com/at91linux/linux-at91 into next/dt
From Nicolas Ferre:
Second DT pull-request for 3.14
- now that PWM driver is on its way to mainline,
we can integrate the DT entries
- As an example, use PWM for at91sam9m10g45ek leds
- Addition of clock specification for newly introduced
crypto DT entries
* tag 'at91-dt2' of git://github.com/at91linux/linux-at91:
ARM: at91/dt: add clk properties to sama5d3 TDES device node
ARM: at91/dt: add clk properties to sama5d3 AES device node
ARM: at91/dt: add clk properties to sama5d3 SHA device node
ARM: at91: at91sam9m10g45ek: switch to PWM leds
ARM: at91: add PWM device node
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add support Octa Cores for exynos5420
: populate CPU node entries to 8 Cores
: extend mct to support 8 local interrupts
- Update dwmmc nodes for exynos5250 and exynos5420
: change status property of dwmmc nodes for exynos5250
: move dwmmc nodes from exynos5 to exynos5250 because
it's different between exynos5250 and exynos5420
: rename mmc nodes from dwmmc for exynos5 SoCs
: add dwmmc nodes for exynos5420
- Add G-Scaler nodes for exynos5420
- Add HS-i2c nodes in exynos5420
: High Speed I2C 7 channels (4 to 10)
- Update sysreg binding and node name in exynos4
- Update min voltage on exynos5250-arndale
- Move fifo-depth property from boards to exynos5250 SoC
: because the fifo-depth property is SoC specific
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSrgntAAoJEA0Cl+kVi2xqfUIP/1eXRFBrF2l6CB27MwdAW3hk
MXNYNwGhftKW/rvZJSMhfkqd3LIuJf707T5gLhfhC1yDi7ahK0BNa8UE1zoaRFC4
IaLvG+8jWiZkvunxOA504FEmO3EMw1ed0bV5Odo74Eelz1qqWwYT4pXcBgY+/Lyi
tqxzSVaN9api3PxvY/RLy8sR9phF4jJ/hXrHMVf0L7CIuPpWyWKcUmav6uo3oJNv
xYYK6xBGuLGr/LgWAwqj+4lPDx3dJtqMUkFV8p7UzhK0mSG3MnQCOFDd6FwznYkR
Exy4KqIMZZLBv8ZnyA69QApOk3x2K9SqeUG7aXiqV751idjKy7s8/UPZ3fNhWiaq
ytExM0VTSVArR9M/Qym2DDCvI4x0u80SeMTcR/igLAySnY2e4Hf61T7JJcmYiWOU
V3cuoVVe6wzMK/Ng31UkYaUlFTPg5N7YJoyD1wXQa9fZcwxFYFHpA35M/68rUdMp
5SsYTFSK5wMwYdup7QsqqbylUAiydzICiFZ1SFBFL2NPpMyIRFVxowChimkKnx6/
BjVtkDd9LaM1sNHHWFO+BavOvlxRmivSbIv6q+50Ax7FO7f4aGr2KnJI9Npao859
5+wCVTxTZPZJecRlcjx/XGjX+kvnb5MqqVVGy0JbYcpElN+0ZLUPDnttwlr9Rxm1
i64VkezAAGVNeLWqX+LS
=6e6p
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
From Kukjin Kim:
Samsung DT updates for v3.14
- Add support Octa Cores for exynos5420
: populate CPU node entries to 8 Cores
: extend mct to support 8 local interrupts
- Update dwmmc nodes for exynos5250 and exynos5420
: change status property of dwmmc nodes for exynos5250
: move dwmmc nodes from exynos5 to exynos5250 because
it's different between exynos5250 and exynos5420
: rename mmc nodes from dwmmc for exynos5 SoCs
: add dwmmc nodes for exynos5420
- Add G-Scaler nodes for exynos5420
- Add HS-i2c nodes in exynos5420
: High Speed I2C 7 channels (4 to 10)
- Update sysreg binding and node name in exynos4
- Update min voltage on exynos5250-arndale
- Move fifo-depth property from boards to exynos5250 SoC
: because the fifo-depth property is SoC specific
* tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Update Samsung sysreg binding document
ARM: dts: Fix sysreg node name in exynos4.dtsi
ARM: dts: Add hs-i2c nodes to exynos5420
ARM: dts: Update min voltage for vdd_arm on Arndale
ARM: dts: populate cpu node entries to 8 cpus for exynos5420
clocksource: mct: extend mct to support 8 local interrupts for Exynos5420
ARM: dts: Add device nodes for GScaler blocks for exynos5420
ARM: dts: Add dwmmc DT nodes for exynos5420 SOC
ARM: dts: rename mmc dts node for exynos5 series
ARM: dts: Move fifo-depth property from exynos5250 board dts
ARM: dts: change status property of dwmmc nodes for exynos5250
ARM: dts: Move dwmmc nodes from exynos5.dtsi to exynos5250.dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
- Skip eint_init() for pinctrl-exynos because of re-executing
- Use CPU_V6K for S3C64XX(ARM1176JZF-s) instead of CPU_V6
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSrf9BAAoJEA0Cl+kVi2xq7WgP/1/OiO9HmRZS9KfPhHvTIWzv
EqQD/EN17C9oCQuEGIU218BwGnzXUuf3zV4q29nxxEAqQMwx2Fd+cMkmGD+Sx+OY
GKl36akYv0/4zvXh2epCZ8lZsZPlsGyGihHUbbhghvZYf0G60QC0oUf5jGcGsjy2
OYqUntF+I0AUhzkwlCRSNp5fi9hzGH3zNwWEHFIsXdt1S79EpCrVckKUU6ES+gKq
PmMgPSbttJqxIU+KQ8WdAc8xgqgJIWw1KZoOqtnLxxqKEqO6L89AT/EO5WT1+QSs
1a3c8jkZxkVpy2j2o8DRiK6/G40sYs2AVydHzIT9k4o2WMGWeRWy6GTqDUupj2w6
qFHkMm6QhMyiCxqwIaXzNGjfHVPcjQ8YwS6zuQHDyIzzHvm2VbbFEX+ZJpVbIjx8
xCC00cxI+JVVJRtTm9uIuiWj4OrbP5CQvmgByglyWW0t2bRI4BX7jRTAT/87Ausz
zq4MKhxLA/A/DPPek8gq7r7/0WQhgw1MyqVl43W287Ex5gYEOzNPfBAkPxJvYEk3
lX5F3P++a/XFKGq/CWKuc2DhMEw3geeG66WTaCXzh1jWnDLoa9NsZrugRkwfvK4M
dLlG/iS4LWyplzVDjIP4P+2t+SKzNxlB5nD7nQClm54t6gKThh4N9EXkBm+MS/qT
ZeD1xfD6QCLssFa2zkf2
=030e
-----END PGP SIGNATURE-----
Merge tag 'samsung-dev' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
From Kukjin Kim:
Samsung updates for v3.14
- Skip eint_init() for pinctrl-exynos because of re-executing
- Use CPU_V6K for S3C64XX(ARM1176JZF-s) instead of CPU_V6
* tag 'samsung-dev' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C64XX: Select CPU_V6K instead of CPU_V6
ARM: SAMSUNG: if detected device tree skip irq init for S5P
Signed-off-by: Olof Johansson <olof@lixom.net>
- increase number of CPU to 8 for EXYNOS SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSrf2OAAoJEA0Cl+kVi2xqGRwP/RRwDYNSz+0Es/DQUVFfFKVE
+4vdZsGwlVtzt78Ns4VsNDi7XHqD3i4c4SQw/LB9jlFxxVSb3WNJbrKdZrhn6sFE
WoWpYs+2LHjiItCanUOy0Mnqj72Dg6Gdh8JM7zmCy9RLlrDuALAuC5Md4WpoPnpp
lKx8MzBt9x9hgFWtpnFBRPfVHKFmNvKoWGfLdu8kUmf//uJvNvGL4hURpC0zQgBd
Ii9j6r3EQhLsb/CV7Hr8Fyojmf8YWD5Y5COxT1EzHOUY3Qn7z1ZCKI3pCyNVGBrL
5Lurpaxo3M26Ibjm9yG2pz26tZSvm795ffCoN273jq2TKWu9Q+XOY8N+wAD/DuEY
CyH71VYFp0CgDiFcLbQw49aa8iS7bVKLzIsU3MbebG1HzDrLQ8ZEHAIUiTnQs/y7
WUTs8VKmLqYyg9CkQMhIDr5Fa4kkEFKUtNFSQKvThAiGqiZKQEnyV4PXkvYb9MhK
/LWPjYfGgXEd4t7a3O1g8ZY/u2hqOqMmkYnwSYEgb6/MDympPOIppCDgBrIuNDpY
VxksI2jno2CGtCph9OE4lFJjrexIBoK665sIEk+t0C5zpefdJCj5tEjN94vBm6EL
aH0pMep11cLhnjsK1W/OpnjheP56B7sAuT4vE8JFlXu9IjarUi3jUVOdAZK/902Y
fskRjxCczAV2pYUfxhnr
=Lz/U
-----END PGP SIGNATURE-----
Merge tag 'samsung-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/boards
From Kukjin Kim:
exynos_defconfig updates for v3.14
- increase number of CPU to 8 for EXYNOS SoCs
* tag 'samsung-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: exynos_defconfig: increase CONFIG_NR_CPUS value to 8
Signed-off-by: Olof Johansson <olof@lixom.net>
- Switch FIFO mode for arch_enable_uart_fifo()
- Add missing op_mode for PMIC on exynos5250-arndale
- Add missing clock-frequency for CPU on exynos5250
- Fix typo samaung to samsung for exynos5420-pinctrl
- Fix display clock-frequency for exynos4210/exynos4412-origen
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSrgY0AAoJEA0Cl+kVi2xqNw8P+wUQdgTwRIUlXVh18WDrhHE2
V0DlHeG0vsejIm5l/IC72kXDJWs6kvjqAEeEmo8W5V2JH+aEKCuqIZNrsszXo7v8
/PCjgukGTmmJWgmwzT8rSH18xH90IcpVe0S6mOAoRnqu2RWsnZF/YQ0iUsITzd4k
xfRnkedhxXmT9QL7nXM57acFhMg04vZpaBJtjEoV1suYhUOgf031AhnKsQuZpSev
ldvcKrZrGLr1plXdOk5Gd+mRtwjTaF4HadvvNIy3Kch1s2w4hu9Mvr8UqGk5cbha
GVlJ/10ESYV/p2HLtwjJvUGeRkVvywC+dtQrn0KWZ7ZHSn+Yq+hwmzuyeTw7yCb3
dYp8o+ry0BDgAGs7nLHe/COTJz4XroYwNFvMGqLePMdyDv2VHvnS0yGaOA5VN11U
2BUuqgkOuhCrvLeN2bYRjGKHRQg87sOh3v5vDnU9DSNo9gTzU2K5W8A1mkvNKMgG
MwQwUodsHVLCzHylt9JDaE2r5/HBj+LYU+4bGbrWhwKGz7SUYvFYwNKzW2TAE3sq
PZ+FckZd95wIA9Imo/JYSF306q/83m7Thmy6/zhjlWmSLZEhe/FAUCc6Ys3tZSit
TmduB8Uvu3l2ToOI5R2QHCJRN7BMP1zOvnWVDSHSN6P4g3MoT71dZZ1GAhG3y6kX
HoSLzj1AiFjtBs713fVo
=9LEO
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/fixes-non-critical
From Kukjin Kim:
Samsung non-critical fixes for v3.14
- Switch FIFO mode for arch_enable_uart_fifo()
- Add missing op_mode for PMIC on exynos5250-arndale
- Add missing clock-frequency for CPU on exynos5250
- Fix typo samaung to samsung for exynos5420-pinctrl
- Fix display clock-frequency for exynos4210/exynos4412-origen
* tag 'samsung-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Update display clock frequency for Origen-4412
ARM: dts: Update display clock frequency for Origen-4210
ARM: dts: Fix a typo in exynos5420-pinctrl.dtsi
ARM: dts: Add missing frequency property to exynos5250
ARM: dts: Add missing op_mode property to PMIC on Arndale
ARM: SAMSUNG: Fix switching FIFO in arch_enable_uart_fifo function
Signed-off-by: Olof Johansson <olof@lixom.net>
Add a generic (dtsi) include file for MOXA ART SoCs.
Also add a file for UC-7112-LX.
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
The MOXA ART SoC is based on Faraday's FA526. This is a ARMv4 32-bit
192 MHz CPU with MMU and 16KB/8KB D/I-cache.
Add platform support for this SoC.
Also add UC-7112-LX as a machine.
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
This branch contains these fixes:
- SMP cleanups
- platform initialization cleanup
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iEYEABECAAYFAlKnFY4ACgkQykllyylKDCFl5QCeLkO5Cbsye59zgq54MaB2W+TE
r8wAn2ghJvZvHMdAAg1nfleknY/W7nJx
=atEt
-----END PGP SIGNATURE-----
Merge tag 'zynq-cleanup-for-3.14' of git://git.xilinx.com/linux-xlnx into next/cleanup
From Michal Simek:
ARM: Xilinx Zynq cleanup patches for v3.14
This branch contains these fixes:
- SMP cleanups
- platform initialization cleanup
* tag 'zynq-cleanup-for-3.14' of git://git.xilinx.com/linux-xlnx:
ARM: zynq: remove unnecessary setting of cpu_present_mask
arm: zynq: Set proper GIC flags
arm: zynq: Use of_platform_populate instead of bus_probe
arm: zynq: Add support for zynq_cpu_kill function
arm: zynq: Invalidate L1 in secondary boot
arm: zynq: platsmp: Remove CPU presence check
Signed-off-by: Olof Johansson <olof@lixom.net>
Much smaller batch of fixes this week.
Biggest one is a revert of an OMAP display change that removed some non-DT
pinmux code that was still needed for 3.13 to get DSI displays to work.
There's also a fix that resolves some misdescribed GPIO controller
resources on shmobile. The rest are mostly smaller fixes, a couple of
MAINTAINERS updates, etc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJStx0EAAoJEIwa5zzehBx3G+gP/3qH83dbelntB3R7Ve3KbT41
YT0q4G8s4Kper+qSXK2eJRTcEUfZBhtXw2GytnEjwdj6xRtTYmdzUIE/7awwzxQx
EkcwyCKiMLhVqjBgYg0fr11RBmbvQxKV0L2iIHoV5N/VJa/I7DN4N1J0PwB/7tuQ
OVpy3UOuutvtV3k4/G4tminixx1Y6JjPy7vEs8oiQoc7MRrMwe4zC2pgRF5eVfFG
uNfRk1IEpvoFM+ir+ZmKJYVsEGXlC/bLwO7KPql6801n7987uQni9YoyUy+7cLGp
CVCSaD7iGVPde8ijfUN84C8IezjfkA/wA9cxaGBj9lD7EdcvXEdtvDiFXpQcZDYY
NZX9p7+ZzTNzKSRIPKET8Ky3GNqDGCoaCoV9YTpUGwMHXmoK66QJpNy1boW0fZ2B
yy3gT0fxJYRKMTiFdV+y77BFpLDNkDGnjuVQEovKC8mX2YfqjR0sOTFjHBhPWk8P
gZ2Lzq1V/j0gd6/YxNStVngQK6/CiA9/qBUeBgiIU6vAzPcpk4HcwapFCcUeU4mU
l8Iga63cBu3iSobSNTcF7EB1iHwOQOTH7txtD1RtPsWxZgXG74kwmtWC336aEhlJ
fixoZIQvzPdQLqtZIMm87jJHXYsBZJnnqCTmFTgfn26Wb79qnS4WMt2tahCLGrkO
RGDjdfaXw46WbJZ25kcJ
=6Nj7
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Much smaller batch of fixes this week.
Biggest one is a revert of an OMAP display change that removed some
non-DT pinmux code that was still needed for 3.13 to get DSI displays
to work.
There's also a fix that resolves some misdescribed GPIO controller
resources on shmobile. The rest are mostly smaller fixes, a couple of
MAINTAINERS updates, etc"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
Revert "ARM: OMAP2+: Remove legacy mux code for display.c"
MAINTAINERS: Add keystone clock drivers
MAINTAINERS: Add keystone git tree information
ARM: s3c64xx: dt: Fix boot failure due to double clock initialization
ARM: shmobile: r8a7790: Fix GPIO resources in DTS
irqchip: renesas-intc-irqpin: Fix register bitfield shift calculation
ARM: shmobile: lager: phy fixup needs CONFIG_PHYLIB
We recently sorted the nodes in dove, orion5x, kirkwood, and armada
370/xp. However, I missed this file. -6281 is fine.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add nodes for the two SATA PHYs on kirkwood.
Add node for the one SATA PHY on Dove.
Add pHandles to the PHYs in the sata nodes.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add infrastructure to handle distributor and cpu interface register
accesses through the KVM_{GET/SET}_DEVICE_ATTR interface by adding the
KVM_DEV_ARM_VGIC_GRP_DIST_REGS and KVM_DEV_ARM_VGIC_GRP_CPU_REGS groups
and defining the semantics of the attr field to be the MMIO offset as
specified in the GICv2 specs.
Missing register accesses or other changes in individual register access
functions to support save/restore of the VGIC state is added in
subsequent patches.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The arch-generic KVM code expects the cpu field of a vcpu to be -1 if
the vcpu is no longer assigned to a cpu. This is used for the optimized
make_all_cpus_request path and will be used by the vgic code to check
that no vcpus are running.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Support setting the distributor and cpu interface base addresses in the
VM physical address space through the KVM_{SET,GET}_DEVICE_ATTR API
in addition to the ARM specific API.
This has the added benefit of being able to share more code in user
space and do things in a uniform manner.
Also deprecate the older API at the same time, but backwards
compatibility will be maintained.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Support creating the ARM VGIC device through the KVM_CREATE_DEVICE
ioctl, which can then later be leveraged to use the
KVM_{GET/SET}_DEVICE_ATTR, which is useful both for setting addresses in
a more generic API than the ARM-specific one and is useful for
save/restore of VGIC state.
Adds KVM_CAP_DEVICE_CTRL to ARM capabilities.
Note that we change the check for creating a VGIC from bailing out if
any VCPUs were created, to bailing out if any VCPUs were ever run. This
is an important distinction that shouldn't break anything, but allows
creating the VGIC after the VCPUs have been created.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Rework the VGIC initialization slightly to allow initialization of the
vgic cpu-specific state even if the irqchip (the VGIC) hasn't been
created by user space yet. This is safe, because the vgic data
structures are already allocated when the CPU is allocated if VGIC
support is compiled into the kernel. Further, the init process does not
depend on any other information and the sacrifice is a slight
performance degradation for creating VMs in the no-VGIC case.
The reason is that the new device control API doesn't mandate creating
the VGIC before creating the VCPU and it is unreasonable to require user
space to create the VGIC before creating the VCPUs.
At the same time move the irqchip_in_kernel check out of
kvm_vcpu_first_run_init and into the init function to make the per-vcpu
and global init functions symmetric and add comments on the exported
functions making it a bit easier to understand the init flow by only
looking at vgic.c.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
For migration to work we need to save (and later restore) the state of
each core's virtual generic timer.
Since this is per VCPU, we can use the [gs]et_one_reg ioctl and export
the three needed registers (control, counter, compare value).
Though they live in cp15 space, we don't use the existing list, since
they need special accessor functions and the arch timer is optional.
Acked-by: Marc Zynger <marc.zyngier@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Initialize the cntvoff at kvm_init_vm time, not before running the VCPUs
at the first time because that will overwrite any potentially restored
values from user space.
Cc: Andre Przywara <andre.przywara@linaro.org>
Acked-by: Marc Zynger <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The current KVM implementation of PSCI returns INVALID_PARAMETERS if the
waitqueue for the corresponding CPU is not active. This does not seem
correct, since KVM should not care what the specific thread is doing,
for example, user space may not have called KVM_RUN on this VCPU yet or
the thread may be busy looping to user space because it received a
signal; this is really up to the user space implementation. Instead we
should check specifically that the CPU is marked as being turned off,
regardless of the VCPU thread state, and if it is, we shall
simply clear the pause flag on the CPU and wake up the thread if it
happens to be blocked for us.
Further, the implementation seems to be racy when executing multiple
VCPU threads. There really isn't a reasonable user space programming
scheme to ensure all secondary CPUs have reached kvm_vcpu_first_run_init
before turning on the boot CPU.
Therefore, set the pause flag on the vcpu at VCPU init time (which can
reasonably be expected to be completed for all CPUs by user space before
running any VCPUs) and clear both this flag and the feature (in case the
feature can somehow get set again in the future) and ping the waitqueue
on turning on a VCPU using PSCI.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Make it easier to notice the common file for ChromeOS devices based on
the Exynos5250 by giving it the exynos5250 prefix that the boards have.
Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Ensure that unused I2C controllers are not activated, causing problems due
to inappropriate pinmuxing or similar, by marking the controllers as
disabled by default and requiring boards to explicitly enable those that
are in use.
Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Olof Johansson